Light emitting diode based on selected area self-assembly nanostructure and preparation method thereof

Abstract

The invention relates to the technical field of light-emitting diodes, and discloses a light-emitting diode based on a selected area self-assembly nanostructure and a preparation method of the light-emitting diode. A main buffer layer disposed on one side surface of the substrate layer; the distributed Bragg reflector structure comprises a plurality of porous n-type doped layers and a plurality of n-type doped layers, and the plurality of porous n-type doped layers and the plurality of n-type doped layers are alternately arranged from bottom to top; the silicon dioxide dielectric mask layer is arranged on the surface of one side, far away from the main buffer layer, of the n-type doping layer on the uppermost layer, a plurality of windows arranged in an array mode are formed in the silicon dioxide dielectric mask layer, and the windows expose partial area of the n-type doping layer on the uppermost layer; the plurality of hexagonal pyramid structures are in one-to-one correspondence with the plurality of windows; the active layer is arranged on the semi-polar surfaces of the plurality of hexagonal pyramid structures and is used for emitting red light; and the p-type doped layer is arranged on the surface of one side, far away from the hexagonal pyramid structure, of the active layer. According to the invention, the mismatched stress can be relaxed, and the indium component is improved.

Description

Technical Field

[0001] This invention relates to the field of light-emitting diode (LED) technology, specifically to an LED based on selected area self-assembly of nanostructures and its fabrication method, which is applicable to the fabrication of high-efficiency red light emitting micro / nano-LED devices. Background Technology

[0002] Nitride semiconductor materials, especially indium gallium nitride (InGaN), have broad application prospects in visible light emitting devices due to their excellent thermal stability, high brightness, and low power consumption. With the development of high-resolution display and micro-display technologies, InGaN-based Micro-LEDs have become an important research direction in the display field. Although InGaN materials have been commercialized in the blue and green light bands, realizing them in the red light (620nm) band still faces many challenges.

[0003] In the InGaN system, achieving red light emission requires significantly increasing the indium (In) content in the quantum well (typically reaching 25%–35%) to effectively reduce the band gap. However, a high In content exacerbates the lattice and thermal mismatch between InGaN and the underlying GaN layer, leading to large strain and high-density dislocation defects in the epitaxial layer. These defects typically exist as nonradiative recombination centers, severely affecting the device's internal quantum efficiency. Furthermore, due to the strong spontaneous and piezoelectric polarization characteristics of group III nitrides, a strong built-in electric field is formed in the InGaN / GaN quantum well, further inducing a severe quantum confined Stark effect (QCSE), causing carrier separation and reduced luminous efficiency, especially with high In content. Therefore, a major challenge in realizing red Micro / Nano-LEDs from InGaN is to address the significant strain and reduced polarization effects caused by the lattice mismatch between InGaN and GaN while maintaining epitaxial process compatibility and structural stability.

[0004] In existing research, using porous template layers as strain-relieving structures is a feasible approach. Porous layers can release lattice stress to some extent and provide strain regulation for subsequent epitaxy, which helps to increase the In doping ratio. However, directly performing secondary epitaxy on porous layers still suffers from problems such as decreased crystal quality, poor thermal stability, and difficulty in controlling the epitaxial process, limiting its practical application. Therefore, developing an innovative structural design and process method with controllable structure, strong strain-relieving ability, and suitability for high In composition epitaxial growth is of great significance for advancing the development of InGaN red micro / Nano-LEDs. Summary of the Invention

[0005] In view of this, the present invention provides an LED based on selected region self-assembled nanostructures and its preparation method, so as to improve the problem of significant strain and reduced polarization effect caused by lattice mismatch between InGaN and GaN.

[0006] In a first aspect, the present invention provides an LED based on a selected area self-assembled nanostructure, the LED comprising: a substrate layer; a main buffer layer disposed on one side surface of the substrate layer; and a distributed Bragg reflector structure. The Bragg Reflector (DBR) comprises multiple porous n-type highly doped layers and multiple n-type low-doped layers, which are alternately arranged from bottom to top. The bottommost porous n-type highly doped layer is located on the surface of the main buffer layer away from the substrate, and the doping concentration of the porous n-type highly doped layer is at least one order of magnitude greater than that of the n-type low-doped layer. A silicon dioxide (SiO2) dielectric mask layer is disposed on the surface of the topmost n-type doped layer away from the main buffer layer, and multiple windows are formed on the SiO2 dielectric mask layer, exposing a portion of the topmost n-type doped layer. Multiple hexagonal pyramidal structures correspond one-to-one with the windows, and the hexagonal pyramidal structures are located within the corresponding windows. An active layer is disposed on the semi-polar surface of the multiple hexagonal pyramidal structures for emitting red light. A p-type doped layer is disposed on the surface of the active layer away from the hexagonal pyramidal structures.

[0007] The LED based on selected region self-assembled nanostructures provided in this embodiment can effectively reduce stress during subsequent epitaxy and improve the quality of the epitaxial layer due to the stress relaxation effect of the porous layer in the DBR structure. Simultaneously, by performing secondary epitaxy on the hexagonal pyramidal semi-polar surface of the active layer's quantum well, the polarization electric field can be effectively weakened, the incorporation efficiency of In atoms can be improved, the QCSE effect can be reduced, and the radiative recombination probability of charge carriers will also increase accordingly, thereby improving the luminous efficiency of the LED.

[0008] In one alternative implementation, the number of both the porous n-type doped layer and the number of n-type doped layers is greater than or equal to 10.

[0009] In this embodiment, the number of porous n-type doped layers and the number of n-type doped layers are both greater than or equal to 10, which can improve the overall reflectivity and make the wavelength range of reflected light more concentrated.

[0010] In one alternative embodiment, the porosity of the porous n-type doped layer ranges from 40% to 70%.

[0011] In this embodiment, the porosity of the porous n-type doped layer is limited to 40% to 70%, which can reduce the impact on the photoelectric performance of the LED device while ensuring the function of the DBR structure.

[0012] In one alternative embodiment, the thickness of the porous n-type doped layer pair is greater than or equal to 90 nm, and the thickness of the n-type doped layer is greater than or equal to 60 nm.

[0013] In one alternative implementation, the active layer includes multiple InGaN quantum well layers and multiple GaN barrier layers, which are alternately arranged from bottom to top.

[0014] In one alternative implementation, the number of InGaN quantum wells and GaN barriers is 3 to 10.

[0015] In one alternative implementation, the thickness of the main buffer layer is 1.5 μm to 2 μm.

[0016] In a second aspect, the present invention provides a method for fabricating an LED based on a selected area self-assembled nanostructure, the method comprising: providing a substrate layer; forming a main buffer layer on one side surface of the substrate layer; forming a plurality of alternating n-type intermediate doped layers and n-type doped layers on the side surface of the main buffer layer away from the substrate layer, wherein the doping concentration of the n-type intermediate doped layers is at least one order of magnitude greater than the doping concentration of the n-type doped layers; performing electrochemical etching on the plurality of alternating n-type intermediate doped layers and n-type doped layers to form a DBR structure; performing nanoimprinting on the side surface of the DBR structure away from the main buffer layer to form a SiO2 dielectric mask layer, wherein a plurality of windows are formed on the SiO2 dielectric mask layer, the windows exposing a portion of the uppermost n-type doped layer; performing nitrogen annealing to self-assemble a hexagonal pyramidal structure in each window; growing an active layer on the semi-polar surface of the hexagonal pyramidal structure; and growing a p-type doped layer on the side surface of the active layer away from the hexagonal pyramidal structure, thereby obtaining an LED according to the first aspect or any corresponding embodiment.

[0017] The method for fabricating LEDs based on selected-region self-assembly nanostructures provided in this embodiment utilizes a periodically arranged porous DBR structure within the LED. This allows the n-doped, emitting, and p-doped regions to grow above the porous region with lower strain than without a porous region, thus increasing the In content in the quantum well and enabling the LED to emit light with a peak wavelength between 600 nm and 750 nm. The hexagonal pyramidal structure provides a semi-polar surface with a smaller polarization electric field, facilitating the introduction of higher In content into the subsequent epitaxial quantum well. This allows for the direct growth of InGaN-based red Micro-LEDs with an In content of 25%–35% on the hexagonal pyramidal structure. Furthermore, the hexagonal pyramidal structure of this LED is obtained through a simpler and more feasible high-temperature annealing process—the high-temperature decomposition and self-assembly of the porous DBR structure—eliminating the need for secondary epitaxy.

[0018] In one alternative embodiment, the electrolyte used in the electrochemical etching process includes oxalic acid, hydrofluoric acid, or nitric acid, and the concentration of the electrolyte is from 0.1 M to 0.3 M.

[0019] In one alternative embodiment, the annealing temperature is 1100°C to 1150°C, and the annealing time is greater than or equal to 30 minutes. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the specific embodiments or related technologies of the present invention, the drawings used in the description of the specific embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of an LED based on a selected region self-assembly nanostructure according to an embodiment of the present invention;

[0022] Figure 2 This is a schematic diagram of a DBR structure according to an embodiment of the present invention;

[0023] Figure 3 This is a SEM image of a DBR structure according to an embodiment of the present invention;

[0024] Figure 4 This is a schematic diagram of a SiO2 dielectric mask layer according to an embodiment of the present invention;

[0025] Figure 5 This is a SEM image of a selected area self-assembly forming a hexagonal pyramid structure according to an embodiment of the present invention;

[0026] Figure 6 This is a schematic diagram of the structure of a main buffer layer according to an embodiment of the present invention;

[0027] Figure 7 This is a schematic diagram of the semiconductor structure after growing an n-type intermediate doped layer and an n-type doped layer on the main buffer layer according to an embodiment of the present invention.

[0028] Figure 8 This is a schematic diagram of a semiconductor structure formed by electrochemical etching of a porous n-type doped layer and an n-type doped layer according to an embodiment of the present invention.

[0029] Figure reference numerals: 110, substrate layer; 120, main buffer layer; 121, sub-buffer layer; 122, first undoped layer; 123, sub-n-type doped layer; 124, second undoped layer; 130, DBR structure; 131, porous n-type doped layer; 132, n-type doped layer; 133, n-type intermediate doped layer; 140, SiO2 dielectric mask layer; 141, window; 150, selected area self-assembly formed hexagonal pyramidal structure; 160, active layer; 170, p-type doped layer. Detailed Implementation

[0030] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the invention, not the entire structure.

[0031] In the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present invention. Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These drawings are not to scale, and some details are enlarged for clarity, and some details may be omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed. In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element.

[0032] Micro / Nano LEDs are a technology that miniaturizes traditional LEDs, offering advantages such as high resolution, high brightness, and high contrast, and can be applied to numerous fields including displays. Currently, the development of InGaN-based blue and green LEDs is relatively mature. While AlGaInP-based red LEDs have certain advantages in efficiency, they suffer from poor thermal stability and severe size effects. Therefore, InGaN-based red Micro / Nano LEDs have become the preferred choice.

[0033] However, the significant thermal and lattice mismatches between InGaN and GaN thin films induce piezoelectric polarization. Furthermore, the InGaN quantum well itself possesses spontaneous polarization characteristics. These two polarization effects together create a strong built-in electric field, leading to a severe QCSE effect and reducing the luminous efficiency of LEDs.

[0034] In InGaN / GaN quantum well LEDs, the QCSE effect is due to the existence of both spontaneous polarization and piezoelectric polarization within the InGaN quantum well. The superposition of these two polarizations forms a total polarization vector, generating a polarization electric field. This polarization electric field causes the band structure to tilt, resulting in the spatial separation of the wave functions of electrons and holes. This significantly reduces the overlap rate of the electron-hole wave functions, thereby reducing the radiative recombination rate of charge carriers and ultimately leading to a decrease in the external quantum efficiency (EQE) of the LED.

[0035] Therefore, a major challenge in realizing high-efficiency long-wavelength LEDs with higher In content InGaN / GaN multi-quantum wells (MQWs) is how to solve the significant strain and reduced polarization effect caused by lattice mismatch between InGaN and GaN under the premise of simple and easy epitaxial processes.

[0036] Specifically, multiple quantum wells (MQWs) are semiconductor structures composed of multiple periodically alternating quantum well layers (such as InGaN) and barrier layers (such as GaN). In LED devices, MQWs confine electrons and holes within the quantum wells through the quantum confinement effect, thereby achieving efficient light emission.

[0037] The LED based on selected area self-assembly nanostructures provided by this invention has a porous layer structure in the DBR structure that can relax mismatch stress. After high-temperature treatment, the hexagonal pyramidal nanostructure formed by selected area self-assembly on the DBR structure provides a semi-polar surface with a smaller polarization electric field, so as to introduce a higher In content in the subsequent epitaxial quantum well. Thus, InGaN-based red micro-LEDs with an In content of 25% to 35% can be directly grown on the hexagonal pyramidal structure.

[0038] The LED structure based on selected region self-assembly nanostructure provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0039] like Figure 1 As shown, the LED based on selected area self-assembly nanostructure includes a substrate layer 110, a main buffer layer 120, a DBR structure 130, a SiO2 dielectric mask layer 140, a hexagonal pyramidal structure 150 formed by multiple selected area self-assemblies, an active layer 160, and a p-type doped layer 170.

[0040] Specifically, the substrate layer 110 is the basic support structure for the LED chip, providing a flat surface for subsequent epitaxial growth. For example, the substrate layer 110 can be a sapphire (Al2O3) substrate or a silicon carbide (SiC) substrate, etc.

[0041] The main buffer layer 120 is disposed on one side surface of the substrate layer 110, for example, as Figure 1 As shown, the main buffer layer 120 can be disposed on the upper surface of the substrate layer 110. The main buffer layer 120 can be used to alleviate lattice mismatch and stress between the substrate layer 110 and the subsequently grown epitaxial layer. For example, the material of the main buffer layer 120 can be undoped GaN and / or GaN, etc.

[0042] like Figure 2 and Figure 3 As shown, the DBR structure 130 includes multiple porous n-type doped layers 131 and multiple n-type doped layers 132, which are alternately arranged from bottom to top. The bottommost porous n-type doped layer 131 is located on the surface of the main buffer layer 120 away from the substrate layer 110. The doping concentration of the porous n-type doped layer 131 is greater than that of the n-type doped layer 132.

[0043] For example, such as Figure 2 As shown, a first n-type doped layer 132 is disposed on the upper surface of the first porous n-type doped layer 131, a second porous n-type doped layer 131 is disposed on the upper surface of the first n-type doped layer 132, and so on, until a last n-type doped layer 132 is disposed on the upper surface of the last porous n-type doped layer 131. The lower surface of the first porous n-type doped layer 131 is disposed on the upper surface of the main buffer layer 120, and a SiO2 dielectric mask layer 140 is grown on the upper surface of the last n-type doped layer 132.

[0044] The DBR structure is a periodic structure composed of alternating stacks of materials with different refractive indices. The optical properties of the DBR structure are based on the Bragg reflection principle; when light propagates through the material layers, reflection and refraction occur at the interfaces between materials with different refractive indices. By setting the refractive index and thickness of different layer units, the reflection of light of specific wavelengths can be selectively adjusted, reflecting light that might otherwise propagate in other directions or be absorbed back to the active layer. This increases the propagation path of light within the active region, improves light extraction efficiency, and thus enhances the light extraction efficiency of the LED. The DBR structure can be used to achieve near total internal reflection within a certain frequency range.

[0045] By providing a periodically arranged porous DBR structure layer in the LED, the active layer 160 can be grown over the porous region with lower strain than in the case of no porous region, which helps to improve the In composition in the quantum well, enabling the LED to emit light with wavelengths between 600 nm and 750 nm.

[0046] The thickness and number of the porous n-type doped layer 131 and n-type doped layer 132 can be configured by the designer based on the LED's light emission requirements. Figure 2 Taking an example where the number of porous n-type doped layers 131 and n-type doped layers 132 is 6, but it is not limited to this.

[0047] For example, the porous n-type doped layer 131 can be made of heavily doped n-type GaN (n+-GaN), and the n-type doped layer 132 can be made of n-type GaN (n-GaN). The silicon (Si) doping concentration of n+-GaN can be at least an order of magnitude higher than that of n-GaN. The doping concentration affects the optical properties of the material, including the refractive index. By having a higher doping concentration in the porous n-type doped layer 131, a larger refractive index difference can be formed between it and the n-type doped layer 132. This helps to enhance the reflection effect of the DBR structure on light of a specific wavelength, improves the reflectivity, and thus more effectively confines the light emitted from the active layer inside the device, increases the round-trip time of light in the active region, and improves the light extraction efficiency.

[0048] The SiO2 dielectric mask layer 140 is disposed on the surface of the uppermost n-type doped layer 132 on the side away from the main buffer layer 120, such as... Figure 4 As shown, multiple windows 141 are formed in an array on the SiO2 dielectric mask layer 140, and the windows 141 expose a portion of the uppermost n-type doped layer 132.

[0049] Figure 4 Taking a circular shape for window 141 as an example, but not limited to this, for example, the shape of window 141 can also be rectangular or polygonal. By growing a SiO2 dielectric mask layer 140 with windows 141, the position of the hexagonal pyramid structure subsequently formed by self-assembly can be restricted. Specifically, the distribution position of multiple windows 141 can be determined by the designer based on the required positions of multiple hexagonal pyramid structures.

[0050] Multiple hexagonal pyramidal structures 150 correspond one-to-one with multiple windows 141, with each hexagonal pyramidal structure 150 located within its corresponding window 141. That is, after annealing, each window 141 can self-assemble to form a hexagonal pyramidal structure 150. The array of hexagonal pyramidal structures 150 not only provides a semi-polar surface for quantum well growth but also effectively reduces the dislocation density and dislocation growth, thereby reducing non-radiative recombination centers in the active region and improving the internal quantum efficiency of the LED epitaxial structure. The scanning electron microscope (SEM) structure of the multiple hexagonal pyramidal structures 150 can be visualized as follows: Figure 5 As shown.

[0051] The active layer 160 is disposed on the semi-polar surfaces of multiple hexagonal pyramidal structures 150 and is used to emit red light. The active layer 160 is the core region in the LED that realizes electroluminescence. It is typically made of a semiconductor material with a suitable bandgap. When a forward voltage is applied across the LED, electrons and holes in the active layer 160 recombine under the influence of the electric field. During recombination, electrons transition from the conduction band to the valence band and combine with holes, releasing excess energy as photons. This achieves the conversion of electrical energy into light energy, producing light of a specific wavelength, the wavelength of which depends on the bandgap of the active layer material.

[0052] The p-type doped layer 170 is disposed on the surface of the active layer 160 away from the hexagonal pyramid structure 150, for example, as Figure 1 As shown, a p-type doped layer 170 is disposed on the upper surface of the active layer 160. The p-type doped layer 170 can provide holes for the light-emitting process of the LED. By doping with specific impurity atoms, a large number of mobile holes are generated in the material. When a forward voltage is applied to the LED, these holes move towards the active layer, meet and recombine with electrons injected from the n-type doped layer in the active layer, thereby realizing the conversion of electrical energy into light energy and producing the light-emitting phenomenon.

[0053] The LED based on selected region self-assembled nanostructures provided in this embodiment can effectively reduce stress during subsequent epitaxy and improve the quality of the epitaxial layer due to the stress relaxation effect of the porous layer in the DBR structure. Simultaneously, by performing secondary epitaxy on the hexagonal pyramidal semi-polar surface of the active layer's quantum well, the polarization electric field can be effectively weakened, the incorporation efficiency of In atoms can be improved, the QCSE effect can be reduced, and the radiative recombination probability of charge carriers will also increase accordingly, thereby improving the luminous efficiency of the LED.

[0054] In some embodiments, the number of porous n-type doped layers 131 and n-type doped layers 132 is greater than or equal to 10. That is, the DBR structure includes 10 or more pairs of porous n-type doped layers 131 and n-type doped layers 132.

[0055] Specifically, the reflectivity of the DBR structure is closely related to the number of logarithms in the multilayer film. When two layers of materials with different refractive indices are stacked alternately, each pair of doped layers can reflect light of a specific wavelength. As the number of layers increases, light is reflected and interfered with multiple times at the interfaces between layers, and the reflected light is continuously superimposed and enhanced, thus significantly improving the overall reflectivity. Moreover, increasing the number of logarithms of the porous n-type doped layer 131 and n-type doped layer 132 can narrow the reflection bandwidth of the DBR structure, that is, the wavelength range of the reflected light is more concentrated.

[0056] Optionally, the porosity of the porous n-type doped layer 131 can range from 40% to 70%. That is, the porosity of the porous n-type doped layer 131 can be any value between 40% and 70%, for example, the porosity of the porous n-type doped layer 131 can be 40%, 50%, 60%, 65%, or 70%, etc.

[0057] Specifically, the porosity of the porous region primarily affects the refractive index of the porous layer, thus influencing the center wavelength and reflectivity of the reflected band in the DBR structure. A good DBR requires a significant refractive index difference between the two alternating structural layers. If the porosity is too small, the refractive index difference between the porous and non-porous layers is too small. In this case, to ensure the DBR's functionality, the thickness of the porous layer needs to be increased, which is detrimental to semiconductor devices. If the porosity is too large, it will reduce the conductivity of the DBR structure, affecting the optoelectronic performance of subsequent devices.

[0058] For example, by adjusting the porous n-type doped layer and the thickness of the n-type doped layer in the DBR structure, light of a specified wavelength range can be reflected, thereby effectively optimizing the luminous range of the red Micro / Nano-LED.

[0059] Specifically, the selection of the reflected light band in the DBR structure is determined by the refractive index and thickness of the alternating unit layers (porous n-type doped layer and n-type doped layer). The relationship between the center wavelength of the reflected band and the thickness and refractive index can be expressed as shown in formula (1):

[0060]

[0061] In formula (1), λ represents the center wavelength of the reflection band, d represents the thickness of the porous n-type doped layer or n-type doped layer, and n represents the refractive index of the porous n-type doped layer or n-type doped layer.

[0062] In some embodiments, the wavelength of the LED is between 600nm and 750nm. In this case, the thickness of the porous n-type doped layer is greater than or equal to 90nm, and the thickness of the n-type doped layer is greater than or equal to 60nm. The phrase "wavelength between 600nm and 750nm" means that the LED wavelength can be any value between 600nm and 750nm, for example, the LED wavelength can be 600nm, 650nm, 680nm, 700nm, or 750nm, etc.

[0063] For example, the active layer 160 includes a plurality of InGaN quantum well layers and a plurality of GaN barrier layers, which are alternately arranged from bottom to top.

[0064] Optionally, the number of InGaN quantum well layers and GaN barrier layers is 3 to 10. That is, the number of repetitions of InGaN quantum well layers and GaN barrier layers in the active layer can be 3 to 10. For example, the active layer 160 may include 3 InGaN quantum well layers and GaN barrier layers, 5 InGaN quantum well layers and GaN barrier layers, 8 InGaN quantum well layers and GaN barrier layers, 10 InGaN quantum well layers and GaN barrier layers, etc.

[0065] Specifically, a quantum well is a potential well for electrons or holes formed by alternating layers of two different semiconductor materials, exhibiting a significant QCSE (Quantum-Cell Recombination-Emitting) effect. In this structure, the region formed by InGaN material is the quantum well, confining electrons and holes within it, making it easier for the active layer to undergo radiative recombination and thus emit light. The GaN barrier is a region formed by GaN material located between the InGaN quantum wells. Its function is to prevent electrons and holes from easily escaping from the quantum well, better confining them within the quantum well, thereby improving recombination efficiency.

[0066] If the number of repetitions of the quantum well layer and the barrier layer in the active layer is too small, there are relatively few sites available for electron-hole recombination, and the number of charge carriers participating in recombination is limited, resulting in low luminous efficiency and failing to meet the requirements for high brightness of LEDs. If the number of repetitions of the quantum well layer and the barrier layer in the active layer is too large, although more quantum well layers provide charge carrier recombination, the total thickness of the quantum well layer and the barrier layer increases, which may lead to more scattering and non-radiative recombination, reducing luminous efficiency. It may also reduce the growth quality of the active layer, introduce more defects, and is not conducive to improving luminous efficiency.

[0067] For example, the thickness of the main buffer layer 120 can be from 1.5 μm to 2 μm. For instance, the thickness of the main buffer layer 120 can be 1.5 μm, 1.6 μm, 1.8 μm, or 2 μm, etc.

[0068] In one example, such as Figure 6 As shown, the main buffer layer 120 may include a 30nm sub-buffer layer 121, a 1μm first undoped layer 122, a 500nm sub-n-type doped layer 123, and a 150nm second undoped layer 124.

[0069] Among them, the sub-buffer layer 121 can be a GaN buffer layer, the first undoped layer 122 can be an undoped GaN layer, the sub-n-type doped layer 123 can be an n-type GaN layer, and the second undoped layer 124 can also be an undoped GaN layer.

[0070] Specifically, a 30nm GaN buffer is used as a nucleation layer in GaN epitaxial growth, a 1μm undoped GaN layer serves as a buffer layer between the active region of the device and the substrate, a 500nm n-GaN layer is used to improve the conductivity of the sample during electrochemical etching to prevent the underlying DBR from being etched out, and a 150nm undoped GaN layer is used to separate the bottommost n-GaN of the DBR structure from the 500nm n-GaN layer below it used to enhance conductivity, protecting the underlying n-GaN during electrochemical etching and preventing the 500nm n-GaN from being etched out.

[0071] In this embodiment, a method for fabricating an LED based on a selected region self-assembled nanostructure is also provided, the method comprising the following steps:

[0072] Step S701: Provide a substrate layer.

[0073] Specifically, the substrate can be a sapphire substrate.

[0074] Step S702: A main buffer layer is formed on one side surface of the substrate layer.

[0075] For example, the main buffer layer can be an undoped gallium nitride layer, which can be formed on the substrate by metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

[0076] Specifically, MOCVD is a widely used technology in the semiconductor industry for growing high-quality semiconductor thin films. It uses metal-organic compounds as source materials, which are transported to the reaction chamber in the gas phase, decomposed at high temperature, and deposited on the substrate surface to form the desired semiconductor thin film.

[0077] MBE (Metal-Based Vapor Deposition) is a physical vapor deposition technique under ultra-high vacuum. It involves evaporating molecular beams of different elements onto a heated substrate surface in an ultra-high vacuum environment, allowing atoms to grow layer by layer on the substrate, thereby precisely controlling the growth and structure of the thin film.

[0078] Step S703: A plurality of alternating n-type intermediate doped layers and n-type doped layers are formed on the surface of the main buffer layer away from the substrate layer.

[0079] In this case, the doping concentration of the n-type intermediate doped layer is at least one order of magnitude greater than that of the n-type doped layer. For example, if the doping concentration of the n-type doped layer is 10... 16 At this level, the doping concentration of the n-type intermediate doped layer is 10. 17 above.

[0080] For example, multiple periodically arranged n-type intermediate doped layers 133 and n-type doped layers 132 can be formed on the main buffer layer using MOCVD or MBE processes to obtain, as shown below. Figure 7 The structure shown.

[0081] Step S704: Electrochemical etching is performed on multiple alternating n-type intermediate doped layers and n-type doped layers to form a distributed Bragg reflector structure.

[0082] Specifically, the n-type intermediate doped layer 133 is converted into a porous n-type doped layer 131 by electrochemical etching, resulting in the following: Figure 8 The structure shown is a DBR structure formed by periodically arranged porous n-type doped layers 131 and 132 (n-GaN / porous GaN).

[0083] For example, the electrolyte used in electrochemical etching can be oxalic acid, hydrofluoric acid (HF), nitric acid (HNO), etc., with an electrolyte concentration of 0.1M to 0.3M. A platinum electrode is used as the negative electrode in the electrolyte, and a bias voltage of 5V to 20V is applied. For example, the electrolyte concentration can be 0.1M, 0.15M, 0.2M, 0.28M, or 0.3M, and the applied bias voltage can be 5V, 10V, 15V, 18V, or 20V, etc.

[0084] Step S705: Perform nanoimprinting on the surface of the DBR structure away from the main buffer layer to form a SiO2 dielectric mask layer.

[0085] The SiO2 dielectric mask layer has multiple windows arranged in an array, which expose a portion of the uppermost n-type doped layer.

[0086] Step S706 involves nitrogen annealing to form a hexagonal pyramid structure through self-assembly in each window.

[0087] Specifically, the annealing temperature can be between 1100℃ and 1150℃, and the annealing time can be greater than or equal to 30 minutes. For example, the annealing temperature can be 1100℃, 1120℃, or 1150℃, and the annealing time can be 30 minutes or 35 minutes. After annealing, an n-GaN hexagonal pyramidal nanostructure formed by self-assembly at high temperature can be obtained.

[0088] The n-GaN hexagonal pyramidal nanostructure array formed by self-assembly at high temperature can not only provide a semi-polar surface for quantum well growth, but also effectively reduce the dislocation density and dislocation growth of the structure, thereby reducing the non-radiative recombination centers in the active region and improving the internal quantum efficiency of the LED epitaxial structure.

[0089] Step S707: An active layer is grown on the semi-polar surface of the hexagonal pyramid structure.

[0090] For example, an active layer can be grown on the semi-polar surface of a hexagonal pyramid structure using MOCVD, MBE, or Atomic Layer Deposition (ALD) processes.

[0091] Step S708: A p-type doped layer is grown on the surface of the active layer away from the hexagonal pyramid structure to obtain an LED.

[0092] Wherein, LED is the LED provided in any of the above embodiments.

[0093] For example, a p-type doped layer can be grown on the surface of the active layer away from the hexagonal pyramid structure using MOCVD or MBE processes. The material of the p-type doped layer can be p-type gallium nitride.

[0094] The method for fabricating LEDs based on selected-region self-assembled nanostructures provided in this embodiment utilizes a periodically arranged porous DBR structure within the LED. This allows the n-doped, emitting, and p-doped regions to grow above the porous region with lower strain than without a porous region, thus increasing the In content in the quantum well and enabling the LED to emit light with a peak wavelength between 600 nm and 750 nm. The hexagonal pyramidal structure provides a semi-polar surface with a smaller polarization electric field, facilitating the introduction of higher In content into the subsequent epitaxial quantum well. This allows for the direct growth of InGaN-based red Micro / Nano-LEDs with an In content of 25%–35% on the hexagonal pyramidal structure. Furthermore, the hexagonal pyramidal nanostructure in this device structure is obtained through a simpler and more feasible high-temperature annealing process—the high-temperature decomposition and self-assembly of the porous DBR structure—without requiring secondary epitaxy.

[0095] In the description of this specification, the references to terms such as "this embodiment," "an embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0096] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0097] The above description does not provide detailed explanations of the technical aspects of each layer's patterning and etching. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be effectively combined.

[0098] The above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described above, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention.

[0099] Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention.

Claims

1. A light-emitting diode based on a selected area self-assembled nanostructure, characterized in that, The light-emitting diode includes: Substrate layer; A main buffer layer is disposed on one side surface of the substrate layer; A distributed Bragg reflector structure includes multiple porous n-type doped layers and multiple n-type doped layers, which are alternately arranged from bottom to top. The bottommost porous n-type doped layer is located on the surface of the main buffer layer away from the substrate layer. The doping concentration of the porous n-type doped layer is at least one order of magnitude greater than the doping concentration of the n-type layer. A silicon dioxide dielectric mask layer is disposed on the surface of the uppermost n-type doped layer away from the main buffer layer. Multiple windows are formed on the silicon dioxide dielectric mask layer in an array, and the windows expose a portion of the uppermost n-type doped layer. Multiple hexagonal pyramidal structures correspond one-to-one with the multiple windows, and the hexagonal pyramidal structures are located within the corresponding windows; An active layer, disposed on the semi-polar surface of the plurality of hexagonal pyramidal structures, is used to emit red light; A p-type doped layer is disposed on the surface of the active layer away from the hexagonal pyramid structure.

2. The light-emitting diode according to claim 1, characterized in that, The number of both the porous n-type doped layer and the number of the n-type doped layer are greater than or equal to 10.

3. The light-emitting diode according to claim 1, characterized in that, The porosity of the porous n-type doped layer ranges from 40% to 70%.

4. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The thickness of the porous n-type doped layer is greater than or equal to 90 nm, and the thickness of the n-type doped layer is greater than or equal to 60 nm.

5. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The active layer includes multiple indium gallium nitride quantum well layers and multiple gallium nitride barrier layers, which are alternately arranged from bottom to top.

6. The light-emitting diode according to claim 5, characterized in that, The number of indium gallium nitride quantum well layers and gallium nitride barrier layers are both 3 to 10.

7. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The thickness of the main buffer layer is 1.5 μm to 2 μm.

8. A method for fabricating a light-emitting diode based on selected area self-assembly nanostructures, characterized in that, The method includes: Provide a substrate layer; A main buffer layer is formed on one side surface of the substrate layer; Multiple alternating n-type intermediate doped layers and n-type doped layers are formed on the surface of the main buffer layer away from the substrate layer, wherein the doping concentration of the n-type intermediate doped layer is at least one order of magnitude greater than the doping concentration of the n-type doped layer; Electrochemical etching is performed on multiple alternating n-type intermediate doped layers and n-type doped layers to form a distributed Bragg reflector structure. Nanoimprinting is performed on the surface of the distributed Bragg reflector structure away from the main buffer layer to form a silicon dioxide dielectric mask layer. Multiple windows are formed on the silicon dioxide dielectric mask layer in an array, and the windows expose a portion of the uppermost n-type doped layer. Nitrogen annealing is performed to self-assemble the various windows into a hexagonal pyramid structure. An active layer is grown on the semi-polar surface of the hexagonal pyramid structure; A p-type doped layer is grown on the surface of the active layer away from the hexagonal pyramid structure to obtain a light-emitting diode according to any one of claims 1 to 7.

9. The method according to claim 8, characterized in that, The electrolyte used in the electrochemical etching process includes oxalic acid, hydrofluoric acid, or nitric acid, and the concentration of the electrolyte is from 0.1M to 0.3M.

10. The method according to claim 8, characterized in that, The annealing temperature is 1100℃ to 1150℃, and the annealing time is greater than or equal to 30 minutes.

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