Multi-thread-based DPI task processing method, electronic equipment and medium

Abstract

The invention relates to the technical field of chip verification, in particular to a multi-thread-based DPI task processing method, electronic equipment and a medium, and the method comprises the following steps: S1, setting M DPI task processing containers {C1, C2,..., Cm,..., CM} and an upper management module DR; s2, the nth DPI task An is obtained, the DR allocates the An to the Pm of the corresponding target Cm, and the An with the dependency relationship is allocated to different Cm; s3, creating a thread in the Qm by the Rm in the Cm; and S4, the Rm allocates the DPI tasks in the Pm to the threads in the Qm, each thread processes one DPI task, and the threads in the Qm run the allocated DPI tasks in parallel. According to the invention, the processing efficiency of the DPI task in the chip development process is improved.

Description

Technical Field

[0001] This invention relates to the field of chip verification technology, and in particular to a multi-threaded DPI task processing method, electronic device, and medium. Background Technology

[0002] Chip development involves interaction between high-level programming languages ​​and hardware description languages. This interaction requires the generation of DPI (Direct Programming Interface) tasks. For example, chip co-simulation involves the interaction between high-level languages ​​and hardware description languages. Chip co-simulation refers to the collaborative simulation of different types of simulation tools, models, or design layers during chip design and verification, thereby comprehensively and efficiently verifying the chip's functionality, performance, and interaction with other systems. Current technologies handle DPI tasks using a single thread, resulting in low processing efficiency and impacting chip development efficiency. Therefore, improving the processing efficiency of DPI tasks during chip development is a pressing technical problem. Summary of the Invention

[0003] The purpose of this invention is to provide a multi-threaded DPI task processing method, electronic device, and medium, which improves the processing efficiency of DPI tasks during chip development.

[0004] According to a first aspect of the present invention, a multi-threaded DPI task processing method is provided, comprising: Step S1: Set up M DPI task processing containers {C1, C2, ..., C...} m ,...,C M} and the upper-level management module DR, C m For the m-th DPI task processing container, C m Includes C m The corresponding DPI task queue P m C m The corresponding thread queue Q m and C m The corresponding management module R m P m and Q m Initially empty, the DPI task is a direct programming interface task; Step S2: Obtain the nth DPI task A n DR will A n Assigned to the corresponding target C m P m In the context, A has a dependency relationship. n Assigned to different Cm wherein n is in the range of 1 to N, N is the total number of DPI tasks; Step S3, C m in R m Q m thread is created; Step S4, R m P m DPI tasks in R are assigned to threads in Q, each thread processes one DPI task, and threads in Q run the assigned DPI tasks in parallel. m m

[0005] According to a second aspect of the present application, an electronic device is provided, comprising: at least one processor; and a memory connected to the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method according to the first aspect of the present application.

[0006] According to a third aspect of the present application, a computer readable storage medium is provided, which stores computer executable instructions for executing the method according to the first aspect of the present application.

[0007] Compared with the prior art, the present application has obvious advantages and beneficial effects. By means of the above technical scheme, the present application provides a multi-thread based DPI task processing method, an electronic device and a medium, which can achieve considerable technical progress and practicality, and have wide industrial utilization value, and at least have the following beneficial effects: The present application sets multiple DPI task processing containers, assigns DPI tasks in the multiple DPI task processing containers, sets multiple parallel threads in each DPI task processing container, realizes parallel execution of the DPI tasks, improves the processing efficiency of the DPI tasks in the chip development process, and further improves the chip development efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0009] Figure 1 A multi-thread based DPI task processing method flowchart is provided for the embodiments of the present application. DETAILED DESCRIPTION

[0010] ​​The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0011] This invention provides a multi-threaded DPI task processing method, such as... Figure 1 As shown, it includes: Step S1: Set up M DPI task processing containers {C1, C2, ..., C...} m ,...,C M} and the upper-level management module DR, C m C is the container for processing the m-th DPI task. m Includes C m The corresponding DPI task queue P m C m The corresponding thread queue Q m and C m The corresponding management module R m P m and Q m Initially empty, the DPI task is a direct programming interface task.

[0012] DR is used to manage task processing containers. The number of task processing containers can be set based on the number of DPI tasks and the DPI task processing requirements. Each task processing container contains a thread queue Q. m Threads in R execute in parallel. m Used for managing and coordinating P m and Q m .

[0013] Step S2: Obtain the nth DPI task A n DR will A n Assigned to the corresponding target C m P m In the context, A has a dependency relationship. n Assigned to different C m In this context, n ranges from 1 to N, where N is the total number of DPI tasks.

[0014] It should be noted that for each DPI task A n DR needs to be based on the current DPI task processing container's task allocation and A n The assignment of A to other assigned tasks with dependencies is used to determine A. n Corresponding target C m Ensure that A has dependenciesn Assigned to different C m middle.

[0015] Steps S3 and C m R in m In Q m Create a thread in the middle.

[0016] It should be noted that each C m A corresponding maximum number of threads is set, C m R in m In Q m The number of threads created in a program cannot exceed C. m The corresponding maximum number of threads.

[0017] Step S4, R m P m DPI tasks are assigned to Q m In the threads, each thread processes one DPI task, Q m The threads in the process run the assigned DPI tasks in parallel.

[0018] As one example, C m Set as a fixed-type container or a dynamically resizable container; the Q of a fixed-type container... m The number of threads is fixed and used to store periodically generated DPI tasks, while the Q of the container is dynamically adjusted. m Used to store non-periodic generated DPI tasks, dynamically adjusting the container's Q. m The number of threads is dynamically adjusted based on the amount of DPI tasks generated. Specifically, the number of threads per C can be set according to the DPI task generation situation. m This can improve the utilization rate of computing resources.

[0019] As an embodiment, the periodically generated DPI task is generated based on a first chip joint simulation architecture, the first chip joint simulation architecture comprising a first stimulus generator, a first design under test and a first preset model, wherein the first stimulus generator and the first design under test are generated based on a hardware description language, and the hardware description language can be Verilog, VHDL, SystemVerilog, SystemC, etc. The first preset model is generated based on a high-level language, and the high-level language can be C language, C++ language, Python language, etc. The first stimulus generator periodically inputs stimuli to the first design under test and the first preset model. Since the first stimulus generator and the preset model are generated based on different languages, the first stimulus generator and the preset model need to periodically generate DPI tasks based on a DPI interface during interaction. The first chip joint simulation architecture further comprises a first monitor and a first score board. The first monitor is used to obtain output data from the first design under test and transmit the output data to the first score board. The output in the first preset model is also transmitted to the first score board. The first score board is used to compare the output data of the first design under test and the output data in the first preset model.

[0020] As an embodiment, the non-periodically generated DPI task is generated based on a second chip joint simulation architecture, the second chip joint simulation architecture comprising a second stimulus generator, a second design under test and a second preset model, wherein the second preset model comprises a first model module and a second model module. The second stimulus generator, the first model module and the second design under test are generated based on a hardware description language, and the hardware description language can be Verilog, VHDL, SystemVerilog, SystemC, etc. The second model module is generated based on a high-level language, and the high-level language can be C language, C++ language, Python language, etc. The first stimulus generator periodically inputs stimuli to the second design under test and the first model module. The first model module sends the received stimuli to the second model after preprocessing. The second model sends the received data to the first model module after processing. The interaction between the first model module and the second model module is non-periodic frequent interaction. Since the first model module and the second model module are generated based on different languages, the first model module and the second model module need to non-periodically generate DPI tasks based on a DPI interface during interaction. The second chip joint simulation architecture further comprises a second monitor and a second score board. The second monitor is used to obtain output data from the second design under test and transmit the output data to the second score board. The output in the second preset model is also transmitted to the second score board. The second score board is used to compare the output data of the second design under test and the output data in the second preset model.

[0021] As one embodiment, step S2 includes: Step S21: Obtain the nth DPI task A n .

[0022] Step S22, if A n For periodically generated DPI tasks, DR will use {C1,C2,...,C...} m ,...,C M The fixed-type container in} is determined to be A. n The corresponding candidate container, if A n For a non-periodic generated DPI task, DR will use {C1,C2,...,C...} m ,...,C M The dynamically adjusted container in} is determined to be A. n The corresponding candidate container.

[0023] Step S23, Determine A n Does a dependency exist, and if so, has it been assigned to one of A's? n In the corresponding candidate container, the already allocated A will be... n A container for DPI tasks with dependencies from A n If a candidate is removed from the corresponding candidate container, proceed to step S24; otherwise, proceed directly to step S24.

[0024] It should be noted that the operation in step S23 ensures that A, which has a dependency relationship, can be maintained. n Assigned to different C m In, so that each C m The DPI tasks allocated in the middle can be executed in parallel.

[0025] Step S24, from A n The corresponding candidate container selects one container as A. n Corresponding target C m DR will A n Assigned to the corresponding target C m P m middle.

[0026] It should be noted that, according to A n The DPI task type, according to the process of steps S21-S24, is A. n Alternatively, you can select the corresponding target container, or set a fixed, corresponding type of container as the target C for different co-simulation architectures. m .

[0027] As one embodiment, in step S24, from A n The corresponding candidate container selects one container as A.n corresponding target C m , comprising: Step S241, based on R m of each candidate container, acquiring current load of the candidate container.

[0028] Step S242, determining the candidate container with the minimum current load as A n corresponding target C m .

[0029] It should be noted that through the steps S241-S242, the loads of the M DPI task processing containers can be balanced as much as possible, and the utilization of the computing resources is improved.

[0030] As an embodiment, the step S3 comprises: Step S31, if C m is a fixed type container, then R m sets the corresponding maximum thread number of C m to a preset fixed value, and if C m is a dynamic adjustment container, then based on the task amount of the corresponding non-periodically generated DPI task of C m , the corresponding maximum thread number of C m is dynamically set.

[0031] It should be noted that for the dynamic adjustment container, based on the task amount of the corresponding non-periodically generated DPI task of C m , the corresponding maximum thread number of C m is dynamically set, which can avoid waste of computing resources and improve the utilization of the computing resources.

[0032] Step S32, when the current thread number in Q m is less than the corresponding maximum thread number of C m and P m has unassigned DPI tasks, R m creates a thread in Q m .

[0033] As an embodiment, the step S4 comprises: Step S41, if there is a task with the highest priority in the current P m , and the task does not exist dependent DPI tasks, or there are dependent DPI tasks and the dependent DPI tasks have been processed, then R m assigns the task with the highest priority to the idle thread in Q m .

[0034] Step S42, if there is a task with the highest priority in the current P mIf there are multiple tasks with the highest priority, and there is no dependent DPI task, or there is a dependent DPI task, and the dependent DPI task has been processed, then R m selects one from the tasks with the highest priority and allocates it to Q m in the idle thread.

[0035] If the currently executed DPI task is a dependent DPI task, then R m sends the current execution completion information to the DR, and the DR sends the current execution completion information to the C m .

[0036] It should be noted that when the dependent DPI task is executed, R m sends the current execution completion information to the DR, and the DR sends the current execution completion information to the C m , so that each task dependent on other DPI tasks is executed after the dependent DPI task is executed, thereby improving the accuracy of the execution of the DPI task.

[0037] It should be noted that some example embodiments are described as a process or method depicted as a flowchart. Although each step in the flowchart is described as a sequential process, many of the steps can be performed in parallel, concurrently or at the same time. In addition, the order of the steps can be rearranged. The process can be terminated when its operations are completed, but can also have additional steps not included in the figure. The process can correspond to a method, function, routine, subroutine, subprogram, etc.

[0038] The embodiment of the application further provides an electronic device, comprising: at least one processor; and a memory connected with the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, and the instructions are arranged to execute the method provided by the embodiment of the application.

[0039] The embodiment of the application further provides a computer readable storage medium, which stores computer executable instructions, and the computer executable instructions are used to execute the method provided by the embodiment of the application.

[0040] The embodiment of the application sets multiple DPI task processing containers, allocates the DPI tasks in the multiple DPI task processing containers, and sets multiple parallel threads in each DPI task processing container, thereby realizing parallel execution of the DPI tasks, improving the processing efficiency of the DPI tasks in the chip development process, and further improving the chip development efficiency.

[0041] The above merely describes preferred embodiments of the present application, and is not intended to limit the present application in any form. Although the present application has been disclosed with the preferred embodiments as above, it is not intended to limit the present application. Any person skilled in the art, without departing from the technical solution of the present application, can make some changes or modifications to the above disclosed technical content to obtain equivalent embodiments with equivalent changes. However, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application, as long as it does not deviate from the technical solution of the present application, still belongs to the scope of the technical solution of the present application.

Claims

1. A multi-threaded DPI task processing method, characterized in that, include: Step S1: Set up M DPI task processing containers {C1, C2, ..., C...} m ,...,C M } and the upper-level management module DR, C m For the m-th DPI task processing container, C m Includes C m The corresponding DPI task queue P m C m The corresponding thread queue Q m and C m The corresponding management module R m P m and Q m Initially empty, the DPI task is a direct programming interface task; Step S2: Obtain the nth DPI task A n DR will A n Assigned to the corresponding target C m P m In the context, A has a dependency relationship. n Assigned to different C m In this context, n ranges from 1 to N, where N is the total number of DPI tasks. Steps S3 and C m R in m In Q m Create a thread in the middle; Step S4, R m P m DPI tasks are assigned to Q m In the threads, each thread processes one DPI task, Q m The threads in the process run the assigned DPI tasks in parallel.

2. The method according to claim 1, characterized in that, C m Set as a fixed-type container or a dynamically resizable container; the Q of a fixed-type container... m The number of threads is fixed and used to store periodically generated DPI tasks, while the Q of the container is dynamically adjusted. m Used to store non-periodic generated DPI tasks, dynamically adjusting the container's Q. m The number of threads is dynamically adjusted based on the amount of DPI tasks generated.

3. The method according to claim 2, characterized in that, The periodically generated DPI task is generated based on a first chip co-simulation architecture, which includes a first excitation generator, a first design under test, and a first preset model. The first excitation generator and the first design under test are generated based on a hardware description language, and the first preset model is generated based on a high-level language; The first excitation generator periodically inputs excitations into the first design under test and the first preset model. During the interaction between the first excitation generator and the preset model, DPI tasks are periodically generated.

4. The method according to claim 2, characterized in that, The non-periodic DPI task is generated based on a second-chip co-simulation architecture, which includes a second excitation generator, a second design under test, and a second preset model. The second preset model includes a first model module and a second model module. The second excitation generator, the first model module, and the second design under test are generated based on a hardware description language, and the second model module is generated based on a high-level language. The first excitation generator periodically inputs excitations into the second design under test and the first model module. The first model module preprocesses the received excitations and sends them to the second model. The second model processes the received data and sends it back to the first model module. During the interaction between the first model module and the second model module, DPI tasks are generated non-periodically.

5. The method according to claim 2, characterized in that, Step S2 includes: Step S21: Obtain the nth DPI task A n ; Step S22, if A n For periodically generated DPI tasks, DR will use {C1,C2,...,C...} m ,...,C M The fixed-type container in} is determined to be A. n The corresponding candidate container, if A n For a non-periodic generated DPI task, DR will use {C1,C2,...,C...} m ,...,C M The dynamically adjusted container in} is determined to be A. n The corresponding candidate container; Step S23, determine A n Does a dependency exist, and if so, has it been assigned to one of A's? n In the corresponding candidate container, the already allocated A will be... n A container for DPI tasks with dependencies from A n If a candidate is removed from the corresponding candidate container, proceed to step S24; otherwise, proceed directly to step S24. Step S24, from A n The corresponding candidate container selects one container as A. n Corresponding target C m DR will A n Assigned to the corresponding target C m P m middle.

6. The method according to claim 5, characterized in that, In step S24, from A n The corresponding candidate container selects one container as A. n Corresponding target C m ,include: Step S241: Based on R of each candidate container m Get the current load of the candidate container; Step S242: Determine the candidate container with the lowest current load as A. n Corresponding target C m .

7. The method according to claim 2, characterized in that, Step S3 includes: Step S31, if C m If R is a container of a fixed type, then m C m The corresponding maximum number of threads is set to a preset fixed value. If C m To dynamically adjust the container, it is based on C. m The corresponding non-periodic generation of DPI tasks dynamically sets the workload C. m The corresponding maximum number of threads; Step S32, when Q m The current number of threads is less than C. m Corresponding to the maximum number of threads and P m When there are unassigned DPI tasks in R m In Q m Create a thread in the middle.

8. The method according to claim 2, characterized in that, Step S4 includes: Step S41, if the current P m If there exists a highest priority task, and this task has no dependent DPI tasks, or if it has dependent DPI tasks but those tasks have already been completed, then the highest priority task will be assigned to Q. m In the idle thread; Step S42, if the current P m If there are multiple highest-priority tasks, and a task has no dependent DPI tasks, or if it has dependent DPI tasks but those tasks have been completed, then one of the highest-priority tasks will be selected and assigned to Q. m In the idle thread; Step S43: If the currently completed DPI task is a dependent DPI task, then R m The task that has completed execution is sent to the DR, which then sends the execution completion information to the C that depends on this DPI task. m .

9. An electronic device, characterized in that, include: At least one processor; And, a memory communicatively connected to the at least one processor; The memory stores instructions that are executed by the at least one processor, the instructions being configured to perform the method of any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, The device stores computer-executable instructions for performing the method of any one of claims 1-8.

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