Amplification circuit and voltage generation circuit

Abstract

The invention relates to an amplifier circuit and a voltage generating circuit. An amplifier circuit includes a floating inverting amplifier and a voltage generating circuit. The critical voltage of a transistor in the floating inverting amplifier varies with environmental conditions. The voltage generating circuit is coupled to the floating inverting amplifier, the voltage generating circuit is used for providing a working voltage to the floating inverting amplifier, the working voltage provided by the voltage generating circuit is linearly related to the critical voltage, and the voltage generating circuit enables the variation of the working voltage to track the variation of the critical voltage.

Description

Technical Field

[0001] This disclosure relates to amplifier circuits, and in particular to amplifier circuits and voltage generation circuits that can mitigate the effects of environmental conditions on floating inverting amplifiers. Background Technology

[0002] The operation of a floating inverter amplifier consists of two stages. In the first stage, the floating inverter amplifier charges its energy storage capacitor and resets its differential load capacitor. In the second stage, the floating inverter amplifier uses the energy storage capacitor to drive a pair of inverters, causing the inverters to charge the differential load capacitor according to the differential input, thereby producing an amplification result on the differential load capacitor. However, the magnitude of the current generated by the inverter in the second stage is related to the inverter's environmental conditions (such as operating voltage, process variations, or operating temperature), so the gain of the floating inverter amplifier is also affected by environmental conditions. Summary of the Invention

[0003] This disclosure provides an amplifier circuit comprising a floating inverting amplifier and a voltage generation circuit. The threshold voltage of a transistor in the floating inverting amplifier changes with an environmental condition. The voltage generation circuit is coupled to the floating inverting amplifier and provides an operating voltage to the floating inverting amplifier, wherein the operating voltage provided by the voltage generation circuit is linearly related to the threshold voltage, and the voltage generation circuit causes a change in the operating voltage to track a change in the threshold voltage.

[0004] This disclosure provides a voltage generation circuit comprising a first current generation circuit and a current-to-voltage conversion circuit. The first current generation circuit includes a first multi-stage current mirror and a first voltage-to-current conversion circuit. The first multi-stage current mirror includes a first output terminal for generating a first output current. When the first output current flows through the first output terminal, the first output terminal generates a first output voltage. The first voltage-to-current conversion circuit is coupled to the first output terminal to receive the first output voltage and converts the first output voltage into a first operating current. The current-to-voltage conversion circuit is coupled to the first voltage-to-current conversion circuit to receive the first operating current and generates an operating voltage based on the first operating current. The first operating current and the operating voltage are positively correlated with the threshold voltage of any transistor in the first multi-stage current mirror through which the first output current flows.

[0005] One of the advantages of the aforementioned amplifier circuit and voltage generation circuit is that it can reduce the influence of environmental conditions. Attached Figure Description

[0006] Figure 1 This is a circuit diagram of an amplifier circuit according to an embodiment of this disclosure.

[0007] Figure 2This is a circuit diagram of an amplifier circuit according to an embodiment of this disclosure.

[0008] Figure 3 This is a functional block diagram of an amplifier circuit according to an embodiment of this disclosure.

[0009] Figure 4 This is a functional block diagram of an amplifier circuit according to an embodiment of this disclosure. Detailed Implementation

[0010] The embodiments of this disclosure will be described below with reference to the accompanying drawings. In the drawings, the same reference numerals denote the same or similar elements or method flows.

[0011] Figure 1 This is a circuit diagram of an amplifier circuit 100 according to an embodiment of this disclosure. The amplifier circuit 100 includes a voltage generation circuit 110 and a floating inverter amplifier 120. The floating inverter amplifier 120 includes a plurality of transistors (e.g., Figure 1 Transistors T1, T2, T3, and T4 are shown. Each transistor T1 to T4 has a critical voltage. When the voltage difference between the gate and source of transistors T1 to T4 applied exceeds the critical voltage, transistors T1 to T4 will conduct. In practical applications, as environmental conditions (such as process variations, operating voltage, or operating temperature) change, the critical voltages of each transistor T1 to T4 in the floating inverting amplifier 120 will vary with the environmental conditions, thereby causing the amplification gain of the floating inverting amplifier 120 to vary with the environmental conditions.

[0012] In one embodiment, the voltage generation circuit 110 provides an operating voltage Vop to the floating inverting amplifier 120. It should be noted that, in some embodiments of this disclosure, the operating voltage Vop provided by the voltage generation circuit 110 is linearly related to the critical voltages of transistors T1 to T4 in the floating inverting amplifier 120, and the voltage generation circuit 110 is configured to track changes in the generated operating voltage Vop to the changes in the aforementioned critical voltages. This reduces the impact of environmental conditions (e.g., process variations, operating voltage, or operating temperature) on the amplification gain of the floating inverting amplifier 120, thereby allowing the floating inverting amplifier 120 to have a stable amplification gain (unaffected by process variations or operating temperature).

[0013] Voltage generation circuit 110 is coupled to floating inverting amplifier 120 and provides operating voltage Vop to floating inverting amplifier 120. Floating inverting amplifier 120 includes a storage capacitor Cres, load capacitors Cxp and Cxn, an inverter INVp, and an inverter INVn. In a first stage, floating inverting amplifier 120 couples the storage capacitor Cres to voltage generation circuit 110 to charge the storage capacitor Cres using operating voltage Vop and reset the load capacitors Cxp and Cxn using common-mode voltage Vcm. Then, in a second stage, floating inverting amplifier 120 couples the storage capacitor Cres to inverters INVp and INVn to drive inverters INVp and INVn using the storage capacitor Cres. Furthermore, in the second stage, the floating inverting amplifier 120 couples the load capacitors Cxp and Cxn to the inverters INVp and INVn, so that the inverters INVp and INVn charge the load capacitors Cxp and Cxn according to the differential input signals Vip and Vin. Therefore, the floating inverting amplifier 120 can generate amplified input signals Vip and Vin using the load capacitors Cxp and Cxn.

[0014] The voltage generation circuit 110 includes a current generation circuit 112 and a current-to-voltage conversion circuit 114. The current generation circuit 112 includes a multi-stage current mirror CMS and a voltage-to-current conversion circuit VICa. The multi-stage current mirror CMS includes an output terminal Noa and is used to generate an output current Ioa. When the output current Ioa flows through the output terminal Noa, the output terminal Noa generates an output voltage Voa. The voltage-to-current conversion circuit VICa is coupled to the output terminal Noa to receive the output voltage Voa from the output terminal Noa. The voltage-to-current conversion circuit VICa is used to convert the output voltage Voa into an operating current Iopa.

[0015] A current-to-voltage conversion circuit 114 is coupled to a voltage-to-current conversion circuit VICa to receive an operating current Iopa from VICa. The current-to-voltage conversion circuit 114 is used to generate an operating voltage Vop based on the operating current Iopa. It is worth noting that the operating current Iopa and the operating voltage Vop are positively correlated with any transistor in the multi-stage current mirror CMS through which the output current Ioa flows (e.g., Figure 1 The critical voltage of transistors M4 or M5 is used to compensate for the impact of environmental conditions (such as process variations or operating temperature) on the gain of the floating inverting amplifier 120 caused by the transistors T1 to T4 in the inverters INVp and INVn.

[0016] In detail, the multi-stage current mirror CMS includes a current mirror CMa, a bias circuit BIa, a bias circuit BIb, and an output stage OPTa. The current mirror CMa is coupled to the power supply terminal PW2, and the first terminal of the current mirror CMa (e.g., Figure 1 Node N1) is used in the self-biased circuit BIa to receive the reference current Iref. Therefore, the second terminal of the current mirror CMa (e.g., Figure 1 Node N2 will generate a mirror current Ica of the same magnitude as the reference current Iref.

[0017] A bias circuit BIa is coupled between the power supply terminal PW1 and node N1, that is, the bias circuit BIa is connected in series with the first terminal of the current mirror CMa. The bias circuit BIa is used to generate a control signal CA based on the reference current Iref. In some embodiments, the bias circuit BIa includes a transistor M1. The first terminal (e.g., source) of transistor M1 is coupled to the power supply terminal PW1, and the second terminal (e.g., drain) and the control terminal (e.g., gate) of transistor M1 are coupled to node N1. In other words, transistor M1 is a diode-connected transistor and is connected in series between the power supply terminal PW1 and the first terminal of the current mirror CMa to receive the reference current Iref. When the reference current Iref flows through transistor M1, the second terminal of transistor M1 and the control terminal generate the control signal CA. In some embodiments, transistor M1 is a P-type transistor. In this embodiment, the power supply terminal PW1 may be coupled to a system high voltage, such as V. DD .

[0018] A bias circuit BIb is coupled between the power supply terminal PW1 and node N2, that is, the bias circuit BIb is connected in series with the second terminal of the current mirror CMa to receive the mirrored current Ica. The bias circuit BIb is used to generate a control signal CB based on the mirrored current Ica. In some embodiments, the bias circuit BIb includes transistors M2 and M3. The first terminal (e.g., source) of transistor M2 is coupled to the power supply terminal PW1; the second terminal (e.g., drain) and the control terminal (e.g., gate) of transistor M2 are coupled to the first terminal (e.g., source) of transistor M3. The second terminal (e.g., drain) and the control terminal (e.g., gate) of transistor M3 are coupled to node N2.

[0019] In other words, transistors M2 and M3 are diode-connected transistors, and are sequentially connected in series between the power supply terminal PW1 and the second terminal of the current mirror CMa to receive the mirrored current Ica. When the mirrored current Ica flows through transistors M2 and M3, the second terminal of the current mirror CMa (i.e., node N2) is used to generate the control signal CB. In some embodiments, transistors M2 and M3 are P-type transistors.

[0020] The output stage OPTA includes an output terminal Noa. The output stage OPTA receives control signals CA and CB, which in turn control the generation of an output current Ioa. As previously mentioned, when the output current Ioa flows through the output terminal Noa, the output terminal Noa generates an output voltage Voa. Specifically, the output stage OPTA also includes transistors M4 and M5. The first terminal (e.g., source) of transistor M4 is coupled to the power supply terminal PW1; the second terminal (e.g., drain) of transistor M4 is coupled to the output terminal Noa; the control terminal (e.g., gate) of transistor M4 is coupled to the bias circuit BIa through node N1 to receive the control signal CA from the bias circuit BIa. The first terminal (e.g., source) of transistor M5 is coupled to the output terminal Noa; the second terminal (e.g., drain) of transistor M5 is coupled to the power supply terminal PW2; the control terminal (e.g., gate) of transistor M5 is coupled to the bias circuit BIb through node N2 to receive the control signal CB from the bias circuit BIb. In some embodiments, transistors M4 and M5 are P-type transistors. In this embodiment, the power supply terminal PW2 can be used to provide the system ground or a system low voltage, such as V. SS .

[0021] The voltage-to-current conversion circuit VICa includes a resistor R1, an amplifier AMP, and a transistor M6. Resistor R1 is coupled between the power supply terminal PW1 and node N3. The first terminal of amplifier AMP (e.g., the non-inverting input) is coupled to the output terminal Noa to receive the output voltage Voa. The second terminal of amplifier AMP (e.g., the inverting input) is coupled to resistor R1 through node N3. Transistor M6 generates the operating current Iopa. The first terminal of transistor M6 (e.g., the source) is coupled to resistor R1 through node N3. The second terminal of transistor M6 (e.g., the drain) is coupled to the current-to-voltage conversion circuit 114 through node N4. The control terminal (e.g., the gate) of transistor M6 is coupled to the output terminal of amplifier AMP.

[0022] In other words, resistor R1, the second terminal of amplifier AMP (or node N3), and transistor M6 are connected in series between power supply terminal PW1 and current-to-voltage conversion circuit 114 (or node N4). The operating current Iopa is sequentially transmitted to node N4 via resistor R1, node N3, and transistor M6. In some embodiments, transistor M6 is a P-type transistor.

[0023] The current-to-voltage conversion circuit 114 includes a resistor R2. The first terminal of resistor R2 is coupled to the voltage-to-current conversion circuit VICa through node N4 to receive the operating current Iopa from VICa. The second terminal of resistor R2 is coupled to the power supply terminal PW3. Figure 1In this embodiment, the voltage at power supply terminal PW1 is higher than the voltage at power supply terminal PW2, and also higher than the voltage at power supply terminal PW3, wherein power supply terminals PW2 and PW3 may have the same or different voltages. When the operating current Iopa flows sequentially through the first and second terminals of resistor R2, the first terminal of resistor R2 (or node N4) is used to generate the operating voltage Vop.

[0024] In some embodiments, transistors M1, M4, and M5 have the same width-to-length ratio. Transistors M2 and M3 have the same width-to-length ratio. In some embodiments, the width-to-length ratio of transistors M2 and M3 is four times that of transistors M1, M4, and M5. Preferably, resistors R1 and R2 have the same resistance value. Since the reference current Iref, the mirror current Ica, and the output current Ioa have the same magnitude, the relationship between the source-drain voltage, the operating current Iopa, and the operating voltage Vop of the plurality of transistors in the voltage generation circuit 110 can be expressed by the following Equations 1 to 5.

[0025] V SG,M2 =V SG,M3 "Formula 1"

[0026] V SG,M1 =2V SG,M3 -|Vtp|=V SG,M4 =V SG,M5 "Formula 2"

[0027] Vout = Vpw1 - |Vtp| (Formula 3)

[0028] Iout=|Vtp| / R1 《Formula 4》

[0029] Vop = Vpw³ + |Vtp| (Formula 5)

[0030] In the above formula, the symbol "V" SG,M1 “V” SG,M2 “V” SG,M3 “V” SG,M4 "and "V SG,M5 "Vpw3" represents the source-drain voltages of transistors M1 through M5 respectively. The symbol "Vpw3" represents the voltage at the power supply terminal PW3. The symbol "|Vtp|" represents... Figure 1 The critical voltage of any P-type transistor. From Equations 4 and 5, it can be seen that the operating voltage Vop is linearly related (positively related in this example) to the critical voltage "|Vtp|". Therefore, when the P-type transistors INVp and INVn of the inverter (e.g., Figure 1When the critical voltages of transistors T1 and T3 in the inverter rise or fall due to changes in environmental conditions (such as process variations or operating temperature), the operating voltage Vop will rise or fall accordingly. This affects the P-type transistors (e.g., those in inverters INVp and INVn). Figure 1 The source-drain voltages of transistors T1 and T3 in the circuit will also rise or fall accordingly, thereby mitigating the impact of environmental conditions on the current generated by inverters INVp and INVn. In this way, the voltage generation circuit 110 tracks the change in its generated operating voltage Vop to reflect the change in the critical voltage Vtp due to environmental conditions.

[0031] Figure 2 This is a circuit diagram of an amplifier circuit 200 according to an embodiment of the present disclosure. The amplifier circuit 200 includes a voltage generation circuit 210 and a floating inverting amplifier 220. Figure 2 The structure and operation of the floating inverting amplifier 220 are similar to those of... Figure 1 The floating inverting amplifier 120, for the sake of simplicity, will not be described in detail here. It is worth mentioning that... Figure 2 In one embodiment, the voltage at power supply terminal PW2' is higher than the voltages at power supply terminals PW1' and PW3'.

[0032] Voltage generation circuit 210 generates an operating voltage Vop to drive floating inverting amplifier 220. Voltage generation circuit 210 includes current generation circuit 212 and current-to-voltage conversion circuit 214. Current generation circuit 212 includes a multi-stage current mirror CMS' and a voltage-to-current conversion circuit VICb. The multi-stage current mirror CMS' includes an output terminal Nob and generates an output current Iob. When the output current Iob flows through the output terminal Nob, the output terminal Nob generates an output voltage Vob. Voltage-to-current conversion circuit VICb is coupled to the output terminal Nob to receive the output voltage Vob from the output terminal Nob. Voltage-to-current conversion circuit VICb converts the output voltage Vob into an operating current Iopb.

[0033] A current-to-voltage conversion circuit 214 is coupled to a voltage-to-current conversion circuit VICb to receive the operating current Iopb from the voltage-to-current conversion circuit VICb. The current-to-voltage conversion circuit 214 generates a mirror current Icb based on the operating current Iopb, and then generates an operating voltage Vop based on the mirror current Icb. It is worth noting that the operating current Iopb, the mirror current Icb, and the operating voltage Vop are linearly related (positively related in this example) to any transistor in the multi-stage current mirror CMS' through which the output current Iob flows (e.g., ...). Figure 2 The critical voltage of transistors M4' or M5' is used to compensate for the effect of environmental conditions of inverters INVp and INVn on the gain of the floating inverter amplifier 220.

[0034] Figure 2 The structure and operation of the current generating circuit 212 are similar to those of the circuit. Figure 1 The current generating circuit 112. For example, Figure 2 A schematic diagram of the current generating circuit 212 is shown below. Figure 1 The schematic diagram of the current generating circuit 112 is shown as a mirror image. For simplicity, only the differences between the two are explained below. The multi-stage current mirror CMS' includes a current mirror CMa', a bias circuit BIa', a bias circuit BIb', and an output stage OPTa'. The current mirror CMa' is coupled to the power supply terminal PW2'. Since the voltage at the power supply terminal PW2' is higher than the voltage at the power supply terminal PW1', the first terminal of the current mirror CMa' (e.g., Figure 2 Node N1' is used to transfer the reference current Iref' to the bias circuit BIa'. The second terminal of the current mirror CMa' (e.g., Figure 2 The node N2' will output a mirror current Ica' with the same magnitude as the reference current Iref'.

[0035] The bias circuit BIa' includes a transistor M1'. In some embodiments, the transistor M1' of the bias circuit BIa' is an N-type transistor and includes a first terminal (e.g., source), a second terminal (e.g., drain), and a control terminal (e.g., gate). When the reference current Iref' flows sequentially through the second terminal and the first terminal of the transistor M1', the second terminal of the transistor M1' and the control terminal generate a control signal CA'.

[0036] One end of the bias circuit BIb' is coupled to the second end of the current mirror CMa' through node N2', and the other end of the bias circuit BIb' is coupled to the power supply terminal PW1'. The bias circuit BIb' includes transistors M2' and M3'. The first end (e.g., source) of transistor M3' is coupled to node N2'; the second end (e.g., drain) and the control terminal (e.g., gate) of transistor M3' are coupled to the first end (e.g., source) of transistor M2'. The second end (e.g., drain) and the control terminal (e.g., gate) of transistor M2' are coupled to the power supply terminal PW1'.

[0037] In other words, transistors M2' and M3' are diode-connected transistors, and are sequentially connected in series between the power supply terminal PW1' and the second terminal of the current mirror CMa' to receive the mirrored current Ica'. When the mirrored current Ica' flows through transistors M2' and M3', the second terminal of the current mirror CMa' (i.e., node N2') is used to generate the control signal CB'. In some embodiments, transistors M2' and M3' are P-type transistors.

[0038] Output stage OPTa' is used to generate output current Iob controlled by control signals CA' and CB'. Output stage OPTa' includes output terminal Nob, transistor M4', and transistor M5'. The control terminals (e.g., gates) of transistors M4' and M5' are used to receive control signals CA' and CB', respectively. Transistor M4', output terminal Nob, and transistor M5' are connected in series between power supply terminals PW1' and PW2'. When output current Iob flows through output terminal Nob, output terminal Nob generates output voltage Vob. Additionally, in Figure 2 In some embodiments, the control terminal of transistor M4' is coupled to bias circuit BIa' (e.g., the second terminal and control terminal of transistor M1') to receive control signal CA'. In some embodiments, transistors M4' and M5' are N-type transistors.

[0039] The voltage-to-current conversion circuit VICb includes a resistor R1', an amplifier AMP', and a transistor M6'. The voltage-to-current conversion circuit VICb receives the output voltage Vob from the output terminal Nob and converts the output voltage Vob into an operating current Iopb. In some embodiments, the transistor M6' is an N-type transistor and includes a first terminal (e.g., drain), a second terminal (e.g., source), and a control terminal (e.g., gate). The first terminal of the transistor M6' is coupled to the current-to-voltage conversion circuit 214. The first terminal of the amplifier AMP' (e.g., non-inverting input) is coupled to the output terminal Nob to receive the output voltage Vob. The second terminal of the amplifier AMP' (e.g., inverting input) is coupled through node N3' to the resistor R1' and the second terminal of the transistor M6'. The output terminal of the amplifier AMP' is coupled to the control terminal of the transistor M6'.

[0040] In other words, resistor R1', the second terminal of amplifier AMP' (or node N3'), and transistor M6' are connected in series between power supply terminal PW1' and current-to-voltage conversion circuit 214. The operating current Iopb flows sequentially through transistor M6', node N3', resistor R1', and power supply terminal PW1'.

[0041] The current-to-voltage conversion circuit 214 includes a current mirror CMb and a resistor R2'. The first terminal of the current mirror CMb is coupled to the voltage-to-current conversion circuit VICb (e.g., the first terminal, drain, of transistor M6') to output an operating current Iopb. Therefore, the second terminal of the current mirror CMb (e.g.,...) Figure 2Node N4' will generate a mirror current Icb of the same magnitude as the operating current Iopb. The first end of resistor R2' is coupled to the second end of the current mirror CMb through node N4' to receive the mirror current Icb. The second end of resistor R2' is coupled to the power supply terminal PW3'. When the mirror current Icb flows sequentially through the first and second ends of resistor R2', the first end of resistor R2' (or node N4') is used to generate the operating voltage Vop. It is worth mentioning that resistors R1' and R2' have the same resistance value.

[0042] Therefore, in Figure 2 In this embodiment, the operating voltage Vop is "Vpw3' + Vtn". The symbol "Vpw3'" represents the voltage at the power supply terminal PW3'. The symbol "Vtn"... Figure 2 The critical voltage of any N-type transistor. In other words, the operating voltage Vop is linearly related (positively related in this example) to the critical voltage "Vtn". Therefore, when the N-type transistors INVp and INVn of the inverter (e.g., Figure 2 When the critical voltage of transistors T2 and T4 rises or falls due to process variations or changes in operating temperature, the operating voltage Vop will rise or fall accordingly. This affects the N-type transistors (e.g., in inverters INVp and INVn). Figure 2 The source-drain voltages of transistors T2 and T4 will also rise or fall accordingly, thereby mitigating the impact of environmental conditions on the current generated by inverters INVp and INVn. Therefore, Figure 2 The amplifier circuit 200 can mitigate the impact of the critical voltage variation of the N-type transistor on the floating inverting amplifier 220.

[0043] Figure 3 This is a functional block diagram of an amplifier circuit 300 according to an embodiment of the present disclosure. The amplifier circuit 300 includes a voltage generation circuit 310 and a floating inverting amplifier 320. Figure 3 The structure and operation of the floating inverting amplifier 320 are similar to those of... Figure 1 The floating inverting amplifier 120 will not be described in detail here for the sake of simplicity. The voltage generation circuit 310 includes a current generation circuit 312, a current generation circuit 314, and a current-to-voltage conversion circuit 316. Figure 3 The current generating circuit 312 can be generated by Figure 1 This is achieved through the current generating circuit 112. Figure 3 The current generating circuit 314 can be generated by Figure 2 The current generating circuit 212 is used to achieve this.

[0044] In other words, the current generation circuit 312 includes a multi-stage current mirror CMS and a voltage-to-current conversion circuit VICa (see also...). Figure 1 (Refer to the current generating circuit 112). Figure 1 As shown, the multi-stage current mirror CMS includes an output terminal Noa and is used to generate an output current Ioa. The output current Ioa flows through the output terminal Noa to generate an output voltage Voa. The voltage-to-current conversion circuit VICa is coupled to the output terminal Noa to receive the output voltage Voa and is used to convert the output voltage Voa into an operating current Iopa. Additionally, the current generation circuit 314 includes a multi-stage current mirror CMS' and a voltage-to-current conversion circuit VICb (see also...). Figure 2 (The current generating circuit 212). (Refer to...) Figure 2 As shown, the multi-stage current mirror CMS' includes an output terminal Nob, which is used to generate an output current Iob. The output current Iob flows through the output terminal Nob to generate an output voltage Vob. The voltage-to-current conversion circuit VICb is coupled to the output terminal Nob to receive the output voltage Vob and is used to convert the output voltage Vob into an operating current Iopb.

[0045] The current-to-voltage conversion circuit 316 is used to generate the operating voltage Vop based on the sum of the operating current Iopa and the operating current Iopb. The current-to-voltage conversion circuit 316 includes current mirrors CMb, CMc, CMd, and CMe, and a resistor R2". The current mirror CMb includes a first terminal (e.g., ...). Figure 3 The current mirror CMb is connected to the second terminal (node ​​N5) and the power supply terminal PW1. The second terminal of the current mirror CMb is used to output the mirrored current Icb. The current mirror CMc includes a first terminal and a second terminal, and is coupled to the power supply terminal PW2'. The first terminal of the current mirror CMc is coupled to the current generating circuit 314 (for example, the current generating circuit 314 may be composed of...). Figure 2 This is achieved through the current generating circuit 212. Figure 3 The first end of the medium current mirror CMC is coupled to Figure 2 The first terminal (drain) of transistor M6' in the voltage-to-current conversion circuit VICb outputs the operating current Iopb to the current generation circuit 314. The generation process of the operating current Iopb is similar to the aforementioned coordination. Figure 2 For the sake of brevity, the details described herein will not be repeated here. The second terminal of the current mirror CMC is used to generate a mirror current Icc of the same magnitude as the operating current Iopb.

[0046] The current mirror CMd includes a first terminal and a second terminal, and is coupled to the power supply terminal PW1'. The first terminal of the current mirror CMd is coupled to the second terminal of the current mirror CMC to receive the mirrored current Icc. The second terminal of the current mirror CMd is coupled to the first terminal of the current mirror CMb (e.g., node N5) and is used to generate a mirrored current Icd of the same magnitude as the mirrored current Icc. The current mirror CMe includes a first terminal and a second terminal, and is coupled to the power supply terminal PW2. The first terminal of the current mirror CMe is coupled to the current generation circuit 312 (e.g., ...). Figure 3The current generating circuit 312 can be generated by Figure 1 The current generating circuit 112 is used to implement this. Figure 3 The first end of the medium current mirror CMe can be coupled to Figure 1 The second terminal (drain) of transistor M6 in the voltage-to-current conversion circuit VICa receives the operating current Iopa from the current generation circuit 312. The generation process of the operating current Iopa is similar to the aforementioned coordination. Figure 1 For the sake of brevity, the contents described herein will not be repeated here. The second end of the current mirror CMe is coupled to the first end of the current mirror CMb (e.g., node N5) and is used to generate a mirror current Ice of the same magnitude as the operating current Iopa.

[0047] As mentioned above, the current at node N5 is equal to the sum of the mirror currents Icd and Ice, which is also equal to the sum of the operating currents Iopa and Iopb. Therefore, the mirror current Icb at the second terminal of the current mirror CMb is equal to the sum of the operating currents Iopa and Iopb (i.e., Icb = Iopa + Iopb).

[0048] Resistor R2” includes a first terminal and a second terminal. The first terminal of resistor R2” is coupled to the second terminal of the current mirror CMb to receive the mirrored current Icb. The second terminal of resistor R2” is coupled to the power supply terminal PW3. When the mirrored current Icb flows from the current mirror CMb through the first and second terminals of resistor R2” in sequence, a working voltage Vop is generated at the first terminal of resistor R2”.

[0049] In this embodiment, the resistance value of resistor R2” is the same as Figure 1 The resistance value of resistor R1 is the same as that of resistor R1. Figure 2 The resistance value of resistor R1'. Therefore, in Figure 3 In this embodiment, the operating voltage Vop is "Vpw3 + Vtn + |Vtp|". The symbol "Vpw3" represents the voltage at the power supply terminal PW3. The symbol "Vtn" represents the critical voltage of any N-type transistor in Figures 1-3. The symbol "|Vtp|" represents the critical voltage of any P-type transistor in Figures 1-3. In summary, Figure 3 The amplifier circuit 300 can simultaneously reduce the impact of the critical voltage variations of the N-type transistor and the P-type transistor on the floating inverting amplifier 320.

[0050] In the foregoing Figures 1 to 3 In some embodiments, the operating voltage Vop, as a high voltage, is provided to the energy storage capacitor Cres of the floating inverting amplifier, which is coupled to the upper end of the P-type transistor. The energy storage capacitor Cres, coupled to the lower end of the N-type transistor, is used to receive a low voltage lower than the operating voltage Vop. In some embodiments, such as Figure 4As shown, the operating voltage Vop is provided as a low voltage to the energy storage capacitor Cres, which is coupled to the lower end of the N-type transistor. The energy storage capacitor Cres, coupled to the upper end of the P-type transistor, is used to receive a high voltage higher than the operating voltage Vop.

[0051] Figure 4 This is a functional block diagram of an amplifier circuit 400 according to an embodiment of the present disclosure. The amplifier circuit 400 includes a voltage generation circuit 410 and a floating inverting amplifier 420. Figure 4 The structure and operation of the floating inverting amplifier 420 are similar to those of... Figure 1 The floating inverting amplifier 120 will not be described in detail here for the sake of simplicity. The voltage generation circuit 410 includes a current generation circuit 412, a current generation circuit 414, and a current-to-voltage conversion circuit 416. Figure 4 The medium current generating circuit 412 can be derived from... Figure 1 The current generating circuit 112 is used to generate the working current Iopa. Figure 4 The medium current generating circuit 414 can be derived from... Figure 2 The current generating circuit 212 is used to achieve this, that is, the current generating circuit 414 is used to generate the working current Iopb.

[0052] The current-to-voltage conversion circuit 416 includes a current mirror CMb, a current mirror CMC, and a resistor R2. The current mirror CMC includes a first terminal (e.g., Figure 4 The second terminal of the current mirror CMb is coupled to the power supply terminal PW1'. The second terminal of the current mirror CMb is used to generate the mirrored current Icb. The first terminal of the current mirror CMc is coupled to the current generating circuit 414 (e.g., ...). Figure 4 The current generating circuit 414 in the middle can be generated by Figure 2 This is achieved through the current generating circuit 212. Figure 4 The first end of the medium current mirror CMC can be coupled to Figure 2 The first terminal (drain) of transistor M6' in the voltage-to-current conversion circuit VICb outputs the operating current Iopb to the current generation circuit 414. The generation process of the operating current Iopb is similar to the aforementioned coordination. Figure 2 For the sake of brevity, the contents described herein will not be repeated here. The second end of the current mirror CMC is coupled to the first end of the current mirror CMb (e.g., node N6) and is used to generate a mirror current Icc of the same magnitude as the operating current Iopb.

[0053] The first terminal of the current mirror CMb (e.g., node N6) is coupled to the second terminal of the current mirror CMC and the current generation circuit 412 to receive the operating current Iopa and the mirrored current Icc. The generation process of the operating current Iopa is similar to the aforementioned coordination. Figure 1For the sake of brevity, the details described herein will not be repeated here. In summary, the magnitude of the mirror current Icb is equal to the sum of the operating current Iopa and the mirror current Icc (i.e., Icb = Iopa + Icc). Resistor R2” includes a first terminal and a second terminal. The first terminal of resistor R2” is coupled to the power supply terminal PW1. The second terminal of resistor R2” is coupled to the second terminal of the current mirror CMb to output the mirror current Icb. When the mirror current Icb flows sequentially through the first and second terminals of resistor R2” to the current mirror CMb, the second terminal of resistor R2” is used to generate the operating voltage Vop.

[0054] In this embodiment, the resistance value of resistor R2” is the same as Figure 1 The resistance value of resistor R1 is the same as that of resistor R1. Figure 2 The resistance value of resistor R1'. Therefore, in Figure 4 In this embodiment, the operating voltage Vop is "Vpw1 - Vtn - |Vtp|". The symbol "Vpw1" represents the voltage at the power supply terminal PW1. The symbol "Vtn" represents the critical voltage of any N-type transistor in Figures 1-2 and 4. The symbol "|Vtp|" represents the critical voltage of any P-type transistor in Figures 1-2 and 4. In summary, Figure 4 The amplifier circuit 400 can simultaneously reduce the impact of the critical voltage variations of the N-type transistor and the P-type transistor on the floating inverting amplifier 420.

[0055] The operating voltage Vop provided by the voltage generation circuit 410 in the amplifier circuit 400 is linearly correlated (in this example, negatively correlated) with the critical voltage of the transistor in the floating inverting amplifier 420. The voltage generation circuit 410 is used to track the change in the operating voltage Vop it generates by tracking the change in the critical voltage. In this way, the influence of environmental conditions (such as process variations, operating voltage, or operating temperature) on the amplification gain of the floating inverting amplifier 420 is reduced, thereby allowing the floating inverting amplifier 420 to have a stable amplification gain (not affected by process variations or operating temperature).

[0056] exist Figure 3 and Figure 4 In several embodiments, the voltages at power supply terminals PW1 and PW2' are higher than the voltages at power supply terminals PW1' and PW2, and higher than the voltage at power supply terminal PW3. Power supply terminals PW1 and PW2' may have the same or different voltages. Power supply terminals PW1' and PW2 may have the same or different voltages.

[0057] Certain terms are used in the specification and claims to refer to specific elements. However, those skilled in the art will understand that the same element may be referred to by different names. The specification and claims do not distinguish elements by differences in name, but by differences in function. The term "comprising" in the specification and claims is an open-ended term and should be interpreted as "comprising but not limited to". Furthermore, "coupled" here includes any direct and indirect means of connection. Therefore, if the text describes a first element coupled to a second element, it means that the first element can be directly connected to the second element via electrical connection or signal connection methods such as wireless transmission or optical transmission, or indirectly electrically or signalally connected to the second element via other elements or connection means.

[0058] The above are merely preferred embodiments of this disclosure. Various modifications and equivalent changes can be made to this disclosure without departing from its scope or spirit. In summary, all modifications and equivalent changes made to this disclosure within the scope of the following claims are within the scope of this disclosure.

[0059] [Symbol Explanation]

[0060] 100, 200, 300, 400: Amplifier circuits

[0061] 110, 210, 310, 410: Voltage generation circuits

[0062] 112, 212, 312, 314, 412, 414: Current generating circuits

[0063] 114, 214, 316, 416: Current-to-voltage conversion circuits

[0064] 120, 220, 320, 420: Floating Inverting Amplifiers

[0065] PW1, PW2, PW3: Power supply terminals

[0066] PW1', PW2', PW3': Power supply terminals

[0067] M1, M2, M3, M4, M5, M6: Transistors

[0068] M1', M2', M3', M4', M5', M6': Transistors

[0069] T1, T2, T3, T4: Transistors

[0070] N1, N2, N3, N4, N5, N6: Nodes

[0071] N1', N2', N3', N4': Nodes

[0072] R1, R2: Resistors

[0073] R1', R2', R2”: Resistors

[0074] CMS, CMS': Multistage Current Mirror

[0075] VICa, VICb: Voltage-to-current conversion circuit

[0076] BIa, BIb, BIa', BIb': Bias circuit

[0077] OPTa, OPTa': Output stage

[0078] CMa, CMa', CMb, CMc, CMd, CMe: Current mirror

[0079] Noa, Nob: Output terminals

[0080] Ioa, Iob: Output current

[0081] Iref, Iref': Reference current

[0082] Ica, Ica', Icb, Icc, Icd, Ice: Image current

[0083] Iopa, Iopb: Operating current

[0084] Voa, Vob: Output voltage

[0085] Vop: Operating voltage

[0086] CA, CB, CA', CB': Control signals

[0087] AMP, AMP': Amplifier

[0088] INVp, INVn: Inverter

[0089] Vip, Vin: Input signals

[0090] Cxp, Cxn: Load capacitance

[0091] Cres: Energy storage capacitor

[0092] Vcm: Common-mode voltage.

Claims

1. An amplifier circuit, comprising: A floating inverting amplifier, wherein a threshold voltage of a transistor in the floating inverting amplifier varies with an ambient condition; and A voltage generation circuit, coupled to the floating inverting amplifier, is used to provide an operating voltage to the floating inverting amplifier, wherein... The operating voltage provided by the voltage generation circuit is linearly related to the critical voltage, and the voltage generation circuit makes the change in the operating voltage track the change in the critical voltage.

2. The amplifier circuit as described in claim 1, wherein, The voltage generating circuit includes a first current generating circuit and a current-to-voltage conversion circuit, wherein the first current generating circuit includes: A first multi-stage current mirror includes a first output terminal for generating a first output current, wherein when the first output current flows through the first output terminal, the first output terminal is used to generate a first output voltage; and A first voltage-to-current conversion circuit is coupled to the first output terminal to receive the first output voltage and is used to convert the first output voltage into a first operating current. The current-to-voltage conversion circuit is coupled to the first voltage-to-current conversion circuit to receive the first operating current and to generate the operating voltage based on the first operating current. The first operating current and the operating voltage are positively correlated with another critical voltage of any transistor of the first multi-stage current mirror through which the first output current flows.

3. The amplifier circuit as described in claim 2, wherein, The first multi-stage current mirror includes: A first current mirror, wherein a first end of the first current mirror is used to receive a reference current, so that a second end of the first current mirror generates a first mirror current; A first bias circuit is connected in series to the first terminal of the first current mirror and is used to generate a first control signal based on the reference current. A second bias circuit, connected in series with the second terminal of the first current mirror, is used to generate a second control signal based on the first mirror current; and A first output stage, including the first output terminal, is configured to generate the first output current by being controlled by the first control signal and the second control signal.

4. The amplifier circuit as described in claim 3, wherein, The second bias circuit includes: A second transistor; and A third transistor, wherein the second transistor and the third transistor are diode-connected transistors, and are sequentially connected in series between a first power supply terminal and the second terminal of the first current mirror to receive the first mirror current. When the first mirror current flows through the second transistor and the third transistor, the second terminal of the first current mirror is used to generate the second control signal, and the voltage of the first power supply terminal is greater than the voltage of the second power supply terminal.

5. The amplifier circuit as described in claim 2, wherein, The first voltage-to-current conversion circuit includes: First resistor; An amplifier, wherein a first terminal of the amplifier is coupled to the first output terminal to receive the first output voltage, and a second terminal of the amplifier is coupled to the first resistor; and A sixth transistor is used to generate the first operating current, wherein a control terminal of the sixth transistor is coupled to an output terminal of the amplifier. The first resistor, the second terminal of the amplifier, and the sixth transistor are sequentially connected in series between a first power supply terminal and the current-to-voltage conversion circuit.

6. The amplifier circuit as described in claim 1, wherein, The voltage generating circuit includes a second current generating circuit and a current-to-voltage conversion circuit, wherein the second current generating circuit includes: A second multi-stage current mirror includes a second output terminal for generating a second output current, wherein when the second output current flows through the second output terminal, the second output terminal is used to generate a second output voltage; and A second voltage-to-current conversion circuit is coupled to the second output terminal to receive the second output voltage and convert the second output voltage into a second operating current. The current-to-voltage conversion circuit is coupled to the second voltage-to-current conversion circuit to receive the second operating current and to generate the operating voltage based on the second operating current. The second operating current and the operating voltage are positively correlated with another critical voltage of any transistor of the second multi-stage current mirror through which the second output current flows.

7. The amplifier circuit as described in claim 1, wherein, The voltage generation circuit includes a first current generation circuit, a second current generation circuit, and a current-to-voltage conversion circuit. The first current generation circuit generates a first operating current, the second current generation circuit generates a second operating current, and the current-to-voltage conversion circuit generates the operating voltage based on the sum of the first operating current and the second operating current.

8. The amplifier circuit as described in claim 7, wherein, This current-to-voltage conversion circuit includes: A second current mirror includes a first end and a second end, wherein the second end of the second current mirror is used to generate a second mirror current; A third current mirror, wherein a first end of the third current mirror is coupled to the second current generating circuit to output the second operating current, and a second end of the third current mirror is used to generate a third mirror current; A fourth current mirror, wherein a first end of the fourth current mirror is coupled to the second end of the third current mirror to receive the third mirror current, and a second end of the fourth current mirror is coupled to the first end of the second current mirror and is used to generate a fourth mirror current. A fifth current mirror, wherein a first terminal of the fifth current mirror is coupled to the first current generating circuit to receive the first operating current, and a second terminal of the fifth current mirror is coupled to the first terminal of the second current mirror and is used to generate a fifth mirror current; and A second resistor, wherein the first end of the second current mirror is used to receive the fourth mirror current and the fifth mirror current, and a first end of the second resistor is coupled to the second end of the second current mirror to receive the second mirror current, wherein when the second mirror current flows sequentially from the second current mirror through the first end and the second end of the second resistor, the first end of the second resistor is used to generate the operating voltage.

9. The amplifier circuit of claim 7, wherein the current-to-voltage conversion circuit comprises: A second current mirror; A third current mirror, in which, A first terminal of the third current mirror is coupled to the second current generating circuit to output the second operating current. A second terminal of the third current mirror is coupled to the first terminal of the second current mirror and is used to generate a third mirror current. The first terminal of the second current mirror is used to receive the first operating current and the third mirror current, and the second terminal of the second current mirror is used to generate the second mirror current. A second resistor includes a first terminal and a second terminal, wherein the second terminal of the second resistor is coupled to the second terminal of the second current mirror to output the second mirror current, and when the second mirror current flows sequentially through the first terminal and the second terminal of the second resistor and is transmitted to the second current mirror, the second terminal of the second resistor is used to generate the operating voltage.

10. A voltage generating circuit, comprising: A first current generating circuit, comprising: A first multi-stage current mirror includes a first output terminal for generating a first output current, wherein when the first output current flows through the first output terminal, the first output terminal is used to generate a first output voltage. as well as A first voltage-to-current conversion circuit is coupled to the first output terminal to receive the first output voltage and is used to convert the first output voltage into a first operating current. as well as A current-to-voltage conversion circuit, coupled to the first voltage-to-current conversion circuit, receives the first operating current and generates an operating voltage based on the first operating current. The first operating current and the operating voltage are positively correlated with a critical voltage of any transistor in the first multi-stage current mirror through which the first output current flows.

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