Medium-voltage static var compensator

Abstract

The invention discloses a medium-voltage static var compensator. The medium-voltage static var compensator comprises a low-frequency sub-module unit and a high-frequency sub-module unit, the low-frequency sub-module unit is formed by connecting N-1 low-frequency sub-modules with the same structure in series, and each low-frequency sub-module comprises a first direct-current energy storage capacitor (CL) and a plurality of Si-based insulated gate bipolar transistors; the high-frequency sub-module unit is composed of a three-phase bridge type converter unit, and the three-phase bridge type converter unit comprises a second direct-current energy storage capacitor (CH) and a plurality of SiC-based metal oxide semiconductor field effect transistors; and the low-frequency sub-module unit is connected with the high-frequency sub-module unit. According to the medium-voltage SVG, the problem that comprehensive optimization of efficiency, cost and power density of a medium-voltage SVG based on a single device is difficult is solved.

Description

Technical Field

[0001] This invention relates to the field of power quality management technology, and in particular to a medium-voltage static var compensator. Background Technology

[0002] The large-scale integration of new energy sources and nonlinear loads into distribution networks has led to a dramatic increase in the demand for reactive power in active distribution networks. With the rapid development of industries such as precision machinery manufacturing, equipment applications, and industrial automation, the requirements for power quality are also increasing. Against this backdrop, power quality has become a critical issue that urgently needs to be addressed in new power systems. Reactive power is closely related to power quality; excessive accumulation of reactive power in the grid can lead to increased equipment capacity demand and reduced voltage stability. Therefore, maintaining a balance between reactive and active power in the grid is crucial. Static Var Generators (SVGs), as important reactive power compensation devices in power systems, have experienced rapid development in recent years. SVGs, with their dynamic reactive power regulation capabilities, can effectively maintain grid voltage stability and optimize the power factor. They possess significant technical advantages such as high response speed, wide-range reactive power compensation, high-precision control, and high reliability, playing an irreplaceable role in improving power quality and ensuring the safe and stable operation of the power grid.

[0003] A typical topology of existing medium-voltage SVG is as follows: Figure 11 As shown, each phase consists of N H-bridge structures connected in series. It has advantages such as high modularity and good output waveform quality, and is currently widely used in the industry. However, traditional H-bridge cascade structures are mainly composed of Si-based insulated-gate bipolar transistors (IGBTs), requiring a large number of modules, resulting in high losses and difficulty in improving power density. Summary of the Invention

[0004] This invention provides a medium-voltage static var compensator (SVG) to address the challenges of comprehensively optimizing efficiency, cost, and power density in medium-voltage SVG based on a single device.

[0005] In view of this, the first aspect of the present invention provides a medium-voltage static var compensator, characterized in that it comprises: a low-frequency submodule unit and a high-frequency submodule unit;

[0006] The low-frequency submodule unit is composed of N-1 identical low-frequency submodules connected in series. Each low-frequency submodule includes a first DC energy storage capacitor (C). L And several Si-based insulated-gate bipolar transistors;

[0007] The high-frequency submodule unit is composed of a three-phase bridge converter unit, which includes a second DC energy storage capacitor (C). H And several SiC-based metal-oxide-semiconductor field-effect transistors;

[0008] The low-frequency submodule unit and the high-frequency submodule unit are connected.

[0009] Optionally, the topology of the medium-voltage static var compensator includes:

[0010] The first low-frequency submodule (LSM1) is connected to the negative terminal of the filter inductor (L) and the emitter of the first Si-based insulated-gate bipolar transistor (T1) and the collector of the fourth Si-based insulated-gate bipolar transistor (T4) through the node of the first Si-based insulated-gate bipolar transistor (T1) and the second low-frequency submodule (LSM2), respectively. The positive terminal of the filter inductor (L) is connected to the power grid.

[0011] In the first low-frequency submodule (LSM1), the collector of the first Si-based insulated-gate bipolar transistor (T1), the collector of the third Si-based insulated-gate bipolar transistor (T3), and the positive terminal of the first DC energy storage capacitor (CL) are connected; the emitter of the second Si-based insulated-gate bipolar transistor (T2), the emitter of the fourth Si-based insulated-gate bipolar transistor (T4), and the positive terminal of the first DC energy storage capacitor (CL) are connected. L The negative terminal of the first Si-based insulated gate bipolar transistor (T1) is connected to the collector of the second Si-based insulated gate bipolar transistor (T2), and the emitter of the third Si-based insulated gate bipolar transistor (T3) is connected to the collector of the fourth Si-based insulated gate bipolar transistor (T4).

[0012] In the high-frequency submodule unit, the first SiC-based metal-oxide-semiconductor field-effect transistor (T... H1 The drain of the second DC energy storage capacitor (C) H The positive electrode of the second SiC-based metal-oxide-semiconductor field-effect transistor (T) is connected to the positive electrode. H2 The source of the second DC energy storage capacitor (C) H The negative terminal of the first SiC-based metal-oxide-semiconductor field-effect transistor (T) is connected to the negative terminal of the transistor. H1 The source of the second SiC-based metal-oxide-semiconductor field-effect transistor (T) H2 The drain of the second SiC-based metal-oxide-semiconductor field-effect transistor (T) is connected to the drain of the first SiC-based metal-oxide-semiconductor field-effect transistor (T). H2 The drain of ) and the (N-1)th low-frequency submodule (LSM) N-1 The collector of the fourth Si-based insulated gate bipolar transistor (T4) is connected.

[0013] Optionally, the modulation strategy of the low-frequency submodule unit includes: using the nearest level to approximate the modulation of the output low-frequency voltage.

[0014] Optionally, the step of modulating the output low-frequency voltage by employing the nearest-level approximation includes:

[0015] By changing the number of low-frequency sub-modules, a low-frequency voltage can be output.

[0016] Wherein, the number of low-frequency sub-modules corresponding to 'a' is expressed as:

[0017] ;

[0018] In the formula, The number of low-frequency submodules deployed. The reference voltage for phase a is the output voltage, and UCLdc is the DC energy storage capacitor voltage of the low-frequency submodule. This is the floor function.

[0019] Optionally, the a-phase output reference voltage The expression is:

[0020] ;

[0021] In the formula, U m ω represents the output voltage amplitude, and ω represents the angular frequency.

[0022] Optionally, the modulation strategy of the high-frequency submodule unit includes: outputting a high-frequency shaping pulse by employing unipolar pulse width modulation.

[0023] Optionally, the step of outputting a high-frequency shaping pulse using unipolar pulse width modulation includes:

[0024] Subtracting the low-frequency submodule unit's output stepped voltage from the phase a output reference voltage yields the high-frequency submodule unit's reference modulation wave u. H * ;

[0025] Reference modulation wave u H * With triangular carrier u c The PWM control signal u is obtained after comparison. HPWM .

[0026] Optionally, the reference modulation wave u of the high-frequency submodule unit H * The expression is:

[0027] ;

[0028] In the formula, The reference voltage for phase a output is the low-frequency stepped voltage u. L .

[0029] Optionally, the modulation process of the PWM specifically includes:

[0030] Reference modulation wave u H * With triangular carrier u c When comparing, when u H * c At that time, the first SiC-based metal-oxide-semiconductor field-effect transistor (T) in the high-frequency submodule unit H1 ) is turned off, the second SiC-based metal-oxide-semiconductor field-effect transistor (T) in the high-frequency submodule unit H2 ) conduction, u H =0; when u H * >u c At that time, the first SiC-based metal-oxide-semiconductor field-effect transistor (T) in the high-frequency submodule unit H1 The second SiC-based metal-oxide-semiconductor field-effect transistor (T) in the high-frequency submodule unit is turned on. H2 ) Off, u H =U CHdc .

[0031] Optionally, the control strategy of the medium-voltage static var compensator includes:

[0032] The grid voltage u s The frequency and phase of the grid voltage are obtained by inputting the phase-locked loop, and the frequency and phase of the grid voltage are respectively input to the abc-dq0 coordinate transformation and the dq0-abc inverse coordinate transformation;

[0033] The load-side current i load Input abc-dq0 coordinate transformation to extract the reactive component i of the load-side current. q i, as a reference value for reactive current qref and the active current reference value i dref Set to zero;

[0034] The active current reference value i dref and reactive current reference value i qref The reference value of the output current i of the medium-voltage static var compensator is obtained by dq0-abc inverse coordinate transformation. ref The actual output current i of the medium-voltage static var compensator abc With output current reference value i ref The difference is calculated, and the modulated reference wave u is obtained through a PI controller. abc * ​;

[0035] Combining the modulation strategy of the low-frequency submodule unit, the modulation strategy of the high-frequency submodule unit, and the modulation reference wave u abc * The control signal of the medium-voltage static var compensator is obtained.

[0036] As can be seen from the above technical solutions, the present invention has the following advantages:

[0037] This invention proposes a medium-voltage static var compensator (SVC) that combines Si-based insulated-gate bipolar transistors (IGBTs) and SiC-based metal-oxide-semiconductor field-effect transistors (MOSFETs). A mixing modulation strategy enables the Si-based IGBTs to operate at low switching frequencies and the SiC-based MOSFETs to operate in high-frequency shaping modes. By combining the advantages of both devices, the output waveform quality is ensured, achieving comprehensive optimization of efficiency, cost, and power density. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This invention provides a topology for a medium-voltage static var compensator.

[0040] Figure 2 The modulation principle of the low-frequency sub-module unit provided in the embodiments of the present invention;

[0041] Figure 3 The high-frequency submodule unit modulation wave and PWM control signal provided in the embodiments of the present invention;

[0042] Figure 4 The topology control strategy provided in the embodiments of the present invention;

[0043] Figure 5 The low-frequency submodule unit output voltage u provided in the embodiment of the present invention L ;

[0044] Figure 6 The high-frequency submodule unit output voltage u provided in the embodiments of the present invention H ;

[0045] Figure 7 The total output voltage u of the medium-voltage static var compensator provided in this embodiment of the invention is...ao ;

[0046] Figure 8 The load reactive power provided in the embodiments of the present invention;

[0047] Figure 9 The output reactive power of the medium-voltage static var compensator provided in this embodiment of the invention;

[0048] Figure 10 The grid-side reactive power provided in the embodiments of the present invention;

[0049] Figure 11 This is an existing medium-voltage SVG topology provided for embodiments of the present invention. Detailed Implementation

[0050] To make the objectives, features, and advantages of this invention more apparent and understandable, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0051] Please see Figure 1 The medium-voltage static var generator (HSVG) provided in this embodiment of the invention includes: a low-frequency submodule unit and a high-frequency submodule unit;

[0052] The low-frequency submodule unit is composed of N-1 identical low-frequency submodules connected in series. Each low-frequency submodule includes a first DC energy storage capacitor (C). L And several Si-based insulated-gate bipolar transistors;

[0053] The high-frequency submodule unit is composed of a three-phase bridge converter unit, which includes a second DC energy storage capacitor (C). H And several SiC-based metal-oxide-semiconductor field-effect transistors;

[0054] The low-frequency submodule unit and the high-frequency submodule unit are connected.

[0055] It should be noted that Si-based insulated gate bipolar transistors are Si IGBTs (note: each Si IGBT contains an anti-parallel diode); SiC-based metal-oxide-semiconductor field-effect transistors are SiC MOSFETs (note: each SiC MOSFET contains an anti-parallel diode).

[0056] In one embodiment, the topology of the medium-voltage static var compensator includes:

[0057] The first low-frequency submodule (LSM1) is connected to the negative terminal of the filter inductor (L) and the emitter of the first Si-based insulated-gate bipolar transistor (T1) and the collector of the fourth Si-based insulated-gate bipolar transistor (T4) through the node of the first Si-based insulated-gate bipolar transistor (T1) and the second low-frequency submodule (LSM2), respectively. The positive terminal of the filter inductor (L) is connected to the power grid.

[0058] In the first low-frequency submodule (LSM1), the collector of the first Si-based insulated-gate bipolar transistor (T1), the collector of the third Si-based insulated-gate bipolar transistor (T3), and the positive terminal of the first DC energy storage capacitor (CL) are connected; the emitter of the second Si-based insulated-gate bipolar transistor (T2), the emitter of the fourth Si-based insulated-gate bipolar transistor (T4), and the positive terminal of the first DC energy storage capacitor (CL) are connected. L The negative terminal of the first Si-based insulated gate bipolar transistor (T1) is connected to the collector of the second Si-based insulated gate bipolar transistor (T2), and the emitter of the third Si-based insulated gate bipolar transistor (T3) is connected to the collector of the fourth Si-based insulated gate bipolar transistor (T4).

[0059] In the high-frequency submodule unit, the first SiC-based metal-oxide-semiconductor field-effect transistor (T... H1 The drain of the second DC energy storage capacitor (C) H The positive electrode of the second SiC-based metal-oxide-semiconductor field-effect transistor (T) is connected to the positive electrode. H2 The source of the second DC energy storage capacitor (C) H The negative terminal of the first SiC-based metal-oxide-semiconductor field-effect transistor (T) is connected to the negative terminal of the transistor. H1 The source of the second SiC-based metal-oxide-semiconductor field-effect transistor (T) H2 The drain of the second SiC-based metal-oxide-semiconductor field-effect transistor (T) is connected to the drain of the first SiC-based metal-oxide-semiconductor field-effect transistor (T). H2 The drain of ) and the (N-1)th low-frequency submodule (LSM) N-1 The collector of the fourth Si-based insulated gate bipolar transistor (T4) is connected.

[0060] It should be noted that this embodiment uses phase A as an example to illustrate the specific connection method of a medium-voltage static var compensator based on a heterogeneous module hybrid system. For example... Figure 1As shown, the first low-frequency submodule (LSM1) is connected to the negative terminal of the filter inductor (L) and the emitter of the next low-frequency submodule (T1) through the nodes of the emitter of T1 and the collector of T4, respectively. The positive terminal of the filter inductor (L) is connected to the power grid. In the first low-frequency submodule (LSM1), the collector of T1, the collector of T3, and C... L The positive terminal is connected; the emitter of T2, the emitter of T4, and C. L The negative terminal of T1 is connected; the emitter of T1 is connected to the collector of T2, and the emitter of T3 is connected to the collector of T4 (Note: the specific connection method of other low-frequency submodules is the same as that of the first low-frequency submodule (LSM1)). In the high-frequency submodule, T... H1 The drain and C H The positive terminal connection, T H2 The source and C H The negative terminal connection, T H1 The source and T H2 The drain connection, T H2 The drain of the (N-1)th low-frequency submodule (LSM) N-1 The T4 collector connection.

[0061] like Figure 1 As shown, Figure 1 middle u s For grid voltage, u a u b u c For HSVG grid connection point voltage, i a i b i c i is the output current of the HSVG. aL i bL i cL For the load current, u L For the low-frequency submodule unit output voltage, u H is the output voltage of the high-frequency submodule unit, and L is the filter inductance.

[0062] In one embodiment, the modulation strategy of the low-frequency submodule unit includes: outputting a low-frequency voltage by using the nearest level approximation modulation; the modulation strategy of the high-frequency submodule unit includes: outputting a high-frequency shaping pulse by using unipolar pulse width modulation.

[0063] It should be noted that the low-frequency submodule unit in the static var compensator of this embodiment uses Nearest level modulation (NLM) to output a low-frequency stepped wave, which effectively reduces the switching loss of Si IGBT; the high-frequency submodule unit uses unipolar pulse width modulation (PWM) to output a high-frequency shaping pulse, which fully utilizes the low switching loss advantage of SiC MOSFET.

[0064] (1) Modulation principle of low-frequency submodule unit:

[0065] It should be noted that, taking phase a as an example, the modulation principle of the low-frequency submodule unit is as follows: Figure 2 As shown. By changing the number of low-frequency submodules in operation, a low-frequency stepped wave output is achieved. The stepped voltage is the DC energy storage capacitor voltage U of the low-frequency submodule. CLdc Each low-frequency submodule can output +U CLdc , 0, -U CLdc Three levels.

[0066] Define the output reference voltage of phase a as:

[0067] (1)

[0068] Among them, U m ω represents the output voltage amplitude, and ω represents the angular frequency.

[0069] During the positive half-cycle of the output reference voltage, the required output +U of the low-frequency submodule is calculated. CLdc Number n of low-frequency submodules of the level SML During the negative half-cycle of the output reference voltage, the required output -U of the low-frequency submodule is calculated. CLdc Number n of low-frequency submodules of the level SML The number of low-frequency submodules deployed in phase a, n SML It can be represented as:

[0070] (2)

[0071] Here, floor(x) is the floor function.

[0072] The low-frequency stepped voltage output by the low-frequency submodule unit can be obtained as follows:

[0073] (3)

[0074] Only when the number n of low-frequency sub-modules invested is calculated... SML The switching status of each low-frequency submodule only changes when the frequency changes.

[0075] (2) Modulation principle of high-frequency submodule unit:

[0076] The high-frequency submodule unit outputs a high-frequency voltage u. H The low-frequency stepped voltage u superimposed on the output of the low-frequency submodule unit L To improve the overall output voltage waveform quality of the device, the reference modulation waveform u of the high-frequency submodule unit is obtained by subtracting the low-frequency submodule unit's output stepped voltage from the a-phase output reference voltage. H * Reference modulation wave u H * With triangular carrier u c The PWM control signal u is obtained after comparison. HPWM ,like Figure 3 As shown. It can be represented as follows:

[0077] (4)

[0078] Taking phase a as an example, the high-frequency submodule unit can output U CHdc The specific modulation process of PWM modulation is as follows: (0 and 0 levels)

[0079] The reference modulation wave u of the high-frequency submodule unit H * With triangular carrier u c When comparing, when u H * c At that time, T H1 Turn off, T H2 Conduction, u H =0; when u H * >u c At that time, T H1 On, T H2 Turn off, u H =U CHdc .

[0080] In one embodiment, the control strategy of the medium-voltage static var compensator includes:

[0081] The grid voltage u s The frequency and phase of the grid voltage are obtained by inputting the phase-locked loop, and the frequency and phase of the grid voltage are respectively input to the abc-dq0 coordinate transformation and the dq0-abc inverse coordinate transformation;

[0082] The load-side current i load Input abc-dq0 coordinate transformation to extract the reactive component i of the load-side current. q i, as a reference value for reactive current qref and the active current reference value i dref ​Set to zero;

[0083] The active current reference value i dref and reactive current reference value i qref The reference value of the output current i of the medium-voltage static var compensator is obtained by dq0-abc inverse coordinate transformation. ref The actual output current i of the medium-voltage static var compensator abc With output current reference value i ref The difference is calculated, and the modulated reference wave u is obtained through a PI controller. abc * ;

[0084] Combining the modulation strategy of the low-frequency submodule unit, the modulation strategy of the high-frequency submodule unit, and the modulation reference wave u abc * The control signal for the medium-voltage static var compensator is obtained.

[0085] It should be noted that the control strategy of the medium-voltage static var compensator based on heterogeneous module hybrid is as follows: Figure 4 As shown. The grid voltage u is collected. s The frequency and phase of the grid voltage are obtained through a phase-locked loop (PLL); the load-side current i is collected. load The reactive component i of the load-side current is extracted by the abc-dq0 coordinate transformation. q As a reference value for reactive current, the active current reference value i dref Set to zero; set the active current reference value i dref and reactive current reference value i qref The output current reference value i of the device is obtained by performing a dq0-abc inverse coordinate transformation. ref The actual output current i of the acquisition device abc The difference between the output current reference value and the modulated reference wave u is obtained by the PI controller. abc * Then, by combining the proposed modulation strategy, the control signal for the medium-voltage static var compensator is obtained.

[0086] The following is a simulation verification example provided by this invention:

[0087] To verify the feasibility and effectiveness of this invention, a simulation model was built in MATLAB / Simulink for simulation analysis. The simulation parameters are shown in Table 1.

[0088] Table 1 Main Simulation Parameters

[0089]

[0090] Figure 5The output voltage of the low-frequency submodule unit is a low-frequency stepped wave, which effectively reduces the switching loss of Si IGBT devices in the low-frequency submodule unit and verifies the feasibility of the proposed low-frequency submodule unit modulation principle. Figure 6 The output voltage of the high-frequency submodule unit is a high-frequency PWM wave. It can be seen that the modulation principle of the high-frequency submodule unit concentrates the high-frequency switching action in the high-frequency submodule unit, giving full play to the advantage of low switching loss of SiC MOSFET. Figure 7 The total output voltage u of the proposed device ao The voltage is a 9-level high-frequency stepped wave, which ensures the quality of the total output voltage waveform.

[0091] Figure 8 The reactive power of the load is maintained at 3MVar before and after the proposed device is put into operation. Figure 9 Assuming the reactive power output of the proposed device is 0.05s, the device is not in operation and the reactive power output is 0. After 0.05s, the device begins to compensate for reactive power and outputs 3MVar reactive power, which is consistent with the reactive power of the load. Figure 10 The reactive power on the grid side is 0.05s. Before 0.05s, all reactive power of the load is provided by the grid. After 0.05s, the reactive power of the load is provided by the proposed device, and the reactive power on the grid side is 0, effectively realizing the reactive power compensation function.

[0092] This invention proposes a medium-voltage static var compensator based on heterogeneous module hybrid technology. This device combines SiIGBT and SiC MOSFET devices, and through a mixing modulation strategy, enables the Si IGBT to operate at a low switching frequency while the SiC MOSFET operates in a high-frequency shaping mode. By combining the advantages of both devices, the output waveform quality is ensured, achieving comprehensive optimization of efficiency, cost, and power density.

[0093] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A medium-voltage static var compensator, characterized in that, include: Low-frequency submodule unit and high-frequency submodule unit; The low-frequency submodule unit is composed of N-1 identical low-frequency submodules connected in series. Each low-frequency submodule includes a first DC energy storage capacitor (C). L And several Si-based insulated-gate bipolar transistors; The high-frequency submodule unit is composed of a three-phase bridge converter unit, which includes a second DC energy storage capacitor (C). H And several SiC-based metal-oxide-semiconductor field-effect transistors; The low-frequency submodule unit and the high-frequency submodule unit are connected.

2. The medium-voltage static var compensator according to claim 1, characterized in that, The topology of the medium-voltage static var compensator includes: The first low-frequency submodule (LSM1) is connected to the negative terminal of the filter inductor (L) and the emitter of the first Si-based insulated-gate bipolar transistor (T1) and the collector of the fourth Si-based insulated-gate bipolar transistor (T4) through the node of the first Si-based insulated-gate bipolar transistor (T1) and the second low-frequency submodule (LSM2), respectively. The positive terminal of the filter inductor (L) is connected to the power grid. In the first low-frequency submodule (LSM1), the collector of the first Si-based insulated-gate bipolar transistor (T1), the collector of the third Si-based insulated-gate bipolar transistor (T3), and the positive terminal of the first DC energy storage capacitor (CL) are connected; the emitter of the second Si-based insulated-gate bipolar transistor (T2), the emitter of the fourth Si-based insulated-gate bipolar transistor (T4), and the positive terminal of the first DC energy storage capacitor (CL) are connected. L The negative terminal of the first Si-based insulated gate bipolar transistor (T1) is connected to the collector of the second Si-based insulated gate bipolar transistor (T2), and the emitter of the third Si-based insulated gate bipolar transistor (T3) is connected to the collector of the fourth Si-based insulated gate bipolar transistor (T4). In the high-frequency submodule unit, the first SiC-based metal-oxide-semiconductor field-effect transistor (T... H1 The drain of the second DC energy storage capacitor (C) H The positive electrode of the second SiC-based metal-oxide-semiconductor field-effect transistor (T) is connected to the positive electrode. H2 The source of the second DC energy storage capacitor (C) H The negative terminal of the first SiC-based metal-oxide-semiconductor field-effect transistor (T) is connected to the negative terminal of the transistor. H1 The source of the second SiC-based metal-oxide-semiconductor field-effect transistor (T) H2 The drain of the second SiC-based metal-oxide-semiconductor field-effect transistor (T) is connected to the drain of the first SiC-based metal-oxide-semiconductor field-effect transistor (T). H2 The drain of ) and the (N-1)th low-frequency submodule (LSM) N-1 The collector of the fourth Si-based insulated gate bipolar transistor (T4) is connected.

3. The medium-voltage static var compensator according to claim 1, characterized in that, The modulation strategy of the low-frequency submodule unit includes: using the nearest level to approximate the modulation of the output low-frequency voltage.

4. The medium-voltage static var compensator according to claim 3, characterized in that, The method of outputting a low-frequency voltage by employing the nearest-level approximation modulation includes: By changing the number of low-frequency sub-modules, a low-frequency voltage can be output. Wherein, the number of low-frequency sub-modules corresponding to 'a' is expressed as: ； In the formula, The number of low-frequency submodules deployed. The reference voltage for phase a is the output voltage, and UCLdc is the DC energy storage capacitor voltage of the low-frequency submodule. This is the floor function.

5. The medium-voltage static var compensator according to claim 4, characterized in that, The a-phase output reference voltage The expression is: ； In the formula, U m ω represents the output voltage amplitude, and ω represents the angular frequency.

6. The medium-voltage static var compensator according to claim 4, characterized in that, The modulation strategy of the high-frequency submodule unit includes: outputting high-frequency shaping pulses by using unipolar pulse width modulation.

7. The medium-voltage static var compensator according to claim 4, characterized in that, The method of outputting high-frequency shaping pulses by employing unipolar pulse width modulation includes: Subtracting the low-frequency submodule unit's output stepped voltage from the phase a output reference voltage yields the high-frequency submodule unit's reference modulation wave u. H * ; Reference modulation wave u H * With triangular carrier u c The PWM control signal u is obtained after comparison. HPWM .

8. The medium-voltage static var compensator according to claim 7, characterized in that, The reference modulation wave u of the high-frequency submodule unit H * The expression is: ； In the formula, The reference voltage for phase a output is the low-frequency stepped voltage u. L .

9. The medium-voltage static var compensator according to claim 7, characterized in that, The modulation process of the PWM specifically includes: Reference modulation wave u H * With triangular carrier u c When comparing, when u H * c At that time, the first SiC-based metal-oxide-semiconductor field-effect transistor (T) in the high-frequency submodule unit H1 ) is turned off, the second SiC-based metal-oxide-semiconductor field-effect transistor (T) in the high-frequency submodule unit H2 ) is on, u H =0; when u H * >u c At that time, the first SiC-based metal-oxide-semiconductor field-effect transistor (T) in the high-frequency submodule unit H1 The second SiC-based metal-oxide-semiconductor field-effect transistor (T) in the high-frequency submodule unit is turned on. H2 ) Off, u H =U CHdc .​ 10. The medium-voltage static var compensator according to claim 9, characterized in that, The control strategy of the medium-voltage static var compensator includes: The grid voltage u s The frequency and phase of the grid voltage are obtained by inputting the phase-locked loop, and the frequency and phase of the grid voltage are respectively input to the abc-dq0 coordinate transformation and the dq0-abc inverse coordinate transformation; The load-side current i load Input abc-dq0 coordinate transformation to extract the reactive component i of the load-side current. q i, as a reference value for reactive current qref and the active current reference value i dref Set to zero; The active current reference value i dref and reactive current reference value i qref The reference value of the output current i of the medium-voltage static var compensator is obtained by dq0-abc inverse coordinate transformation. ref The actual output current i of the medium-voltage static var compensator abc With the output current reference value i ref The difference is calculated, and the modulated reference wave u is obtained through a PI controller. abc * ; Combining the modulation strategy of the low-frequency submodule unit, the modulation strategy of the high-frequency submodule unit, and the modulation reference wave u abc * The control signal of the medium-voltage static var compensator is obtained.

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