Wireless energy transmission and data communication system

Abstract

The invention discloses a wireless energy transmission and data communication system. An alternating current input end comprises a resonance network; the switch module is connected to the two ends of the resonant capacitor and is used for switching a zero-voltage output mode or an active rectification mode of the wireless energy transmission system by switching on or off the resonant capacitor; the active rectification module comprises a power tube and a voltage comparison module, and the voltage comparison module controls the on-off of the power tube by comparing the voltage of the AC input end with a preset threshold value; the control module comprises a pulse width modulation feedback loop, and the feedback loop dynamically adjusts the duty ratio of the switch module according to the output voltage of the load end; the data modulation module comprises a dual-mode ramp generation unit and a demodulation unit, the dual-mode ramp generation unit realizes load keying modulation of uplink data by adjusting phase switching of ramp signals, and the demodulation unit recovers modulation data by detecting energy signal changes; the output voltage is kept stable in a full-load range; and the peak efficiency is greatly improved compared with a traditional scheme.

Description

Technical Field

[0001] This invention relates to the field of wireless power transmission technology, specifically to a wireless power transmission system that integrates voltage regulation, rectification, and uplink data transmission functions, and is particularly suitable for efficient power transmission and reverse communication of implantable brain-computer interface devices. Background Technology

[0002] Wireless power transfer systems transfer energy wirelessly from one device to another. Because they eliminate the need for traditional wires or plugs, their deployment is highly convenient, leading to their widespread use in brain-computer interface (BCI) applications. Traditional wireless power receiving circuits typically employ two power stages: an AC-DC (alternating current to direct current) rectifier circuit and a DC-DC (direct current to direct current) regulator circuit. While an LDO (low dropout regulator) can be used as the second stage to regulate the output voltage, its efficiency is low when the input and output voltages differ significantly. Using a DC-DC converter can achieve high efficiency over a wide input / output range; however, DC-DC converters require off-chip capacitors or inductors, leading to area and cost issues. Furthermore, due to the two-stage power conversion, the efficiency is still lower than that of a single-stage rectifier. For example, while the rectifier and regulator might each achieve a 90% conversion efficiency, the two-stage structure reduces the final conversion efficiency to 81%, representing a considerable energy loss.

[0003] A voltage regulator rectifier circuit can achieve AC voltage rectification and DC voltage regulation in a single stage, thereby improving the overall efficiency of the wireless power receiver. Its working principle involves periodically adjusting the on-time of the active rectifier or switching its operating mode. The duty cycle is determined by the control circuit through feedback voltage, thus achieving a stable output voltage in a single rectifier stage.

[0004] Reference [1] Li X, Tsui CY, Ki W H. A 13.56MHz wireless power transfer system with reconfigurable resonant regulating rectifier and wireless power control for implantable medical devices[J]. IEEE Journal of Solid-State Circuits, 2015, 50(4): 978-989. A voltage regulator rectifier based on 1x mode (active rectifier mode) - 2x mode (voltage doubler mode) was proposed (in the relevant literature on voltage regulator rectifiers, the active rectifier mode is generally named 1x mode, and the output voltage of the voltage regulator rectifier working completely in the active rectifier mode is used as the reference. For example, if the output voltage in the voltage doubler mode is twice that of the active rectifier, it is named 2x mode; if the output voltage in the zero voltage mode is 0, it is named 0x mode). Figure 9 As shown, the voltage regulator rectifier has two modes: rectifier (1x mode) and voltage doubler (2x mode). When operating entirely in rectifier mode, the output voltage is V1x; when operating entirely in voltage doubler mode, the output voltage is V2x. A PWM (Pulse Width Modulation) control loop controls the switching duty cycle based on the output feedback voltage, resulting in a stable output voltage between V1x and V2x. The specific circuit topology is as follows... Figure 10 As shown. However, the voltage doubler output voltage only exceeds the active rectifier output voltage, thus achieving voltage regulation, when the load resistance is greater than a certain value. Therefore, the load range of the voltage regulator rectifier in this scheme is relatively small, supporting only 10-102mW.

[0005] In brain-computer interface applications, uplink data transmission is required to transmit collected data to the host computer. There are four main uplink data communication methods for transmitting data from the receiver to the transmitter. Method one uses a direct wire to achieve communication between the receiver and transmitter, which contradicts the purpose of wireless power transmission. Method two uses a high carrier frequency to achieve a fast data uplink. However, this requires an additional pair of data coils, increasing system complexity and hindering device implantation. Similarly, method three uses an additional communication module to establish communication between the receiver and transmitter, which also increases system complexity, occupies a large size, and consumes significant power, making it unsuitable. A more suitable method is to use Load Shift Keying (LSK), a backscatter modulation technique where the receiver modulates the reflected signal by changing the load impedance, and the transmitter detects changes in carrier amplitude to decode the data. This method reuses the power transmission coils to achieve uplink communication, facilitating device miniaturization. The principle of LSK modulation is as follows: when the load RL at the receiving end changes, the load equivalent to the primary end also changes, which in turn causes a change in the voltage or current on the primary coil. After the transmitting end detects the change in the energy signal, it demodulates and recovers the data signal to the controller.

[0006] Note: Compared to common modulation methods such as ASK and FSK, LSK is only used for reverse data modulation from the energy receiver to the energy transmitter, and has extremely low power consumption, making it suitable for uplink data transmission in applications such as brain-computer interfaces. ASK (Amplitude Shift Keying), a basic forward link modulation method where the transmitter represents digital information 0 and 1 by changing the amplitude of the carrier signal, and FSK are generally used for data modulation from the energy transmitter to the energy receiver, requiring additional data modulation modules and resulting in higher power consumption. Specifically, ASK (Amplitude Shift Keying) is a basic forward link modulation method where the transmitter represents digital information 0 and 1 by changing the amplitude of the carrier signal. FSK (Frequency Shift Keying) is a forward link modulation method where the transmitter represents digital information 0 and 1 by changing the frequency of the carrier signal.

[0007] However, traditional LSK modulation based on short-circuit switches can cause detuning of the coil, affecting energy transmission. The equivalent load of the regulated rectifier also changes during operation, affecting the transmission of uplink data. Therefore, reference [1] utilizes the phase change of the mode-switching waveform for data transmission. For example... Figure 11As shown, phase switching is achieved by a data-controlled dual-mode ramp generator. If the data is 1, the ramp generator will generate a decreasing ramp; if the data is 0, the ramp generator will generate an increasing ramp. The comparator output phase switches, ultimately achieving information encoding. By generating both increasing and decreasing ramp signals through the dual-mode ramp generator, the phase of the PWM modulation is encoded, thus integrating uplink data transmission into the mode switching of the voltage regulator rectifier, reducing the impact of the uplink data link on the energy link.

[0008] However, due to the delay in the comparator inside the ramp generator, the ramp signal cannot switch accurately at the set voltage, resulting in ramp errors. Furthermore, because the discharge rates of the two modes in the dual-mode ramp generator are different, the ramp errors caused by the comparator delay are different, leading to different ramp signal frequencies generated by the two modes. This affects the energy transfer of the voltage regulator rectifier.

[0009] Existing technical issues:

[0010] In current wireless communication systems, voltage regulators are widely used because they can achieve rectification and voltage regulation in a single stage. Traditional 1x-2x mode voltage regulators can achieve a stable output voltage by controlling the power stage to switch between active rectifier (1x) and voltage multiplier (2x) modes. However, they have a narrow load range, supporting only 10-102mW of load power, and are not suitable for brain-computer interface applications.

[0011] In brain-computer interface applications, uplink data transmission is required to transmit the collected data to the host computer. Voltage regulators typically use LSK modulation based on dual-mode ramp generators for uplink data transmission. However, traditional dual-mode ramp generators suffer from internal comparator delays, preventing the ramp signal from switching accurately at the set voltage. This introduces ramp errors, leading to different ramp signal frequencies generated by the two modes. This, in turn, affects the energy transfer of the voltage regulator. Summary of the Invention

[0012] This invention proposes a wireless power transmission and data communication system to solve the problems of power transmission efficiency and data communication stability.

[0013] To achieve the above objectives, the present invention adopts the following technical solution:

[0014] A wireless power transfer and data communication system includes: an AC input terminal including a resonant network, the resonant network including a resonant capacitor and a coupling coil; a switching module connected to both ends of the resonant capacitor, used to switch between zero-voltage output mode and active rectification mode of the wireless power transfer system by turning the resonant capacitor on or off; an active rectification module including at least one power transistor and a voltage comparison module, the voltage comparison module controlling the on / off state of the power transistor by comparing the voltage of the AC input terminal with a preset threshold to charge the load in the active rectification mode; a control module including a pulse width modulation feedback loop, the feedback loop dynamically adjusting the duty cycle of the switching module according to the output voltage of the load terminal to maintain the stability of the output voltage; and a data modulation module including a dual-mode ramp generation unit and a demodulation unit, the dual-mode ramp generation unit realizing load keying modulation of uplink data by adjusting the phase switching of the ramp signal, and the demodulation unit recovering the modulated data by detecting changes in the energy signal.

[0015] In some embodiments, the following technical features are also included:

[0016] The dual-mode ramp generation unit includes: a ramp generation module, comprising a charging / discharging capacitor and a current control unit, used to generate an increasing or decreasing ramp signal based on input data; a reference voltage tracking module, comprising an error amplifier and a feedback switch unit, wherein the error amplifier samples the minimum value of the ramp signal through negative feedback and dynamically adjusts the reference voltage; and a data selection module, used to select different reference voltages based on input data to compensate for the rate difference between increasing and decreasing ramps.

[0017] In some embodiments, the following technical features are also included:

[0018] The reference voltage tracking module includes: a sampling switch that closes in the trough region of the ramp signal to acquire the minimum voltage value; and a voltage follower that compares the minimum voltage value with the initial reference voltage and outputs an adjusted reference voltage.

[0019] In some embodiments, the following technical features are also included:

[0020] The switching module includes: a switching section connected in parallel with the resonant capacitor, wherein the conduction of the switching section causes the resonant network to detune; and a logic control section that receives the duty cycle signal of the pulse width modulation feedback loop to control the on / off timing of the switching section.

[0021] In some embodiments, the following technical features are also included:

[0022] The pulse width modulation feedback loop of the control module includes: a voltage sampling unit that periodically detects the output voltage at the load end; an error calculation unit that generates a duty cycle adjustment signal based on the difference between the sampled voltage and the target voltage; and a duty cycle output unit that drives the mode switching of the switching module based on the adjustment signal.

[0023] In some embodiments, the following technical features are also included:

[0024] The data selection module selects the reference voltage corresponding to the increasing or decreasing ramp through a multiplexer, and the reference voltage of the increasing ramp is higher than the reference voltage of the decreasing ramp.

[0025] In some embodiments, the following technical features are also included:

[0026] The voltage comparison module of the active rectifier module includes: a first comparator for comparing the positive half-cycle voltage of the AC input terminal with the turn-on threshold of the power transistor; and a second comparator for comparing the negative half-cycle voltage of the AC input terminal with the preset threshold.

[0027] In some embodiments, the following technical features are also included:

[0028] The switching module closes in 0x mode (zero voltage output mode) to short-circuit the resonant capacitor and detune the resonant network to stop energy transmission; it opens in 1x mode, and the load is charged by the active rectifier module; the PWM feedback loop stabilizes the output voltage at 3.3V by adjusting the duty cycle of 0x mode and 1x mode.

[0029] In some embodiments, the following technical features are also included:

[0030] When the input data is 0, the data selection module selects the first reference voltage (VL') to control the increasing ramp; when the input data is 1, it selects the second reference voltage (VL) to control the decreasing ramp, where VL'>VL, to compensate for the ramp frequency deviation caused by the difference in discharge rate.

[0031] In some embodiments, the following technical features are also included:

[0032] The reference voltage tracking module uses a negative feedback mechanism to make the minimum value of the ramp signal equal to the initial reference voltage VL, and the feedback switch closes when the ramp signal reaches a trough, inputting the sampled voltage into the error amplifier to dynamically generate the adjusted reference voltage VL'.

[0033] Compared with existing technologies, the advantages of this invention are as follows: Expanded load range: The 0x-1x mode regulated rectifier maintains stable output voltage (10-217mW) across the entire load range; Improved efficiency: The single-stage structure eliminates inter-stage losses, resulting in a significantly higher peak efficiency compared to traditional solutions; Coordinated data communication and power transmission: LSK modulation based on an improved dual-mode ramp generator greatly reduces frequency deviation, preventing uplink communication from interfering with power transmission. Attached Figure Description

[0034] Figure 1 This invention relates to a wireless power transmission circuit for brain-computer interfaces.

[0035] Figure 2(a) is a flowchart of the mode switching process of the voltage regulator rectifier of the present invention.

[0036] Figure 2(b) is a flowchart of the working process of the dual-mode ramp generator of the present invention.

[0037] Figure 2(c) is a flowchart of the reference voltage tracking circuit of the present invention.

[0038] Figure 3 The system efficiency of the voltage regulator rectifier of the present invention under different loads (left) and its comparison with that in reference [1] (right).

[0039] Figure 4 This is a timing diagram of the uplink data modulation by a dual-mode ramp generator for the voltage regulator rectifier of this invention.

[0040] Figure 5 This invention relates to the effect of comparator delay on the frequency of the ramp signal.

[0041] Figure 6 This is an improved dual-mode ramp generator circuit in the wireless power transmission circuit of the present invention.

[0042] Figure 7 This is a timing diagram of the dual-mode ramp generator of the present invention.

[0043] Figure 8 This image shows a comparison of the ramp frequencies of the conventional dual-mode ramp generator (left) and the improved dual-mode ramp generator (right) of this invention.

[0044] Figure 9 This is the voltage regulator circuit in reference [1].

[0045] Figure 10 This is the voltage regulator rectifier circuit topology in reference [1].

[0046] Figure 11 This is the LSK modulation circuit based on the traditional dual-mode ramp generator in reference [1]. Detailed Implementation

[0047] The embodiments of the present invention will be described in detail below. It should be emphasized that the following description is merely exemplary and not intended to limit the scope and application of the present invention.

[0048] It should be noted that when a component is referred to as "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as "connected to" another component, it can be directly connected to or indirectly connected to that other component. Furthermore, a connection can be used for both fixing and circuit / signal connectivity.

[0049] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention.

[0050] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of the present invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0051] The basic concept of the following embodiments of the present invention is as follows:

[0052] In wireless power transfer systems applied to brain-computer interfaces (BCIs), rectifier circuits are needed to convert AC voltage to DC voltage, and voltage regulator circuits are required to provide a stable voltage to the downstream load. Traditional wireless power transfer systems typically use two discrete modules, one for rectification and the other for regulation. While the rectifier and regulator may each achieve a conversion efficiency of 90%, the final conversion efficiency drops to 81%, resulting in significant interstage efficiency loss. This invention employs a voltage-regulated rectifier circuit to achieve AC voltage rectification and DC voltage regulation in a single stage, thereby improving the overall efficiency of the wireless power receiver. The system peak efficiency is 92.04%, with a load range of 10-217mW. Furthermore, to address the uplink data transmission requirements in BCI applications, an LSK modulation circuit based on an improved dual-mode ramp generator is designed for uplink data transmission.

[0053] The wireless power transmission circuit used in this invention is designed using TSMC 180nm BCD technology, with an input AC voltage frequency of 13.56MHz and a voltage regulator / rectifier switching frequency of 0.85MHz.

[0054] The specific structure is as follows: Figure 1 As shown, a 0x-1x mode voltage regulator rectifier is used. In 1x mode, the active rectifier mode is used, with switch Ms open. Comparators CMP1 and CMP2 control the switching on and off of the PMOS power transistor to charge the load. In 0x mode, the zero-voltage output mode is used, with switch Ms closed and the power transistor remaining off. Because switch Ms short-circuits the resonant capacitor, the resonant network is detuned, the voltage across the coil is 0, there is no power input, and the output voltage is maintained by the load capacitor, discharging through the load resistor. When the duty cycle D is 100%, the voltage regulator rectifier operates entirely in 1x mode, with an output voltage of V1 (>3.3V); when the duty cycle D is 0, the voltage regulator rectifier operates entirely in 0x mode, with an output voltage of 0. The duty cycle D of switch Ms is controlled by a PWM feedback loop to maintain the output voltage at 3.3V. The control flowchart for mode switching is shown in Figure 2(a). The duty cycle D can be determined by the charge balance equation:

[0055]

[0056] Where Vout is the output voltage of the regulated rectifier, Rout is the output resistance, TR is the modulation period of the regulated rectifier, and IL is the input inductor current of the regulated rectifier. IL can be calculated using the mutual inductance current equation and is related to the mutual inductance coefficient, the output voltage of the power amplifier, etc.

[0057] Simulation efficiency results are as follows Figure 3 As shown, this wireless power transfer circuit performs AC-DC conversion and DC voltage regulation in a single stage, eliminating the inter-stage efficiency loss inherent in traditional wireless power transfer circuits. Compared to the traditional active rectifier cascaded LDO scheme, the peak efficiency is increased from 81% to 92.04%.

[0058] Existing solutions using 1x-2x mode voltage regulators switch between active rectifier and voltage multiplier modes. The voltage multiplier output voltage only exceeds the active rectifier output voltage when the load resistance exceeds a certain value, thus achieving voltage regulation. Therefore, existing solutions have a limited load range, supporting only 10-102mW loads. In contrast, the 0x-1x mode voltage regulator of this invention provides a wider voltage regulation range across the entire load range, with the 1x mode output voltage consistently higher than the 0x mode output voltage. Figure 3 As shown, compared to existing 1x-2x mode regulated rectifiers, the 0x-1x mode regulated rectifier used in this invention can extend the load range from 102mW to 217mW. In terms of circuit topology, the 1x-2x mode regulated rectifier is as follows: Figure 10As shown, the power transistor implementing 2x mode is connected across the output and load, acting as a voltage doubler, requiring an additional comparator (CMP3) and output capacitor (Cf1). This solution uses a 0x-1x mode voltage regulator and rectifier, where the power transistor in 0x mode is connected in parallel with the input resonant capacitor, acting as a detuner. Furthermore, it eliminates the need for an additional comparator and output capacitor, reducing the use of off-chip components and lowering system power consumption.

[0059] In brain-computer interface applications, LSK modulation is typically used to transmit acquired data to the host computer. However, traditional LSK modulation based on short-circuit switches can cause detuning of the coil, making it unsuitable for voltage regulator rectifier applications. Therefore, this paper considers using the phase of the waveform switching mode of the voltage regulator rectifier for data modulation, implemented by a data-controlled dual-mode ramp generator, such as... Figure 4 As shown in Figure 2(b), DATA is the input uplink data, RAMP is the ramp signal, EN is the rectifier mode switching control signal, and DLSK is the demodulated data. If the data is 0, the dual-mode ramp generator will generate an increasing ramp, with the rectifier's 0x mode (EN=1) phase in the last 50%; if the input uplink data is 1, the dual-mode ramp generator will generate a decreasing ramp, with the rectifier's 0x mode (EN=1) phase in the last 50%, resulting in phase switching and ultimately information encoding. The demodulated data DLSK is obtained at the power amplifier end through the demodulation mode switching signal. The working diagram of the dual-mode ramp generator is shown in Figure 2(b). The LSK data rate is the same as the rectifier switching frequency, which is 0.85 Mbps.

[0060] The existing solution, the traditional dual-mode ramp generator, has the following problems. For example... Figure 5 As shown, a traditional ramp generator produces a ramp signal by controlling the alternating charging and discharging of a capacitor, with an amplitude Vswing = VH - VL. However, due to comparator and logic delays, the ramp signal is overcharged and over-discharged, causing its amplitude and frequency to deviate from the design values. The greater the comparator delay, the greater its impact on the ramp signal. Furthermore, because the two modes of a dual-mode ramp generator have different discharge rates, this can be equivalent to different comparator delays, resulting in different ramp errors and thus different frequencies of the ramp signals generated by the two modes. Figure 8 As shown, using a traditional dual-mode ramp generator, the frequency difference between the ramp signals of the two modes can reach 10%.

[0061] Therefore, this invention designs an improved dual-mode ramp generator circuit, such as... Figure 6As shown in Figure 2(c), the improved dual-mode ramp generator uses a reference voltage tracking circuit. The original reference voltage is VL, and a new reference voltage VL' is generated by sampling the ramp signal VRAMP and using negative feedback. The specific process is as follows: the minimum value of VRAMO, VRAMP,min, is sampled and compared with VL through an error amplifier to obtain the reference voltage VL'. If VRAMP,min is too small, VL' increases until VRAMP,min = VL. Since the discharge rate of the decrementing ramp is much smaller than that of the ascending ramp, if the same reference voltage is used for both ramps, the frequency of the decrementing ramp will be less than that of the ascending ramp. Therefore, the ascending and decrementing ramps of the improved dual-mode ramp generator are compared using different reference voltages. Figure 7 As shown, when the input uplink data DATA = 0, the dual-mode ramp generator generates an increasing ramp, and the data selector controls the reference voltage to VL'; when the input uplink data DATA = 1, the dual-mode ramp generator generates a decreasing ramp, and the data selector controls the reference voltage to VL. Because the decreasing ramp discharge rate is slower, the reference voltage VL is also lower, compensating for the change in ramp signal frequency caused by the different discharge rates of the two modes. By sampling the ramp voltage for negative feedback, this scheme can achieve insensitivity to PVT (process, voltage, temperature changes), improving its robustness. Figure 8 As shown, by improving the dual-mode ramp generator circuit, an accurate dual-mode ramp signal can be generated, and the frequency error caused by mode switching is reduced from 10% to 1.7% after the improvement. Figure 3 As shown, the system energy transfer can maintain high efficiency during LSK data transmission, with a peak efficiency of 91.74%.

[0062] Experiments show that the implementation of this technical solution can achieve the following technical effects:

[0063] 1. The wireless power transmission circuit adopts a 0x-1x mode voltage regulator and rectifier structure, which can achieve AC rectification and DC voltage regulation in a single stage, eliminating inter-stage efficiency loss and achieving a system peak efficiency of 92.04%. It also has a wider load range, supporting 10-217mW loads, making it suitable for brain-computer interface applications. Existing solutions use 1x-2x mode voltage regulators that switch between active rectifier and voltage multiplier modes. The voltage multiplier output voltage only exceeds the active rectifier output voltage when the load resistance is greater than a certain value, thus achieving voltage regulation. Therefore, existing solutions have a limited load range and are not suitable for brain-computer interface applications with diverse load types. The 0x-1x mode voltage regulator and rectifier of this invention provides a 1x mode output voltage greater than the 0x mode output voltage across the entire load range, meaning it has a voltage regulation effect across the entire load range. Compared to the traditional 1x-2x mode load range of 10-102mW, the load range of this invention can be extended to 10-217mW. In circuit topology, a 1x-2x mode regulated rectifier is as follows: Figure 10 As shown, the power transistor implementing 2x mode is connected across the output and load, acting as a voltage doubler, requiring an additional comparator (CMP3) and output capacitor (Cf1). This solution uses a 0x-1x mode voltage regulator and rectifier, where the power transistor in 0x mode is connected in parallel with the input resonant capacitor, acting as a detuner. Furthermore, it eliminates the need for an additional comparator and output capacitor, reducing the use of off-chip components and lowering system power consumption.

[0064] 2. The data communication circuit employs an LSK modulation circuit based on an improved dual-mode ramp generator. The dual-mode ramp generator encodes the phase of the PWM modulation without affecting energy transmission. A reference voltage tracking circuit is used to generate an accurate ramp signal using a dynamic reference voltage. During LSK data transmission, the system maintains high energy transmission efficiency, with a peak efficiency of 91.74%. Energy transmission during data communication is more stable. Existing dual-mode ramp generators suffer from internal comparator delays, preventing accurate ramp signal switching at the set voltage. This introduces ramp errors, leading to different ramp signal frequencies generated by the two modes, impacting the energy transmission of the voltage regulator rectifier. The improved dual-mode ramp generator of this invention generates accurate dual-mode ramp signals through a reference voltage tracking circuit. The frequency error caused by mode switching is reduced from 10% to 1.7%, mitigating the impact of uplink data communication on energy transmission.

[0065] The relevant verification examples are briefly introduced below:

[0066] Verification Example 1

[0067] In this example:

[0068] The resonant capacitor at the AC input terminal is a Murata GRM32 series capacitor (92pF ± 5%).

[0069] The coupling coil uses a PCB inductor (coil outer diameter 30±0.1mm, inductance 1.5μH±3%).

[0070] The output voltage regulator capacitor is an AVX 0805 series capacitor (0.47μF±10%).

[0071] Implementation steps:

[0072] Integrating switching modules, power transistors, and voltage comparators in TSMC's 180nm BCD process;

[0073] Configure PWM feedback loop parameters: target output voltage 3.3V±0.2V, modulation frequency 0.85MHz;

[0074] The load range (10-217mW) and efficiency (peak 92.04%) were verified by injecting a 13.56MHz AC input using the SC5008 wireless charging transmitter.

[0075] Effect verification:

[0076] Test Project Example 1 Comparative example (Reference [1]) Improvement rate Load range (mW) 10-217 10-102 +113％ Peak efficiency (%) 92.04 85.0 +8.2％

[0077] Verification Example 2

[0078] In this example:

[0079] Data selection module: integrated in TSMC 180nm BCD process, VL = 1.2V (±10mV), VL' = 1.35V (±15mV);

[0080] The error amplifier is integrated in TSMC's 180nm BCD process, with a feedback switching frequency of 0.85MHz;

[0081] The standard deviation of the ramp frequency decreased from 120kHz to 2kHz (deviation rate 1.7% vs 10%).

[0082] Duty cycle regulation stability is improved (ripple voltage <30mV).

[0083] Verification Example 3

[0084] In this example:

[0085] The resonant capacitor at the AC input terminal is a Murata GRM32 series capacitor (47pF ± 5%).

[0086] The coupling coil uses a PCB inductor (coil outer diameter 50±0.1mm, inductance 3μH±3%).

[0087] The output voltage regulator capacitor is an AVX 0805 series capacitor (0.47μF±10%).

[0088] Implementation steps:

[0089] Integrating switching modules, power transistors, and voltage comparators in TSMC's 180nm BCD process;

[0090] Configure PWM feedback loop parameters: target output voltage 3.3V±0.2V, modulation frequency 0.85MHz;

[0091] Inject 13.56MHz AC input using the SC5008 wireless charging transmitter.

[0092] Data modulation module: Employs a Xilinx 7 series FPGA with PN32 random code input and an LSK input signal data rate of 0.85 Mbps. Verification of data transmission performance under varying load ranges (10-217 mW) and efficiency (peak 91.7%):

[0093] Test Project Example 7 Comparative Example 1 (Reference [1]) Improvement rate Load range (mW) 10-217 10-102 +113％ Peak efficiency (%) 92.04 85 +7.8％ Frequency deviation (%) 1.7 10 -83％

[0094] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A wireless power transfer and data communication system, comprising: The AC input terminal includes a resonant network, which includes a resonant capacitor and a coupling coil; A switching module is connected across the resonant capacitor and is used to switch between the zero-voltage output mode and the active rectification mode of the wireless power transmission system by turning the resonant capacitor on or off. An active rectification module includes at least one power transistor and a voltage comparison module. The voltage comparison module controls the switching of the power transistor by comparing the voltage at the AC input terminal with a preset threshold to charge the load in the active rectification mode. The control module includes a pulse width modulation feedback loop, which dynamically adjusts the duty cycle of the switching module according to the output voltage at the load end to maintain the stability of the output voltage; The data modulation module includes a dual-mode ramp generation unit and a demodulation unit. The dual-mode ramp generation unit realizes load keying modulation of uplink data by adjusting the phase switching of the ramp signal, and the demodulation unit recovers the modulated data by detecting changes in the energy signal.

2. The system according to claim 1, wherein the dual-mode ramp generation unit comprises: The ramp generation module includes a charging and discharging capacitor and a current control unit, which is used to generate an increasing or decreasing ramp signal based on the input data. The reference voltage tracking module includes an error amplifier and a feedback switch. The error amplifier samples the minimum value of the ramp signal through negative feedback and dynamically adjusts the reference voltage. The data selection module is used to select different reference voltages based on the input data to compensate for the difference in the rate of increase and decrease of the ramp.

3. The system according to claim 2, wherein the reference voltage tracking module comprises: The sampling switch closes in the trough region of the ramp signal to acquire the minimum voltage value; The voltage follower compares the minimum voltage value with the initial reference voltage and outputs an adjusted reference voltage.

4. The system according to claim 1, wherein the switching module comprises: A switching section connected in parallel to the resonant capacitor causes the resonant network to detune when the switching section is turned on. The logic control unit receives the duty cycle signal of the pulse width modulation feedback loop to control the on / off timing of the switching unit.

5. The system according to claim 1, wherein the pulse width modulation feedback loop of the control module comprises: The voltage sampling unit periodically detects the output voltage at the load terminal; The error calculation unit generates a duty cycle adjustment signal based on the difference between the sampled voltage and the target voltage; The duty cycle output unit drives the mode switching of the switching module based on the adjustment signal.

6. The system according to claim 2, wherein the data selection module selects the reference voltage corresponding to the increasing ramp or the decreasing ramp through a multiplexer, and the reference voltage of the increasing ramp is higher than the reference voltage of the decreasing ramp.

7. The system according to claim 1, wherein the voltage comparison module of the active rectifier module comprises: The first comparator is used to compare the positive half-cycle voltage of the AC input terminal with the turn-on threshold of the power transistor; The second comparator is used to compare the negative half-cycle voltage at the AC input terminal with the preset threshold.

8. The system according to claim 1, characterized in that: The switch module closes in 0x mode to short-circuit the resonant capacitor and detunes the resonant network to stop energy transmission; it opens in 1x mode, and the load is charged by the active rectifier module. The PWM feedback loop stabilizes the output voltage at 3.3V by adjusting the duty cycle of the 0x mode and the 1x mode.

9. The system according to claim 2, characterized in that: When the input data is 0, the data selection module selects the first reference voltage (VL') to control the incremental ramp; When the input data is 1, the second reference voltage (VL) is selected to control the ramp decrease, where VL'>VL, to compensate for the ramp frequency deviation caused by the difference in discharge rate.

10. The system according to claim 3, characterized in that: The reference voltage tracking module uses a negative feedback mechanism to make the minimum value of the ramp signal equal to the initial reference voltage VL, and the feedback switch closes when the ramp signal reaches a trough, inputting the sampled voltage into the error amplifier to dynamically generate the adjusted reference voltage VL'.

Images