Wide-voltage input high-efficiency conversion device based on full-bridge or half-bridge resonance forward and reverse excitation topology and control method

Abstract

The invention discloses a wide-voltage input high-efficiency conversion device based on full-bridge or half-bridge resonance forward and reverse excitation topology and a control method, which break through the efficiency and adaptability bottlenecks of the traditional wide-voltage conversion device through dual-transformer forward and reverse excitation mode collaborative switching, resonance network soft switching optimization, magnetic circuit air gap design and adaptive frequency control. The device supports 20V-1000V ultra-wide input voltage, the peak efficiency is greater than or equal to 96.5%, and the device has the advantages of high power density, low loss, strong reliability and the like, and can be widely applied to the fields of industrial power supplies, new energy automobiles, aerospace and the like.

Description

Technical Field

[0001] This invention relates to the field of power electronic conversion technology, and in particular to a bridge resonant flyback converter based on a full-bridge or half-bridge inverter structure and its control method. Background Technology

[0002] In the field of power electronics, with the increasing complexity and globalization of applications, the demand for power conversion devices capable of operating efficiently and stably over an extremely wide input voltage range (e.g., from tens of volts to hundreds of volts or even higher or lower) is growing. However, existing power conversion devices, especially those employing traditional single-transformer PWM / PFM control strategies, often struggle to simultaneously achieve high energy conversion efficiency, output voltage stability, and system reliability when dealing with such a wide range of input voltage variations. This is because their fixed transformer turns ratio cannot adapt to large fluctuations in input voltage, leading to increased switching losses, reduced core utilization, or limited voltage regulation range under certain operating conditions. Furthermore, solutions that rely solely on PWM / PFM modulation to broaden the input range also face challenges such as difficulties in implementing soft switching and increased control complexity. Summary of the Invention

[0003] This invention belongs to the field of power electronic conversion technology, specifically relating to a bridge resonant flyback converter based on a full-bridge or half-bridge inverter structure and its control method.

[0004] To achieve the above objectives, the present invention provides the following technical solution:

[0005] Device core architecture

[0006] This device includes the following core modules: Full-bridge / half-bridge inverter circuit: As the starting point of energy conversion, it inverts the DC input voltage into a high-frequency AC square wave to drive the subsequent transformer.

[0007] The first transformer (Tx1) and the second transformer (Tx2) have identical parameters (turns ratio N:1, magnetizing inductance Lm, leakage inductance Lk), and their terminals are connected in reverse series to form a "forward and reverse flyback coordinated conversion unit". The voltage conversion is achieved by alternating switching of the working modes.

[0008] Resonant capacitor (Cr): Connected across the output terminal of the inverter circuit, it forms an LC resonant network with the leakage inductance of the transformer, creating conditions for soft switching.

[0009] Secondary rectifier circuit: It contains two independent rectifier devices (diodes or synchronous rectifier MOSFETs), corresponding to the secondary windings of Tx1 and Tx2 respectively, to complete the conversion of high-frequency AC to DC.

[0010] Control Module: Integrates functions such as frequency regulation, mode switching, and dead-time control. By continuously monitoring the output voltage, it dynamically optimizes the switching frequency and drive signals.

[0011] 2. Analysis of Core Technical Features

[0012] (1) Principle of Cooperative Conversion between Forward and Flyback Modes

[0013] The reverse series design of the same-named terminals of Tx1 and Tx2 is the core innovation of this device. Taking the full-bridge inverter circuit as an example (Q1 - Q4 are switching tubes), within one switching period:

[0014] The first half cycle (t0~tT / 2): Q1 and Q4 are conducting, Q2 and Q3 are off. The inverter circuit outputs a positive voltage. Tx1 operates in the forward mode (the primary current flows into the core, and the secondary induces a positive voltage), and Tx2 operates in the flyback mode (the primary current flows out of the core, and the secondary induces a negative voltage). The second half cycle (tT / 2~tT): Q2 and Q3 are conducting, Q1 and Q4 are off. The inverter circuit outputs a negative voltage. Tx1 switches to the flyback mode, and Tx2 switches to the forward mode. Through the above periodic switching, the two transformers complete the forward and flyback energy transfer complementarily within a single cycle, which is equivalent to dynamically adjusting the overall voltage conversion ratio (n1 = N in the forward mode, n2 = -N in the flyback mode), thereby mapping the wide-range input voltage (Vin) to the target output voltage (Vout). The formula is expressed as: undefined

[0015] Vout=\frac{D\cdot N\cdot Vin}{2}\quad(\text{Forward mode, D is the duty cycle})

[0016] D: The duty cycle of the switching tube, whose value range is 0 < D < 1, representing the ratio of the conduction time of the switching tube within one switching period to the switching period.

[0017] N: Not clearly defined in the original formula. Here, it is assumed that N is the turns ratio of the transformer, defined as the ratio of the secondary turns Ns to the primary turns Np, i.e., N = Np / Ns.

[0018] Vin: Input DC voltage.

[0019] Vout: Output DC voltage (average value).

[0020] In an ideal situation, all losses are ignored, including diode voltage drop, switching tube voltage drop, DC resistance (DCR) voltage drop of the inductor, etc.

[0021] Operating in continuous conduction mode (CCM), and the core is reset well, satisfying the volt-second balance condition.

[0022] The transformer is an ideal transformer with no leakage inductance and a coupling coefficient k = 1.

[0023] Derivation of the formula for the output voltage of an ideal forward converter

[0024] In a forward converter, when the switching transistor is turned on, the primary voltage Vin is applied to the primary winding of the transformer, and the secondary voltage is Vsecondary = N × Vin. At this time, the diode conducts, and the inductor L stores energy.

[0025] When the switching transistor is turned off, the primary winding of the transformer is reset through the reset winding or other means, the secondary diode is cut off, and the inductor releases energy to the load through the freewheeling diode.

[0026] According to the law of conservation of power, under ideal conditions, the input power equals the output power. The volt-second product on the primary side is Vin × D × T (where T is the switching period), and the volt-second product on the secondary side is V_{secondary}_{avg}\s(1-D)\s T. Since the transformer's turns ratio is N and losses are negligible, we can obtain Vout=N×Vin×D.

[0027] Vout = (1-D) * N * Vin / 2 (flyback mode, D is the duty cycle)

[0028] The range of D is dynamically adjusted by the control module based on the feedback of Vout, ensuring that Vout is stable at the target value (e.g., 12V / 24V / 48V) when Vin∈[20V,1000V].

[0029] (2) Resonant network and soft switching implementation

[0030] The resonant capacitor Cr and the transformer leakage inductance Lk form an LC resonant circuit, and its capacitance must be selected to meet the following requirements:

[0031] Cr = 1 / (2πfr)².Lk

[0032] Where f_r is the resonant frequency (typically 1 / 2 to 2 times the switching frequency f_sw). When the switching transistor is in the resonant current zero-crossing (ZCS) or voltage zero-crossing (ZVS) state, the switching loss Eon / Eoff can be reduced to 1 / 5 to 1 / 10 of that in the traditional hard-switching mode. To optimize the resonance effect, the capacitance ratio of Cr to the output filter capacitor Cf is strictly controlled at 1:5 to 1:20 to ensure that the resonant energy is efficiently fed back to the power supply and to avoid additional reactive power loss.

[0033] (3) Magnetic circuit optimization design

[0034] Both Tx1 and Tx2 are equipped with an air gap δ, the size of which satisfies 0.1mm ≤ δ ≤ 0.5mm. The specific value is determined by the core type (e.g., EE type, EI type) and the rated power. The functions of the air gap include:

[0035] Suppressing DC bias: Under wide voltage input, the transformer primary current contains a large DC component. The air gap can increase the magnetic reluctance and avoid core saturation.

[0036] Reduce excitation current: The air gap reduces the excitation inductance Lm (Lm=μ0μrN2Ae / δ), thereby reducing excitation loss (Pmag=Imag2Rcore);

[0037] Improved core heat dissipation: The air gap increases the magnetic circuit resistance, making it easier for heat to dissipate through the core surface and improving reliability in high-temperature environments.

[0038] (4) Secondary rectification strategy

[0039] The secondary rectifier circuit supports two configurations:

[0040] Diode rectification: Suitable for low-power applications (<100W), using fast recovery diodes (FRDs), with reverse withstand voltage ≥2 times Vout (RMS), forward voltage drop ≤0.8V, ensuring rectification efficiency ≥98%;

[0041] Synchronous rectification MOSFET: Suitable for medium to high power scenarios (≥100W). The control module detects the secondary voltage waveform and turns on the MOSFET during the freewheeling phase (Rds(on)≤5mΩ), reducing the rectification loss to 1 / 3 to 1 / 5 of that of traditional diodes.

[0042] Regardless of the configuration, a filter capacitor Cf is connected in parallel at the output of the secondary rectifier circuit. The capacitance value of the filter capacitor Cf ≥ 5 × Cout (Cout is the equivalent capacitance of the target load) and the ripple voltage rejection ratio ≥ 40dB (i.e. ΔVripple / Vout ≤ 0.01) ensures that the output voltage stability meets the IEC 62368 standard.

[0043] (5) Control strategy and parameter design

[0044] Frequency regulation mechanism: The control module dynamically adjusts the switching frequency f_op of the inverter circuit through a PI (proportional-integral) algorithm to achieve stable output voltage.

[0045] When Vout↑, increase f_op (f_op↑) to reduce the equivalent impedance of the transformer by utilizing the frequency characteristics of the resonant network and reduce energy input;

[0046] When Vout decreases, f_op decreases (f_op decreases), the equivalent impedance increases, and the energy input is improved.

[0047] The frequency adjustment range is f_min≤f_op≤2f_sw_min, where f_min is the minimum reliable operating frequency (determined by the core reset time, usually ≤20kHz), and 2f_sw_min is the safe upper limit to avoid subharmonic oscillations.

[0048] Drive signal optimization: The dead time Td of the switch drive signal is set to satisfy Td = 0.2 × Tr (Tr is the resonant period) to prevent shoot-through short circuits between the upper and lower bridge arms. The introduction of dead time avoids switching losses while ensuring the integrity of the resonant process, allowing the voltage across Cr to complete charge release within the dead time.

[0049] Breakthrough in wide voltage input adaptability: By alternating between forward and reverse flyback modes of Tx1 / Tx2, the limitation of fixed turns ratio of a single transformer is overcome, and the input voltage adaptability range is widened by 30% to 50% compared with traditional solutions. Especially in low voltage input scenarios below 100V and high voltage input scenarios above 800V, the efficiency is improved by 8% to 12% compared with similar products.

[0050] The resonant network reduces switching losses by more than 70%, and the peak efficiency in the full-bridge architecture can reach 96.5% (≥95% in the half-bridge architecture);

[0051] Air gap optimization reduces core loss by 40%, reduces voltage spikes caused by leakage inductance by 60%, and reduces energy loss in clamping circuits.

[0052] With synchronous rectification MOSFET configuration, secondary rectification loss is reduced by 60% compared to diode solution, and system efficiency curve fluctuates by ≤2% across the full load range (10% to 100%).

[0053] The symmetrical design of the forward and reverse flyback modes balances the stress on the two transformer cores, avoiding the risk of overheating of a single transformer, and extending the MTBF (Mean Time Between Failures) by more than twice compared to traditional solutions.

[0054] A "full-bridge / half-bridge" architecture is available, adaptable to a power range of 1kW to 5kW. The half-bridge architecture reduces costs by 30% in low-voltage, high-current scenarios, while the full-bridge architecture increases power density by 25% in high-voltage, low-current scenarios.

[0055] The adaptive control algorithm requires no manual intervention and can operate stably within a temperature range of -40℃ to +85℃, meeting the requirements of wide-temperature industrial applications.

[0056] Hardware circuit construction steps

[0057] Inverter circuit design:

[0058] Full-bridge architecture: Select MOSFETs with a withstand voltage ≥1200V and on-resistance ≤50mΩ (such as M0080120D), and match them with gate driver chips (such as IR2110). The dead time is set to Td=0.2×Tr through the built-in register of the driver chip.

[0059] Half-bridge architecture: The main switching transistors (Q1, Q2) have a withstand voltage of ≥600V, the auxiliary switching transistors (if any) have a withstand voltage of ≥300V, and the inductor Lr (resonant inductor) and Cr form an auxiliary resonant circuit to optimize the energy freewheeling during the dead time.

[0060] Dual transformer configuration: Select EE28 magnetic core (cross-sectional area Ae = 85mm²) 2 For Tx1 / Tx2, the primary winding number Np = 50 and the secondary winding number Ns = 10 (for 12V output). The same-name terminals are marked by the winding direction of the enameled wire (e.g., the first end of Tx1 is the same-name terminal, and the first end of Tx2 is the opposite-name terminal). Air gap processing: Use a special grinding machine to grind a 0.3mm air gap in the core column to ensure that the magnetic circuit on both sides is symmetrical and the magnetic reluctance uniformity error is ≤5%.

[0061] Secondary rectification and filtering: High-power scenarios (e.g., 3kW): IRBB4110 MOSFET (Rds(on) = 4.5mΩ) is used as the synchronous rectification device. The drive signal is generated by the secondary voltage peak detection circuit, and the rise time delay is ≤100ns. Low-power scenarios (e.g., 50W): HER208 fast recovery diode (forward voltage drop 0.75V@8A) is selected. The filter capacitor Cf is a 100μF / 25V tantalum capacitor and a 1000μF / 16V electrolytic capacitor connected in parallel to ensure low-frequency ripple suppression.

[0062] Control module software design

[0063] Frequency adjustment algorithm: The difference between the sampled output voltage Vout and the reference voltage Vref (e.g., 12V) is used by the PI controller to calculate the frequency offset Δf.

[0064] Δf=Kp(Vout-Vref)+Ki∫(Vout-Vref)dt

[0065] Where Kp = 0.5 Hz / V, Ki = 0.1 Hz / (V·s);

[0066] The frequency is limited to the range of [f_min=30kHz, 2f_sw_min=100kHz], where f_sw_min is the minimum switching frequency (determined by the core reset time t_reset=5μs, f_sw_min≥1 / (2t_reset)=100kHz).

[0067] Mode switching logic: The drive signals for Tx1 / Tx2 are generated by the conduction timing of the inverter circuit switching transistors (e.g., Q1 / Q4 is conducting during the positive half-cycle), ensuring that the two operating modes are always opposite; Mode lock function is added: When the primary current of Tx1 / Tx2 is detected to continuously exceed 110% of the rated value, it is forcibly switched to the safety mode (fixed frequency 50kHz, mode switching is prohibited) to avoid core saturation damage.

[0068] Protection mechanisms: Overvoltage protection (OVP): When Vout>110%Vref, the inverter circuit drive signal is immediately blocked, and the Cr / Cf discharge circuit is started at the same time (through the discharge resistor Rd=100Ω); Overcurrent protection (OCP): A 0.1Ω / 5W sampling resistor is connected in series in the primary circuit. When the peak current>2 times the rated current, a soft shutdown is triggered (first reduce the frequency to f_min, and then delay for 10ms to block the drive).

[0069] Test and verification

[0070] Efficiency Test: Test conditions: Input voltage Vin = 100V / 500V / 1000V, output voltage Vout = 24V, load resistance Rload = 10Ω~100Ω (corresponding to 10%~100% load); Test results: Under the full-bridge architecture, the efficiency reaches 96.2% with 100V input and 50% load, and still maintains 95.1% with 1000V input and 10% load, which is 9%~11% higher than the traditional single-transformer solution.

[0071] Temperature rise test: Under the conditions of ambient temperature Ta=25℃, Vin=800V, Vout=48V, Rload=20Ω (62.5% load), after continuous operation for 8 hours, the junction temperature Tj of the MOSFET is ≤125℃ (lower than the specification limit of 150℃), and the surface temperature of the magnetic core is ≤85℃, which meets the IEC 60749 standard.

[0072] Electromagnetic compatibility (EMC) testing:

[0073] Conducted emissions (CE): In the 150kHz to 30MHz frequency band, the radiated peak value is ≤65dBuV (CISPR 11 Class B standard limit is 70dBuV); Radiated emissions (RE): In the 30MHz to 1GHz frequency band, the radiated peak value is ≤55dBuV / m (distance 3m), which can be met by increasing the Cr / Cf Y capacitor (2.2nF) and common mode inductor (100μH).

[0074] Advantages of this invention: Excellent wide-voltage input adaptability: Through the innovative "full-bridge or half-bridge resonant forward / flyback topology," especially utilizing the core design that "the first transformer (Tx1) operates in forward mode during the first half of the switching cycle and switches to flyback mode during the second half; the second transformer (Tx2) operates in the opposite mode," the converter maintains high-efficiency energy conversion across the entire range of input voltage variations. The intelligent switching between forward and flyback modes effectively and dynamically adjusts the equivalent voltage conversion ratio, thereby greatly expanding the applicable input voltage range of the device.

[0075] Significantly high efficiency: The application of resonant technology (such as the specific capacitance ratio of resonant capacitor Cr and filter capacitor Cf, Cr:Cf = 1:5 to 1:20) significantly reduces switching losses, creating conditions for soft switching, which is a key way to improve efficiency; the air gap in the transformer (0.1mm≤δ≤0.5mm) helps core reset, control leakage inductance and optimize magnetic circuit characteristics, which can reduce excitation current and iron loss, further improving efficiency; the overall architecture optimized for wide input voltage and the optional synchronous rectifier MOSFET (for secondary rectification) both contribute significantly to improving the overall efficiency.

[0076] Reliable stability and flexibility: Output voltage stability is achieved by adjusting the inverter circuit switching frequency (frequency conversion control), and this frequency is intelligently linked with the input voltage (f_op=f_min+K*(V_in-V_ref) / V_ref), enabling the system to find the optimal operating point under various input conditions; the dead time setting of the drive signal (Td=0.2*T_r) effectively enhances the operational safety of the power switching devices; the flexible selection of "full bridge or half bridge" provides adaptability for different power requirements and application scenarios.

[0077] Optimized magnetic circuit design and cost-effectiveness: The innovative structure of a first transformer (Tx1) and a second transformer (Tx2) with the same parameters and reverse series connection of the same terminals not only simplifies the design, but also enables the two transformers to work synergistically when working alternately in forward and reverse flyback modes, fully explore the potential of the magnetic core, avoid the magnetic saturation risk and efficiency bottleneck of traditional single transformer or simple dual transformer schemes under wide input range, and at the same time facilitate the selection of standardized magnetic core components. Attached Figure Description

[0078] 1. Figure 1 Schematic diagram of a dual-transformer secondary rectifier and filter circuit

[0079] 2. Figure 2 A partial schematic diagram of the coupling between the full-bridge / half-bridge inverter circuit and the primary winding of the dual transformer.

[0080] 3. Figure 3 Core energy conversion and mode switching process

[0081] 4. Figure 4 To enable adaptive adjustment of the control module process

[0082] 5. Figure 5 Forward and reverse flyback coordinated working process of transformer

[0083] 6. Figure 6 For resonant network and soft-switching control process Detailed Implementation

[0085] Example 1: Power Synchronous Rectifier Converter in Full-Bridge Architecture

[0086] Circuit configuration:

[0087] Inverter circuit: adopts a full-bridge structure (Q1-Q4 MOS transistors, withstand voltage 1200V, on-resistance 40mΩ), dead time Td=0.2×Tr (Tr=8μs, Td=1.6μs).

[0088] Transformers: Tx1 and Tx2 both use EE33 magnetic cores (Ae = 101mm²). 2 The primary winding has Np = 60 turns, the secondary winding has Ns = 12 turns, the same-name terminals are connected in reverse series, and the air gap δ = 0.3 mm.

[0089] Resonant network: Cr = 470 nF, Lr = 22 μH (Cr:Lr = 1:20), connected across the inverter output terminal.

[0090] Secondary rectification: Synchronous rectification is performed using an IRBB38N10D MOSFET (Rds(on) = 3.5mΩ), with Cout = 2000μF (ripple voltage V_ripple ≤ 240mV @ 10A load).

[0091] Working principle: Positive half-cycle (Q1 / Q4 are on): The primary current of Tx1 flows into the same-name terminal, and it operates in forward mode, with the secondary side sensing +24V;

[0092] The primary current of Tx2 flows out of the same-name terminal and operates in flyback mode. The secondary side senses -24V (the forward current is achieved through the freewheeling current of the synchronous rectifier diode).

[0093] Negative half-cycle (Q2 / Q3 on): The primary current of Tx1 flows out of its corresponding terminal, switching to flyback mode; the primary current of Tx2 flows into its corresponding terminal, switching to forward mode. Frequency adjustment: When Vout increases from 24V to 25V, the control module calculates Δf=K×(25-24)=0.01×100=1kHz, increasing f_op from 80kHz to 81kHz, thereby reducing the input power by decreasing the transformer's equivalent impedance.

[0094] Advantages: Synchronous rectification reduces secondary losses, achieving an efficiency of 96.5% (Vin = 300V, 50% load); alternating forward and reverse flyback modes prevent single transformer saturation, increasing core utilization by 40%; the full-bridge architecture supports high-voltage input (maintaining 95% efficiency at 1000V).

[0095] Example 2: Half-bridge architecture low-voltage high-current converter

[0096] Circuit configuration:

[0097] Inverter circuit: half-bridge structure (Q1, Q2 MOS transistors, withstand voltage 600V, on-resistance 60mΩ), auxiliary inductor Lr=1μH.

[0098] Transformers: Tx1 and Tx2 are EI 35 magnetic cores (Ae = 95mm²). 2 Primary number of turns Np = 40, secondary number of turns Ns = 8, air gap δ = 0.2 mm.

[0099] Resonant network: Cr = 220nF, connected across the midpoint of the half-bridge to ground.

[0100] Secondary rectification: HER308 fast recovery diode (VF = 0.85V @ 5A), Cf = 5000μF (Cout = 1000μF).

[0101] Working principle:

[0102] Positive half-cycle (Q1 is on, Q2 is off):

[0103] The input voltage is applied to the resonant capacitor Cr through Lr and the primary winding of Tx1. The resonant current i_Lr = I0sin(ωt) drives Tx1 in forward mode.

[0104] Because the terminals of Tx2 are reversed, the primary current flows in opposite directions, and Tx2 operates in flyback mode.

[0105] Negative half-cycle (Q2 on, Q1 off):

[0106] When the input voltage is reversed, Tx1 switches to flyback mode, Tx2 switches to forward mode, and the resonant current is reversed.

[0107] Load adjustment: When the load suddenly increases from 20A to 40A, the control module detects the decrease in Vout and uses the formula f_op=f_min+K×(V_in-24) / 24 (K=0.5) to reduce the frequency from 60kHz to 50kHz and increase the magnetizing current to maintain output stability.

[0108] Advantages:

[0109] The half-bridge architecture reduces the voltage withstand requirement of the switching transistors (600V vs. 1200V for the full-bridge), resulting in a 35% cost reduction.

[0110] Air gap optimization reduces excitation current (55% lower than air gap-free design), making it suitable for low-voltage, high-current scenarios such as 12V / 40A (480W).

[0111] After replacing the diode with a synchronous rectifier MOSFET, the secondary loss is reduced by another 60%.

[0112] Example 3: High-air-gap magnetic core optimized converter

[0113] Core Innovations:

[0114] Air gap parameters: Tx1 and Tx2 use PC40 iron-silicon-aluminum magnetic cores (Ae = 80mm²). 2 The air gap δ = 0.5 mm (close to the upper limit) and the leakage inductance Lk = 15 μH (70% lower than the conventional 0.3 mm air gap).

[0115] Transformer design: The primary winding is layered (the inner layer is a flyback winding and the outer layer is a forward winding) to reduce leakage magnetic coupling; the secondary winding uses multi-strand enameled wire wound in parallel (12 strands × 1.2mm) to reduce the skin effect.

[0116] Workflow:

[0117] Wide voltage compatibility mechanism:

[0118] When Vin = 20V (low voltage limit): increase the duty cycle D to 0.45, use forward mode to improve magnetic flux utilization, and adjust the Cr resonant frequency to 120kHz (to match the current rise rate under low voltage).

[0119] When Vin = 1000V (high voltage limit): D drops to 0.15, switch to flyback mode as the main mode, and limit the excitation current (<2A) through air gap reluctance to avoid core saturation.

[0120] Loss control:

[0121] An air gap of δ = 0.5 mm results in an excitation inductance Lm = 25 μH (a 60% reduction compared to a 0.1 mm air gap), and an excitation loss P_mag = I_mag. 2 ×R_core decreased from 12W to 4.8W;

[0122] A resonant capacitor Cr = 1000nF and Lk = 15μH form a 16kHz resonant circuit, achieving ZVS conduction (reducing switching losses by 80%).

[0123] Advantages:

[0124] The magnetic core stress is balanced under extreme voltage, and the core temperature rise is <30K at 1000V input (compared to >50K in conventional solutions).

[0125] The high air gap design allows the device to adapt to high-pressure environments above 5000m altitude without the need for additional heat dissipation measures.

[0126] Example 4: Multi-mode switching wide voltage input device

[0127] Control strategy upgrade:

[0128] Mode subdivision: Based on the traditional forward and flyback switching, a "semi-flyback" transition mode is added (when Vin is in the middle range of 200V to 500V, Tx1 works in 1:1 forward mode and Tx2 works in 1:1 flyback mode to avoid high current surge).

[0129] Frequency segmentation control:

[0130] Low frequency band (f<40kHz): Voltage mode control is used, with slope compensation coefficient Kc=0.3;

[0131] High frequency band (f≥40kHz): Switch to current mode control, peak current limit Ipeak=3×Iout(nom).

[0132] Typical scenario:

[0133] Vin = 100V (low voltage side of photovoltaic panel):

[0134] The positive half-cycle is Tx1 forward (N=1:1, Vout=50V@D=0.5), and Tx2 flyback (Vout=-50V);

[0135] The resonant capacitor Cr = 680nF, and the switching frequency f_op = 90kHz (satisfying f_min = 40kHz ≤ 90 ≤ 2f_sw_min = 120kHz).

[0136] Vin = 900V (high voltage input of charging station):

[0137] Positive half-cycle Tx1 flyback (N = -1:1, equivalent voltage reduction), Tx2 forward (N = 1:1, equivalent voltage increase);

[0138] The frequency is automatically boosted to 110kHz, and the high-frequency gain characteristics of the resonant network are used to suppress voltage spikes.

[0139] Advantages:

[0140] Three-mode switching covers the entire voltage range, with efficiency fluctuation of <0.5% in the 200V to 500V range;

[0141] The dynamic response speed is improved to 10μs (traditional solutions >50μs), and the Vout fluctuation is <1% during load changes.

[0142] Example 5: High-Reliability Industrial-Grade Redundancy Design Device

[0143] Redundancy and protection:

[0144] Dual transformer parallel redundancy: In addition to operating in series, Tx1 and Tx2 are equipped with a parallel hot standby channel (when the secondary current of either transformer exceeds 110% of the rated value, it automatically switches to single transformer mode and operates at 80% derated).

[0145] Composite protection circuit:

[0146] Overvoltage protection: When Vout>110%Vref, the IGBT is quickly turned off (response time<500ns), and Cr / Cf is discharged through the 10Ω bleeder resistor (the voltage drops to a safe value within 5ms);

[0147] Over-temperature protection: When the core temperature sensor (accuracy ±1K) detects Tj>130℃, the frequency reduction mode is activated (f_op decreases by 5% for every 10℃ increase).

[0148] Engineering design:

[0149] PCB layout: Primary circuit and secondary circuit are physically isolated (spacing ≥ 8mm), and the resonant capacitor Cr uses a three-layer metallized polypropylene film (ESR < 5mΩ).

[0150] EMC optimization: A common-mode inductor (100μH) and an X capacitor (2.2μF) are added to the input side, and a π-type filter (L=4.7μH, C=470μF) is configured on the output side, resulting in a conducted interference peak value that is 10dB lower than the standard limit.

[0151] Advantages:

[0152] Dual transformer redundancy increases MTBF from 100,000 hours to 250,000 hours;

[0153] The composite protection mechanism meets the IEC 61508 SIL-2 safety level and is suitable for harsh scenarios such as nuclear power plants and oil drilling platforms.

[0154] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A wide-input high-efficiency converter and control method based on a full-bridge or half-bridge resonant flyback topology, characterized in that: It includes a full-bridge / half-bridge inverter circuit, a first transformer (Tx1), a second transformer (Tx2), a resonant capacitor (Cr), a secondary rectifier circuit, and a control module; Tx1 and Tx2 have the same parameters and are connected in series with the same terminals in reverse order; Cr is connected across the output terminal of the inverter circuit; and the secondary rectifier circuit includes two independent rectifier devices.

2. The wide-input high-efficiency converter and control method based on a full-bridge or half-bridge resonant flyback topology according to claim 1, characterized in that: Both the first transformer (Tx1) and the second transformer (Tx2) are provided with air gaps, and the air gap amount δ satisfies 0.1mm≤δ≤0.5mm.

3. The wide-input high-efficiency converter and control method based on a full-bridge or half-bridge resonant flyback topology according to claim 1, characterized in that: The secondary rectifier circuit uses diode rectifiers or synchronous rectifier MOSFETs, with one rectifier device configured for each transformer.

4. The wide-input high-efficiency converter and control method based on a full-bridge or half-bridge resonant flyback topology according to claim 1, characterized in that: The inverter circuit contains four switching transistors (Q1-Q4) when it is a full-bridge structure, and two switching transistors (Q1-Q2) when it is a half-bridge structure.

5. The wide-input high-efficiency converter and control method based on a full-bridge or half-bridge resonant flyback topology according to claim 1, characterized in that: A filter capacitor (Cf) is connected in parallel across the resonant capacitor (Cr), and the capacitance ratio of Cr to Cf satisfies Cr:Cf = 1:5 to 1:

20.

6. The wide-input high-efficiency converter and control method based on a full-bridge or half-bridge resonant flyback topology according to claim 1, characterized in that: The output voltage is stabilized by adjusting the switching frequency of the inverter circuit. Specifically, when V_out increases, f_op increases; when V_out decreases, f_op decreases; the frequency adjustment range is f_min ≤ f_op ≤ 2f_sw_min.

7. The method according to claim 6, characterized in that: The switching frequency f_op is linked to the input voltage V_in, satisfying f_op=f_min+K*(V_in-V_ref) / V_ref, where K is the adjustment coefficient.

8. The wide-input high-efficiency converter and control method based on a full-bridge or half-bridge resonant flyback topology according to claim 6, characterized in that: The dead time Td of the switching transistor drive signal is set to satisfy Td = 0.2 * T_r, where T_r is the resonant period.

9. The wide-input high-efficiency converter and control method based on a full-bridge or half-bridge resonant flyback topology according to claim 1, characterized in that: The first transformer (Tx1) operates in forward mode during the first half of the switching cycle and switches to flyback mode during the second half; the second transformer (Tx2) operates in the opposite mode.

10. The wide-input high-efficiency converter and control method based on a full-bridge or half-bridge resonant flyback topology according to claim 1, characterized in that: The output of the secondary rectifier circuit is connected in parallel with a filter capacitor (Cf), whose capacitance value satisfies Cf≥5*Cout and ripple voltage suppression ratio≥40dB.

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