System and method for impedance shifting between filter and amplifier

Abstract

Systems and methods for impedance shifting between a filter and an amplifier are disclosed. In one aspect, an active inductor, which may otherwise be placed between a filter and a low noise amplifier (LNA), may be replaced with a passive impedance enhancement circuit. The impedance enhancement circuit may be, for example, a passive voltage gain circuit, and, as another example, may be implemented with a coupled resonator filter (CRF) structure. The use of such a passive voltage gain structure in a receive circuit whose input noise is primarily determined by the noise voltage component means that any passive voltage gain prior to the active amplifier will result in a reduction in the overall receive path noise index, and may potentially save the space that would otherwise be dedicated to large inductor circuits.

Description

[0001] Cross-referencing related applications

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 469,070, filed May 26, 2023, the disclosure of which is hereby incorporated herein by reference in its entirety. Technical Field

[0003] The technology disclosed herein generally relates to impedance matching of amplifiers used in transceiver circuits. Background Technology

[0004] The proliferation of computing devices in modern society, especially mobile communication devices, has led to their increasing prevalence. This widespread adoption is partly due to the numerous functionalities now available on these devices. The increased processing power means that mobile communication devices have evolved from simple communication tools into sophisticated mobile multimedia hubs, thus enhancing the user experience. The availability of these diverse functionalities has increased the pressure to promote high-bandwidth wireless communication. This pressure has driven the evolution of cellular and wireless standards operating across various frequency bands. This change in operation typically requires separate receiver chains in wireless circuit systems, each potentially having its own low-noise amplifier (LNA). Ensuring the effective operation of each LNA may require impedance matching between the LNA and the corresponding filter. Optimizing this impedance matching has created opportunities for innovation. Summary of the Invention

[0005] The aspects disclosed in the detailed description include systems and methods for impedance shifting between a filter and an amplifier. In particular, exemplary aspects of this disclosure contemplate replacing an active inductor that would otherwise be placed between the filter and the low-noise amplifier (LNA) with a passive impedance-boosting circuit. The impedance-boosting circuit can be, for example, a passive voltage gain circuit, and as another example, it can be implemented using a coupled resonator filter (CRF) structure. Using such a passive voltage gain structure in a receiver circuit where the input noise is primarily determined by the noise voltage component means that any passive voltage gain before the active amplifier will reduce the overall receiver path noise figure and can potentially save space that would otherwise be dedicated to large inductor circuitry.

[0006] In this regard, in one aspect, a receiver chain is disclosed. The receiver chain includes: an LNA including an input; and a band-select filter coupled to the input, the band-select filter including a filter and an impedance enhancement circuit configured to provide passive impedance enhancement.

[0007] In another aspect, a CRF structure is disclosed. The CRF structure includes a first input side comprising a first number of interdigital fingers, a first output side comprising a second number of interdigital fingers, where the second number of interdigital fingers is less than the first number of interdigital fingers, and a reflector coupled to a first interdigital finger of the first number of interdigital fingers, where a difference between the first number and the second number of interdigital fingers creates a passive impedance enhancement between the first input side and first output side.

[0008] In another aspect, a computing device is disclosed. The computing device includes a transceiver including a baseband processor and a receiver chain coupled to the baseband processor, the receiver chain including an LNA comprising an input and a band select filter coupled to the input, the band select filter comprising a filter and an impedance enhancement circuit configured to provide a passive impedance enhancement.

[0009] In another aspect, a method for controlling a receiver chain is disclosed. The method includes receiving a signal at an antenna and filtering the signal. The method also includes enhancing an impedance in a path of the signal using a CRF impedance enhancement circuit and providing the signal to an input of an LNA. BRIEF DESCRIPTION OF DRAWINGS

[0010] FIG. 1 is a block diagram of a conventional receive chain having multiple receive paths each with an impedance matching inductor;

[0011] Figure 2A is a block diagram of a single receive chain having an impedance enhancement circuit according to exemplary aspects of the present disclosure;

[0012] Figure 2B is a block diagram of a receiver having multiple receive chains each with an impedance enhancement circuit according to exemplary aspects of the present disclosure;

[0013] Figure 3A is a block diagram of a first possible implementation of an impedance enhancement circuit of the present disclosure after a filter;

[0014] Figure 3B is a block diagram of a second possible implementation of an impedance enhancement circuit of the present disclosure integrated into a filter;

[0015] Figure 3C is a block diagram of a third possible implementation of an impedance enhancement circuit as an intermediate circuit between filters;

[0016] Figure 4Ais a block diagram of an impedance boosting circuit used in a shared transmit and receive filter, such as can be found in a time division duplex (TDD) system;

[0017] Figure 4B is a block diagram of an impedance boosting circuit used in a separate receive filter, such as can be found in a frequency division duplex (FDD) system;

[0018] Figure 5A is a block diagram of an impedance boosting circuit used with a tuned low noise amplifier (LNA);

[0019] Figure 5B is a block diagram of an impedance boosting circuit used with an active matching LNA;

[0020] Figures 6A-6D is a simplified diagram of possible impedance boosting circuits based on different coupled resonator filter (CRF) structures;

[0021] Figure 7 is a simplified diagram of two parallel CRF structures that can be used for an impedance boosting circuit;

[0022] Figure 8 is a simplified diagram of two parallel CRF structures that use a shared reflector to reduce the implementation area;

[0023] Figure 9A is a first aspect of a hybrid resonator-CRF structure that can be used as a combined filter and impedance boosting circuit;

[0024] Figure 9B is a second aspect of a resonator that can be used in a hybrid resonator-CRF structure;

[0025] Figure 9C is a third aspect of a resonator that can be used in a hybrid resonator-CRF structure;

[0026] Figure 10 shows a hybrid structure of Figure 9A implemented in an FDD based transceiver chain;

[0027] Figure 11 is a block diagram of an implementation of the matching LNA of Figure 5B ;

[0028] Figure 12 is a block diagram of an alternative implementation of the LNA of Figure 11 , but with a common source amplifier;

[0029] Figure 13 is a block diagram of an alternative impedance boosting circuit that allows the elimination of the impedance rotating inductance;

[0030] Figure 14is a block diagram of aspects of the present disclosure in combination with a distortion cancelation circuit; and

[0031] Figure 15 is a block diagram of a mobile terminal that can incorporate the impedance enhancement circuit of the present disclosure described herein. DETAILED DESCRIPTION

[0032] The examples set forth below represent the necessary information to enable those of ordinary skill in the art to practice the examples and illustrate the best mode of practicing the examples. Upon reading the following specification, those of ordinary skill in the art will understand the concepts now claimed and will appreciate the application to its fullest extent. It will be apparent to one of ordinary skill in the art that the concepts and applications described herein can be practiced without resorting to the details discussed below.

[0033] It should be understood that although the terms first, second, etc. can be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0034] It will be understood that when an element such as a layer, region, or substrate is referred to as being "on" or extending "onto" another element, it can be directly on or extend directly onto the other element or intervening elements can also be present. In contrast, when an element is referred to as being "directly on" or extending "directly onto" another element, there are no intervening elements present. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements can be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present.

[0035] Relative terms such as "below" or "above" or "upper" or "lower" or "horizontal" or "vertical" can be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as shown in the figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the figures.

[0036] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used herein, the singular forms "a," "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes" and / or "including," when used herein, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0037] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0038] Aspects disclosed in the detailed description include systems and methods for impedance shifting between a filter and an amplifier. In particular, exemplary aspects of the present disclosure contemplate replacing an active inductor that would otherwise be placed between a filter and a low noise amplifier (LNA) with a passive impedance enhancement circuit. The impedance enhancement circuit can be, for example, a passive voltage gain circuit, and as another example, can be implemented with a coupled resonator filter (CRF) structure. Using such a passive voltage gain structure in a receive circuit where input noise is primarily determined by a noise voltage component means that any passive voltage gain before the active amplifier will result in an exponential reduction in the overall receive path noise, and can potentially save space that would otherwise be dedicated to a large inductor circuit.

[0039] Prior to discussing specific aspects of the present disclosure, a brief overview of an existing receive chain is provided with reference to FIG. 1. This discussion will provide context for highlighting the advantages of the present disclosure, which is discussed below with reference to FIGS. 2-5. Figure 2A Beginning.

[0040] In this regard, Figure 1 is a block diagram of a conventional receive chain 100 having multiple receive paths 102(1)-102(N). Each receive path 102(1)-102(N) is coupled to an antenna switch 104. The antenna switch 104 (also referred to as ASW in the figure) selectively couples one of the receive paths 102(1)-102(N) to an antenna filter 106 and an antenna 108. In practice, a consistent impedance is provided to reduce reflections and to make interoperability easier to achieve. A common impedance is fifty ohms (50 Ω). Thus, the antenna filter 106 has an input impedance of 50 ohms (i.e., at the antenna port), and the antenna switch 104 has an input impedance of 50 ohms. In addition, each receive path 102(1)-102(N) has a band select filter 110(1)-110(N) with an input impedance of 50 ohms. Each receive path 102(1)-102(N) can further have an LNA 112(1)-112(N). The LNAs 112(1)-112(N) typically have a higher impedance, and impedance matching inductors 114(1)-114(N) are used to achieve impedance matching. The LNAs 112(1)-112(N) can be bipolar junction transistor (BJT) type amplifiers, but more commonly, the LNAs 112(1)-112(N) are field effect transistor (FET) type amplifiers.

[0041] Inductors, such as the impedance matching inductors 114(1)-114(N), are typically relatively large with respect to other circuitry within a transceiver. In some cases, the inductors are off-chip, requiring multiple input / output pins, which also consume space. Thus, having multiple impedance matching inductors 114(1)-114(N) requires a significant amount of real estate to implement the impedance matching function. In existing devices, such impedance matching inductors 114(1)-114(N) can use more space than the circuitry implementing the LNAs 112(1)-112(N), for example. In addition, the impedance matching inductors 114(1)-114(N) can also add series resistance to the receive paths 102(1)-102(N). This series resistance can negatively impact the noise figure or otherwise degrade performance.

[0042] Exemplary aspects of the present disclosure contemplate the addition of an impedance enhancement circuit within a filter circuitry. In exemplary aspects, the impedance enhancement circuit can be a coupled resonator filter (CRF) structure. As many filters rely on resonator structures, this approach allows the filter to be implemented on the same die as the CRF structure. The CRF structure can be implemented such that the output of the CRF structure has a higher impedance level than the filter and acts as a passive voltage gain circuit. In addition to the space saving benefit, there can also be a noise benefit. Specifically, many of the active devices used to build LNAs are transconductance stages, such as metal oxide semiconductor (MOS) transistors, junction field effect transistors (JFETs), pseudomorphic high electron mobility transistors (pHEMTs), etc. In use, such active devices typically have a large input impedance, as well as a small or negligible input radio frequency (RF) current. Thus, these active devices will primarily perform input voltage processing. Due to this voltage processing, the passive voltage gain before the active LNA will cause the active noise contribution at the source node to be reduced. This reduction results in an overall reduction in noise for the entire receive path. This noise reduction improves performance.

[0043] As a further explanation, a passive impedance transformation stage inherently has a passive voltage gain equal to the square root of the impedance ratio (minus the insertion loss of the passive stage). If the active device is an input voltage processing device (e.g., a transconductance device), then the input noise is primarily determined by the noise voltage, and the passive voltage gain before the active stage noise will cause the active noise contribution at the source node to be reduced.

[0044] In this regard, Figure 2A is a block diagram of a single receive chain 200 with an impedance enhancement circuit according to exemplary aspects of the present disclosure. More specifically, the receive chain 200 contains an antenna 202 coupled to an antenna filter 204. The signal received by the antenna 202 is filtered and then passed to a band select filter 206. There can be an optional matching circuit 208 coupling the band select filter 206 to an LNA 210. The band select filter 206 can contain a filter 212, which can be, for example, an acoustic filter, such as a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, etc. The band select filter 206 can further contain an impedance enhancement circuit 214, which, as described above, can be a CRF structure. Other structures are possible without departing from the present disclosure. More details regarding possible CRF implementations are provided below starting with reference Figure 6A to FIG. 3.

[0045] While Figure 2A A single receive chain 200 is shown, but as described above, in many cases, the receiver 250 can contain multiple receive circuits 252(1)-252(M), as shown in FIG. 2.Figure 2B The antenna 202 and the antenna filter 204 can be shared by a plurality of receive circuits 252(1)-252(M). An antenna switch 254 can selectively couple a given receive circuit 252(1)-252(M) to the shared antenna 202, as is well understood. As with the receive chain 200, each of the receive circuits 252(1)-252(M) has a respective band-select filter 256(1)-256(M) and LNA 258(1)-258(M). Optionally, a respective matching circuit 260(1)-260(M) can also be present. The band-select filters 256(1)-256(M) have respective filters 262(1)-262(M) and impedance enhancement circuits 264(1)-264(M).

[0046] Figure 3A is a block diagram of a first possible implementation of the band-select filter 206A, and specifically contemplates the impedance enhancement circuit 214 being positioned after the filter 212. In contrast, in the band-select filter 206B shown in Figure 3B the impedance enhancement circuit is combined with the filter as a hybrid circuit 300. Figure 3C The band-select filter 206C shown in also provides another option. Specifically, the impedance enhancement circuit 214 is positioned between a first filter stage 302 and a subsequent filter stage 304, it should be understood that there can be many filter stages (not shown), and the impedance enhancement circuit can be between any two stages (e.g., between the first and second stages, between the third and fourth stages, between the eighth and ninth stages, between the xth and (x+1)th stages, etc.). As described elsewhere, the filter 212 and the filter stages 302, 304 can be resonators, and the impedance enhancement circuit 214 can incorporate a CRF structure. The use of resonators in both structures allows for the band-select filter to be constructed on a single die using similar resonator fabrication techniques.

[0047] There can be a transceiver architecture that uses an impedance enhancement circuit that can share a filter with a transmit chain, as shown in Figure 4A More specifically, the transceiver 400 can incorporate a transmit chain 402 with a power amplifier 404 and a power amplifier matching circuit 406 that is coupled to a filter 408 through a switch 410. The filter 408 can be coupled to the antenna filter 204 and the antenna 202 Figure 4AThe filter 408 can also be part of the receive chain 411. More specifically, the filter 408 can be coupled to an impedance enhancement circuit 412, which in turn is coupled to an LNA 414 through a switch 416. If desired, the chains 402 and 411 combine at a node 418. As with the previous configuration, there can be an optional matching circuit 420. This sharing approach is appropriate, but not necessary, for time division duplex (TDD) transceivers.

[0048] Alternatively, and in a frequency division duplex (FDD) transceiver 450 as shown in Figure 4B there can be separate transmit and receive chains 452 and 454. The transmit chain 452 can include a power amplifier 456, a power amplifier matching circuit 458, and a transmit filter 460. The transmit filter 460 can be coupled to the antenna filter 204 and the antenna 202 through a node 462 (neither of which are shown in Figure 4B The receive chain 454 can include an LNA 464, an optional matching circuit 466, and a band select filter 468. The band select filter 468 can include a receive filter 470 and an impedance enhancement circuit 472.

[0049] The impedance enhancement circuits of the present disclosure can be used with different types of LNAs. For example, the impedance enhancement circuits of the present disclosure can be used with tuned LNAs and active matching LNAs, as shown in Figure 5A and 5B Thus, Figure 5A A band select filter 206 is shown with an impedance enhancement circuit 214 coupled to a tuned LNA 500. The tuned LNA 500 can have a lower noise figure than the active matching LNA 502 of Figure 5B The tuned LNA 500 can be used in a TDD transceiver. The tuned LNA 500 can be used in a FDD transceiver. The tuned LNA 500 can be used in a transceiver with simultaneous transmit and receive operation. The tuned LNA 500 can be used in a transceiver with simultaneous transmit and receive operation and with a single antenna. The tuned LNA 500 can be used in a transceiver with simultaneous transmit and receive operation and with a single antenna and with a single filter. The tuned LNA 500 can be used in a transceiver with simultaneous transmit and receive operation and with a single antenna and with a single filter and with a single power amplifier. The tuned LNA 500 can be used in a transceiver with simultaneous transmit and receive operation and with a single antenna and with a single filter and with a single power amplifier and with a single matching circuit.

[0050] Figure 5BThe active LNA 502 can include an active impedance amplifier 506. In some aspects, there can be a second amplifier 508. The amplifiers 506, 508 are positioned in parallel with the LNA 502. The use of the active impedance amplifier 506 (and optional second amplifier 508) allows for the elimination of both the inductor 504 and the gate inductor, but the combination of the amplifiers 502, 506, and 508 has a higher noise figure. The advantage of active input matching is that it allows for a wider S11 match, which can be useful for a wider range of communication bands. The disadvantage is that the noise injected by the active impedance amplifier 506 at the input can need to be cancelled at the output to obtain reasonable noise performance of the receive path. Having a high impedance at the LNA input 510 provides an advantage in that the noise contribution of both the active LNA 502 and the active impedance amplifier 506 are reduced by the passive voltage gain created by the impedance boosting circuit 214. Reference is made below to Figures 11-13 Additional details are provided regarding the use of active matching amplifiers.

[0051] In the context of various possible ways in which impedance boosting circuits can be used, Figures 6A-6D A schematic of possible impedance boosting circuits is provided based on different coupled resonator filter (CRF) structures. In particular, Figure 6A A five-finger interdigital transducer (IDT) 600 is shown, with three fingers 602(1)-602(3) on the input side and two fingers 604(1)-604(2) on the output side. The difference in the number of fingers between the input side and the output side helps with impedance boosting of the circuit. The more fingers, the greater the capacitance, and thus the lower the impedance. Reflectors 606A and 606B can be used to help control signal propagation by using acoustic structures to cancel high loss. In addition, the fingers can be coupled to ground 608, as shown.

[0052] Figures 6B-6D Three-finger, seven-finger, and nine-finger IDT structures 600B-600D are shown, respectively. As explained above, the imbalance in the number of fingers between the input side and the output side helps with impedance boosting. Experimental evidence and modeling show that the three-finger IDT structure 600B can provide the optimal impedance boosting for a given size and performance criteria.

[0053] While the three-finger IDT structure 600B can be optimal, the present disclosure contemplates combined structures, such as Figure 7 Two parallel three-finger IDT structures 600B(1)-600B(2) of the impedance boosting circuit 700 shown in FIG. 6B are shown in FIG. 6C to reduce the insertion loss caused by the impedance boosting circuit.

[0054] When using a parallel configuration, space can be further saved by sharing the reflector 802 between the parallel three-digit IDT structures 600B(1)-600B(2), as better shown in Figure 8 The end reflectors 804A, 804B can still be present.

[0055] Figures 9A-9C Further illustrations of possible resonator-based ladder filter structures (or other IDT structures, if desired or otherwise) that can be used with the impedance enhancement circuit 800 are provided. These ladder filter structures are provided as examples and are not intended to be limiting. In particular, Figure 9A A band-select filter 900A is shown having the CRF structure 800, an input filter 902, and an output filter 904. The input filter 902 can be formed from two resonators 906A, 906B that mimic an L-shaped LC filter. Likewise, the output filter 904 can be formed from two resonators 908A, 908B that also mimic an L-shaped LC filter. Alternatively, as shown in Figure 9B The input filter 902 or the output filter 904 can be replaced with a pi filter 910. As yet another alternative, the input filter 902 or the output filter 904 can be replaced by a single resonator 912 coupled to ground.

[0056] Figure 10 Additional details are shown when the filter of Figures 9A-9C and the impedance enhancement circuit 800 are implemented into an FDD-based transceiver chain 1000. In particular, a signal received at an antenna 1002 is first filtered by an inductor 1004 (similar to the antenna filter 204) and then provided to a pi-shaped filter 910A. The impedance enhancement circuit 800 then enhances the signal before using an additional filter 912A. As discussed above, an optional rotation circuit 1006 can be present before the LNA 1008. On the transmit chain 1010, the signal is amplified by a power amplifier 1012 before being filtered by a filter 1014 and then passed to the antenna 1002.

[0057] Figures 11-13 Further details are shown regarding a possible active matching LNA. In particular, Figure 11A receive chain 1100 with a band select filter 1102 and LNA 1104 is considered. The LNA 1104 has a first common base active matching amplifier 1106 and a second amplifier 1108 in parallel. The first common base active matching amplifier 1106 uses a resistive digital to analog converter (DAC) 1110 to make the first common base active matching amplifier 1106 look like an inductor, and thus can allow the omission of a matching circuit, which can be an inductor.

[0058] Similarly, Figure 12 The receive chain 1200 also contains a first amplifier 1202 and a second amplifier 1204 in parallel with the LNA 1104. However, here, the first amplifier 1202 is not a common base amplifier, and uses a capacitor DAC 1206 to make the first amplifier 1202 look like an inductor.

[0059] In contrast, Figure 13 The receive chain 1300 adds an inductor to the band select filter 1302, and specifically to the impedance enhancement circuit 1304. This can require a higher linearity LNA 1104, but is otherwise generally similar.

[0060] Exemplary aspects of the present disclosure can also be combined with distortion cancellation circuitry, as Figure 14 shown in FIG. 1400. Specifically, the receive chain 1400 can have an LNA 1402 with a band select filter as a first stage 1404, and a second LNA 1406. Distortion circuitry 1408 can be used with the second LNA 1406, as well as noise cancellation circuitry 1410.

[0061] Figure 15 is a block diagram of a mobile terminal that can contain the impedance enhancement circuit of the present disclosure described herein. Reference is made to Figure 15The power management circuit described above can be implemented in various types of user elements 1500 such as mobile terminals, smart watches, tablet computers, computers, navigation devices, access points, and similar wireless communication devices that support wireless communications such as cellular, wireless local area network (WLAN), Bluetooth, and near field communications. The user element 1500 will typically include a control system 1502, a baseband processor 1504, transmit circuitry 1506, receive circuitry 1508, antenna switch circuitry 1510, a plurality of antennas 1512, and user interface circuitry 1514. In a non-limiting example, the control system 1502 can be a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC), for example. In this regard, the control system 1502 can include at least a microprocessor, embedded memory circuitry, and a communication bus interface. The receive circuitry 1508 receives radio frequency signals from one or more base stations via the antennas 1512 and through the antenna switch circuitry 1510. Low noise amplifiers and filters of the receive circuitry 1508 cooperate to amplify and reject wideband interference from the received signals for processing. Down-conversion and digitization circuitry (not shown) then down-converts the filtered received signals to intermediate or baseband frequency signals, which are then digitized into one or more digital streams using an analog-to-digital converter (ADC).

[0062] The baseband processor 1504 processes the digitized received signals to extract information or data bits transmitted in the received signals. This processing typically includes demodulation, decoding, and error correction operations. The baseband processor 1504 is typically implemented in one or more digital signal processors (DSPs) and ASICs.

[0063] For transmission, the baseband processor 1504 receives digitized data, which can represent voice, data, or control information, from the control system 1502, encodes the digitized data for transmission, and provides the encoded data to the transmit circuitry 1506. A digital-to-analog converter (DAC) within the transmit circuitry 1506 converts the digital encoded data to an analog signal, and a modulator modulates the analog signal onto a carrier signal at one or more desired transmission frequencies. A power amplifier amplifies the modulated carrier signal to a level appropriate for transmission, and delivers the modulated carrier signal to one of the antennas 1512 through the antenna switch circuitry 1510. According to the present disclosure, a power management circuit can work with the power amplifier to assist in providing the high efficiency operation of the power amplifier. Multiple antennas 1512 and duplicated transmit circuitry 1506 and receive circuitry 1508 can provide spatial diversity. Those skilled in the art will understand the modulation and processing details.

[0064] It is also noted that the operational steps described in any of the exemplary aspects herein are described to provide examples and discussion. The operations described can be performed in numerous different sequences other than the illustrated sequences. Furthermore, operations described in a single operational step can actually be performed in a number of different steps. Additionally, one or more operational steps discussed in the exemplary aspects can be combined. It is understood that one of ordinary skill in the art will appreciate that the operational steps illustrated in the flow charts can employ a number of different techniques and methodologies for representing information and steps. For example, data, information, signals, bits, symbols, and chips that can be referenced throughout the above description can be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0065] The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other variations. Thus, the disclosure is not intended to be limited to the examples described herein and the designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein. CLAIM (MODIFIED PURSUANT TO ARTICLE 19 OF THE TREATY) 1. A receiver chain (200) comprising: a low noise amplifier (LNA) (206) comprising an input; and a band select filter (206) coupled to the input, the band select filter comprising a filter (212) and an impedance enhancement circuit (214), the impedance enhancement circuit being distinct from the filter and configured to provide passive impedance enhancement. 2. The receiver chain of claim 1, wherein the LNA comprises a tuned LNA, wherein the tuned LNA comprises a source degeneration inductor (504) to provide passive input matching. 3. The receiver chain of claim 1, wherein the LNA comprises an active matching LNA, wherein the active matching LNA comprises two parallel amplifiers (506, 508). 4. The receiver chain of claim 1, wherein the filter comprises a resonator. 5. The receiver chain of claim 4, wherein the impedance enhancement circuit comprises a coupled resonator filter (CRF) structure. 6. The receiver chain of claim 1, wherein the filter comprises an input filter with respect to the impedance enhancement circuit. 7. The receiver chain of claim 1, wherein the filter comprises an output filter with respect to the impedance enhancement circuit. 8. The receiver chain of claim 5, wherein the CRF structure comprises an input side and an output side, the input side comprising a first plurality of interdigitated fingers, the output side comprising a second plurality of interdigitated fingers. 9. The receiver chain of claim 8, wherein the first plurality of interdigitated fingers comprises more fingers than the second plurality of interdigitated fingers. 10. The receiver chain of claim 9, wherein the first plurality of interdigitated fingers comprises three interdigitated fingers. 11. The receiver chain of claim 4, wherein the CRF comprises: a first input side comprising a first number of interdigitated fingers; a first output side comprising a second number of interdigitated fingers, wherein the second number of interdigitated fingers is less than the first number of interdigitated fingers; and a reflector coupled to a first interdigitated finger of the first number of interdigitated fingers, wherein a difference between the first number of interdigitated fingers and the second number of interdigitated fingers creates a passive impedance enhancement between the first input side and the first output side. 12. The receiver chain of claim 11, wherein the first number of interdigitated fingers is three. 13. The receiver chain of claim 12, wherein the second number of interdigitated fingers is two. 14. The receiver chain of claim 1 integrated into a computing device, the computing device comprising: a transceiver comprising: a baseband processor. 15. A method for controlling a receiver chain, comprising: receiving a signal at an antenna; filtering the signal with a filter; enhancing an impedance in a path of the signal using a coupled resonator filter (CRF) impedance enhancement circuit, wherein the CRF is different from the filter; and providing the signal to an input of a low noise amplifier (LNA).

Claims

1. A receiver chain, comprising: a low noise amplifier (LNA) including an input; and a band select filter coupled to the input, the band select filter including a filter and an impedance enhancement circuit, the impedance enhancement circuit configured to provide a passive impedance enhancement.

2. The receiver chain of claim 1, wherein the LNA includes a tuned LNA.

3. The receiver chain of claim 1, wherein the LNA includes an active matching LNA.

4. The receiver chain of claim 1, wherein the filter includes a resonator.

5. The receiver chain of claim 4, wherein the impedance enhancement circuit includes a coupled resonator filter (CRF) structure.

6. The receiver chain of claim 1, wherein the filter includes an input filter with respect to the impedance enhancement circuit.

7. The receiver chain of claim 1, wherein the filter includes an output filter with respect to the impedance enhancement circuit.

8. The receiver chain of claim 5, wherein the CRF structure includes an input side and an output side, the input side including a first plurality of interdigital fingers, the output side including a second plurality of interdigital fingers.

9. The receiver chain of claim 8, wherein the first plurality of interdigital fingers includes more fingers than the second plurality of interdigital fingers.

10. The receiver chain of claim 9, wherein the first plurality of interdigital fingers includes three interdigital fingers.

11. A coupled resonator filter (CRF) structure, comprising: a first input side including a first number of interdigital fingers; a first output side including a second number of interdigital fingers, wherein the second number of interdigital fingers is less than the first number of interdigital fingers; and a reflector coupled to a first interdigital finger of the first number of interdigital fingers, wherein a difference between the first number of interdigital fingers and the second number of interdigital fingers creates a passive impedance enhancement between the first input side and the first output side.

12. The CRF structure of claim 11, wherein the first number of interdigital fingers is three.

13. The CRF structure of claim 12, wherein the second number of interdigital fingers is two.

14. The CRF structure of claim 11, further comprising a second input side and a second output side with a mismatched interdigital finger between the second input side and the second output side, wherein the reflector is shared.

15. The CRF structure of claim 14, further comprising a second end reflector opposite the shared reflector.

16. The CRF structure of claim 15, further comprising a third end reflector opposite the second end reflector, wherein the shared reflector is positioned between the third end reflector and the second end reflector.

17. The CRF structure of claim 16, further comprising an input filter coupled to the first input side and the second input side.

18. The CRF structure of claim 17, further comprising an output filter coupled to the first output side and the second output side.

19. A computing device, comprising: a transceiver, comprising: a baseband processor; and a receiver chain coupled to the baseband processor, the receiver chain comprising: a low noise amplifier (LNA) comprising an input; and a band select filter coupled to the input, the band select filter comprising a filter and an impedance enhancement circuit, the impedance enhancement circuit configured to provide passive impedance enhancement.

20. A method for controlling a receiver chain, comprising: receiving a signal at an antenna; filtering the signal; enhancing an impedance in a path of the signal using a coupled resonator filter (CRF) impedance enhancement circuit; and providing the signal to an input of a low noise amplifier (LNA).

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