Image compression method, storage medium, electronic device and computer program product

Abstract

The embodiment of the invention provides an image compression method, a storage medium, an electronic device and a computer program product, and the method comprises the steps: converting a to-be-processed image into a plurality of first data trees, carrying out the minimization processing and difference processing of each node in the plurality of first data trees, and obtaining a plurality of second data trees, and performing bit plane coding and XOR processing on each node in the plurality of second data trees to obtain a binary coding matrix, and compressing the binary coding matrix based on run length coding to obtain a binary coding sequence. According to the embodiment of the invention, an image lossless compression scheme which is simple in computational logic and does not need additional storage space is designed, the complexity and resource cost of hardware implementation can be reduced, and the problems that in the related technology, a data lossless compression scheme is high in complexity and consumes a large amount of storage space and hardware resources are solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of image processing, in particular to an image compression method, a storage medium, an electronic device and a computer program product. BACKGROUND

[0002] With the development of Internet communication technology, the data volume of digital images is also increasing, and digital images usually need to be compressed when being transmitted or stored. In order to ensure that the quality of the compressed digital image remains at a high level and the compressed digital image can be correctly restored, lossless data compression is particularly important.

[0003] In the prior art, the lossless data compression method mainly includes the following schemes: (1) a compression scheme based on Huffman Coding, which performs global statistical scanning on the entire file to generate an optimal weight binary tree. This method is sensitive to the starting point, has no error protection function, and has slow compression speed, and the compression effect on small files is not obvious. (2) a compression scheme based on LZW (Lempel-Ziv-Welch) algorithm, which is also called string table compression algorithm. The LZW algorithm generates and maintains a dictionary to compress data redundancy space. This method has large memory occupation and high algorithm complexity. (3) a compression scheme based on arithmetic coding, which encodes the entire input file into a number. The algorithm has high computational complexity and exists channel error diffusion. Therefore, the existing lossless data compression scheme still has the following problems: slow compression speed, processing format limitation, high algorithm complexity, large memory occupation, etc.

[0004] In summary, there is no good solution to the above problems. SUMMARY

[0005] The embodiments of the present application provide an image compression method, a storage medium, an electronic device and a computer program product to at least solve the problem of high complexity of the lossless data compression scheme in the related art, which consumes a large amount of storage space and hardware resources.

[0006] According to an embodiment of the present application, an image compression method is provided, which includes: converting a to-be-processed image into a plurality of first data trees, wherein each node in the first data tree corresponds to a pixel value of the to-be-processed image; performing minimization processing and difference processing on each node in the plurality of first data trees to obtain a plurality of second data trees; performing bit plane coding and XOR processing on each node in the plurality of second data trees to obtain a binary coding matrix; and performing compression on the binary coding matrix based on run-length coding to obtain a binary coding sequence.

[0007] According to a further embodiment of the present application, a computer readable storage medium is also provided, in which a computer program is stored, wherein the computer program, when executed by a processor, performs the steps of any of the method embodiments described above.

[0008] According to a further embodiment of the present application, an electronic device is also provided, comprising a memory in which a computer program is stored, and a processor configured to execute the computer program to perform the steps of any of the method embodiments described above.

[0009] According to a further embodiment of the present application, a computer program product is also provided, comprising a computer program which, when executed by a processor, implements the steps of any of the method embodiments described above.

[0010] In the embodiments of the present application, an image compression method, a storage medium, an electronic device and a computer program product are designed, and the bit plane coding and the run-length coding are used to implement an image lossless compression scheme with simple calculation logic and without additional storage space, so that the complexity and resource cost of hardware implementation can be reduced, and thus the problems of high complexity and large storage space and hardware resource consumption of data lossless compression schemes in the related art are solved. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 is a hardware structure block diagram of the image compression method of the embodiments of the present application;

[0012] Figure 2 is a flow chart of the image compression method according to the embodiments of the present application;

[0013] Figure 3 is a schematic diagram of a first image block in an embodiment of the present application;

[0014] Figure 4 is a schematic diagram of an octree in an embodiment of the present application;

[0015] Figure 5 is a schematic diagram of a second image block in an embodiment of the present application;

[0016] Figure 6 is a schematic diagram of a quadtree in an embodiment of the present application;

[0017] Figure 7 is a schematic diagram of data tree minimization processing in an embodiment of the present application;

[0018] Figure 8 is a schematic diagram of data tree difference processing in an embodiment of the present application;

[0019] Figure 9 is a schematic diagram of quadtree bit plane coding and XOR processing in an embodiment of the present application;

[0020] Figure 10 is the overall flowchart of the image compression method in an embodiment of the present application. DETAILED DESCRIPTION

[0021] Hereinafter, the embodiments of the present application will be described in detail with reference to the accompanying drawings and in conjunction with embodiments.

[0022] It should be noted that the terms "first", "second" and the like in the description and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence.

[0023] The method embodiments provided in the embodiments of the present application can be applied to digital image processing chips, and can also be applied to general chips or processors and the like. The method embodiments provided in the embodiments of the present application can also be executed in mobile terminals, computer terminals or similar computing devices. Taking the case of running on a computer terminal, Figure 1 is a hardware structure block diagram of the image compression method in the embodiments of the present application, as Figure 1 shown, the hardware single board can include one or more (only one in Figure 1 ) processors 12 (the processor 12 can include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device) and a memory 14 for storing data, wherein the above computer terminal can also include a transmission device 16 for communication function and an input and output device 18. Those skilled in the art can understand that Figure 1 the structure shown is only schematic, which does not limit the structure of the above computer terminal. For example, the computer terminal can also include more or fewer components than Figure 1 shown, or have a different configuration from Figure 1 shown.

[0024] The memory 14 can be used to store computer programs, for example, software programs of application software and modules, such as the computer program corresponding to the image compression method in the embodiments of the present application. The processor 12 executes various function applications and the image compression method by running the computer program stored in the memory 14, that is, implements the above method. The memory 14 can include a high-speed random access memory, and can also include a non-volatile memory, such as one or more magnetic storage devices, flash memories, or other non-volatile solid state memories. In some examples, the memory 14 can further include a memory remotely arranged with respect to the processor 12, which can be connected to the computer terminal through a network. Examples of the above network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network and a combination thereof.

[0025] The transmission device 16 is configured to receive or send data via a network. The network can include a wireless network provided by a communication provider. In one example, the transmission device 16 includes a network interface controller (NIC) that can be connected to other network devices through a base station to communicate with the Internet. In one example, the transmission device 16 can be a radio frequency (RF) module configured to communicate with the Internet wirelessly.

[0026] An image compression method is provided in an embodiment of the present application, Figure 2 An image compression method is provided in an embodiment of the present application, Figure 2 The method includes the following steps:

[0027] In step S202, the image to be processed is converted into a plurality of first data trees.

[0028] In step S204, each node in the plurality of first data trees is subjected to a minimization process and a difference process to obtain a plurality of second data trees.

[0029] In step S206, each node in the plurality of second data trees is subjected to a bit-plane encoding process and an XOR process to obtain a binary coding matrix.

[0030] In step S208, the binary coding matrix is compressed based on a run-length encoding process to obtain a binary coding sequence.

[0031] In the embodiment, each node in the first data tree corresponds to a pixel value of the image to be processed. The pixel value range is determined by the image coding bit number. For example, the pixel value range of an 8-bit image coding is 0-255, and the present application is not limited thereto.

[0032] In the embodiment, the pixel values of all pixel points in an image block can be stored in a data tree. Each leaf node at the bottom layer of the data tree corresponds to a pixel point. The image block can be divided into a plurality of sub-image blocks. Correspondingly, the leaf nodes can also be divided into a plurality of groups. Each group of leaf nodes can be used as a group of child nodes to form a sub-tree. The parent node of the sub-tree can be selected from the child nodes. For example, the first child node in each sub-tree can be used as the parent node of the sub-tree, and then the entire data tree is generated from bottom to top. The present application is not limited to the data tree structure and the number of pixels in each image block.

[0033] In an example embodiment, the data tree is an octree with a three-layer structure, and the data tree includes 64 leaf nodes (third layer nodes) in total. Each group of 8 leaf nodes forms a sub-tree as a group of child nodes, and is connected to a parent node (selected from the child nodes). Then, 8 parent nodes (second layer nodes) can be obtained, which can form a new sub-tree as a group of child nodes, and are connected to a parent node (first layer node, which is the root node of the entire data tree).

[0034] In another example embodiment, the data tree is a quadtree with a three-layer structure, and the data tree includes 16 leaf nodes (third layer nodes) in total. Each group of 4 leaf nodes forms a sub-tree as a group of child nodes, and is connected to a parent node (selected from the child nodes). Then, 4 parent nodes (second layer nodes) can be obtained, which can form a new sub-tree as a group of child nodes, and are connected to a parent node (first layer node, which is the root node of the entire data tree).

[0035] In some embodiments, the data tree can also use a combination of minimum trees and bit-width trees instead of the above-mentioned octree or quadtree.

[0036] In the embodiments of the present application, the image lossless compression scheme with simple calculation logic and without additional storage space is realized through the above steps S202 to S208, which can reduce the complexity and resource cost of hardware implementation, thereby solving the problem of high complexity, large storage space and hardware resource consumption of data lossless compression schemes in the related art.

[0037] In the embodiments, the to-be-processed image can be divided into a plurality of image blocks, and each image block is converted into a first data tree. The compression scheme in the present application can operate on the image blocks one by one, without generating a dictionary or a global tree, and the memory consumption is small. In addition, the image blocks are relatively independent, and the starting point is not sensitive, which has a certain error protection function.

[0038] In the embodiments, by combining the difference processing with the XOR operation, the inter-pixel redundancy, repetition and intra-pixel repetition of high bits and low bits can be directly compressed without the aid of pixel bit width and position information to complete the bit width. The overall calculation logic is simple, and no additional cache space is required, thereby achieving the technical effect of reducing the complexity and resource cost of hardware implementation.

[0039] In some embodiments, step S204 can include the following steps:

[0040] Step S2042, in each of the first data trees, updating the corresponding first parent node according to the minimum value of the first child nodes in each first sub-tree from bottom to top, to obtain an updated first sub-tree, wherein each of the first data trees comprises a plurality of first sub-trees, and each of the first sub-trees comprises one first parent node and a plurality of first child nodes;

[0041] Step S2044, in each of the updated first sub-trees, subtracting the pixel value corresponding to the first child node from the pixel value corresponding to the first parent node, and then subtracting the pixel value corresponding to the first parent node from the pixel value corresponding to the node in the upper layer connected to the first parent node, to obtain the difference processing result of the first sub-tree, taking the difference processing result of each first sub-tree as a second sub-tree in the second data tree, and obtaining the second data tree, wherein each of the second data trees comprises a plurality of second sub-trees, and the second sub-trees have the same structure as the first sub-trees.

[0042] In the embodiment, step S2042 is a minimum processing of the first data tree to obtain an updated first data tree (minimum tree), and step S2044 is a difference processing of the minimum tree to obtain a second data tree. In the whole processing process, the data tree structure remains unchanged, and only the pixel values stored on the nodes are updated / adjusted. In the embodiment, through the minimum processing of step S2042 and the difference processing of step S2044, the magnitude of the pixel values stored in the data tree can be compressed, while the image pixel information can be guaranteed not to be lost, and lossless compression can be achieved.

[0043] In the embodiment, each parent node in the minimum tree (i.e., the updated first parent node) is the minimum value in the sub-tree to which the parent node belongs. For example, for an octree with a three-layer structure, through the updating of the first data tree from bottom to top, the eight parent nodes in the second layer can be updated to the minimum pixel value in the updated first sub-tree (each sub-tree corresponds to a sub-image block) to which the parent node belongs, and the root node in the first layer can be updated to the minimum pixel value in the whole data tree (also the whole image block).

[0044] In the embodiment, each second sub-tree in step S2044 can include one second parent node and a plurality of second child nodes. Each second sub-tree is generated by performing difference processing on an updated first sub-tree. It can be understood that the second child node at the bottom layer of the second data tree is the difference between the first child node at the bottom layer of the minimum tree and the node at the upper layer connected to the first child node (i.e., the updated first parent node). For example, for an octree with a three-layer structure, the 64 child nodes at the third layer can be subtracted from the parent nodes (at the second layer) connected to the child nodes, respectively. After the difference processing of the third layer is completed, the 8 parent nodes (also 8 child nodes of the upper sub-tree) at the second layer can be subtracted from the parent nodes (root node at the first layer) connected to the child nodes, respectively. The root node at the first layer, which is also the minimum value of the pixel values in the entire image block, is kept unchanged.

[0045] In some embodiments, step S206 can include the following steps:

[0046] Step S2062, converting the pixel value corresponding to the root node of the second data tree into binary to obtain root node encoding;

[0047] Step S2064, performing bit-plane encoding on the plurality of second child nodes in each second sub-tree from top to bottom to obtain a first encoding matrix, wherein each second data tree includes a plurality of second sub-trees, and each second sub-tree corresponds to a first encoding matrix;

[0048] Step S2066, performing XOR processing on two adjacent encoding rows in the first encoding matrix to obtain a second encoding matrix;

[0049] Step S2068, combining the root node encoding corresponding to the plurality of second data trees and the plurality of second encoding matrices to obtain the binary encoding matrix.

[0050] In the embodiment, the pixel value can be converted into binary encoding with a corresponding number of bits according to the image encoding bits of the image to be processed. For example, if the image to be processed is an 8-bit image encoding, the pixel value of each pixel point can be converted into a corresponding eight-bit binary number.

[0051] In some embodiments, step S2064 can specifically include the following steps: in each second sub-tree, converting the pixel value corresponding to each second child node into binary to obtain the first encoding matrix, wherein each second child node corresponds to an encoding column in the first encoding matrix, and each binary encoding bit of the pixel value corresponds to an encoding row in the first encoding matrix.

[0052] In an exemplary embodiment, if the data tree is an octree, each 8 second child nodes is an encoding unit, and further, if the image to be processed is an 8-bit image encoding, the first encoding matrix can be an 8x8 matrix.

[0053] In some embodiments, step S2066 can specifically include: starting from a second encoding row of the first encoding matrix, calculating an XOR value of a current encoding row and a previous encoding row, and updating the current encoding row with the XOR value.

[0054] In other embodiments, each of the second child nodes can also correspond to an encoding row in the first encoding matrix, and each binary encoding bit of the pixel value can correspond to an encoding column in the first encoding matrix. Similarly, when performing XOR processing, it can also start from a second encoding column of the encoding matrix, calculate an XOR value of a current encoding column and a previous encoding column, and update the current encoding column with the XOR value. The arrangement of the encoding matrix and the direction of the XOR processing can be adjusted as needed, which is not limited by the present application.

[0055] In some embodiments, step S208 can specifically include: according to a preset encoding rule, compressing an encoding row in the binary encoding matrix that is all 0 or all 1 into a preset flag bit to obtain the binary encoding sequence.

[0056] In some embodiments, the preset encoding rule includes at least one of the following:

[0057] In the case that the current encoding row is all 0 and the adjacent encoding row is not 0, the current encoding row is converted into a first flag bit;

[0058] In the case that the current encoding row is all 0 and one or more consecutive adjacent encoding rows are 0, the current encoding row and one or more consecutive adjacent encoding rows are converted into a second flag bit, wherein a part of the second flag bit is a fixed value, and another part is used to indicate the number of consecutive 0 adjacent encoding rows;

[0059] In the case that the current encoding row is all 1, the current encoding row is converted into a third flag bit;

[0060] In the case that the current encoding row is not 0 but 0 before XOR processing, the current encoding row is converted into a fourth flag bit;

[0061] In the case that the current encoding row does not need to be compressed, a fifth flag bit is added before the current encoding row.

[0062] Table 1 is an example of the run-length coding rule in the present application. As shown in Table 1, the first flag bit can be 01, the fixed value in the second flag bit can be 001, the third flag bit can be 0001, the fourth flag bit can be 11, and the fifth flag bit can be 10.

[0063] Table 1:

[0064] Encoding row pattern Encoding All 0s and adjacent rows not 0 01 All 0s and adjacent rows 0 001 + number of adjacent rows of all 0s (bit width m) All 1s 0001 Current not 0 but 0 before XOR processing 11 No compression 10 + encoding of this row

[0065] In the present embodiment, m in Table 1 is determined by log2bitwith, where bitwith represents the bit width of the compressed data. For example, when the image coding bit width of the image to be processed is 8 bits, m = 3, but the present application is not limited thereto.

[0066] In other embodiments, step S208 can also be listed as unit compression coding. For example, step S208 can further include: according to a preset second coding rule, compressing the coding column in the binary coding matrix that is all 0 or all 1 into a preset flag bit to obtain the binary coding sequence, where the second coding rule can be achieved by replacing the coding row in the above-mentioned preset coding rule with a coding column, which will not be described herein again.

[0067] In the present embodiment, the coding principle of the run-length coding is to replace a continuous string of the same value with a representative value and a string length. For example, when the bit width of the compressed data is 8, m is 3, and in the case that the current coding row is all 0 and has three adjacent coding rows of 0, the four coding rows can be represented as 001011, and the data of the four coding rows is compressed into 6 bits, greatly improving the data compression rate and without any information loss in the compression process.

[0068] In some embodiments, step S202 can include the following steps:

[0069] Step S2022, dividing the image to be processed into a plurality of first image blocks;

[0070] Step S2024, determining the discrete degree of the pixel values of the first image blocks;

[0071] Step S2026, in the case that the discrete degree is less than a preset threshold, determining the data tree corresponding to the first image blocks as the first data tree;

[0072] Step S2028, in the case that the discrete degree is greater than or equal to the preset threshold, dividing each of the first image blocks into a plurality of second image blocks, and determining the data tree corresponding to the second image blocks as the first data tree.

[0073] In the embodiment, through the steps S2022 to S2028, flexible image block division can be performed based on the dispersion degree of the local pixels of the image to be processed, and the similarity and locality of the adjacent pixels can be fully utilized for image compression.

[0074] In some embodiments, in step S2022, a complete first image block can not be obtained at the image edge position, and in this case, the first image block can be filled based on the pixel value of the image edge to be supplemented.

[0075] In some embodiments, the first data tree includes an octree or a quadtree, wherein the octree corresponds to the first image block, and the quadtree corresponds to the second image block.

[0076] In an exemplary embodiment, the octree can be a three-layer structure, and each octree can store 64 pixel values, and correspondingly, the first image block includes 64 pixel points. The first image block can be an 8x8 image block or a 4x16 image block, and the shape and number of pixel points of the first image block are not limited in the present application, and the image block division is more flexible.

[0077] In an exemplary embodiment, the quadtree can be a three-layer structure, and each quadtree can store 16 pixel values, and correspondingly, the first image block includes 16 pixel points. The second image block can be a 4x4 image block or a 2x8 image block, and the shape and number of pixel points of the second image block are not limited in the present application, and the image block division is more flexible.

[0078] The number of layers of the data tree is not limited in the present application, but the more complex the data tree structure is, the higher the coding complexity will be, and the flexibility of image block division will also decrease. Therefore, in the embodiments of the present application, a three-layer data tree is usually used as the smallest compression coding structure.

[0079] In the embodiment, the dispersion degree in step S2024 can be used to indicate whether the pixel distribution in the image block is uniform or the surface of the image is smooth. The smaller the dispersion degree of the pixel value is, the more uniform the pixel distribution is, and the smoother the surface is. The preset threshold of the dispersion degree can be set according to the actual situation.

[0080] In some embodiments, step S2024 can include the following steps:

[0081] Step S2024-2, the pixel values of each pixel point in the first image block are divided into 8 groups according to the pixel point distribution;

[0082] Step S2024-4, the maximum value and the minimum value of each group of pixel values are determined respectively;

[0083] Step S2024-6, determining the dispersion degree according to the following manner:

[0084] T = max i≠j (|Vmax i -Vmax j |,|Vmin i -Vmin j |),wherein T is the dispersion degree, Vmax i and Vmax j are the maximum values of any one group of pixel values, Vmin i and Vmin j are the minimum values of any one group of pixel values, and i and j are any integers from 1 to 8.

[0085] The dispersion degree evaluation in the above step S2024-6 is based on the range, but the present application is not limited thereto. Other dispersion degree evaluation methods such as variance and quartile difference can also be used, and the preset threshold of the dispersion degree can also be adjusted as needed, which is not limited by the present application.

[0086] By the embodiments of the present application, an image lossless compression scheme with simple calculation logic and without additional storage space is implemented, which can reduce the complexity and resource cost of hardware implementation, and thus solves the problem of high complexity and large storage space and hardware resource consumption of data lossless compression schemes in the related art. The image lossless compression scheme in the embodiments of the present application can also perform flexible image block segmentation based on the dispersion degree of local pixels of a to-be-processed image, and thus can fully utilize the similarity and locality of adjacent pixels for image compression.

[0087] Figure 3 is a schematic diagram of a first image block in an embodiment of the present application, as shown in Figure 3 , each grid represents a pixel point, and the coordinates in the grid are the position of the pixel point in the image block.

[0088] In the present embodiment, the image height H of the first image block is 16, the image width W is 4, and the size is 4x16. The pixel points in the first image block are 64 pixel points from (0, 0) to (3, 15), and all the pixel points of the first image block are not shown in the figure.

[0089] In the present embodiment, the to-be-processed image can be divided into a plurality of first image blocks, and the first image blocks with incomplete image edge positions can be filled in the missing positions based on the pixel values of the image edges to be supplemented.

[0090] Figure 4 is a schematic diagram of an octree in an embodiment of the present application, as shown in Figure 4As shown, each node in the octree corresponds to a pixel point. For ease of understanding, Figure 4 Each node in the octree is represented by the coordinate position of a pixel point in the first image block, and each node actually stores the pixel value of the pixel point at the coordinate position.

[0091] In this embodiment, the first image block is divided into 8 2x4 sub-image blocks, and each sub-image block corresponds to 8 sub-nodes in a sub-tree in the octree. For example, the 8 pixel points from (0, 0) to (1, 3) are divided into a group, and each pixel point is a sub-node in the sub-tree. The first pixel point (0, 0) is the parent node of the sub-tree, which forms a sub-tree. Other pixel points are also divided in the same way and converted into a corresponding sub-tree, and 8 sub-trees at the bottom of the octree are obtained. The parent nodes of the 8 sub-trees can be used as 8 sub-nodes of the upper sub-tree, and the first sub-node (0, 0) is selected as the parent node, which is also the root node of the entire octree.

[0092] The shape of the first image block and the division method of the first image block are not limited in this application. For example, the first image block can be 8x8, 16x4, etc., and the sub-image block can be 4x2, 1x8 or 8x1.

[0093] Figure 5 is a schematic diagram of a second image block in an embodiment of the present application, as Figure 5 Each cell represents a pixel point, and the coordinates in the cell represent the position of the pixel point in the image block.

[0094] In this embodiment, the image height H of the second image block is 4, the image width W is 4, and the size is 4x4. The pixel points in the second image block are 16 pixel points from (0, 0) to (3, 3).

[0095] In this embodiment, the second image block is further divided from the first image block, and each first image block can be divided into multiple second image blocks.

[0096] In some embodiments, the second image block can also be directly divided from the image to be processed. The second image block with incomplete edge position can be filled in the missing position based on the pixel value of the image edge to complete the filling.

[0097] In this embodiment, a 4x16 first image block can be divided into 4 4x4 second image blocks. Taking the first image block with pixel positions from (0, 0) to (3, 15) as an example, the pixel positions of the second image blocks include: (0, 0) to (3, 3), (0, 4) to (3, 7), (0, 8) to (3, 11), and (0, 12) to (3, 15).

[0098] Figure 6 is a schematic diagram of a quadtree in an embodiment of the present application, as Figure 6 indicated, each node in the quadtree corresponds to a pixel point. For the convenience of understanding, Figure 6 each node in the quadtree is represented by the coordinate position of the pixel point in the second image block, and each node actually stores the pixel value of the pixel point at the coordinate position.

[0099] In the embodiment, the second image block is divided into four 2x2 sub-image blocks, and each sub-image block corresponds to four sub-nodes in a sub-tree in the quadtree. For example, the four pixel points from (0, 0) to (1, 1) are divided into a group, and each pixel point is a sub-node in the sub-tree. The first pixel point (0, 0) in the group is the parent node of the sub-tree, and a sub-tree is formed. Other pixel points are divided and converted into a corresponding sub-tree in the same way, and four sub-trees at the bottom of the quadtree are obtained. The parent nodes of the four sub-trees can be four sub-nodes of an upper sub-tree, and the first sub-node (0, 0) is selected as the parent node and also as the root node of the entire quadtree.

[0100] The present application does not limit the shape of the second image block and the division method of the second image block. For example, the second image block can be 2x8, 8x2, etc., and the sub-image block can be 1x4, 4x1, etc.

[0101] Figure 7 is a schematic diagram of data tree minimization processing in an embodiment of the present application. As Figure 7 indicated, the quadtree is taken as an example for illustration. Data tree A is a data tree before minimization processing, and data tree B is a data tree (minimum tree) after minimization processing.

[0102] In the embodiment, in data tree A, the parent node of each sub-tree is usually set according to the pixel point position, and is irrelevant to the pixel value of the pixel point. In data tree B, the parent node of each sub-tree is the minimum pixel value of each pixel point in the sub-tree, and the root node of data tree B is the minimum pixel value in the entire data tree B.

[0103] In the embodiment, the minimization processing flow of the data tree can include: in data tree A, from bottom to top, the minimum value of each sub-node in each sub-tree is taken as the parent node of the sub-tree. For example, the four sub-nodes in sub-tree a1 are 5, 2, 4, and 3, and the minimum value is 2. Therefore, the parent node of sub-tree a1 is updated to 2 to obtain sub-tree b1. Starting from the bottom layer of data tree A, after the parent nodes of the multiple sub-trees in the bottom layer are all updated, the minimum value 1 is determined as the parent node (root node) from the four sub-nodes 2, 4, 1, and 8 in the upper sub-tree, and the minimization processing of the entire data tree is completed.

[0104] The number of layers of the data tree is not limited in the present application. It can be understood that when the number of layers of the data tree is greater than 3, the parent nodes of each sub-tree in the entire data tree can also be updated from bottom to top according to the minimization processing method in the embodiment of the present application to obtain a minimum tree.

[0105] Figure 8 FIG. 1 is a schematic diagram of data tree difference processing in an embodiment of the present application. As shown in FIG. 1, taking a quadtree as an example, data tree B is a data tree after minimization processing (minimum tree), and data tree C is a data tree after difference processing. Figure 8

[0106] In the embodiment, in the data tree B, the parent node of each sub-tree is the minimum pixel value of each pixel point in the sub-tree. The difference processing is to subtract the value of each child node from the value of the parent node, and subtract the value of the parent node from the value of the node at the previous level (such as the root node), so that the data tree can be compressed in the quantity value, the information can be ensured not to be lost, and lossless compression can be achieved.

[0107] In the embodiment, the difference processing flow of the data tree can include: in each sub-tree in the data tree B, subtracting the value of each child node from the value of the parent node, and then subtracting the value of the parent node from the value of the node at the previous level (such as the root node) to obtain the difference processing result of the sub-tree, and taking the difference processing result of each sub-tree as a sub-tree in the data tree C to obtain the data tree C. For example, in the sub-tree b1, the values of the child nodes are 5, 2, 4, and 3 respectively, which are subtracted from the value of the parent node 2 to obtain the child nodes 3, 0, 2, and 1 of the sub-tree c1, and then the value of the parent node 2 is subtracted from the value of the node at the previous level 1 to obtain the parent node 1 of the sub-tree c1. The difference processing flows of other sub-trees are basically the same, and the difference processing of the entire data tree B is completed from bottom to top.

[0108] Figure 9 FIG. 2 is a schematic diagram of quadtree bit plane encoding and XOR processing in an embodiment of the present application. As shown in FIG. 2, taking a quadtree and 8-bit encoding as an example, the bit plane encoding is to convert the pixel value corresponding to each node into an 8-bit binary number. Figure 9

[0109] In the embodiment, the bit plane encoding of the entire data tree is performed from top to bottom. The root node is first converted into an 8-bit binary number to obtain the root node encoding. Then, the four child nodes of the second layer connected to the root node are encoded to obtain a first encoding matrix. For example, the four child nodes of the second layer are 0, 0, 1, and 3, and the corresponding bit plane encodings of 0, 1, and 3 are 00000000, 10000000 (the bits are arranged from low to high), and 11000000 (the bits are arranged from low to high), respectively. Thus, an 8-row 4-column matrix can be formed, each encoding column corresponds to a child node, and each encoding row corresponds to a bit in the encoding.​​

[0110] In the embodiment, the third layer node in the quadtree is processed in the same way as the second layer node, that is, a plurality of child nodes in the same sub-tree are taken as a group, and the bit plane coding is sequentially performed until the pixel information of the entire data tree is converted into the binary coding matrix.

[0111] In the embodiment, the first coding matrix corresponding to other nodes except the root node also needs to be processed by XOR, the first row (0011) in the first coding matrix remains unchanged, and the XOR operation is sequentially performed on the second row (0001) and the previous row, 0 for same and 1 for different, to obtain the XOR operation result (0010) of the first and second rows and the XOR operation result (0001) of the second and third rows, and other results are (0000), and further the XOR processing result of the entire first coding matrix, that is, the second coding matrix, is obtained. The second coding matrix is also an 8-row and 4-column matrix.

[0112] In other embodiments, the bit plane coding and XOR processing procedures of the octree and the quadtree are basically the same. Each sub-tree in the octree has 8 child nodes, and taking 8-bit coding as an example, the first and second coding matrices are 8-row and 8-column matrices, wherein each coding column in the first coding matrix corresponds to a child node, and each coding row corresponds to one bit in the coding.

[0113] Figure 10 is the overall flowchart of the image compression method in an embodiment of the present application. As shown in Figure 10 , the flowchart includes the following steps:

[0114] Step S0, inputting an image;

[0115] Step S1, dividing the image into 8x8 image blocks to generate an octree;

[0116] Step S2, measuring the discrete degree of the image block;

[0117] Step S3, judging whether the image block is discrete;

[0118] Step S4, if the image block is discrete, dividing the 8x8 image block into 4 4x4 small image blocks;

[0119] Step S5, generating a quadtree;

[0120] Step S6, performing difference coding (i.e., minimization processing and difference processing) on the generated data tree;

[0121] Step S7, bit plane coding;

[0122] Step S8, XOR processing;

[0123] Step S9, compression coding.

[0124] In the embodiment, step S1 first divides the image file, traverses the image from left to right and from top to bottom, and divides the image into a plurality of image blocks, each of which has a size of 8x8. If a complete 8x8 image block cannot be obtained due to an image edge, the edge pixel value is filled to complete the image block. The image block can also be divided into 4x16, and the present application does not limit this.

[0125] In the embodiment, step S2 can measure the dispersion degree of the image block. Step S2 can calculate the dispersion degree of the image block or the dispersion degree of the octree. For the octree, it can be understood that the maximum value Vmax i (i=1,…,8) and the minimum value Vmin i (i=1,…,8) of the 8 leaf nodes connected by each of the 8 nodes of the second layer of the octree are calculated, the maximum values corresponding to the 8 nodes of the second layer are pairwise subtracted to obtain a maximum difference value, the minimum values corresponding to the 8 nodes of the second layer are also pairwise subtracted to obtain another maximum difference value, and the maximum value of the two difference values is taken as the dispersion degree T. However, the present application is not limited thereto, and the dispersion degree can also be measured by variance or other ways.

[0126] In the embodiment, the calculation formula of the dispersion degree T can be represented as:

[0127] T=max i≠j (|Vmax i -Vmax j |,|Vmin i -Vmin j |), wherein T is the dispersion degree, the image block is divided into 8 groups, Vmax i and Vmax j are the maximum values of the pixel values of any one group, Vmin i and Vmin j are the minimum values of the pixel values of any one group, and i and j are any integers in 1 to 8.

[0128] In the embodiment, the octree can also not be generated in step S1, and the image block is converted into an octree after it is determined in step S3 that the image block is not dispersed.

[0129] In the embodiment, step S3 can flexibly adjust the size of the image block according to the discrete degree of the image block. If the discrete degree T is large, step S4 and step S5 are executed to continue to split the image block (for example, to split the octree into four quadtrees). If the discrete degree T is small, the splitting is not continued. The discrete degree has a threshold parameter that can be adjusted. When T is smaller than the threshold parameter, the octree is used as a processing unit for compression. When T is larger than or equal to the threshold parameter, it is indicated that the discrete degree of the image block is large, and the pixels are not flat. Therefore, the image block needs to be further divided into small image blocks, and the quadtree is used as a processing unit for compression.

[0130] In the embodiment, the difference value encoding in step S6 includes two parts of the minimization processing and the difference value processing. The entire data tree is updated from bottom to top. For details, refer to the minimization processing flow and the difference value processing flow in the above embodiment, which are not repeated here.

[0131] In the embodiment, the bit plane encoding in step S7 is performed from top to bottom. The root node can directly record the binary code. The bit plane encoding can also be performed on the nodes at the same level in a hierarchical manner. The bit plane encoding can also be performed on a plurality of child nodes in each sub-tree to generate a corresponding bit plane encoding matrix. For details, refer to the bit plane encoding flow in the above embodiment, which is not repeated here.

[0132] In the embodiment, step S8 is an exclusive OR operation on the bit plane encoding matrix. The first row of code is unchanged. The exclusive OR operation is performed on the codes of adjacent two rows from the second row. The same is 0, and the different is 1. A binary code matrix is obtained. This step can not only compress the amount of data stored in the data tree, but also save the information without loss. In the image restoration, the complete bit plane encoding matrix can be restored according to the binary code matrix, so that the lossless compression and restoration of the image are realized. For details, refer to the exclusive OR operation flow in the above embodiment, which is not repeated here.

[0133] In the embodiment, step S9 is to compress and encode the code matrix after the exclusive OR operation in step S8 based on the run-length encoding. The main compression principle is to replace a continuous string of the same value with a representative value and a string length. A code row full of 0 or 1 in the binary code matrix can be compressed into a preset flag bit to obtain a binary code sequence. For details of the run-length encoding rule, refer to the example in Table 1 in the above embodiment, which is not repeated here. This step greatly compresses the number of information bits, and the compression logic is simple and does not require additional cache space.

[0134] In the embodiments of the present application, based on the steps S1 to S9, the image lossless compression scheme with simple calculation logic and without additional storage space is realized, which can reduce the complexity and resource cost of hardware implementation, thereby solving the problems of high complexity and large storage space and hardware resource consumption of data lossless compression schemes in the related art.

[0135] The image lossless compression scheme in the embodiments of the present application also has the following technical effects:

[0136] 1. Flexible segmentation of image blocks is realized, and the similarity and locality of adjacent pixels are fully utilized for compression.

[0137] 2. The operation can be performed on image blocks one by one, without generating a dictionary or a global tree, and the memory consumption is small. The blocks are relatively independent of each other, and are not sensitive to the starting point, and have a certain error protection function.

[0138] 3. The difference coding and XOR operation are combined to directly compress the redundancy, repetition between pixels, and repetition of high bits and low bits within pixels, without the need for pixel bit width and position information to complete the bit width. The overall calculation logic is simple, and no additional cache space is required.

[0139] 4. The hardware implementation resource consumption is small, and the compression and encoding part only needs a register smaller than 300 bits and a simple RLE encoder and bit plane encoder to realize.

[0140] The embodiments of the present application also provide a computer readable storage medium, which stores a computer program, wherein the computer program is run by a processor to perform the steps in any of the method embodiments.

[0141] In an example embodiment, the computer readable storage medium can include, but is not limited to, a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0142] The embodiments of the present application also provide an electronic device, which includes a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the method embodiments.

[0143] In an example embodiment, the electronic device can also include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0144] The embodiments of the present application further provide a computer program product comprising a computer program which, when executed by a processor, implements the steps in any of the method embodiments described above.

[0145] The specific examples in the embodiments can refer to the examples described in the above embodiments and exemplary embodiments, which will not be repeated here.

[0146] Obviously, those skilled in the art should understand that the modules or steps of the present application described above can be realized by general computing devices, which can be concentrated on a single computing device or distributed on a network composed of multiple computing devices, which can be realized by program codes executable by the computing devices, so that they can be stored in storage devices and executed by the computing devices, and in some cases, the steps shown or described can be executed in different order, or they can be manufactured into individual integrated circuit modules, or multiple modules or steps can be manufactured into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.

[0147] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. Those skilled in the art can make various modifications and changes to the present application. Any modification, equivalent replacement, improvement, etc. within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. An image compression method, characterized in that, The method includes: The image to be processed is converted into multiple first data trees, wherein each node in the first data tree corresponds to a pixel value of the image to be processed; Minimization and interpolation are performed on each node in the plurality of first data trees to obtain a plurality of second data trees; Bit-plane encoding and XOR processing are performed on each node in the plurality of second data trees to obtain a binary encoding matrix; The binary encoding matrix is ​​compressed based on run-length encoding to obtain a binary encoding sequence.

2. The method according to claim 1, characterized in that, Minimization and interpolation processes are performed on each node in the plurality of first data trees to obtain a plurality of second data trees, including: In each of the first data trees, the corresponding first parent node is updated from bottom to top based on the minimum value of the multiple first child nodes in each first subtree to obtain the updated first subtree. Each of the first data trees contains multiple first subtrees, and each first subtree contains a first parent node and multiple first child nodes. In each of the updated first subtrees from bottom to top, the pixel values ​​corresponding to the multiple first child nodes are subtracted from the pixel values ​​corresponding to the updated first parent node, and then the pixel values ​​corresponding to the updated first parent node are subtracted from the pixel values ​​corresponding to the parent node connected to it, to obtain the difference processing result of the first subtree. The difference processing result of each first subtree is used as a second subtree in the second data tree to obtain the second data tree. Each second data tree contains multiple second subtrees, and the second subtrees have the same structure as the first subtrees.

3. The method according to claim 1, characterized in that, Bit-plane encoding and XOR processing are performed on each node in the plurality of second data trees to obtain a binary encoding matrix, including: The pixel value corresponding to the root node of the second data tree is converted into binary to obtain the root node code; In each of the second data trees, bit-plane encoding is performed on multiple second child nodes in each second subtree from top to bottom to obtain a first encoding matrix, wherein each second subtree corresponds to one first encoding matrix; The second encoding matrix is ​​obtained by performing an XOR operation on two adjacent encoding rows in the first encoding matrix. The binary encoding matrix is ​​obtained by combining the root node encoding corresponding to the plurality of second data trees and the plurality of second encoding matrices.

4. The method according to claim 3, characterized in that, In each of the second data trees, bit-plane encoding is performed on multiple second child nodes in each second subtree from top to bottom to obtain a first encoding matrix, including: In each of the second subtrees, the pixel values ​​corresponding to the plurality of second child nodes are converted into binary to obtain the first encoding matrix, wherein each second child node corresponds to an encoding column in the first encoding matrix, and each binary encoding bit of the pixel value corresponds to an encoding row in the first encoding matrix.

5. The method according to claim 3, characterized in that, XORing two adjacent rows in the first encoding matrix yields the second encoding matrix, which includes: Starting from the second encoding row of the first encoding matrix, calculate the XOR value between the current encoding row and the previous encoding row, and update the current encoding row with the XOR value.

6. The method according to claim 1, characterized in that, The binary encoding matrix is ​​compressed based on run-length encoding to obtain a binary encoding sequence, including: According to the preset encoding rules, the encoding rows in the binary encoding matrix that are all 0 or all 1 are compressed into preset flag bits to obtain the binary encoding sequence.

7. The method according to claim 6, characterized in that, The preset encoding rules include at least one of the following: If the current encoding line is all 0 and the adjacent encoding lines are not 0, convert the current encoding line to the first flag bit; When the current encoding line is all 0 and one or more consecutive adjacent encoding lines are 0, the current encoding line and one or more consecutive adjacent encoding lines are converted into a second flag bit, wherein a part of the second flag bit is a fixed value and the other part is used to indicate the number of consecutive adjacent encoding lines that are 0; If the current encoding line is all 1s, convert the current encoding line to the third flag bit; If the current encoded line is not 0, but is 0 before XOR processing, the current encoded line is converted to the fourth flag bit; If the current encoded line does not need to be compressed, add a fifth flag bit before the current encoded line.

8. The method according to claim 1, characterized in that, The image to be processed is converted into multiple first data trees, including: The image to be processed is divided into multiple first image blocks; Determine the degree of dispersion of the pixel values ​​of the first image block; If the degree of dispersion is less than a preset threshold, the data tree corresponding to the first image block is determined as the first data tree; When the degree of dispersion is greater than or equal to the preset threshold, each first image block is divided into multiple second image blocks, and the data tree corresponding to the second image block is determined as the first data tree.

9. The method according to claim 8, characterized in that, The first data tree includes an octree or a quadtree, wherein the octree corresponds to the first image block and the quadtree corresponds to the second image block.

10. The method of claim 8, wherein determining the discreteness of the pixel values ​​of the first image block comprises: Based on the pixel distribution, the pixel values ​​of each pixel in the first image block are divided into 8 groups; Determine the maximum and minimum values ​​for each group of pixel values; The degree of dispersion is determined according to the following method: T = max i≠j (|Vmax i -Vmax j |,|Vmin i -Vmin j |), where T is the degree of dispersion, and Vmax i and Vmax j Vmin is the maximum value of any set of pixel values. i and Vmin j Let i be the minimum value of any set of pixel values, and j be any integer from 1 to 8.

11. A computer-readable storage medium, characterized in that, The storage medium stores a computer program, wherein the computer program is executed by a processor to perform the method described in any one of claims 1 to 10.

12. An electronic device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to perform the method as described in any one of claims 1 to 10.

13. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method described in any one of claims 1 to 10.

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