Logical analyzer trigger point accurate backtracking control method based on hot area scoring and boundary learning

Abstract

The invention provides a logic analyzer trigger point accurate backtracking control method based on hotspot scoring and boundary learning, and the method comprises the steps: carrying out the popularity scoring according to the ratio of the number of channel compression units in each message segment to the length of an occupied byte, and screening out a hotspot candidate set; analyzing the structure of the hot area message segment and decoding, and realizing time alignment of a multi-channel sampling sequence in combination with the position offset adjusting quantity to form a synchronous sampling matrix; calculating local change intensity based on the matrix, introducing an inter-channel jump consistency constraint to construct a jump probability score, and accurately positioning a trigger point time index and a message segment where the trigger point time index is located; and finally, mapping a logic time position into a physical storage address in combination with a compression structure non-balance compensation parameter, so as to realize efficient reverse reading. According to the method, a mark or an additional address table does not need to be inserted, and high-precision backtracking control of the trigger point can be realized under the conditions of high compression ratio and multiple channels.

Description

Technical Field

[0001] This invention belongs to the field of data processing, and in particular relates to a precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning. Background Technology

[0002] Logic analyzers are key instruments in digital system testing and debugging. Their core function is to perform high-speed sampling, compressed storage, and trigger analysis of multi-channel digital signals. With the increasing complexity and sampling accuracy of embedded systems, logic analyzers have revealed two major bottlenecks under long-term high-sampling-rate observation conditions: First, there is a contradiction between storage depth and data volume; the higher the sampling rate, the larger the data becomes, necessitating compression mechanisms to reduce storage pressure. Second, misalignment occurs between the compressed data structure and the original waveform timing, meaning trigger points no longer have directly mappable address locations within the compressed space. Existing compression methods typically rely on counting compression or differential compression, which effectively reduces redundancy but disrupts the linear continuity of the sampling time axis. Especially in multi-channel sampling environments, different compression rates across channels cause inconsistent data lengths and boundary misalignments in storage. This heterogeneous structure is even more pronounced in DDR3 packet storage, where packets are packaged in fixed 256-byte units, with nested channel data of varying lengths, making it difficult to directly trace the packet segment containing the trigger point using address indexing. Traditional solutions often rely on adding trigger markers, storing physical addresses, or inserting timestamps to aid identification. However, these methods are costly and incompatible with logic analyzer systems limited by hardware resources, and cannot adapt to changes in the number of channels or adjustments to the compression algorithm. Furthermore, since trigger points are often located in areas of signal abrupt change, ensuring the contextual integrity of the trigger event requires reading back a period of sampled data from that point. Current technology cannot efficiently and accurately determine the start position of this backward read without decompressing all data. Therefore, how to accurately locate the trigger point in compressed and stored data while maintaining the compression mechanism and existing message structure, and how to achieve resource-friendly backward read control, has become a key challenge in the development of logic analyzer technology. Summary of the Invention

[0003] The purpose of this invention is to design a precise backtracking control method for trigger points of logic analyzers based on hot zone scoring and boundary learning, which can achieve real-time and reproducible trigger backtracking control in logic analysis scenarios with high compression ratio, multiple channels, and high sampling rate.

[0004] To achieve the above objectives, this invention provides a precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning, the method comprising:

[0005] A heat score is performed on the message segments of compressed and stored multi-channel digital signals. The heat score of each message segment is determined based on the ratio of the number of compression units of each channel in the message segment to the length of bytes occupied by the corresponding channel in the message segment.

[0006] Select the message segments with the highest heat score according to a preset ratio to form a candidate set of hot zones;

[0007] For each message segment in the hot zone candidate set, the message header is parsed to obtain the location of the compressed data of each channel, the compressed data of each channel is decoded to generate a sampling sequence, and a position offset adjustment is introduced according to the number of compression units of each channel and the maximum decoding length to align the sampling sequences of each channel to a unified time base and form a multi-channel synchronous sampling matrix.

[0008] The intensity of local change at each time point is calculated based on the multi-channel synchronous sampling matrix, and a jump probability score is constructed by combining the jump consistency constraint between channels. The time point with the highest jump probability score is identified as the trigger point time index, and the segment number of the trigger point is determined.

[0009] The physical storage address corresponding to the trigger point is estimated based on the trigger point time index, the segment number, the starting physical address of the segment, the total sampling length after decoding, and the compression structure imbalance compensation parameters.

[0010] The data is read backwards from the physical storage address until the preset number of readback sampling points is met.

[0011] Furthermore, the compressed data adopts a counting compression method, which encodes consecutive sampled values ​​with the same value into a compression unit composed of the value and the number of repetitions.

[0012] Furthermore, the message segment is a fixed-length data block, including a message header, compressed data segments for each channel, and a message trailer. The message header records the number of channels and the data length of each channel.

[0013] Furthermore, the popularity score is obtained by weighted summation of the compression unit densities of each channel, with the weighting coefficients either equally distributed or configured by the host computer.

[0014] Furthermore, the step of aligning the sampling sequences of each channel to a unified time reference includes: using a right-side zero-padding method to unify the length of each channel, and applying the position offset adjustment amount to each channel sampling sequence to compensate for timing misalignment.

[0015] Furthermore, the intensity of the local change is calculated by averaging the absolute values ​​of the changes in the sampled values ​​within the sliding time window.

[0016] Furthermore, the jump probability score includes a channel coordination constraint term, which is used to suppress jump responses with opposite directions or uncorrelated amplitudes from different channels at the same time point.

[0017] Furthermore, the trigger point time index is offset and corrected based on the position of the maximum value of the jump probability score, according to the score gradient, towards the rising edge of the waveform.

[0018] Furthermore, the compression structure imbalance compensation parameter is determined based on the ratio of the standard deviation to the average value of the number of compression units in each channel within the segment.

[0019] Furthermore, the step of reading back the data includes: reading sequentially in units of message segments, decoding and accumulating the number of valid sampling points for each channel after reading each message segment, stopping the back reading when all channels have reached the preset number of back reading sampling points, and uploading the decoded waveform data and the relative offset position of the trigger point.

[0020] The beneficial technical effects of the present invention are at least as follows:

[0021] To address the aforementioned issues, this invention provides a precise backtracking control method for logic analyzer trigger points based on hotspot scoring and boundary learning. By using a hotspot scoring model based on compressed block density, the method quickly filters out the message segments most likely containing trigger points without decompressing the data, forming a set of segments prioritized for backtracking. Subsequently, the compressed structure within the selected segments is parsed, and a structure-aware decoding alignment algorithm is used to recover the multi-channel synchronous sampling matrix. A position offset regularization term is introduced to compensate for timing misalignments caused by differences in channel compression ratios. Based on this, a jump probability evaluation model is constructed using cross-channel consistency constraints to perform jump boundary learning on the multi-channel decoded sequences, accurately identifying the trigger point time index. Finally, an offset mapping model based on compressed distribution characteristics converts the logical time position into a DDR3 physical storage address, achieving unmarked precise backtracking control. The entire method achieves the mapping of trigger points to physical space solely by relying on the statistical characteristics of the compressed structure without adding any physical flag bits or additional address tables. This effectively reduces hardware resource consumption and system latency, and solves the problems of trigger point drift, multi-channel alignment difficulties, and low reverse reading efficiency in existing technologies. It can achieve real-time and reproducible trigger backtracking control in logic analysis scenarios with high compression ratios, multiple channels, and high sampling rates. Attached Figure Description

[0022] The present invention will be further described with reference to the accompanying drawings, but the embodiments in the drawings do not constitute any limitation on the present invention. For those skilled in the art, other drawings can be obtained based on the following drawings without creative effort.

[0023] Figure 1This is a flowchart of the precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning, as described in this invention. Detailed Implementation

[0024] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0025] In one or more embodiments, such as Figure 1 As shown, a precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning is disclosed. The method includes the following:

[0026] S1: Perform a heat score on the message segments of the compressed and stored multi-channel digital signal. The heat score of each message segment is determined based on the ratio of the number of compression units of each channel in the message segment to the length of bytes occupied by the corresponding channel in the message segment. Select the message segments with the highest heat scores to form a hot zone candidate set.

[0027] Specifically, during the sampling process of the logic analyzer, the parallel I / O signals from the object under test (DUT) first pass through a serial-to-parallel conversion module to form a 32-channel parallel digital stream, and then enter the sampling module. This module downsamples the data according to the sampling parameters issued by the host computer (e.g., retaining 1 sample every 4 samples). The downsampled parallel data is then processed in real-time by the compression module. The compression module uses a fixed-structure counting compression method: when several consecutive sample points have the same value, this data is encoded into a compressed pair in the form of (value, repetition count). For example, if channel 1 has 40 consecutive sample points with a value of "1", this data will be compressed into (1, 40). This compression method can significantly reduce the storage burden, especially in scenarios where most signals are stable and sparsely changing, resulting in a very high compression ratio. However, at the same time, the transition information in the original waveform is no longer directly visible after compression and must be indirectly judged through other structural features.

[0028] After compression, the data is sent to a FIFO buffer. When the packet assembly conditions are met, the data assembly module organizes it into complete segments and writes them to DDR3 memory. Each segment has a fixed size of 256 bytes, and the data within the segment consists of data fragments from multiple channels. The length of each fragment is variable, but the overall structure strictly follows the following order: header (containing the number of channels and the length of each channel's field), compressed data segments for each channel, and trailer (used for verification). Thousands to tens of thousands of segments may be written during the entire logical analysis cycle, numbered sequentially as follows: Because compression processing can cause the original location of the trigger point to be unable to be directly aligned in physical address, a mechanism is needed to find the "hot segment" that is most likely to contain transition behavior, i.e., the trigger point, from these compressed packets.

[0029] This step proposes a hot zone scoring method based on compressed block density. The core idea is that although compressed data loses the temporal uniformity of the original waveform, its structure retains information about the "number of changes"—that is, the more compressed blocks within a segment, the more frequent the transitions in the original waveform of that segment, and the more likely it is to contain trigger points. Therefore, the key indicator for hot zone scoring is set as the density of compressed pairs per channel within each segment. For message segments... Calculate the first Compression of each channel to density The number of compressed pairs appearing in the segment for that channel is divided by the number of bytes it occupies. Specifically, the number of compressed pairs can be obtained by parsing the number of (value, count) pairs appearing in the channel field, and the number of channel bytes can be directly read from the header field.

[0030] To generate a comprehensive popularity score for the entire segment, the density of each channel is weighted and summed to construct the segment-level popularity score formula as follows:

[0031] ;

[0032] in, Indicates message segment Overall popularity score; Indicates the total number of sampling channels (default is 32); Indicates the first The channel weighting coefficients are generally taken as the average value. It can also be adjusted by the host computer according to the user configuration, for example, increasing the weight of the high-speed channel in protocol tests that focus on high-speed signals; Indicates channel In the section The density of compressed blocks in the channel is calculated by dividing the number of compressed blocks in that channel by the length of bytes they occupy; both are obtained from the decoded message structure.

[0033] For example, suppose channel 1 is in segment The data occupies 40 bytes, and after parsing, it was found to contain 22 compressed pairs. Channel 2 occupies 60 bytes and contains 25 compression pairs. Multiply all channel densities by their corresponding weights and sum them up to obtain the density of that segment. Value. After all message segments have been scored, the top-ranked segments by popularity value are selected. The message segments form a candidate set of hot zones. . It can be preset by the user (such as taking 10% of the total number of segments by default) or dynamically adjusted.

[0034] S2: For each message segment in the hot zone candidate set, parse the message header to obtain the location of each channel's compressed data, decode each channel's compressed data to generate a sampling sequence, and introduce a position offset adjustment amount according to the number of compression units in each channel and the maximum decoding length, align each channel's sampling sequence to a unified time reference, and form a multi-channel synchronous sampling matrix.

[0035] Specifically, this step aims to optimize the set of hot zones output in step one. Compressed data is decoded and time-aligned for reconstruction to obtain a structured, analyzable multi-channel time series matrix. This provides input with temporal and channel consistency for subsequent boundary transition identification. Unlike common decompression and restoration methods, this step not only restores the original sampled values, but also proposes a structure-aware variable-length alignment decoding mechanism based on the storage characteristics of compressed data in the logic analyzer structure. At the same time, a position offset adjustment regularization term is used to handle the alignment offset problem caused by compression imbalance, thereby achieving higher-precision data restoration.

[0036] The logic analyzer's compression module uses a counting compression scheme to encode consecutive sampled values ​​from each channel into compressed pairs. ,in For value, The repetition count is written into the message structure. Each message segment... Fixed at 256 bytes, including the message header, channel length index table, and channel compressed data content. The segments selected in Step One... Each segment in Each channel contains compressed data from multiple channels, and the compression rates of different channels vary significantly, resulting in inconsistent timing lengths for each channel after decompression, making it impossible to directly construct a unified input.

[0037] To solve this problem, this step first analyzes... Extract the number of channels from the message header. The data offset and length within each channel within the segment are used to precisely locate the compressed data area for each channel. Let the first... Each channel of compressed data is a compressed pair sequence. Then, decode it to generate the original sample sequence:

[0038] ;

[0039] in Indicates channel The decoded sequence of sampled values, It is the index of the sampling point on this channel. This refers to the number of compression pairs. To improve decoding accuracy under conditions of unbalanced compression, a position offset adjustment regularization term is specifically introduced. A small offset correction is applied to the sampling alignment window for each channel. The regularization term is calculated considering the channel compression ratio and the relative position within the segment, and is expressed as follows:

[0040] ;

[0041] in This is an adjustment factor (suggested range 0.1~0.3). For channel Number of compressed blocks, This represents the maximum decoding length across all channels. The value is used for subsequent operations. Delay compensation during window alignment enhances cross-channel alignment accuracy, significantly reducing boundary misidentification rate, especially in high- and low-speed mixed channel structures.

[0042] After all channels have been decoded, the maximum channel length will be used as the basis for the decoding process. For reference, the lengths of each channel are aligned using right-side zero-padding. Simultaneously, the aforementioned offset regularization is applied to each channel sequence during the alignment process to obtain the final decoding matrix. :

[0043] ;

[0044] Each row of the matrix represents the sampling sequence of one channel, and each column represents the multi-channel observations at a specific time point. Indicates channel The sampled values ​​are then offset-compensated into a sequence. All channels form a unified time base under this structure, satisfying the input requirements of the subsequent transition recognition model for detecting inter-channel linkage changes. The step output is for each segment. Decoded time-aligned multichannel sampling matrix This matrix will be directly input into the boundary recognition model for jump position determination.

[0045] S3: Calculate the local change intensity at each time point based on the multi-channel synchronous sampling matrix, and construct a jump probability score by combining the jump consistency constraint between channels. Identify the time point with the highest jump probability score as the trigger point time index, and determine the segment number where the trigger point is located.

[0046] Specifically, the goal of this step is to output the time-aligned sampling matrix in step two. Trigger point identification is performed to determine the most likely transition boundary location. This step directly impacts the accuracy of subsequent memory readback control and system resource efficiency. Based on the highly sparse and non-uniform waveform characteristics of the compressed storage environment of the logic analyzer, this solution proposes a boundary learning method combining local transition probability evaluation and global channel consistency constraints. By introducing special noise suppression and time structure regularization terms, robust transition detection on non-uniformly spaced data after decoding is achieved. This method differs from traditional single-channel threshold detection; instead, it utilizes the temporal matrix features after compressed structure decoding to construct a multi-channel fusion judgment model, statistically improving the accuracy of trigger point identification.

[0047] The input for this step is the time alignment matrix output from step two. ,in Indicates the number of channels. Represents a time index. Matrix Each row is a channel The decoded sampled sequence, whose matrix has already undergone channel time base correction and compensation in step two, can therefore be considered as synchronous waveforms for each channel. For this structured input, this step first calculates the local variation intensity for each channel. This serves as a primary characteristic of the abrupt change signal. To eliminate transient disturbances caused by high-frequency noise, this scheme introduces a local change fusion strategy based on a time window, which smooths the abrupt response by calculating the average change energy within the sliding window. Specifically, the local change intensity is defined as follows:

[0048] ;

[0049] in This represents the half-width of the time window, typically ranging from 2 to 5, and can be dynamically configured based on the sampling rate. Indicates the channel within a local time slice. The absolute value of the amplitude change. This operation can be viewed as a time-weighted sliding difference, used to statistically analyze the energy concentration of the waveform within a local window. Due to the inconsistent lengths of the compressed segments in the waveform, this method can identify the true changes in the waveform structure without relying on uniform sampling.

[0050] After obtaining the local change intensity of all channels, a segment-level jump probability scoring function is defined. This scheme differs from the traditional independent channel stacking approach; instead, it introduces a channel collaborative constraint regularization term. This is done to penalize differences in transition timing between channels, thereby better capturing cross-channel synchronous transition characteristics. The specific form is as follows:

[0051] ;

[0052] in Indicates a point in time The overall jump probability score; The channel weights are inherited from the hot zone scoring coefficients in step one. For channel The intensity of local changes; This is a channel coordination constraint term that measures the similarity of signals from different channels at the same time. If multiple channels have the same direction and similar amplitude of change at the same time point, then... A smaller value results in a weaker penalty term, thus increasing the probability of a jump at that moment. Conversely, if some channels exhibit reverse fluctuations or unrelated changes, then... If the probability of a jump is increased, the system will suppress the probability of a jump at that moment, thereby avoiding misjudgment. This is a regularization coefficient used to control the impact of cross-channel constraints on scoring, and its value is usually in the range of 0.3 to 0.5.

[0053] In engineering implementation, The calculation can be implemented on an FPGA using a fixed-channel array of parallel comparators. At each time step, only a finite number of XOR and addition operations are needed to complete the accumulation of differences across all channels, thus exhibiting low hardware resource overhead. To further improve the timing robustness of trigger point localization, in the scoring result sequence... The above employs a "frontier confirmation" mechanism, which involves finding the location of the global maximum value in the scoring sequence. Then, the rate of change of the score near the peak is backtracked to ensure that the selected trigger point is located at the rising edge of the waveform rather than the trailing edge of the steady state. The backtracking correction can be expressed as:

[0054] ;

[0055] in Indicates the final trigger point location; This is the offset adjustment coefficient, typically ranging from 0.5 to 1.0. The maximum jump score is represented by the fractional term, which is the normalized value of the score gradient and is used to adaptively adjust the offset based on the jump rate. This formula uses the normalized gradient to correct the timing of the compressed decoded data, shifting the trigger point towards the true frontier of change and reducing trigger point deviation caused by compression lag.

[0056] This step outputs two variables: one is the trigger point time index. This value will be used for the next step of physical address calculation; secondly, it is the segment number where the trigger point is located. That is, gathering in the hot zone The corresponding segment number. These two outputs together form the basis for the mapping of the trigger point between the logical space and the storage space, completing the key bridge from logical layer trigger location to physical layer address mapping.

[0057] S4: Estimate the physical storage address corresponding to the trigger point based on the trigger point time index, the segment number, the starting physical address of the segment, the total sampling length after decoding, and the compression structure imbalance compensation parameters; read data backward from the physical storage address until the preset number of back-read sampling points is met;

[0058] Specifically, the purpose of this step is to determine the time location of the known transition trigger point. and the segment number of the hot zone Under the premise of accurately mapping the logical time position to the DDR3 physical memory address space, the starting readback address is obtained. This address serves as the starting point for controlling the readback process in the logic analyzer system until the required number of sampling points for each channel is met. This step not only completes the mapping from the logical trigger point to the physical address, but also undertakes the initiation of the actual control behavior.

[0059] In the entire system, data acquisition is accomplished by inputting 32 channels of I / O signals into the sampling module. Each channel is converted from serial to parallel format through serial-to-parallel conversion, then downsampled by the sampling module according to a set sampling rate, and finally sent to the compression module. The compression module uses run-length encoding, which compresses consecutive identical sample values ​​into a single pair. ,in That's the value. This refers to the number of consecutive repetitions. All compressed data is concatenated into packets via a FIFO buffer. Each packet segment has a fixed 256-byte structure, containing a segment header, a channel field length table, and the compressed data content for each channel. Segments are sequentially written to memory via the DDR3 interface, with addresses contiguous during writing. The starting address of each segment... The write control module maintains and generates tables in real time, which can be directly queried during the reverse read process without storing the write address of each channel.

[0060] The inputs for the step include: the temporal position of the transition point in the post-decoded sample sequence. This is derived from the jump boundary learning in the previous step; segment number. From hot zone collection The segment containing the identified transition; the starting address of the segment. By segment number Retrieve from the address table; total byte length of the compressed segment. It can be read through the message structure or preset to a fixed value of 256; the uniform sampling length of this segment after decoding. ,Right now The length of the time axis.

[0061] To implement logical time index For mapping to physical addresses, this step introduces a linear approximation offset estimation model. Combining this with the compressed data distribution within the segment, it constructs the relative offset of the logical sampling point within the physical address. Its basic expression is:

[0062] ;

[0063] in, It is the offset of the logical trigger point within the physical segment; This is the total number of sampling points after decoding the segment, which can be obtained from the number of columns in the decoding matrix; This is the byte length of the segment in DDR3, typically 256 bytes; This is a offset compensation term caused by the imbalance in compression ratio structure. Since the compression ratio varies significantly across different channels, the compression ratio differs across channels at the same sampling time. Therefore, the error caused by compression imbalance must be considered. To address this, the following structural consistency regularization term is introduced:

[0064] ;

[0065] in, Indicates the first The standard deviation of the number of compression pairs across all channels in the segment. This represents the average of the channel compression pairs. A scaling factor (e.g., 0.2) set for experience is used to adjust the compensation magnitude. This regularization term can effectively reflect the unevenness of the compressed block structure distribution, thereby weighting and correcting the estimated offset, and avoiding the disproportionate increase in the overall address estimate due to the space occupied by high-frequency channels in compression.

[0066] In actual execution, the control module first determines the jump point segment number. query segment start address Combined with the estimated Calculate the physical starting address corresponding to the logical trigger point. :

[0067] ;

[0068] This address will serve as the physical location for starting the readback control module. Starting from this address, the storage control module reads data sequentially in segment-by-segment order. Each segment read is parsed and decompressed into a buffer, and the number of decoding points for each channel is checked against the settings set by the host computer. For example, if the host computer is set to read back 1024 sampling points for each channel, then after each segment is decompressed, the system sums the points from all 32 channels to determine if this requirement is met. If it is, the reading process stops, and the system uploads the complete decompressed waveform matrix and the relative offset points from the start of the segment to the host computer. For their cutting and use.

[0069] For example, if the hot section The segment identified as the trigger point has the following starting address: The total compressed length is Bytes, decoded sample length The trigger point time position is determined as follows And channel compression affects statistics as , ,set up Then the calculation yields:

[0070] ;

[0071] ;

[0072] ;

[0073] The control module is the one from the address Begin reading back until each channel meets 1024 sampling points. Finally, read back the waveform matrix. and offset position The data is uploaded to a host computer, which performs initial alignment and data truncation. This method constructs a mapping relationship between logical time location and physical address through structural offset estimation and compressed distribution regularization, eliminating the channel-level address recording mechanism in traditional logic analyzers, reducing system complexity and resource consumption, while maintaining high-precision address backtracking control capability even under compressed high variability conditions.

[0074] This invention also provides a precise backtracking control device for logic analyzer trigger points based on hot zone scoring and boundary learning, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor. When the processor executes the computer program, it implements the steps described in the above embodiments of the precise backtracking control method for logic analyzer trigger points based on hot zone scoring and boundary learning. Figure 1 The steps S1 to S4 described above; or, when the processor executes the computer program, it implements the functions of each module in the above system embodiments.

[0075] For example, the computer program may be divided into one or more modules, which are stored in the memory and executed by the processor to complete the present invention. The one or more modules may be a series of computer program instruction segments capable of performing specific functions, which describe the execution process of the computer program in the logic analyzer trigger point precise backtracking control device based on hot zone scoring and boundary learning.

[0076] The precise backtracking control device for trigger points of a logic analyzer based on hot zone scoring and boundary learning can be a computing device such as a desktop computer, laptop, handheld computer, or cloud server. This device may include, but is not limited to, a processor and memory. Those skilled in the art will understand that the precise backtracking control device may also include input / output devices, network access devices, buses, etc.

[0077] The processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASACs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor. This processor is the control center of the logic analyzer trigger point precise backtracking control device based on hot zone scoring and boundary learning, connecting all parts of the device via various interfaces and lines.

[0078] The memory can be used to store the computer program and / or modules. The processor, by running or executing the computer program and / or modules stored in the memory, and by calling the data stored in the memory, realizes various functions of the logic analyzer trigger point precise backtracking control device based on thermal zone scoring and boundary learning. The memory may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function, etc.; the data storage area may store data created based on the operation of the air conditioner controller, etc. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital card (SD), flash card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0079] The module integrated into the logic analyzer trigger point precise backtracking control device based on hot zone scoring and boundary learning, if implemented as a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc.

[0080] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0081] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning, characterized in that, The method includes: A heat score is performed on the message segments of compressed and stored multi-channel digital signals. The heat score of each message segment is determined based on the ratio of the number of compression units of each channel in the message segment to the length of bytes occupied by the corresponding channel in the message segment. Select the message segments with the highest heat score according to a preset ratio to form a candidate set of hot zones; For each message segment in the hot zone candidate set, the message header is parsed to obtain the location of the compressed data of each channel, the compressed data of each channel is decoded to generate a sampling sequence, and a position offset adjustment is introduced according to the number of compression units of each channel and the maximum decoding length to align the sampling sequences of each channel to a unified time base and form a multi-channel synchronous sampling matrix. The intensity of local change at each time point is calculated based on the multi-channel synchronous sampling matrix, and a jump probability score is constructed by combining the jump consistency constraint between channels. The time point with the highest jump probability score is identified as the trigger point time index, and the segment number of the trigger point is determined. The physical storage address corresponding to the trigger point is estimated based on the trigger point time index, the segment number, the starting physical address of the segment, the total sampling length after decoding, and the compression structure imbalance compensation parameters. The data is read backwards from the physical storage address until the preset number of readback sampling points is met.

2. The precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning according to claim 1, characterized in that, The compressed data uses a counting compression method, which encodes consecutive sampled values ​​with the same value into a compression unit consisting of the value and the number of repetitions.

3. The precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning according to claim 1, characterized in that, The message segment is a fixed-length data block, which includes a message header, compressed data segments for each channel, and a message tail. The message header records the number of channels and the data length of each channel.

4. The precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning according to claim 1, characterized in that, The popularity score is obtained by weighted summation of the compression unit densities of each channel, with the weighting coefficients either equally distributed or configured by the host computer.

5. The precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning according to claim 1, characterized in that, The step of aligning the sampling sequences of each channel to a unified time reference includes: using a right-side zero-padding method to unify the length of each channel, and applying the position offset adjustment amount to each channel sampling sequence to compensate for timing misalignment.

6. The precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning according to claim 1, characterized in that, The intensity of the local change is calculated by averaging the absolute values ​​of the changes in the sampled values ​​within the sliding time window.

7. The precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning according to claim 1, characterized in that, The jump probability score includes a channel coordination constraint term, which is used to suppress jump responses with opposite directions or uncorrelated amplitudes from different channels at the same time point.

8. The precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning according to claim 1, characterized in that, The trigger point time index is offset and corrected based on the position of the maximum value of the jump probability score, according to the score gradient, towards the rising edge of the waveform.

9. The precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning according to claim 1, characterized in that, The compression structure imbalance compensation parameter is determined based on the ratio of the standard deviation to the average value of the number of compression units in each channel within a segment.

10. The precise backtracking control method for trigger points of a logic analyzer based on hot zone scoring and boundary learning according to claim 1, characterized in that, The steps for reading back the data include: reading sequentially in units of message segments, decoding and accumulating the number of valid sampling points for each channel after reading each message segment, stopping the back reading when all channels have reached the preset number of back reading sampling points, and uploading the decoded waveform data and the relative offset position of the trigger point.

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