Preparation method of hole heavily-doped InSb photodiode

Abstract

A preparation method of a hole heavily-doped InSb photodiode relates to the technical field of semiconductor processes, and specifically comprises the following steps: carrying out Be ion implantation barrier layer deposition on an InSb wafer after surface treatment, placing the InSb wafer deposited with the barrier layer in an ion implanter, and carrying out ion implantation on the InSb wafer; the method comprises the following steps of: performing injection on an InSb wafer by setting parameters of injection energy, injection dose and deflection angle to obtain hole heavily-doped InSb, removing a barrier layer injected on the surface of the InSb wafer through hydrofluoric acid corrosion, depositing an annealing protective film, and annealing in a high-temperature annealing furnace to obtain the hole heavily-doped InSb wafer. Removing an annealing protection film on the surface through corrosion, carrying out surface lactic acid corrosion to remove a damaged layer, and finally preparing the focal plane array of the photodiode through mesa photoetching and etching, surface passivation, window photoetching and etching, electrode photoetching and stripping processes of the InSb wafer. Good ohmic contact between the electrode and InSb is achieved, series resistance of the diode is reduced, and better depletion region distribution is achieved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor process technology, and in particular to a method for fabricating a hole-heavily doped InSb photodiode. Background Technology

[0002] As is well known, InSb, as a group III-V compound semiconductor, is characterized by its small effective electron mass, high mobility, and narrow band gap (0.17 eV at 300 K and 0.23 eV at 77 K), as well as its high absorption coefficient for infrared light at low temperatures (~10E14 cm⁻¹). -1 Quantum efficiency ≥ 80%, carrier mobility μ n ~10E5cm 2 V -1 •s -1 With its advantages, it has become an important semiconductor material for developing infrared focal plane arrays in the 3-5μm band.

[0003] Junction formation of InSb photodiodes is the core and foundation for the fabrication of InSb photovoltaic detectors. The quality of the pn junction directly affects the detector's performance indicators such as light response, open-circuit voltage, zero-bias impedance, and detectivity. The commonly used junction formation method is thermal diffusion, which has advantages such as simple process, low cost, and no damage. However, it can no longer meet the technical requirements for precise control of parameters such as impurity concentration and distribution in large-scale focal plane arrays. Currently, research on infrared detection technology for InSb materials mainly focuses on the preparation of its single crystals and the elimination of defects. For example, patent number CN 119640382A discloses a method for preparing a 4-inch low-dislocation indium antimonide <211> oriented single crystal; patent number CN117737863A discloses an annealing method for tellurium-doped indium antimonide wafers; and optimization of the performance of InSb focal plane devices, such as mesa etching and passivation of the focal plane. However, no patent reports have been found on the research of hole-heavy doping preparation of InSb photodiodes. Summary of the Invention

[0004] To overcome the shortcomings of the prior art, this invention discloses a method for fabricating a hole-doped InSb photodiode.

[0005] To achieve the aforementioned objective, the present invention employs the following technical solution: A method for fabricating a hole-heavily doped InSb photodiode specifically includes the following steps: S1. Deposit a Be ion implantation barrier layer on the surface-treated InSb wafer. S2. Place the InSb wafer with the deposited barrier layer in an ion implanter, and implant the InSb wafer by setting the parameters of implantation energy, implantation dose and deflection angle to obtain hole-heavy InSb. S3. Remove the barrier layer implanted on the surface of the InSb wafer by hydrofluoric acid etching; S4. Deposit an annealing protective film on the InSb wafer obtained in the previous step. S5. Place the InSb wafer with the deposited annealing protective film in a high-temperature annealing furnace and perform high-temperature annealing on the InSb wafer by setting the parameters of annealing temperature, time and vacuum degree. S6. Remove the annealing protective film from the surface by etching; S7. Remove the damaged layer from the InSb wafer obtained in the previous step by surface lactic acid etching. S8. Following the previous step, the focal plane array of photodiodes is fabricated from the InSb wafer through mesa lithography and etching, surface passivation, window lithography and etching, electrode lithography and stripping processes.

[0006] In the method for fabricating the hole-heavily doped InSb photodiode, the size of the InSb wafer in step S1 is 2 to 4 inches, and the implanted barrier layer is any one of silicon oxide, aluminum oxide, and silicon nitride.

[0007] In the method for fabricating the hole-heavily doped InSb photodiode, the injection energy in step S2 is set to 80–200 keV, and the injection dose is set to 1E14–6E14 at. / cm. 2 The deflection angle is 6.5° to 7.5°.

[0008] In the method for fabricating the hole-heavily doped InSb photodiode, step S2 yields a peak doping concentration of hole-heavily doped InSb greater than 1E19 at. / cm³. 3 .

[0009] In the method for preparing the hole-heavily doped InSb photodiode, the annealing protective film in step S4 is any one of silicon oxide, aluminum oxide, and silicon nitride.

[0010] The method for fabricating hole-heavily doped InSb photodiodes includes step S5, in which the annealing temperature is set to 400–480°C, the annealing time to 1–120 min, and the vacuum degree to 1E-3 Pa–1E-4 Pa to perform high-temperature annealing treatment on the InSb wafer, thereby activating the doped elements and repairing implantation damage.

[0011] In the method for fabricating the hole-heavily doped InSb photodiode, in step S6, the size of the InSb wafer is 2 to 4 inches, and the surface etching depth is 0.1 to 0.5 μm.

[0012] Due to the adoption of the above technical solution, the present invention has the following beneficial effects: The method for fabricating a hole-doped InSb photodiode described in this invention obtains a hole-doped InSb photodiode through ion implantation and high-temperature annealing processes. Compared with diffusion junction formation, this method achieves good ohmic contact between the electrode and InSb, reduces the series resistance of the diode, and has a better depletion region distribution. The fabricated photodiode has an impedance value greater than 1.60E8Ω when the reverse bias voltage is -2V. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the dopant element distribution when the hole is heavily doped according to the present invention.

[0014] Figure 2 This is a schematic diagram showing the positions of different types of doping elements in InSb in this invention.

[0015] Figure 3 This is a schematic diagram of Embodiment 1 of the present invention.

[0016] Figure 4 This is a schematic diagram of Embodiment 2 of the present invention.

[0017] Figure 5 This is a schematic diagram of Comparative Example 1 of the present invention. Detailed Implementation

[0018] The present invention will be explained in detail through the following embodiments. The purpose of disclosing the present invention is to protect all technical improvements within the scope of the present invention.

[0019] Combined with appendix Figure 1-2 The method for fabricating the hole-heavily doped InSb photodiode specifically includes the following steps: S1. A Be ion implantation barrier layer is deposited on the surface-treated InSb wafer; the size of the InSb wafer is 2 to 4 inches, and the implanted barrier layer is any one of silicon oxide, aluminum oxide, and silicon nitride. S2. Place the InSb wafer with the deposited barrier layer in an ion implanter, and set the implantation energy to 80–200 keV and the implantation dose to 1E14–6E14 at. / cm. 2 Hole-heavy InSb was obtained by implanting InSb wafers with a deflection angle of 6.5°–7.5°; the peak concentration of the hole-heavy doping element was greater than 1E19 at. / cm³. 3 ; S3. Remove the barrier layer implanted on the surface of the InSb wafer by hydrofluoric acid etching; S4. Deposit an annealing protective film on the InSb wafer obtained in the previous step. The annealing protective film is any one of silicon oxide, aluminum oxide, and silicon nitride. S5. Place the InSb wafer with the deposited annealing protective film in a high-temperature annealing furnace, set the annealing temperature to 400-480℃, the time to 1-120min, and the vacuum degree to 1E-3Pa-1E-4Pa, and perform high-temperature annealing on the InSb wafer to realize the activation of doped elements and the repair of implantation damage. S6. Remove the annealing protective film from the surface by etching; the size of the InSb wafer after removing the annealing protective film is 2 to 4 inches, and the surface etching depth is 0.1 to 0.5 μm; S7. Remove the damaged layer from the InSb wafer obtained in the previous step by surface lactic acid etching. S8. Following the previous step, the focal plane array of photodiodes is fabricated from the InSb wafer through mesa lithography and etching, surface passivation, window lithography and etching, electrode lithography and stripping processes.

[0020] The focal plane array of photodiodes obtained through the above steps is then subjected to performance testing, including the following testing steps: 1. Place the focal plane array on a cryogenic probe station for preliminary IV characteristic testing. The cryogenic probe station has a cooling temperature of 77K. 2. Place the initially measured focal plane array into an oven for aging. The aging temperature of the oven is 80-100℃. 3. Place the aged focal plane array on a low-temperature probe station for IV characteristic retesting. Example 1

[0021] 1. Set the injection energy to 100keV and the injection dose to 4E14 at. / cm. 2 With a deflection angle of 7°, Be ion implantation was performed on an InSb wafer with a 50nm SiO2 barrier layer. The InSb wafer size was 2 inches, and the doping configuration was as follows: Figure 3 As shown in figure a, the peak concentration of hole-heavy doping elements is 1E19 at. / cm³. 3 ; 2. The surface-implanted barrier layer is removed by hydrofluoric acid etching, with a surface etching depth of 50nm; 3. A 200nm SiO2 annealing protective film was deposited on the surface of the implanted InSb wafer. The InSb wafer was 2 inches in size. The annealing temperature was set to 400℃, the holding time was 120min, and the vacuum degree was 1E-3Pa. 4. Remove the damaged layer from the surface of the annealed InSb wafer by lactic acid etching; the InSb wafer is 2 inches in size and the surface etching depth is 0.4 μm. 5. The above-mentioned implanted and annealed wafers are processed by mesa lithography and etching, surface passivation, window lithography and etching, electrode lithography and lift-off processes to prepare focal plane arrays of different sizes. The processes in this step are standard processes in the prior art. 6. The photodiode prepared above was subjected to IV performance testing using a low-temperature probe station with a cooling temperature of 77K. The results are as follows: Figure 3 As shown in b, its impedance is 2.45E8Ω when the reverse bias voltage is -2V. Example 2

[0022] 1. Set the injection energy to 100keV and the injection dose to 2E14 at. / cm. 2 With a deflection angle of 7°, Be ion implantation was performed on an InSb wafer with a 50nm Si3N4 barrier layer. The InSb wafer size was 2 inches, and the doping configuration was as follows: Figure 4 As shown in figure a; the peak concentration of the hole-heavy doping element is 6E18at / cm³. 3 ; 2. The surface-implanted barrier layer is removed by hydrofluoric acid etching, with a surface etching depth of 50 nm; 3. A 200nm Si3N4 annealing protective film was deposited on the surface of the implanted InSb wafer. The InSb wafer was 2 inches in size. The annealing temperature was set to 420℃, the holding time was 30min, and the vacuum degree was 1E-3Pa. The InSb wafer was subjected to high-temperature annealing treatment. 4. Remove the damaged layer from the surface of the annealed InSb wafer by lactic acid etching; the InSb wafer is 2 inches in size and the surface etching depth is 0.4 μm. 5. The above-mentioned implanted and annealed wafers are processed by mesa lithography and etching, surface passivation, window lithography and etching, electrode lithography and lift-off processes to prepare focal plane arrays of different sizes. The processes in this step are standard processes in the prior art. 6. The photodiode prepared above was subjected to IV performance testing using a low-temperature probe station with a cooling temperature of 77K. The results are as follows: Figure 4 As shown in b, its impedance is 1.70E8Ω when the reverse bias voltage is -2V.

[0023] Comparative Example 1 S1. Cd is doped into InSb wafers using a high-temperature thermal diffusion method at a diffusion temperature of 400℃; S2. The wafers doped by thermal diffusion described above are used to fabricate focal plane arrays of different sizes through processes such as mesa lithography and etching, surface passivation, window lithography and etching, electrode lithography and lift-off; S3. The photodiode prepared above was subjected to IV performance testing using a low-temperature probe station, and the results are as follows: Figure 5 As shown, its impedance is 1.57E8Ω when the reverse bias voltage is -2V.

[0024] Compared with Examples 1-2 and Comparative Example 1, the present invention obtains a hole-heavily doped InSb photodiode through ion implantation and high-temperature annealing processes. Compared with diffusion junction formation, it achieves good ohmic contact between the electrode and InSb, reduces the series resistance of the diode, and has a better depletion region distribution.

[0025] The parts of this invention not described in detail are prior art.

[0026] The embodiments selected herein for the purpose of disclosing the inventive objectives are currently considered suitable; however, it should be understood that the invention is intended to include all variations and modifications of the embodiments that fall within the scope of this concept and invention.

Claims

1. A method for fabricating a hole-heavily doped InSb photodiode, characterized in that: Specifically, the following steps are included: S1. Deposit a Be ion implantation barrier layer on the surface-treated InSb wafer. S2. Place the InSb wafer with the deposited barrier layer in an ion implanter, and implant the InSb wafer by setting the parameters of implantation energy, implantation dose and deflection angle to obtain hole-heavy InSb. S3. Remove the barrier layer implanted on the surface of the InSb wafer by hydrofluoric acid etching; S4. Deposit an annealing protective film on the InSb wafer obtained in the previous step. S5. Place the InSb wafer with the deposited annealing protective film in a high-temperature annealing furnace and perform high-temperature annealing on the InSb wafer by setting the parameters of annealing temperature, time and vacuum degree. S6. Remove the annealing protective film from the surface by etching; S7. Remove the damaged layer from the InSb wafer obtained in the previous step by surface lactic acid etching. S8. Following the previous step, the focal plane array of photodiodes is fabricated from the InSb wafer through mesa lithography and etching, surface passivation, window lithography and etching, electrode lithography and stripping processes.

2. The method for fabricating a hole-heavily doped InSb photodiode according to claim 1, characterized in that: The InSb wafer in step S1 has a size of 2 to 4 inches, and the implanted barrier layer is any one of silicon oxide, aluminum oxide, and silicon nitride.

3. The method for fabricating a hole-heavily doped InSb photodiode according to claim 1, characterized in that: The injection energy set in step S2 is 80–200 keV, and the injection dose is 1E14–6E14 at. / cm. 2 The deflection angle is 6.5° to 7.5°.

4. The method for fabricating a hole-heavily doped InSb photodiode according to claim 1, characterized in that: In step S2, the peak concentration of the hole-heavy InSb dopant is greater than 1E19 at. / cm. 3 .

5. The method for fabricating a hole-heavily doped InSb photodiode according to claim 1, characterized in that: In step S4, the annealing protective film is any one of silicon oxide, aluminum oxide, or silicon nitride.

6. The method for fabricating a hole-heavily doped InSb photodiode according to claim 1, characterized in that: In step S5, the annealing temperature is set to 400-480℃, the annealing time is set to 1-120 min, and the vacuum degree is set to 1E-3Pa-1E-4Pa to perform high-temperature annealing treatment on the InSb wafer.

7. The method for fabricating a hole-heavily doped InSb photodiode according to claim 1, characterized in that: In step S6, the InSb wafer has a size of 2 to 4 inches and a surface etching depth of 0.1 to 0.5 μm.

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