Packaging structure and preparation method thereof

Abstract

The invention relates to a packaging structure and a preparation method thereof. The method comprises the following steps: providing a carrier plate; a dry film structure is formed on one side of the carrier plate, the dry film structure comprises a dry film layer and a conductive column, through holes are formed in the dry film layer, and at least part of the through holes are filled with the conductive column; a conductive structure is provided, the conductive structure comprises a main body part and protruding parts arranged on one side of the main body part, and the protruding parts are in one-to-one correspondence with the through holes; the conductive structure and the dry film structure are combined in a hot pressing mode, the protruding parts are embedded into the through holes to form solid-phase diffusion connection with the conductive columns, and the main body part is attached to the side, away from the carrier plate, of the dry film layer; and etching the main body part from one side, far away from the dry film layer, of the main body part to obtain a rewiring layer. According to the packaging structure and the preparation method thereof, the signal transmission efficiency and the electrical performance are improved, the material waste is reduced, the production cost is reduced, the packaging requirement of higher integration level can be met, the application scene is expanded, and the graphic precision and the product yield are greatly improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor packaging technology, and in particular to a packaging structure and its preparation method. Background Technology

[0002] In the field of advanced packaging technology, multilayer redistribution layers (RDLs) are key structures for solving high-density interconnection problems and increasing the number of input / output (I / O) signals, which is of great significance for improving packaging performance. However, existing multilayer RDL fabrication technologies still face many technical bottlenecks that urgently need to be addressed, which seriously restrict their application effects and development.

[0003] Specifically, firstly, the yield of RDL fabrication is low. When the linewidth is ≤4μm, the copper plating process is prone to uneven thickness due to edge effects, with deviations exceeding 10%. Furthermore, the side etching rate of wet etching is greater than 20%, which can easily lead to short circuits or open circuits. Secondly, there are significant defects in RDL interconnects. During multilayer stacking, the flatness of the spin-coated dielectric layer is poor, with deviations reaching ±1.5μm. Simultaneously, the via alignment error exceeds 0.5μm, leading to impedance mismatch and signal loss. Thirdly, the electrical performance of RDLs is easily degraded. The trapezoidal cross-section (tilt angle ≤70°) formed by wet etching increases resistance by 15%, and high-frequency insertion loss... The error is as follows: 1) The error is greater than 0.2dB / mm, which affects signal transmission quality; 2) The error is as follows: 3) The error is as follows: 4) The error is as follows: ...

[0004] Existing technological improvements, such as using nano-twinned copper structures to increase electromigration lifetime by 50% and using large-area lithography machines to reduce exposure times, still rely on traditional electroplating copper processes and fail to fundamentally solve the series of technical problems in the preparation of multilayer RDLs. Therefore, it is urgent to develop new technical solutions to break through existing bottlenecks. Summary of the Invention

[0005] Therefore, it is necessary to provide a packaging structure and its fabrication method to address the problem of low yield in multilayer redistribution layer packaging in existing technologies.

[0006] To achieve the above objectives, this application provides a method for fabricating a packaging structure, comprising:

[0007] Provide carrier board;

[0008] A dry film structure is formed on one side of the carrier plate. The dry film structure includes a dry film layer and conductive pillars. The dry film layer has through holes, and the conductive pillars fill at least a portion of the through holes.

[0009] A conductive structure is provided, wherein the conductive structure includes a main body and a protrusion disposed on one side of the main body, the protrusion corresponding to the through hole one by one;

[0010] The conductive structure is hot-pressed together with the dry film structure, wherein the protrusion is embedded in the through hole and forms a solid-phase diffusion connection with the conductive post, and the main body is attached to the side of the dry film layer away from the carrier plate.

[0011] The main body is etched from the side of the main body away from the dry film layer to obtain a redistribution layer.

[0012] In one embodiment, the etching process performed on the body portion from the side of the body portion away from the dry film layer to obtain a redistribution layer includes:

[0013] A patterned hard mask layer is formed on the side of the main body away from the dry film layer;

[0014] The main body is etched based on the patterned hard mask layer to obtain the redistribution layer.

[0015] In one embodiment, forming a patterned hard mask layer on the side of the main body away from the dry film layer includes:

[0016] Provide a hard mask structure;

[0017] An anchor point structure is formed on one side of the hard mask structure;

[0018] The side of the hard mask structure with the anchor point structure is heat-pressed onto the side of the main body away from the carrier plate;

[0019] The hard mask structure is etched to obtain a patterned hard mask layer.

[0020] In one embodiment, the patterned hard mask layer is used to etch the main body to obtain the redistribution layer, including:

[0021] Based on the patterned hard mask layer, the portion of the main body not covered by the hard mask layer is subjected to a first etching process at a first etching rate, wherein the sidewall of the main body after the first etching process has a first etching angle, and the range of the first etching angle is 88 degrees to 91 degrees.

[0022] The main body portion after the first etching process is subjected to a second etching process at a second etching rate to obtain the redistribution layer, wherein the second etching rate is less than the first etching rate.

[0023] Remove the patterned hard mask layer.

[0024] In one embodiment, the patterned hard mask layer is used to etch the main body to obtain the redistribution layer, including:

[0025] The main body is wet-etched using a preset etching solution, which includes a reactant, a first auxiliary agent, and a second auxiliary agent. The concentration range of the reactant is 8%wt to 14%wt, the concentration range of the first auxiliary agent is 4%wt to 8%wt, and the concentration range of the second auxiliary agent is 0.5ppm to 1.5ppm.

[0026] In one embodiment, after etching the body portion from the side of the body portion away from the dry film layer to obtain the redistribution layer, the method further includes:

[0027] Returning to the step of forming a dry film structure on one side of the carrier plate, at least one redistribution layer is formed on the side of the redistribution layer away from the carrier plate.

[0028] In the process of forming the dry film layer corresponding to each redistribution layer, the hot pressing temperature increases layer by layer.

[0029] In one embodiment, prior to forming a dry film layer on one side of the carrier plate, the method further includes:

[0030] The carrier plate is pretreated.

[0031] In one embodiment, the preprocessing of the carrier plate includes:

[0032] A release layer is formed on one side of the carrier plate;

[0033] A seed layer is formed on the side of the peeling layer away from the carrier plate.

[0034] In one embodiment, forming a dry film structure on one side of the carrier plate includes:

[0035] A dry film layer is formed on one side of the carrier plate;

[0036] The through-hole is formed within the dry film layer;

[0037] A conductive paste is injected into the through hole, the conductive paste comprising nano-silver paste and a low-boiling-point solvent;

[0038] The conductive slurry is cured to obtain the conductive column.

[0039] This application also provides a packaging structure, which is prepared by the packaging structure preparation method described in any of the above embodiments.

[0040] The aforementioned encapsulation structure and its fabrication method involve forming a dry film structure on one side of a carrier substrate. The dry film structure includes a dry film layer and conductive pillars. The dry film layer has through-holes, and the conductive pillars fill at least part of the through-holes. A conductive structure is provided, including a main body and protrusions on one side of the main body, with each protrusion corresponding to a one-to-one through-hole. Furthermore, the conductive structure and the dry film structure are thermally pressed together, with the protrusions embedded in the through-holes to form a solid-state diffusion connection with the conductive pillars. The main body is attached to the side of the dry film layer away from the carrier substrate. The material system of the dry film layer, compared to conventional spin-coating dielectric layers, significantly improves material utilization, reduces material waste, and lowers production costs. Furthermore, through… Under hot pressing, the metal atoms of the protrusion and the metal ions in the conductive pillar diffuse and permeate each other to form a metallurgical bonding interface. Compared with the mechanical contact or welding formed by traditional electroplating processes, the above connection method has lower contact resistance, higher connection strength, and can withstand subsequent thermal cycling processes, further ensuring interconnect reliability. Furthermore, the redistribution layer is formed by etching the main body from the side away from the dry film layer. The cross-sectional angle of the redistribution layer is close to an ideal rectangle, which effectively improves the uniformity of current density distribution compared to the traditional trapezoidal cross-section, avoids electromigration failure caused by current accumulation, and thus significantly improves the yield of the packaging structure, meeting the packaging requirements of higher integration. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 This is a flowchart of a method for fabricating a packaging structure provided in one embodiment;

[0043] Figure 2 This is a schematic diagram of the cross-sectional structure of the carrier plate of the packaging structure provided in one embodiment after pretreatment;

[0044] Figure 3 This is a schematic cross-sectional view of the encapsulation structure provided in one embodiment after the formation of the dry film layer;

[0045] Figure 4 This is a schematic diagram of the cross-sectional structure of the encapsulation structure provided in one embodiment after the formation of the through-hole;

[0046] Figure 5 This is a schematic diagram of the cross-sectional structure of the encapsulation structure provided in one embodiment after the formation of conductive pillars;

[0047] Figure 6 This is a schematic diagram of the cross-sectional structure of the encapsulation structure provided in one embodiment after the formation of the conductive structure;

[0048] Figure 7 This is a schematic diagram of the cross-sectional structure of the encapsulation structure provided in one embodiment after forming a hard mask structure;

[0049] Figure 8 This is a schematic diagram of the cross-sectional structure of the encapsulation structure provided in one embodiment after forming a patterned hard mask;

[0050] Figure 9 This is a schematic cross-sectional view of the packaging structure provided in one embodiment after the formation of the redistribution layer;

[0051] Figure 10 This is a schematic cross-sectional view of the encapsulation structure provided in one embodiment after repeated formation of a dry film layer;

[0052] Figure 11 This is a schematic diagram of the cross-sectional structure of the encapsulation structure provided in one embodiment after repeated formation of through holes;

[0053] Figure 12 This is a schematic diagram of the cross-sectional structure of the encapsulation structure provided in one embodiment after the conductive pillars are repeatedly formed;

[0054] Figure 13 This is a schematic diagram of the cross-sectional structure of the encapsulation structure provided in one embodiment after the conductive structure is repeatedly formed.

[0055] Explanation of reference numerals in the attached figures:

[0056] 1-Carrier board, 11-Release layer, 12-Seed layer, 2-Dry film structure, 21-Dry film layer, 22-Conductive pillar, 23-Through hole, 3-Conductive structure, 4-Hard mask layer, 41-Hard mask structure, 5-Rewiring layer. Detailed Implementation

[0057] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0058] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0059] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of this invention, the first element, component, region, layer, doping type, or portion discussed below may be referred to as a second element, component, region, layer, or portion.

[0060] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0061] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, in this specification, the term “and / or” includes any and all combinations of the associated listed items.

[0062] Please see Figure 1 This application provides a method for preparing an encapsulation, comprising the following steps:

[0063] Step S1: Provide carrier plate 1;

[0064] Step S2: A dry film structure 2 is formed on one side of the carrier plate 1. The dry film structure 2 includes a dry film layer 21 and a conductive pillar 22. The dry film layer 21 has through holes 23, and the conductive pillar 22 fills at least part of the through holes 23.

[0065] Step S3: Provide a conductive structure 3, wherein the conductive structure 3 includes a main body (not shown) and a protrusion (not shown) disposed on one side of the main body, the protrusion corresponding to the through hole 23 one by one;

[0066] Step S4: The conductive structure 3 and the dry film structure 2 are hot-pressed together, wherein the protrusion is embedded in the through hole 23 and forms a solid-phase diffusion connection with the conductive pillar 22, and the main body is attached to the side of the dry film layer 21 away from the carrier plate 1.

[0067] Step S5: Etch the main body from the side away from the dry film layer 21 to obtain the redistribution layer 5.

[0068] In the above example, a dry film structure 2 is formed on one side of the carrier plate 1. The dry film structure 2 includes a dry film layer 21 and conductive pillars 22. The dry film layer 21 has through holes 23, and the conductive pillars 22 fill at least part of the through holes 23. A conductive structure 3 is provided, including a main body and a protrusion disposed on one side of the main body, with the protrusion corresponding to the through hole 23. Furthermore, the conductive structure 3 and the dry film structure 2 are hot-pressed together, and the protrusion is embedded in the through hole 23 to form a solid-phase diffusion connection with the conductive pillar 22. The main body is attached to the side of the dry film layer 21 away from the carrier plate 1. The material system of the dry film layer 21, compared with the dielectric layer formed by conventional spin coating, significantly improves the material utilization rate, reduces material waste, and lowers the cost. Furthermore, by allowing the metal atoms of the protrusions to diffuse and permeate with the metal ions in the conductive pillars under hot pressing, a metallurgical bonding interface is formed. Compared with the mechanical contact or welding formed by traditional electroplating processes, the above connection method has lower contact resistance, higher connection strength, and can withstand subsequent thermal cycling processes, further ensuring interconnect reliability. Moreover, the redistribution layer is formed by etching the main body from the side away from the dry film layer. The cross-sectional angle of the redistribution layer is close to an ideal rectangle, which effectively improves the uniformity of current density distribution compared with the traditional trapezoidal cross-section, avoids electromigration failure caused by current accumulation, and thus significantly improves the yield of the packaging structure, meeting the packaging requirements of higher integration.

[0069] Please see Figures 2 to 5 In step S1, a carrier plate 1 is provided; a dry film structure 2 is formed on one side of the carrier plate 1. The dry film structure 2 includes a dry film layer 21 and a conductive pillar 22. The dry film layer 21 has through holes 23, and the conductive pillar 22 fills at least part of the through holes 23.

[0070] In one embodiment, the carrier plate 1 is a glass carrier plate. In this embodiment, the carrier plate 1 is made of borosilicate glass, which has excellent support performance and thermal stability, and can provide good dimensional stability and mechanical strength in the subsequent formation of multilayer packaging structures.

[0071] For example, the thermal expansion coefficient of the carrier plate 1 is 3.8 ppm / ℃, which has excellent thermal stability and can effectively reduce the impact of thermal stress on the reliability of the packaging.

[0072] For example, the thickness of the carrier plate 1 ranges from 1mm to 2mm, and the dimensions of the carrier plate 1 on the plane perpendicular to the thickness direction are all not less than 500mm. In this embodiment, the thickness of the carrier plate 1 is 1.1mm, and the dimensions of the two sides of the carrier plate 1 on the plane perpendicular to the thickness direction are 510mm and 515mm, respectively, to fully guarantee the processing space for subsequent packaging structures.

[0073] In one embodiment, such as Figure 2As shown, before forming the dry film structure 2 on one side of the carrier plate 1, the following steps are also included:

[0074] Pre-process the carrier plate 1.

[0075] In one embodiment, the carrier plate 1 is pretreated, including:

[0076] A release layer 11 and a seed layer 12 are sequentially formed on one side of the carrier plate 1. The release layer 11 is formed by spin coating, printing, or other suitable methods. The material of the release layer 11 includes polysiloxane or other suitable materials, whose chemical bonds will not break or decompose at a high temperature of 250°C, thus maintaining the stability of the molecular chain and preventing the release layer 11 from failing due to high temperature, and maintaining stable mechanical properties and interface characteristics over a long period of time. During the formation of the multilayer encapsulation structure, the release layer 11 plays a good fixing role, ensuring the smooth formation of subsequent film layers. After the encapsulation structure is formed, the release layer 11 can be easily peeled off, thereby realizing the separation of the carrier plate 1. The thickness of the release layer 11 ranges from 0.5 μm to 1 μm. In this embodiment, the thickness of the release layer 11 is 0.8 μm. The method for forming the seed layer 12 includes physical vapor deposition or other suitable methods, such as magnetron sputtering. The seed layer 12 includes at least one of a copper metal layer and a titanium metal layer. The thickness of the seed layer 12 ranges from 0.1 μm to 0.3 μm. In this embodiment, the thickness of the seed layer 12 is 0.2 μm. The seed layer 12 is used as the basis for the growth of the subsequent conductive structure to alleviate the stress difference between the subsequently formed conductive structure and the carrier plate 1.

[0077] Among them, the glass substrate 1 used above has a much smaller thermal temperature coefficient difference with the metal circuit than that of traditional organic substrates, which reduces the expansion and contraction stress in thermal cycling from the source. At the same time, relying on its excellent dimensional stability and surface flatness, it avoids the superimposed warping caused by the deformation of the substrate 1 itself. Combined with a release layer with high temperature resistance, the two work together and, combined with the size design of the substrate 1, can achieve the subsequent control of the warping of large FOPLP panels (>500mm) within 50μm.

[0078] In one embodiment, after forming the release layer 11 and before forming the seed layer 12, the method further includes: performing plasma activation on the surface of the release layer 11 away from the carrier plate 1 to increase the cleanliness and adhesion of the release layer 11 surface. The plasma activation is carried out in an oxygen atmosphere, and the power of the plasma activation is 200W~400W, and the time is 100s~150s. In this embodiment, the power of the plasma activation is 300W, and the time is 120s.

[0079] In one embodiment, such as Figures 3 to 5 As shown, a dry film structure 2 is formed on one side of the carrier plate 1, comprising:

[0080] A dry film layer 21 is formed on one side of the carrier plate 1. The dry film layer 21 is formed on the side of the seed layer 12 away from the carrier plate 1. The dry film layer 21 is a photosensitive dry film. The method for forming the dry film layer 21 includes vacuum hot pressing or other suitable methods. The temperature for vacuum hot pressing the dry film layer 21 is 100°C, the pressure is 2MPa, and the time is 5min. The thickness range of the dry film layer 21 is 5μm~20μm. In this embodiment, the thickness range of the dry film layer 21 is 8μm. The photosensitive dry film layer 21 has high resolution and excellent photolithography performance. Compared with the thinner PI dielectric layer formed by conventional spin coating, it has a higher material utilization rate. The material utilization rate is increased from less than 40% in the traditional process to more than 95%, and the raw material loss is reduced by more than 55%, which significantly reduces the production cost and avoids material waste. In the subsequent process of forming the via 23, it can meet the requirements of small linewidth for forming the high-density redistribution layer 5 and obtaining the via 23 with vertical sidewalls.

[0081] A via 23 is formed penetrating the dry film layer 21. The method for forming the via 23 includes: forming a patterned photoresist layer on the side of the dry film layer 21 away from the substrate; irradiating the photoresist layer in the exposed area with i-line (365nm) ultraviolet light to cause a chemical change; forming a plurality of spaced vias 23 within the dry film layer 21 based on the patterned photoresist layer; the method for forming the vias 23 includes dry etching, wet etching, or other suitable methods. The diameter of the via 23 ranges from 2μm to 3μm; in this embodiment, the diameter of the via 23 is 3μm.

[0082] A conductive paste, comprising nano-silver paste and a low-boiling-point solvent, is vacuum-injected into the through hole 23.

[0083] The conductive paste is cured to obtain the conductive pillar 22. The conductive paste is formed by vacuum injection or other suitable methods. The silver ion particle size range in the conductive paste is 45nm~70nm, for example, 50nm. The low-boiling-point solvent is 10% acetone to ensure uniform silver ion distribution in the conductive paste, thereby ensuring the conductivity of the conductive pillar 22. Its boiling point is 56℃. Furthermore, it should be noted that the thickness of the formed conductive pillar 22 is less than the thickness of the dry film layer 21 but greater than half the thickness of the dry film layer 21, to ensure that the subsequent protrusion is embedded in the through-hole 23 while forming a solid-phase diffusion connection with the conductive pillar 22.

[0084] Specifically, please refer to Figure 6 Steps S3 to S4 are executed to provide a conductive structure 3, wherein the conductive structure 3 includes a main body and a protrusion disposed on one side of the main body, the protrusion corresponding to the through hole 23 one by one; the conductive structure 3 and the dry film structure 2 are hot-pressed together, wherein the protrusion is embedded in the through hole 23 and forms a solid-phase diffusion connection with the conductive post 22, and the main body is attached to the side of the dry film layer 21 away from the carrier plate 1.

[0085] In one embodiment, the main body is made of copper or other suitable material; the thickness of the main body ranges from 1μm to 2μm, and in this embodiment, the thickness of the main body is 1.5μm. The protrusion is made of at least one of copper and tin, and the thickness of the protrusion is no more than half the thickness of the main body; in this embodiment, the thickness of the protrusion ranges from 1μm to 2μm. The protrusion is a pre-defined structure that corresponds one-to-one with the through hole 23, enabling precise connection to the conductive post 22.

[0086] The conductive structure 3 and the dry film structure 2 are hot-pressed together. The hot-pressing temperature ranges from 120℃ to 140℃, the pressure ranges from 2.5MPa to 3.5MPa, and the pressing time ranges from 9min to 12min. In this embodiment, the hot-pressing temperature is 130℃, the pressure is 3MPa, and the pressing time is 10min. The above pressing temperature is lower than the upper temperature resistance limit of the release layer 11, which can avoid thermal failure of the release layer 11 and at the same time activate the diffusion activity of silver ions. During the pressing process, the pre-set protrusions are embedded in the conductive paste area within the through holes 23, forming a solid-phase diffusion connection with the conductive pillars 22. Under the action of hot pressing, the metal atoms of the protrusions and silver ions diffuse and permeate each other, forming a metallurgical bonding interface. Compared with the interlayer interconnection resistance of the traditional electroplating copper process, this method has a higher resistance. At 80mΩ, the contact resistance of this connection method is less than 50mΩ, which is reduced by about 37.5%, which is beneficial to improving signal transmission efficiency and electrical performance. It also has higher connection strength and can withstand subsequent thermal cycling processes, further ensuring interconnection reliability. Furthermore, the peel strength between the protrusion and the conductive post 22 after pressing is ≥1.2kN / m. The ultra-thin copper foil material body is formed by hot pressing to replace electroplated copper, ensuring the thickness uniformity of the subsequent redistribution layer 5, with its thickness deviation within the range of ±0.1μm.

[0087] Specifically, please refer to Figures 7 to 9 Step S5 is executed, and the main body is etched from the side of the main body away from the dry film layer to obtain the redistribution layer 5.

[0088] In one embodiment, such as Figures 7 to 9 As shown, the main body is etched from the side of the main body away from the dry film layer to obtain the redistribution layer 5, which includes:

[0089] A patterned hard mask layer 4 is formed on the side of the main body away from the dry film layer 21;

[0090] A patterned hard mask layer 4 is formed on the side of the main body away from the dry film layer 21, including:

[0091] A hard mask structure 41 is provided; the thickness of the hard mask structure 41 is in the range of 1μm to 3μm, the material of the hard mask structure 41 is a siloxane acrylate hybrid hard mask, the coefficient of thermal expansion is in the range of 10ppm / ℃ to 20ppm / ℃, in this embodiment, the coefficient of thermal expansion is in the range of 15ppm / ℃, and the thickness of the hard mask structure 41 is 2μm.

[0092] An anchor point structure (not shown) is formed on one side of the hard mask structure 41 to be pressed. The anchor point structure is obtained by CF4 plasma treatment. The power range of the plasma treatment is 40W~70W, for example 50W. The thickness range of the anchor point structure is 0.5μm~2μm. The anchor point structure significantly improves the bonding force between the hard mask structure 41 and the hard mask structure by about 40%, which helps to ensure the stability of the subsequent etching process of the hard mask structure 41. At the same time, it can ensure the vertical structure accuracy of the redistribution layer 5 formed based on the patterned hard mask layer 4.

[0093] The side of the hard mask structure 41 with the anchor point structure is hot-pressed onto the side of the main body away from the carrier plate 1;

[0094] The hard mask structure 41 is etched to obtain a patterned hard mask layer 4. The bonding strength between the two is further enhanced by the mechanical bonding of the anchor point structure to the surface of the main body. After lamination, the hard mask structure 41 is coated with photoresist, exposed, and developed to form a development window pattern with a linewidth of 2μm. The hard mask structure 41 is then etched using this pattern as a mask to finally obtain a patterned hard mask layer 4 that meets the design requirements, providing a precise masking effect for the subsequent pattern transfer of the redistribution layer 5.

[0095] The main body is etched based on the patterned hard mask layer 4 to obtain the redistribution layer 5.

[0096] Specifically, the main body is etched based on the patterned hard mask layer 4 to obtain the redistribution layer 5, including:

[0097] Based on the patterned hard mask layer 4, the portion of the main body not covered by the hard mask layer 4 is subjected to a first etching process at a first etching rate. The sidewall of the main body after the first etching process has a first etching angle, which ranges from 88 degrees to 91 degrees. The first etching rate ranges from 0.8 μm / min to 1.5 μm / min. In this embodiment, the first etching rate is 1 μm / min, which can ensure the verticality of the etched structure and the accuracy of the initial contour.

[0098] The main body, after the first etching process, undergoes a second etching process at a second etching rate to obtain the redistribution layer 5. The second etching rate is lower than the first etching rate. The range of the second etching rate is 0.1 μm / min to 0.3 μm / min. In this embodiment, the second etching rate is 0.2 μm / min for fine finishing. By reducing the etching rate, precise control of the etching morphology is achieved, ultimately forming the redistribution layer 5 that meets the design requirements. It should be noted that during the etching process of the main body, the etching selectivity ratio between the main body and the dry film layer 21 must be ≥200:1. This ensures that the dry film layer 21 is effectively protected from over-etching during the precise processing of the redistribution layer 5 pattern. Simultaneously, controlling the lateral etching ratio to be less than 5% minimizes lateral erosion of the pattern edges, ensuring the dimensional accuracy and sidewall flatness of the redistribution layer 5 lines, and meeting the fine processing requirements of high-density wiring.

[0099] Remove the patterned hard mask layer 4.

[0100] In one embodiment, etching the main body based on the patterned hard mask layer 4 to obtain the redistribution layer 5 includes: wet etching the main body using a preset etching solution, the preset etching solution including a reactant, a first auxiliary agent and a second auxiliary agent, the concentration range of the reactant being 8wt% to 15wt%, the concentration range of the first auxiliary agent being 4wt% to 8wt%, and the concentration range of the second auxiliary agent being 0.05ppm to 1.5ppm. In this embodiment, the reactant is NH4OH, with a concentration ranging from 8wt% to 15wt%. By providing an alkaline environment, it achieves etching and dissolution through a chemical reaction with the host material, serving as the main reaction medium in the etching process. The first auxiliary agent is (NH4)2S2O8, with a concentration ranging from 5wt% to 8wt%, acting as an oxidant to enhance the reactivity of the etching solution, accelerate the etching process, and improve the stability of the etching rate. The second auxiliary agent is silver ions, with a concentration ranging from 0.05ppm to 0.2ppm. These ions can selectively adsorb onto the etching interface, suppressing excessive sidewall etching by regulating reaction kinetics, improving the anisotropy of the etching morphology, and enhancing the perpendicularity and edge smoothness of the etched structure. The synergistic effect of these three agents ensures etching efficiency while precisely controlling the etching contour and surface quality, meeting the fine processing requirements of the redistribution layer 5.

[0101] The above-mentioned patterned hard mask layer 4 is formed on the side of the main body away from the dry film layer 21. The hard mask layer 4 is a siloxane acrylate hybrid hard mask. Based on the patterned hard mask layer 4, the part of the main body not covered by the hard mask layer 4 is subjected to a first etching process at a first etching rate. The main body after the first etching process is subjected to a second etching process at a second etching rate to obtain the redistribution layer 5. The cross-sectional angle of the redistribution layer 5 is close to that of an ideal rectangle, which improves the uniformity of current density distribution compared with the traditional trapezoidal cross-section and effectively avoids electromigration failure caused by current accumulation.

[0102] In one embodiment, see Figures 10 to 13 After etching the main body based on the patterned hard mask layer 4 to obtain the redistribution layer 5, the process further includes:

[0103] The step of forming a dry film structure 2 on one side of the carrier plate 1 is to form at least one redistribution layer 5 on the side of the redistribution layer 5 away from the carrier plate, wherein the hot pressing temperature increases layer by layer when forming the dry film layer 21 corresponding to each redistribution layer 5.

[0104] The dry film layer 21 is made of chemically amplified photosensitive PI (polyimide), with a photolithographic resolution ≤2μm and a curing temperature ≤180℃, which can meet the fine patterning requirements of the redistribution layer 5. For example, the redistribution layer 5 has no fewer than 8 layers. Furthermore, to adapt to the stacking process of the multilayer redistribution layer 5, a layer-controlled hot pressing strategy is adopted in the fabrication process of the multilayer redistribution layer 5: the hot pressing temperature of the dry film layer 21 corresponding to each redistribution layer 5 increases by 5℃ layer by layer, wherein the hot pressing temperature of the first dry film layer 21 is 120℃, and as the number of stacked layers increases, the hot pressing temperature increases to 150℃ at the eighth layer. This design can ensure that each dry film dielectric layer is fully bonded to the underlying structure, while avoiding performance degradation of the underlying material due to repeated high temperatures.

[0105] Furthermore, to enhance the stability of the multilayer stacked structure, additional PDMS (polydimethylsiloxane) flexible segments are added to the dry film layer 21, resulting in a material elongation at break >50%. These flexible segments effectively alleviate internal stress caused by differences in the coefficients of thermal expansion of the materials during multilayer stacking, significantly reducing the warpage of the overall structure, ensuring the flatness and structural reliability of the multilayer redistribution layers 5 after stacking, and meeting the stringent requirements of high-precision packaging for the substrate shape.

[0106] The above-mentioned method involves forming a dry film structure 2 on one side of a carrier plate 1. The dry film structure 2 includes a dry film layer 21 and conductive pillars 22. The dry film layer 21 has through holes 23, and the conductive pillars 22 fill at least part of the through holes 23. A conductive structure 3 is provided, including a main body and a protrusion disposed on one side of the main body, with the protrusion corresponding to the through holes 23. The conductive structure 3 is then thermo-pressed together with the dry film structure 2, wherein the protrusion is embedded in the through holes 23 and forms a solid-phase diffusion connection with the conductive pillars 22. The main body is attached to the side of the dry film layer 21 away from the carrier plate 1. A patterned hard mask layer 4 is then formed on the side of the main body away from the dry film layer 21. The hard mask layer 4 is a siloxane acrylate hybrid hard mask. Based on the patterned hard mask layer 4, the portion of the main body not covered by the hard mask layer 4 is etched at a first etching rate. A first etching process is performed, followed by a second etching process at a second etching rate on the main body after the first etching process, to obtain the redistribution layer 5. Through the improvement of the above preparation method, the redistribution layer 5 has more than 8 layers, resulting in a 33% increase in density compared to organic substrates (≤6 layers). The alignment error of the interlayer vias 23 is ≤±0.1μm, a 95% improvement compared to traditional processes (±2μm). The short-circuit failure rate is reduced from 1.2% to below 0.05%, and the product yield is increased from 65% to over 90%. It is compatible with existing fan-out panel-level packaging (PLP) production lines, requiring only 30% of the equipment modification investment of traditional wafer-level packaging (WLP). Seamless switching from 8-inch to 12-inch substrates is possible, significantly improving production flexibility and meeting the packaging requirements for higher integration, thus expanding application scenarios. Therefore, the packaging structure preparation method of this application significantly improves the performance and yield of the packaging structure.

[0107] In one embodiment, after the redistribution layer 5 reaches a preset number of layers, the process further includes FOPLP (Fan-Out Panel-Level Packaging) integration, the specific steps of which include:

[0108] Chip mounting; wherein, chip mounting adopts the Chip-Last process route, and the electrical performance and structural integrity of the prepared 8-layer redistribution layer 5 are tested to ensure that the bottom layer wiring meets the design requirements; after passing the test, the chip is aligned and mounted with the redistribution layer 5 using flip-chip technology, with the mounting accuracy controlled within ±2μm to ensure the reliability of the electrical connection between the chip and the redistribution layer 5;

[0109] Molding and cutting; wherein, molding and cutting includes: firstly, using epoxy molding compound (EMC) to mold the mounted chip and redistribution layer 5 together to form a protective package to prevent the internal structure from being affected by the external environment; then, using laser debonding process to peel off the initial carrier board 1 to expose the bottom of the package; subsequently, solder balls (tin-silver-copper alloy solder balls) are implanted at the preset pad positions of the package to build an external electrical connection interface; finally, according to the preset package size, the panel-level package is cut to obtain a single independent FOPLP packaged device.

[0110] In one embodiment, this application also provides a packaging structure, which is prepared by the packaging structure preparation method described in any of the above embodiments. The packaging structure includes: a dry film structure 2, a conductive structure 3, and a redistribution layer 5. The dry film structure 2 includes a dry film layer 21 and conductive pillars 22. The dry film layer 21 has through holes 23, and the conductive pillars 22 fill at least part of the through holes 23. The conductive structure 3 is thermally pressed together with the dry film structure 2. The conductive structure 3 includes a redistribution layer 5 and a protrusion disposed on one side of the redistribution layer 5. The protrusion corresponds one-to-one with the through holes 23. The protrusion is embedded in the through holes 23 and forms a solid-phase diffusion connection with the conductive pillars 22. The redistribution layer is attached to the side away from the dry film layer 21. The redistribution layer 5 is formed by etching the main body.

[0111] In one embodiment, the core part of the encapsulation structure is a multi-layer redistribution layer, wherein the preset number of redistribution layers is not less than 8 layers, and in order to adapt to the multi-layer wiring design, the corresponding dry film structure 2 also has the same number of layers as the redistribution layer 5, so as to ensure the insulation and connection reliability of each layer of wiring.

[0112] Furthermore, the packaging structure formed in this application is measured and analyzed. The linewidth of the redistribution layer 5 formed in this application is controlled to ≤2μm, which can meet the requirements of high-density wiring design and improve the integration of the package. The misalignment error of the adjacent layer vias 23 is strictly controlled to ≤±0.1μm to ensure the accuracy and reliability of the interlayer electrical connection and avoid signal transmission loss or short circuit risk caused by misalignment. In the 28GHz high-frequency band, the signal insertion loss needs to be controlled to <0.15dB / mm to ensure the efficient transmission of high-frequency signals and meet the stringent requirements of signal integrity for high-frequency application scenarios such as 5G millimeter wave.

[0113] In one embodiment, the package structure, in addition to the multilayer redistribution layer 5, also includes a chip, a protective package, and solder balls. The chip is electrically connected to the redistribution layer 5 via flip-chip bonding to enable signal and energy transmission. The protective package, made of epoxy molding compound through molding, encapsulates the chip and redistribution layer, providing physical protection and environmental isolation. The solder balls, made of a tin-silver-copper alloy, are mounted on pre-set pads at the bottom of the package, serving as the interface between the package structure and external circuitry.

[0114] It should be understood that, although Figure 1 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1 At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0115] In the description of this specification, references to terms such as "some embodiments," "other embodiments," and "ideal embodiments" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0116] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0117] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for preparing a packaging structure, characterized in that, include: Provide carrier board; A dry film structure is formed on one side of the carrier plate. The dry film structure includes a dry film layer and conductive pillars. The dry film layer has through holes, and the conductive pillars fill at least a portion of the through holes. A conductive structure is provided, wherein the conductive structure includes a main body and a protrusion disposed on one side of the main body, the protrusion corresponding to the through hole one by one; The conductive structure is hot-pressed together with the dry film structure, wherein the protrusion is embedded in the through hole and forms a solid-phase diffusion connection with the conductive post, and the main body is attached to the side of the dry film layer away from the carrier plate. The main body is etched from the side of the main body away from the dry film layer to obtain a redistribution layer.

2. The method for preparing the packaging structure according to claim 1, characterized in that, The etching process performed on the body portion from the side away from the dry film layer to obtain a redistribution layer includes: A patterned hard mask layer is formed on the side of the main body away from the dry film layer; The main body is etched based on the patterned hard mask layer to obtain the redistribution layer.

3. The method for preparing the packaging structure according to claim 2, characterized in that, The formation of a patterned hard mask layer on the side of the main body away from the dry film layer includes: Provide a hard mask structure; An anchor point structure is formed on one side of the hard mask structure; The side of the hard mask structure with the anchor point structure is heat-pressed onto the side of the main body away from the carrier plate; The hard mask structure is etched to obtain a patterned hard mask layer.

4. The method for preparing the packaging structure according to claim 2, characterized in that, The patterned hard mask layer is used to etch the main body to obtain the redistribution layer, including: Based on the patterned hard mask layer, the portion of the main body not covered by the hard mask layer is subjected to a first etching process at a first etching rate, wherein the sidewall of the main body after the first etching process has a first etching angle, and the range of the first etching angle is 88 degrees to 91 degrees. The main body portion after the first etching process is subjected to a second etching process at a second etching rate to obtain the redistribution layer, wherein the second etching rate is less than the first etching rate. Remove the patterned hard mask layer.

5. The method for preparing the packaging structure according to claim 2, characterized in that, The patterned hard mask layer is used to etch the main body to obtain the redistribution layer, including: The main body is wet-etched using a preset etching solution, which includes a reactant, a first auxiliary agent, and a second auxiliary agent. The concentration range of the reactant is 8%wt to 14%wt, the concentration range of the first auxiliary agent is 4%wt to 8%wt, and the concentration range of the second auxiliary agent is 0.5ppm to 1.5ppm.

6. The method for preparing the packaging structure according to claim 1, characterized in that, After etching the main body portion from the side away from the dry film layer to obtain the redistribution layer, the method further includes: Returning to the step of forming a dry film structure on one side of the carrier plate, at least one redistribution layer is formed on the side of the redistribution layer away from the carrier plate. In the process of forming the dry film layer corresponding to each redistribution layer, the hot pressing temperature increases layer by layer.

7. The method for preparing the packaging structure according to claim 1, characterized in that, Before forming a dry film layer on one side of the carrier plate, the method further includes: The carrier plate is pretreated.

8. The method for preparing the packaging structure according to claim 7, characterized in that, The pretreatment of the carrier plate includes: A release layer is formed on one side of the carrier plate; A seed layer is formed on the side of the peeling layer away from the carrier plate.

9. The method for preparing the packaging structure according to claim 1, characterized in that, The formation of a dry film structure on one side of the carrier plate includes: A dry film layer is formed on one side of the carrier plate; The through-hole is formed within the dry film layer; A conductive paste is injected into the through hole, the conductive paste comprising nano-silver paste and a low-boiling-point solvent; The conductive slurry is cured to obtain the conductive column.

10. A packaging structure, characterized in that, The encapsulation structure is prepared using the encapsulation structure preparation method as described in any one of claims 1 to 9.

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