Hardware protection circuit of multi-cascade power supply system and fault response method

Abstract

The invention belongs to the technical field of electronic power, and particularly relates to a hardware protection circuit of a multi-cascade power system and a fault response method, and the circuit comprises a main controller, a plurality of fault signal generation branches, a public hardware fault bus and a plurality of isolation control branches. Each isolation control branch is composed of an optical coupling isolator and a switch tube, receives a fault signal of the corresponding subunit, and drives a common fault bus level to change. And the main controller detects the bus state in real time through hardware interruption, and directly triggers a protection action. Through hardware interconnection and electrical isolation design, microsecond-level fault response under a multi-level system is achieved, the defects that a traditional software protection mode is high in delay, and ground potentials among multiple levels are inconsistent and difficult to isolate are overcome, and the reliability and safety of a complex power system are remarkably improved.

Description

Technical Field

[0001] This invention belongs to the field of electronic power technology, specifically relating to a hardware protection circuit and fault response method for a multi-cascaded power supply system. Background Technology

[0002] In the field of hardware protection for multi-cascaded power systems, existing technologies typically employ fault response mechanisms based on software communication. The system transmits fault status information through digital communication links (such as CAN bus or SPI interface) between the main controller and each subunit. The main control unit receives this information, performs logical judgments, and issues protection commands. This approach can identify and handle various fault types and has been widely used in various industrial power supplies, new energy converters, and energy storage systems. In addition, some hardware protection circuits use level detection combined with comparators to monitor specific voltage or current signals in real time and trigger shutdown or alarm actions when thresholds are exceeded.

[0003] However, the aforementioned existing technical solutions still have certain limitations. Software communication methods require a relatively long time for protocol processing and program scheduling, making it difficult to meet the high-speed protection requirements within a few hundred microseconds. Furthermore, they are susceptible to communication delays and interference in complex multi-level systems. On the other hand, traditional hardware detection circuits typically do not consider the issues of electrical isolation and ground potential inconsistencies between multi-level systems, making it difficult to directly extend to multi-level bidirectional power supply structures, thus limiting their application scope and reliability. Summary of the Invention

[0004] The purpose of this invention is to provide a hardware protection circuit and fault response method for a multi-cascaded power supply system, so as to solve the technical problems of slow response speed, difficulty in achieving electrical isolation and multi-level bidirectional compatibility in the hardware protection circuit of the multi-cascaded power supply system in the prior art.

[0005] The present invention achieves the above objectives through the following technical solutions: Firstly, the present invention proposes a hardware protection circuit for a multi-cascaded power supply system, the protection circuit comprising: The main controller is equipped with a controller protection circuit and a signal detection terminal; A fault signal generation branch is electrically connected to any one-level sub-unit in the multi-cascaded power supply system, and is used to generate a fault signal when a fault occurs in any one-level sub-unit. A common hardware fault bus, the first end of which is connected to the signal detection terminal of the main controller and remains at a high level when there is no fault. An isolation control branch, wherein the input terminal of the isolation control branch is used to receive the fault signal of the fault signal generation branch, and its output terminal is connected to the second terminal of the common hardware fault bus; When any of the fault signal generation branches generates a fault signal, the corresponding isolation control branch drives the common hardware fault bus to respond to the fault signal and change its level state, thereby triggering the main controller to perform a protection action.

[0006] Furthermore, each sub-unit of the multi-cascaded power supply system includes a power supply unit, a control unit, and a load unit; each sub-unit is equipped with a fault signal generation branch and an isolation control branch, and has a fault signal output terminal; the fault signal output terminal of each unit independently triggers the level state change of the common hardware fault bus through its corresponding isolation control branch.

[0007] Furthermore, one of the isolation control branches includes an optocoupler U1 and a switching device Q1; The collector of the phototransistor on the secondary side of the optocoupler U1 is connected to the common hardware fault bus; The emitter of the phototransistor on the secondary side of the optocoupler U1 is connected to the system reference ground; The primary-side LED input terminal of the optocoupler U1 is connected to the power supply VP2 through a current-limiting resistor R9; The collector of the switching device Q1 is connected to the cathode of the primary-side light-emitting diode of the optocoupler U1; The emitter of the switching device Q1 is connected to the system reference ground; A pull-down resistor R8 and a filter capacitor C3 are connected between the control electrode of the switching device Q1 and the reference ground. The switching device Q1 can be a transistor or an insulated-gate field-effect transistor.

[0008] Furthermore, the controller protection circuit includes an optocoupler U4; The anode of the primary-side light-emitting diode of the optocoupler U4 is connected to the first pull-up power supply through the current-limiting resistor R3; The cathode of the primary-side light-emitting diode of the optocoupler U4 is connected to a common hardware fault bus to receive fault signals; The collector of the phototransistor on the secondary side of the optocoupler U4 is connected to the second pull-up power supply; The emitter of the phototransistor on the secondary side of the optocoupler U4 is connected to the first end of the pull-down resistor R4, and the second end of the pull-down resistor R4 is connected to the secondary side reference ground. The first end of the pull-down resistor R4 is simultaneously connected to the hardware bus voltage monitoring point through the current-limiting resistor R5. The hardware bus voltage monitoring point is connected to the hardware protection signal detection terminal of the main controller; A filter capacitor C6 is connected in parallel between the hardware bus voltage monitoring point and the secondary reference ground.

[0009] Furthermore, the primary side of the optocoupler U1 is connected to the output terminal of the fault signal generation branch, and when its secondary side phototransistor is turned on, it controls the base current of the subsequent switching device Q1, causing Q1 to enter a saturated conduction state. When the switching device Q1 is saturated and turned on, the level of the common hardware fault bus is pulled down to a low level; The main controller monitors the voltage level of the hardware bus monitoring point in real time through its hardware protection signal detection terminal; wherein the voltage level of the hardware bus monitoring point is consistent with the voltage level of the common hardware fault bus; When the main controller detects that the hardware bus voltage monitoring point is low, it performs at least one of the following protective actions: shutting down the fault-level power supply, switching to the backup power supply, or triggering an alarm.

[0010] Furthermore, the hardware protection signal detection terminal of the main controller is configured as an input pin for edge-triggered interrupt mode or low-level-triggered interrupt mode.

[0011] Furthermore, the secondary operating current of the optocoupler U1 is less than the product of its primary current and the current transfer ratio, and the collector current of the transistor Q1 is less than the product of its base current and the amplification factor; the parameters of the current transfer ratio and the amplification factor of the transistor Q1 are configured such that when the fault signal is valid, both the optocoupler U1 and the transistor Q1 enter the saturation conduction state.

[0012] Furthermore, the multi-cascaded power supply circuit is a bidirectional power supply system. In the isolation control branch of each unit, the power supply VPx of the primary circuit of the optocoupler U1 is grounded with the reference ground of the unit; the power supply of the secondary circuit of the optocoupler U1 is grounded with the reference ground of the main controller.

[0013] Secondly, the present invention proposes a fault response method based on the hardware protection circuit described in any of the above claims, applied to a multi-cascaded bidirectional power supply system, comprising the following steps: Each subunit of the bidirectional power supply system independently monitors its own operating status; When any first-level sub-unit detects a local fault, its corresponding fault signal generation branch generates a local fault signal SIGx. The local fault signal SIGx drives the corresponding isolation control branch, which applies the electrically isolated fault response signal to the common hardware fault bus. The level state of the common hardware fault bus changes from high to low in response to the action of any isolation control branch. The main controller detects the low-level state of the common hardware fault bus through a hardware interrupt to trigger at least one protection action, including shutting down the fault-level power supply, switching to the backup power supply, or triggering an alarm.

[0014] The beneficial effects of this invention are as follows: 1. This invention achieves electrical isolation and high-speed transmission of fault signals by setting up isolation control branches based on optocouplers and switching devices between the fault signal output terminals of each sub-unit and the common hardware fault bus. This effectively overcomes the signal interference and reliability problems caused by inconsistent reference grounds in multi-level systems. By adopting a direct hardware drive method, the common bus level can be quickly pulled low through the corresponding branch when any sub-unit fails. The main controller responds in real time through a hardware interrupt detection mechanism, eliminating software communication and processing delays and significantly improving the real-time performance and accuracy of system protection. The overall structure is simple, easy to expand, and applicable to various multi-level bidirectional power supply topologies.

[0015] 2. The controller protection circuit in this invention achieves safe, reliable, and isolated detection and transmission of the common hardware fault bus level status. This circuit uses an optocoupler isolator to electrically isolate and convert low-level signals on the fault bus before transmitting them to the signal detection terminal of the main controller. This effectively avoids grounding interference and potential difference effects between the front-end power circuit and the controller logic circuit, ensuring the safety and signal integrity of the main control unit. Simultaneously, this design enables the main controller to respond to bus status changes in real time via hardware interrupts, eliminating the need for software polling or protocol parsing, thus ensuring high-speed fault identification and protection action triggering at the microsecond level. Attached Figure Description

[0016] Figure 1 A system block diagram of a hardware protection circuit for a multi-cascaded power supply system provided in one embodiment of this application; Figure 2 A technical roadmap for a multi-cascaded power supply system provided in one embodiment of this application; Figure 3 A schematic diagram of a multi-cascaded system provided in one embodiment of this application; Figure 4 A circuit schematic diagram of a controller protection circuit provided in one embodiment of this application; Figure 5 A circuit schematic diagram of an independent control signal for a first-level subunit provided in one embodiment of this application; Figure 6 This is a flowchart illustrating a fault response method for a hardware protection circuit of a multi-cascaded bidirectional power supply system, as provided in another embodiment of this application. Detailed Implementation

[0017] The present application will now be described in further detail with reference to the accompanying drawings. It should be noted that the following specific embodiments are only used to further illustrate the present application and should not be construed as limiting the scope of protection of the present application. Those skilled in the art can make some non-essential improvements and adjustments to the present application based on the above application content.

[0018] In practical applications of the multi-cascaded power supply circuits (such as bidirectional DC-DC converters, energy storage converter systems, or uninterruptible power supply systems) involved in this invention, due to the complex cascaded structure, if any sub-unit (such as a power supply unit, control unit, or load unit) fails, relying on software communication for fault response results in communication delays and time-consuming protocol processing, making it difficult to achieve rapid protection within microseconds. This leads to fault propagation, decreased system stability, and even equipment damage. Especially in multi-stage bidirectional power supply systems, the reference ground potentials of each stage are inconsistent, making it difficult for traditional hardware protection circuits to achieve electrical isolation and rapid signal transmission, thus failing to meet the protection requirements of high reliability and high real-time performance.

[0019] To address the aforementioned problems, this invention provides a fast hardware protection circuit and method for multi-cascaded power supply systems. The circuit includes a main controller, multiple fault signal generation branches, a common hardware fault bus, and multiple isolation control branches. Each fault signal generation branch corresponds to a first-level power supply subunit and outputs a signal upon detecting a fault. This signal, through an isolation control branch composed of optocouplers and switching devices, drives the common hardware fault bus level from high to low. The main controller detects bus state changes in real time via hardware interrupts, directly triggering protection actions. This achieves electrical isolation and microsecond-level fast fault response in multi-level systems, significantly improving system reliability and response speed.

[0020] Example 1 Please see Figures 1-5This application provides a specific embodiment of a hardware protection circuit for a multi-cascaded power supply system. The protection circuit includes a main controller, multiple fault signal generation branches, a common hardware fault bus HW_BUS, and multiple isolation control branches. The main controller has a controller protection circuit and a signal detection terminal, which is configured as an input pin supporting edge-triggered or level-triggered interrupts to achieve microsecond-level response. Each fault signal generation branch is electrically connected to a specific sub-unit (such as a power conversion unit, control unit, or load unit) in the multi-cascaded power supply system and generates a low-active fault signal (such as SIGx, including SIG1, SIG2, SIG3...) when a fault occurs in the corresponding sub-unit. The first end of the common hardware fault bus is connected to the signal detection terminal of the main controller and remains high when there is no fault. The input terminal of each isolation control branch receives the fault signal from the fault signal generation branch, and its output terminal is connected to the second end of the common hardware fault bus. When any fault signal generation branch generates a fault signal, it drives the common hardware fault bus HW_BUS to respond to the fault signal and change its level state through its corresponding isolation control branch, thereby triggering the main controller to execute a protection action.

[0021] Specifically, the sub-units of the multi-cascaded power supply system include power supply units, control units, and load units. Each sub-unit is equipped with a fault signal generation branch and an isolation control branch, and has a fault signal output terminal. The fault signal output terminal of each unit independently triggers the level state change of the common hardware fault bus HW_BUS through its corresponding isolation control branch, thereby realizing distributed fault detection and centralized fast response.

[0022] To achieve the above functions, the power supply unit, control unit, and load unit each have built-in local fault detection circuits (such as overvoltage comparators, overcurrent sampling amplifiers, or temperature monitoring ICs), which can generate a low-level active fault signal SIGx when an abnormality is detected. This signal is sent to the corresponding isolation control branch of this unit.

[0023] In this application, the bidirectional power supply system can be a bidirectional DC-DC converter system, a power storage converter (PCS) system, or an uninterruptible power supply (UPS) system.

[0024] Please combine Figure 3 and Figure 5As a preferred embodiment, an isolation control branch includes an optocoupler U1 and a switching device Q1; the collector of the phototransistor on the secondary side of the optocoupler U1 is connected to the common hardware fault bus HW_BUS; the emitter of the phototransistor on the secondary side of the optocoupler U1 is connected to the system reference ground; the input terminal of the LED on the primary side of the optocoupler U1 is connected to the power supply VP2 (e.g., +12V or +15V) through a current-limiting resistor R9; the collector of the switching device Q1 is connected to the cathode of the LED on the primary side of the optocoupler U1; the emitter of the switching device Q1 is connected to the system reference ground; a pull-down resistor R8 and a filter capacitor C3 are connected between the control terminal of the switching device Q1 and the reference ground; the switching device Q1 can be a transistor or an insulated-gate field-effect transistor.

[0025] Understandably, in the isolation control branch, when a fault occurs in this sub-unit, the fault signal generation branch outputs a low-level active signal SIGx. This signal acts on the control electrode of the switching device Q1, causing it to conduct. After Q1 conducts, the LED on the primary side of the optocoupler U1 forms a circuit and lights up, thereby triggering the phototransistor on the secondary side to conduct, pulling the common hardware fault bus HW_BUS from high to low. The entire process achieves electrical isolation through the optocoupler U1, ensuring the safe transmission of signals between units with different ground potentials.

[0026] In one implementation, the DC current gain β of transistor Q1 should satisfy the following condition: when the fault signal SIGx is active (low level), the provided base current IB > (collector current IC / β) to ensure that Q1 operates in the saturation region, thereby providing sufficient drive current for the primary side of optocoupler U1. All component parameters can be adjusted according to the actual system's power supply voltage level, noise environment, and response speed requirements.

[0027] Please combine Figure 3 and Figure 4As a preferred embodiment, the controller protection circuit includes an optocoupler U4 for isolating and detecting the level state of the common hardware fault bus HW_BUS and transmitting signals. The anode of the primary-side LED of the optocoupler U4 is connected to the first pull-up power supply through a current-limiting resistor R3. The cathode of the primary-side LED of the optocoupler U4 is connected to the common hardware fault bus to receive fault signals. The collector of the secondary-side phototransistor of the optocoupler U4 is connected to the second pull-up power supply. The emitter of the secondary-side phototransistor of the optocoupler U4 is connected to the first terminal of the pull-down resistor R4, and the second terminal of the pull-down resistor R4 is connected to the secondary-side reference ground. The first terminal of the pull-down resistor R4 is also connected to the hardware bus voltage monitoring point through a current-limiting resistor R5. This monitoring point is directly connected to the hardware protection signal detection terminal of the main controller (configured as an interrupt input pin). The hardware bus voltage monitoring point is connected to the hardware protection signal detection terminal of the main controller. A filter capacitor C6 is connected in parallel between the hardware bus voltage monitoring point and the secondary-side reference ground.

[0028] The controller protection circuit works as follows: When the system is normal and fault-free, HW_BUS is high, the primary side of optocoupler U4 has no current and is not conducting, the secondary side phototransistor is cut off, and the secondary side outputs a high level (VCC3). After current limiting by current limiting resistor R5 and filtering by filter capacitor C6, the hardware bus voltage monitoring point is high. When any unit fault causes HW_BUS to be pulled low, the primary side of optocoupler U4 conducts, and the secondary side saturates and conducts, pulling the potential of the V_BUS_HW monitoring point low to near ground. The main controller triggers a hardware interrupt to execute protection by monitoring the low-level transition of this point in real time.

[0029] It should be noted that optocoupler U4 should be a high-speed or standard optocoupler, and its primary-side operating current can be adjusted via current-limiting resistor R3. Filter capacitor C6 effectively filters out glitches and interference on the bus, preventing false triggering. All component parameters can be adjusted according to the actual system's power supply voltage, noise environment, and response speed requirements.

[0030] As a preferred embodiment, the primary side of the optocoupler U1 is connected to the output terminal of the fault signal generation branch. When its secondary side phototransistor is turned on, it controls the base current of the subsequent switching device Q1, causing Q1 to enter a saturated conduction state. When the switching device Q1 is saturated conduction, it pulls down the level of the common hardware fault bus to a low level. The main controller monitors the level of the hardware bus voltage monitoring point in real time through its hardware protection signal detection terminal. The level of the hardware bus voltage monitoring point is consistent with the level of the common hardware fault bus. When the main controller detects that the hardware bus voltage monitoring point is low, it performs at least one of the following protection actions: shutting down the fault-level power supply, switching to the backup power supply, or triggering an alarm. The secondary side operating current of the optocoupler U1 is less than the product of its primary side current and the current transfer ratio, and the collector current of the transistor Q1 is less than the product of its base current and the amplification factor. The current transfer ratio and the amplification factor of the transistor Q1 are configured such that when the fault signal is valid, both the optocoupler U1 and the transistor Q1 enter a saturated conduction state.

[0031] In practical implementation, the optocoupler U1 uses a high-speed optocoupler with a typical signal transmission delay of less than 100ns to meet the system's requirement for rapid fault response at the microsecond level. The anode of the primary side of optocoupler U1 is connected to the power supply VPx of this stage through a current-limiting resistor R9, and the cathode is directly connected to the output terminal SIGx of the fault signal generation branch to receive a low-level active fault signal.

[0032] When Q1 is saturated and conducting, its collector-emitter junction presents a low impedance, forcibly pulling the level of the common hardware fault bus HW_BUS from high to low. This low-level state is isolated by optocoupler U2 in the controller's protection circuit and then transmitted to the hardware bus voltage monitoring point V_BUS_HW. The main controller's hardware protection signal detection terminal (configured as an interrupt input pin) monitors the level at this point in real time. Once a low level is detected, a hardware interrupt is immediately triggered to activate the protection action.

[0033] As a preferred embodiment, the hardware protection signal detection pin of the main controller is configured as an input pin in edge-triggered interrupt mode or low-level-triggered interrupt mode. This pin is directly connected to the output monitoring point V_BUS_HW of the controller's protection circuit for real-time detection of changes in the status of the common hardware fault bus HW_BUS.

[0034] As a preferred option, the multi-cascaded power supply circuit is a bidirectional power supply system. In the isolation control branch of each unit, the power supply VPx of the primary circuit of the optocoupler U1 is grounded with the reference ground of the unit; the power supply of the secondary circuit of the optocoupler U1 is grounded with the reference ground of the main controller.

[0035] In this system, the electrical reference ground potentials of each unit (power supply unit, control unit, load unit) may differ. To ensure reliable transmission of fault signals and avoid ground loop interference, the optocoupler U1 in each isolation control branch plays a crucial role in electrical isolation.

[0036] In practice, the power supply for the primary circuit of the optocoupler isolator U1 uses the local power supply VPx and shares the same ground as the reference ground (GNDx) of the local unit. This means that the current loop of the primary LED (from VPx through R9, the primary side of U1 to SIGx, and finally back to GNDx) is completed entirely within the local area of ​​the local unit, ensuring the local integrity of the fault detection signal.

[0037] The power supply for the secondary circuit of optocoupler U1 is an independent isolated power supply VP1, which shares a common ground with the reference ground (GND_MCU) of the main controller. The output circuit of the secondary phototransistor (from VP1 through R1, the secondary side of U1 to GND_MCU) forms an independent path. When the secondary side of optocoupler U1 is turned on, its emitter output current drives the base of switching transistor Q1, forming a base drive circuit (from the emitter of the secondary side of U1 through the base-emitter junction of Q1 to GND_MCU). This circuit shares the same ground plane with the main controller, ensuring that the signal level transmitted to HW_BUS is compatible with the logic level of the main controller's detection terminal.

[0038] Based on the above description of this embodiment, the working principle of the present invention includes the following: Each sub-unit of the power system (including the power supply unit, control unit, and load unit) is independently equipped with a fault detection circuit to monitor the local operating status in real time and generate a low-level active fault signal SIGx when a fault occurs. This signal is sent to the corresponding isolation control branch of the unit, which consists of a high-speed optocoupler isolator U1 and a switching device Q1.

[0039] When the fault signal SIGx is valid (low level), the drive switch Q1 is turned on, thereby illuminating the LED on the primary side of the optocoupler U1. The phototransistor on the secondary side of U1 then turns on, directly pulling the common hardware fault bus HW_BUS from high to low. Electrical isolation is achieved using optocouplers, safely transmitting the fault signal to the secondary circuit that shares ground with the main controller.

[0040] The main controller monitors the HW_BUS level in real time through its hardware protection signal detection pin, which is configured as an input pin for edge-triggered or level-triggered interrupt mode. Once a low level is detected, the main controller immediately responds via a hardware interrupt mechanism, executing the protection action directly without software polling or communication protocol parsing.

[0041] The entire fault response process is implemented entirely based on hardware circuitry. Optical isolation is used to overcome interference from inconsistent ground potentials in multi-level systems, and interrupt-driven operation ensures a microsecond-level rapid response.

[0042] Example 2 Please see Figure 6 Another specific embodiment of this application proposes a fault response method based on the hardware protection circuit in Embodiment 1, characterized in that it is applied to a multi-cascaded bidirectional power supply system and includes the following steps: each sub-unit of the bidirectional power supply system independently monitors its own operating status; when any sub-unit detects a local fault, its corresponding fault signal generation branch generates a local fault signal SIGx; the local fault signal SIGx drives the corresponding isolation control branch to apply the electrically isolated fault response signal to the common hardware fault bus; the level state of the common hardware fault bus changes from high level to low level in response to the action of any isolation control branch; the main controller detects the low level state of the common hardware fault bus through a hardware interrupt to trigger at least one protection action, including shutting down the fault-level power supply, switching the backup power supply, or triggering an alarm.

[0043] Based on the above embodiments, the hardware protection circuit fault response method for a multi-cascaded bidirectional power supply system proposed in this invention has the core working principle of achieving rapid fault detection, isolation, and response through pure hardware circuitry. Each sub-unit of the system (including power supply unit, control unit, and load unit) has independent fault detection functions and continuously monitors local operating parameters. When any unit detects an anomaly, its fault signal generation branch immediately generates a low-active local fault signal SIGx. This signal drives the corresponding isolation control branch, where a high-speed optocoupler isolator achieves electrical isolation between the primary and secondary sides, effectively overcoming common-mode interference and ground potential differences in multi-level systems. After the optocoupler secondary side is turned on, it causes the subsequent switching devices to saturate, pulling the level of the common hardware fault bus HW_BUS from high to low.

[0044] The main controller monitors the HW_BUS status changes in real time via a hardware interrupt pin. Once the bus level is pulled low, the controller immediately triggers a hardware interrupt and directly executes protection actions, without requiring software polling or communication protocol parsing.

[0045] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0046] In addition, the functional modules in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0047] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A hardware protection circuit for a multi-kicked power supply system, characterized by, The protection circuit comprises: a main controller provided with a controller protection circuit and a signal detection end; a fault signal generation branch electrically connected to any subunit in the multi-stage cascaded power supply system, for generating a fault signal when any subunit fails; a common hardware fault bus, a first end of which is connected to the signal detection end of the main controller and maintains a high level when there is no fault; an isolation control branch, an input end of which is used for receiving the fault signal of the fault signal generation branch, and an output end of which is connected to a second end of the common hardware fault bus; wherein when any fault signal generation branch generates a fault signal, the common hardware fault bus is driven by the corresponding isolation control branch to change the level state in response to the fault signal, so as to trigger the main controller to perform a protection action.

2. The hardware protection circuit of a multi-level series power supply system according to claim 1, wherein, Each subunit of the multi-stage cascaded power supply system comprises a power supply unit, a control unit and a load unit; each subunit is provided with a fault signal generation branch and an isolation control branch, and is provided with a fault signal output end; the fault signal output end of each unit independently triggers the common hardware fault bus to change the level state through the corresponding isolation control branch.

3. The hardware protection circuit of a multi-level series power supply system according to claim 1, wherein, One isolation control branch comprises an optocoupler U1 and a switching device Q1; the collector of the secondary side phototriode of the optocoupler U1 is connected to the common hardware fault bus; the emitter of the secondary side phototriode of the optocoupler U1 is connected to the system reference ground; the primary side LED input end of the optocoupler U1 is connected to the power supply VP2 of the current stage through a current limiting resistor R9; the collector of the switching device Q1 is connected to the cathode of the primary side LED of the optocoupler U1; the emitter of the switching device Q1 is connected to the system reference ground; a pull-down resistor R8 and a filter capacitor C3 are connected between the control electrode of the switching device Q1 and the reference ground; the switching device Q1 can be a transistor or an insulated gate field effect transistor.

4. The hardware protection circuit of a multi-level series power supply system according to claim 3, wherein, The controller protection circuit comprises an optocoupler U4; the anode of the primary side LED of the optocoupler U4 is connected to the first pull-up power supply through a current limiting resistor R3; the cathode of the primary side LED of the optocoupler U4 is connected to the common hardware fault bus to receive the fault signal; the collector of the secondary side phototriode of the optocoupler U4 is connected to the second pull-up power supply; the emitter of the secondary side phototriode of the optocoupler U4 is connected to the first end of a pull-down resistor R4, and the second end of the pull-down resistor R4 is connected to the secondary side reference ground; the first end of the pull-down resistor R4 is connected to the hardware bus voltage monitoring point through a current limiting resistor R5; the hardware bus voltage monitoring point is connected to the hardware protection signal detection end of the main controller; a filter capacitor C6 is connected in parallel between the hardware bus voltage monitoring point and the secondary side reference ground.

5. The hardware protection circuit of a multi-level series power supply system according to claim 4, wherein, The output end of the primary side connection fault signal generation branch of the optocoupler isolator U1, when the secondary side light-sensitive transistor is turned on, controls the base current of the subsequent stage switching device Q1, so that Q1 enters the saturated conduction state; When the switching device Q1 is saturated and turned on, the level of the common hardware fault bus is pulled down to a low level; The main controller monitors the level of the hardware bus voltage monitoring point in real time through the hardware protection signal detection end thereof; wherein the level of the hardware bus voltage monitoring point is consistent with the level of the common hardware fault bus; When the main controller detects that the hardware bus voltage monitoring point is at a low level, at least one protection action of shutting down the fault stage power supply, switching the standby power supply, or triggering an alarm is performed.

6. The hardware protection circuit for a multi-cascaded power supply system of claim 1, wherein, The hardware protection signal detection end of the main controller is configured as an input pin in an edge-triggered interrupt mode or a low-level triggered interrupt mode.

7. The hardware protection circuit of a multi-level series power supply system according to claim 5, wherein, The secondary side working current of the optocoupler isolator U1 is less than the product of the primary side current and the current transfer ratio thereof, and the collector current of the triode Q1 is less than the product of the base current and the amplification factor thereof; the current transfer ratio and the amplification factor of the triode Q1 are configured to: when the fault signal is valid, the optocoupler isolator U1 and the triode Q1 both enter the saturated conduction state.

8. The hardware protection circuit of a multi-level series power supply system according to claim 5, wherein, The multi-stage cascaded power supply circuit is a bidirectional power supply system, and in the isolation control branch of each unit of the system, the power supply of the primary side loop of the optocoupler isolator U1 and the reference ground of the current stage unit are common; the power supply of the secondary side loop of the optocoupler isolator U1 and the reference ground of the main controller are common.

9. A method of responding to a fault in a hardware protection circuit according to any one of claims 1 to 8, characterized by, Applied to a multi-stage cascaded bidirectional power supply system, including the following steps: Each stage subunit of the bidirectional power supply system independently monitors its own running state; When any stage subunit detects a local fault, the corresponding fault signal generation branch generates a local fault signal SIGx; The local fault signal SIGx drives the corresponding isolation control branch, and the electrically isolated fault response signal acts on the common hardware fault bus; The level state of the common hardware fault bus changes from high to low in response to the action of any one isolation control branch; the main controller detects the low level state of the common hardware fault bus through the hardware interrupt mode, to trigger at least one protection action including shutting down the fault stage power supply, switching the standby power supply, or triggering an alarm.

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