High-precision magnetic field data acquisition unit for aeromagnetic measurement and acquisition method thereof

Abstract

The invention discloses a high-precision magnetic field data acquisition unit for aeromagnetic measurement and an acquisition method thereof, belongs to the technical field of aeromagnetic measurement, and solves the problems that the acquisition resolution of an aeromagnetic measurement magnetic field is low, the measurement precision is influenced by a power supply and electromagnetic interference, and the data processing and storage reliability is insufficient. According to the invention, a framework of'acquisition module + control module 'is adopted, the acquisition module realizes high-precision sampling through low-noise power supply, differential reference and analog front-end full-link conditioning, the control module completes error compensation and aeromagnetic compensation through a Zynq core, and the 1nT-level magnetic field acquisition precision is achieved by matching an anti-interference design and stable storage and transmission. The 1nT-level magnetic field acquisition precision in the aeromagnetic measurement process is achieved, the signal acquisition precision and stability are remarkably improved, electromagnetic and power interference is effectively inhibited, the reliability of data processing, storage and transmission is guaranteed, and the strict requirements of aeromagnetic measurement for precision and interference resistance are met.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of airborne magnetic measurement, in particular to a high-precision magnetic field data acquisition unit for airborne magnetic measurement and an acquisition method thereof. BACKGROUND

[0002] Airborne magnetic measurement is a data acquisition technology for high-precision detection of the geomagnetic field by using a flight platform to carry a magnetic instrument, and is widely applied to the fields of resource exploration, geological survey and environmental monitoring. With the continuous improvement of application requirements, higher requirements are put forward for the precision and stability of the magnetic field data. However, there are still some technical bottlenecks in the actual engineering application of the existing airborne magnetic data acquisition unit: (1) The spatial gradient of the geomagnetic anomaly field is usually small, and in order to obtain effective data, the acquisition unit needs to have a resolution better than 1 nanotesla (nT). The existing module still has deficiencies in resolution and noise suppression, and it is difficult to meet the needs of high-precision magnetic field measurement and subsequent data processing.

[0003] (2) On a small or medium-sized aerial platform, the acquisition unit is affected by external interference such as cabin-mounted motors, frequency converters and radio frequency equipment, thereby causing fluctuations in the measurement stability.

[0004] Therefore, there is an urgent need for an airborne magnetic data acquisition unit with high resolution, low noise, miniaturization and strong anti-interference ability to improve the overall performance and engineering applicability of the airborne magnetic measurement module. The module needs to work stably in a complex electromagnetic environment, has a sensitive response capability to weak magnetic field changes, and effectively suppresses the interference factors introduced by the structure and electrical system of the flight platform, thereby improving the effectiveness and accuracy of the magnetic field data. In addition, with the wide application of various types of aerial platforms in geomagnetic measurement tasks, the airborne magnetic acquisition unit puts forward higher requirements for the lightweight, modularization and low power consumption of the equipment. SUMMARY

[0005] The application provides a high-precision magnetic field data acquisition unit for airborne magnetic measurement and an acquisition method thereof. The low-noise multi-path isolated power supply, symmetric differential reference generation and analog front-end full-link anti-interference conditioning of the acquisition module are combined with the 32-bit delta-sigma high-precision analog-to-digital conversion of the control module, the data error compensation of the Zynq core and the operation of the airborne magnetic compensation model, and the PCB ground plane segmentation star-shaped junction, aluminum alloy shell shielding and stable storage transmission design to solve the problems of low resolution of the magnetic field acquisition in the prior art, influence of power supply and electromagnetic interference on measurement precision and insufficient data processing storage reliability.

[0006] A high-precision magnetic field data acquisition unit for airborne magnetic measurement comprises an acquisition module and a control module, and the acquisition module and the control module are electrically connected, The acquisition module comprises a power supply circuit, a voltage reference circuit and an analog front-end circuit, wherein, The power supply circuit is used for receiving an external 12V input voltage, converting the external 12V input voltage into multiple isolated and stabilized voltage outputs, and providing low-noise power supply for the acquisition module and the control module; The voltage reference circuit is used for generating a stable differential reference voltage, and providing a low-temperature drift and low-noise reference for analog-to-digital conversion of the analog front-end circuit; The analog front-end circuit is used for receiving original analog signals output by the magnetometer, performing amplitude adjustment, bandwidth limitation, anti-interference processing and analog-to-digital conversion on the original analog signals, and outputting digital signals; The control module comprises a Zynq core control unit and a storage and transmission interface, and functions of each sub-module are as follows: The Zynq core control unit is electrically connected with the analog front-end circuit of the acquisition module, is used for configuring and managing an analog-to-digital conversion sub-circuit in the analog front-end circuit, controlling sampling rate, trigger mode and filter parameters of the analog-to-digital conversion, synchronously receiving digital signals output by the analog front-end circuit, performing error compensation and storage management on the digital signals, and realizing real-time running and configuration of an aeromagnetic compensation model; The storage and transmission interface is electrically connected with the Zynq core control unit, is used for realizing local large-capacity data buffering, uploading processed data to an upper computer, and completing instruction interaction between a high-precision magnetic field data acquisition unit used for aeromagnetic measurement and the upper computer.

[0007] Further, the multiple isolated and stabilized voltage outputs of the power supply circuit comprise ±12V, ±5V, ±2.5V and 3.3V, and the power supply circuit comprises a bridge-type transformer driver, a double-secondary winding isolation transformer, a full-bridge rectifier circuit, a π-type filter network and a low-noise linear stabilizer, an output end of the bridge-type transformer driver is electrically connected with both ends of a primary winding of the double-secondary winding isolation transformer, a secondary winding output end of the double-secondary winding isolation transformer is electrically connected with an input end of the full-bridge rectifier circuit, a pulsating direct current output end of the full-bridge rectifier circuit is electrically connected with an input end of the π-type filter network, an output end of the π-type filter network is electrically connected with an input end of the low-noise linear stabilizer, and output ends of the low-noise linear stabilizer are respectively electrically connected with the voltage reference circuit of the acquisition module, the analog front-end circuit of the acquisition module and the Zynq core control unit and the storage and transmission interface of the control module, and target stabilized voltages are provided; The power supply circuit further comprises a power supply circuit magnetic bead, a feed-through capacitor and an LC filter, the power supply circuit magnetic bead is connected in series in a power supply signal link, one end of the feed-through capacitor is electrically connected with the power supply signal link and the other end is grounded, and the LC filter is connected in parallel at the output end of the low-noise linear stabilizer, and the power supply circuit magnetic bead, the feed-through capacitor and the LC filter constitute a multi-stage noise filtering structure.

[0008] Further, the voltage reference circuit adopts a symmetric differential reference structure, including a high-precision reference source, a precision operational amplifier and a feedback resistor; an output end of the high-precision reference source outputs a +VREF reference voltage, and is electrically connected to an inverting end of the precision operational amplifier through a resistor, a non-inverting end of the precision operational amplifier is grounded, an output end of the precision operational amplifier is electrically connected to the inverting end of itself through a feedback resistor, and outputs a -VREF reference voltage symmetric to the +VREF, forming a ±VREF full-differential reference pair; The voltage reference circuit further includes a voltage reference circuit magnetic bead and a decoupling capacitor, the voltage reference circuit magnetic bead is connected in series between a power input end of the high-precision reference source and a system analog power supply, and the decoupling capacitor is connected in parallel between an output end of the high-precision reference source and a reference ground, and between an output end of the precision operational amplifier and the reference ground, forming a local decoupling filter network.

[0009] Further, the analog front-end circuit includes an ESD and surge protection sub-circuit, a common-mode choke and a π-type LC filter sub-circuit, a multi-channel signal gating sub-circuit, a single-ended buffer sub-circuit, a differential amplification sub-circuit, an anti-aliasing filter sub-circuit and a high-precision ADC sub-circuit connected in sequence, the differential amplification sub-circuit includes a precision symmetric resistor array and a buffer, the precision symmetric resistor array is electrically connected to a signal input end of the differential amplification sub-circuit to set the gain, a VOCM pin of the differential amplification sub-circuit is electrically connected to an output end of the buffer through a precision voltage division network, and the output end of the buffer is fixed at 0V, so that the output signal of the differential amplification sub-circuit swings symmetrically around the analog ground, the high-precision ADC in the high-precision ADC sub-circuit is a 32-bit Δ-Σ type, and an input end of the high-precision ADC is electrically connected to an output end of the anti-aliasing filter sub-circuit.

[0010] Further, the storage and transmission interface comprises a local storage sub-interface and an isolated transmission sub-interface, the local storage sub-interface comprises an SD card and an on-chip FIFO cache, the SD card is electrically connected with the Zynq core control unit through a 4-bit SDIO bus, the on-chip FIFO cache is integrated in the Zynq core control unit and is electrically connected with the SDIO bus, after data is accumulated to a preset capacity through the on-chip FIFO cache, the data is batch written to the SD card through a DMA mode, the isolated transmission sub-interface comprises a UART serial link, a digital isolator, a TVS tube and an RS-485 / TTL adaptive transceiver, one end of the UART serial link is electrically connected with the Zynq core control unit, the other end is electrically connected with an input end of the digital isolator, an output end of the digital isolator is electrically connected with an input end of the RS-485 / TTL adaptive transceiver, the TVS tube is connected in series between an output end of the RS-485 / TTL adaptive transceiver and an external interface, the digital isolator realizes 2.5kVrms isolation to ground, the UART serial link is configured in an 8-N-1 format, and full-duplex data interaction and instruction transmission between the high-precision magnetic field data acquisition unit for airborne magnetic measurement and the host computer are realized.

[0011] Further, the Zynq core control unit is expanded with a DDR3 external storage module, the DDR3 external storage module is electrically connected with the storage interface of the Zynq core control unit through a differential signal pair; a GPIO pin of the Zynq core control unit is electrically connected with an enable end of a low-noise linear voltage stabilizer chip; the acquisition unit is provided with an aluminum alloy shell, the PCB board adopts a design combining ground plane segmentation and star-shaped junction, and analog ground, digital ground and reference ground are separately laid out and grounded through a star-shaped junction structure.

[0012] Further, the ESD and surge protection sub-circuit of the analog front-end circuit comprises a self-restoring fuse, a current-limiting resistor and a ground capacitor, one end of the self-restoring fuse is electrically connected with a magnetometer signal input interface of the analog front-end circuit, the other end is electrically connected with one end of the current-limiting resistor, the other end of the current-limiting resistor is electrically connected with one end of the ground capacitor, and the other end of the ground capacitor is connected with an analog ground; The anti-aliasing filter sub-circuit comprises a series resistor and a parallel capacitor, one end of the series resistor is electrically connected with an output end of the differential amplification sub-circuit, the other end is electrically connected with an input end of the high-precision ADC sub-circuit, one end of the parallel capacitor is electrically connected with the end of the series resistor close to the high-precision ADC, and the other end is connected with an analog ground, thereby forming an RC low-pass filter network.

[0013] A high-precision magnetic field data acquisition method for airborne magnetic measurement, based on the high-precision magnetic field data acquisition unit for airborne magnetic measurement, comprises the following steps: S1, the power supply circuit of the acquisition unit receives an external 12V input voltage, which is processed in sequence by a bridge transformer driver, a double-secondary winding isolation transformer, a full-bridge rectifier circuit, a pi filter network and a low-noise linear voltage regulator to be converted into ±12V, ±5V, ±2.5V and 3.3V multi-path isolated stabilized output. A multi-stage noise filter structure is formed by a power supply circuit magnetic bead, a feed-through capacitor and an LC filter to provide low-noise power supply for the voltage reference circuit of the acquisition module, the analog front-end circuit and the Zynq core control unit of the control module, the storage and transmission interface. The enable end of the low-noise linear voltage regulator chip is controlled through the GPIO pin of the Zynq core control unit to realize the orderly start of the 3.3V digital power supply and other power supply voltages; S2, the voltage reference circuit of the acquisition unit adopts a symmetrical differential reference structure, and a +VREF reference voltage is output by a high-precision reference source. The +VREF reference voltage is combined with a feedback resistor to generate a -VREF reference voltage symmetrical to the +VREF reference voltage through a resistor and a precision operational amplifier, forming a ±VREF full-differential reference pair. A local decoupling filter network is formed by a voltage reference circuit magnetic bead and a decoupling capacitor to suppress the reference offset caused by power supply fluctuations and ground potential differences through a common-mode feedback regulation loop. S3, the analog front-end circuit of the acquisition unit receives the original analog signal output by the magnetometer, which is processed by an ESD and surge protection sub-circuit to suppress surge and spike interference, and then by a common-mode choke and a pi LC filter sub-circuit to suppress differential and common-mode noise greater than 1MHz. Subsequently, a multi-path signal gating sub-circuit is used to realize the gating switching of the signal and the reference. Then, a single-ended buffer sub-circuit is used for signal buffering, and a differential amplification sub-circuit is used to set the gain. The differential amplification sub-circuit includes a precision symmetrical resistor array and a buffer. The output end of the buffer is fixed at 0V to make the signal symmetrically swing around the analog ground. Finally, an anti-aliasing filter sub-circuit is used to form an RC low-pass filter network to suppress out-of-band high-frequency interference. S4, the high-precision ADC sub-circuit in the analog front-end circuit converts the conditioned analog signal into a digital signal by a 32-bit delta-sigma high-precision ADC. The Zynq core control unit configures and manages the high-precision ADC sub-circuit, controls the adjustable sampling rate, trigger mode and filter parameters of the high-precision ADC sub-circuit 250~4kHz, realizes the acquisition dynamic range of ±10V, the minimum resolution of 100nV and the minimum resolution of 1nT for magnetic field acquisition, and outputs a digital signal. S5, the Zynq core control unit synchronously receives the digital signal output by the high-precision ADC sub-circuit, compensates for the error of the digital signal, realizes data caching through an extended DDR3 external storage module, and runs the aeromagnetic compensation model and completes the model configuration. S6, the processed data are first cached to the on-chip FIFO cache in the Zynq core control unit through the local storage sub-interface of the storage and transmission interface, accumulated to the preset capacity, and then batch written to the SD card through the 4-bit SDIO bus in the DMA mode, and the full-duplex data interaction and instruction transmission between the acquisition unit and the upper computer are realized through the isolated transmission sub-interface of the storage and transmission interface, the isolated transmission sub-interface includes a UART serial link, a digital isolator, a TVS tube and an RS-485 / TTL adaptive transceiver, the UART serial link is configured in the 8-N-1 format, and the digital isolator realizes 2.5kVrms ground isolation.

[0014] The application has the advantages that the high-precision magnetic field data acquisition unit for aeromagnetic measurement and the acquisition method thereof provide a stable and pure working environment for the analog front-end circuit through the multi-path isolated voltage regulation output and multi-stage noise filtering design of the power supply circuit, the low-temperature drift characteristic of the symmetrical differential reference circuit, effectively improve the precision of magnetic field signal acquisition in combination with the analog front-end full-link anti-interference conditioning and high-resolution sampling of the 32-bit delta-sigma type high-precision ADC, realize the magnetic field acquisition resolution of 1nT level, the real-time error compensation of the Zynq core control unit and the operation of the aeromagnetic compensation model further correct the measurement deviation, the PCB board ground plane segmentation and star-shaped junction design and the aluminum alloy shell shielding structure significantly reduce the influence of electromagnetic interference and ground potential difference on measurement, and the stable interaction of the local large-capacity storage of the SD card, the DMA batch writing and the isolated transmission interface ensure the reliability and efficiency of data processing, storage and transmission, and the pain points of low acquisition precision, weak anti-interference ability and unstable data processing and storage in the prior art are solved, and the application is suitable for the aeromagnetic measurement scene with high measurement precision and reliability requirements. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 It is a structure schematic view of the high-precision magnetic field data acquisition unit for aeromagnetic measurement. Figure 2 It is a power supply circuit schematic diagram. Figure 3 It is a voltage reference circuit schematic diagram. Figure 4 It is an analog front-end circuit schematic diagram. Figure 5 It is a storage and transmission interface schematic diagram. DETAILED DESCRIPTION

[0016] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work are within the protection scope of the present application.

[0017] Referring to Figure 1 As shown in the figure, a high-precision magnetic field data acquisition unit for aeromagnetic surveying includes an acquisition module and a control module, the acquisition module is electrically connected with the control module, The acquisition module includes a power supply circuit, a voltage reference circuit and an analog front-end circuit, wherein, The power supply circuit is used for receiving an external 12V input voltage, converting it into multi-path isolated stabilized output, and providing low-noise power supply for the acquisition module and the control module; The voltage reference circuit is used for generating a stable differential reference voltage, providing a low-temperature drift and low-noise reference for the analog-to-digital conversion of the analog front-end circuit; The analog front-end circuit is used for receiving the original analog signal output by the magnetometer, performing amplitude adjustment, bandwidth limitation, anti-interference processing and analog-to-digital conversion on the original analog signal, and outputting a digital signal; The control module includes a Zynq core control unit and a storage and transmission interface, and the functions of each sub-module are as follows: The Zynq core control unit is electrically connected with the analog front-end circuit of the acquisition module, used for configuring and managing the analog-to-digital conversion sub-circuit in the analog front-end circuit, controlling the sampling rate, trigger mode and filter parameters of the analog-to-digital conversion, synchronously receiving the digital signal output by the analog front-end circuit, performing error compensation and storage management on the digital signal, and realizing real-time running and configuration of the aeromagnetic compensation model; The storage and transmission interface is electrically connected with the Zynq core control unit, used for realizing local large-capacity data buffering, uploading the processed data to the upper computer, and completing the instruction interaction between the high-precision magnetic field data acquisition unit for aeromagnetic surveying and the upper computer.

[0018] Specifically, the application constructs a core architecture of "acquisition module + control module" and clearly defines the function division of each sub-module: in the acquisition module, the power supply circuit can convert external 12V input into multiple isolated and stabilized outputs, providing low-noise power supply for the whole system, thereby avoiding the influence of power supply interference on measurement accuracy from the power supply source; the voltage reference circuit can generate a stable differential reference voltage, providing a low-temperature drift and low-noise reference for the analog-to-digital conversion of the analog front end, laying a foundation for high-precision sampling; the analog front-end circuit can completely receive the original analog signal of the magnetometer, and through amplitude adjustment, bandwidth limitation, anti-interference processing and analog-to-digital conversion, effectively filter out invalid signals and retain the characteristics of weak magnetic signals, solving the problem of insufficient weak magnetic field signal capture capability of the existing acquisition unit. In the control module, the Zynq core control unit is electrically connected with the analog front end to realize accurate configuration management of analog-to-digital conversion and synchronous reception of digital signals, error compensation, and also can run an aeromagnetic compensation model to further correct measurement deviation and improve data accuracy; the storage and transmission interface takes into account local large-capacity data caching and host computer instruction interaction, solving the problems of limited data storage capacity and poor linkage with the host computer of the existing equipment. Through the cooperative work of the acquisition module and the control module, the overall architecture forms a complete closed loop from signal acquisition, processing to storage and transmission, effectively breaking through the technical bottlenecks of low resolution, weak anti-interference capability and insufficient data processing and storage reliability of the existing aeromagnetic acquisition unit, providing high-precision and high-stability core hardware support for aeromagnetic measurement, and is suitable for scenes such as resource exploration and geological survey which have strict requirements on magnetic field data quality.

[0019] Further, the multiple isolated and stabilized outputs of the power supply circuit include ±12V, ±5V, ±2.5V and 3.3V, and the power supply circuit includes a bridge transformer driver (using a line easy CMP6793 chip), a double secondary winding isolation transformer (using a source VPT87DD small-size isolation transformer), a full-bridge rectifier circuit (composed of a Schottky diode MBRS340T3G), a π-type filter network (typically configured as 10µH-22µF-10µH) and a low-noise linear regulator (using three low-noise LDO chips of LT3094, LT3042 and LP5907), the output pins ST1 and ST2 of the bridge transformer driver (CMP6793) are electrically connected with the primary windings P1 and P2 of the double secondary winding isolation transformer (VPT87DD), the secondary windings S1 and S2 output ends of the double secondary winding isolation transformer (VPT87DD) are electrically connected with the input end of the full-bridge rectifier circuit (MBRS340T3G), the pulsed DC output end of the full-bridge rectifier circuit is electrically connected with the input end of the π-type filter network, the output end of the π-type filter network is electrically connected with the input end of the low-noise linear regulator, and the output end of the low-noise linear regulator is electrically connected with the voltage reference circuit and the analog front-end circuit of the acquisition module, and the Zynq core control unit and the storage and transmission interface of the control module, respectively, to provide target stabilized voltage; The power supply circuit further comprises a power supply circuit magnetic bead, a feed-through capacitor and an LC filter, the power supply circuit magnetic bead is connected in series in a power supply signal link, one end of the feed-through capacitor is electrically connected with the power supply signal link and the other end is grounded, and the LC filter is connected in parallel at the output end of the low-noise linear voltage stabilizer, the power supply circuit magnetic bead, the feed-through capacitor and the LC filter constitute a multi-stage noise filtering structure, and switch ripple and high-frequency harmonics are cooperatively suppressed.

[0020] Specifically, referring to Figure 2 As shown in the figure, the power supply module adopts a combination of a bridge type transformer driver (CMP6793) and a double secondary winding isolation transformer (VPT87DD) to convert the input +12V DC voltage into multiple stable isolated power supply voltages (±12V, ±5V, ±2.5V, 3.3V) for providing the required multi-channel stabilized power supply for each functional module. The bridge type transformer driver (CMP6793) is a high-frequency H-bridge driver, which mainly drives the primary winding of the double secondary winding isolation transformer (VPT87DD) to generate an alternating square wave voltage, thereby inducing an isolated power supply in the secondary winding. The switching frequency of the bridge type transformer driver (CMP6793) is 84kHz, and during the on-off process of the switching tube, an 84kHz switch ripple and high-frequency harmonics multiple times the switching frequency will be generated. These noise sources must be fully filtered to avoid interference with the signal link. To solve this problem, the power supply circuit magnetic bead, the feed-through capacitor and the LC filter are used to achieve good filtering effect. The impedance of the power supply circuit magnetic bead mainly exhibits inductive reactance in the low frequency band, electromagnetic interference is reflected, and in the high frequency band, the impedance is dominated by resistance, electromagnetic interference is absorbed and converted into heat energy to dissipate; the feed-through capacitor is a three-terminal capacitor with very low parasitic inductance. Noise has to pass through the capacitor first, then through the common ground, bypassing the noise to the ground loop, and finally delivering clean current and voltage to the load side. Therefore, the noise filtering capability is much better than that of ordinary decoupling capacitors. The LC filter can also effectively reduce high-frequency noise.

[0021] The specific design is as follows: the bridge type transformer driver (CMP6793) chip internally integrates an oscillator, the output pins ST1 and ST2 are connected to the two ends of the primary winding P1, P2 of the double secondary winding isolation transformer (VPT87DD), and the chip starts to work when the EN pin is at a low level. The turns ratio of the double secondary winding isolation transformer (VPT87DD) is 1:1:1.03:1.03, and the center taps SCT of the two secondary windings are led out as reference ground, thereby obtaining alternating ±12V voltage between the secondary S1 and SCT and the secondary S2 and SCT. Since the primary and the secondary are completely isolated, the influence of high-frequency interference, power frequency stray noise and ground loop problems on the analog circuit in the later stage can be effectively reduced.

[0022] The secondary induced alternating voltage is converted into +12V and -12V pulsed DC voltage via a full-bridge rectifier circuit (MBRS340T3G), and a π-type filter network (typically configured as 10µH-22µF-10µH) is connected in series at the output end to filter out the high-frequency ripple caused by the working frequency of the double-secondary winding isolation transformer (VPT87DD), making the rectified voltage more stable. The latter linear voltage stabilizing part uses low-noise linear voltage stabilizers (LT3094, LT3042) to stabilize and step down +12V and -12V respectively. Specifically, the low-noise linear voltage stabilizer (LT3042) is used for positive voltage output, its IN end is connected to +12V_RAW, and by setting a 49.9kΩ RSET resistor connected to GND, the output voltage can be set to +5V, the OUT pin outputs a stable voltage, and OUTS is connected to the load end as a detection end to improve the voltage stabilization accuracy; correspondingly, the other low-noise linear voltage stabilizer (LT3042) is set with a 24.9kΩ RSET resistor to obtain a +2.5V output. The negative voltage stabilization is completed by the low-noise linear voltage stabilizer (LT3094), its IN end is connected to -12V_RAW, the SET end is set with a resistor to output -5V or -2.5V, and the output pin OUT also provides a high-precision output, and OUTS is used for feedback detection. Each of the above voltage stabilization outputs is configured with a 10µF ceramic capacitor at the output end, and a 4.7µF capacitor is connected in parallel at the SET end to further reduce noise, and the actual output noise density can be lower than 10nV / √Hz, greatly improving the signal-to-noise ratio of the analog front end. To further obtain a 3.3V digital power supply, a low-noise linear voltage stabilizer (LP5907) chip is connected after the +5V output, its EN end is controlled by the Zynq core control unit to realize power-on sequence management, IN is connected to +5V, and OUT outputs a stable +3.3V voltage suitable for digital modules such as the Zynq core control unit, logic interface, and configuration circuit.

[0023] The chip pin is connected, the VDD pin of the bridge type transformer driver (CMP6793) is connected to the module +12V input voltage and is connected in parallel with a 1µF ceramic capacitor as a decoupling, and the GND is connected to the system ground. The ST1 and ST2 pins are respectively connected to the primary windings P1 and P2 of the double secondary winding isolation transformer (VPT87DD), the EN pin is controlled by the Zynq core control unit to be pulled low by default, the RLIM pin is connected to a 5kΩ resistor to ground to set the current limiting threshold, and the CLK pin can be left floating to use the internal oscillator or connected to an external clock for synchronization. The FAULT pin is used for the overcurrent and overheat protection signal output and is connected to the Zynq core control unit GPIO. The S1 and S2 of the double secondary winding isolation transformer (VPT87DD) are the secondary winding output terminals and are connected to the input of the full-bridge rectifier circuit (MBRS340T3G); the center tap SCT is connected to the analog ground as a reference. The output of the full-bridge rectifier circuit is filtered by a π-type filter network and is respectively supplied to the input terminals of each low-noise linear regulator, and the output terminals provide stable positive and negative voltages. The SET pin of each low-noise linear regulator is connected to the ground through a precision resistor to set the target output voltage, the OUT pin outputs the target voltage, the OUTS is used for remote detection, the EN pin is used for power enable control, and the PG pin feeds back the working state and is usually connected to the Zynq core control unit for power-on state monitoring. The input terminal of the low-noise linear regulator (LP5907) corresponding to the 3.3V digital power supply is connected to +5V, the output terminal is connected to the digital part, and the EN is pulled high by the control module to turn on the power supply.

[0024] The power supply circuit magnetic bead is connected in series in the power supply signal link, one end of the feed-through capacitor is electrically connected to the power supply signal link and the other end is grounded, and the LC filter is connected in parallel to the output terminal of the low-noise linear regulator. The power supply circuit magnetic bead, feed-through capacitor and LC filter constitute a multi-stage noise filtering structure to cooperatively suppress switching ripple and high-frequency harmonics. The output terminals of the low-noise linear regulator are respectively electrically connected to the voltage reference circuit of the acquisition module, the analog front-end circuit, the Zynq core control unit of the control module and the storage and transmission interface to provide the target regulated voltage.

[0025] Furthermore, the voltage reference circuit adopts a symmetrical differential reference structure, including a high-precision reference source (using ADI's ADR4525ARZ-R7 chip), a precision operational amplifier (using Texas Instruments' OPA189IDGKT chip), and a feedback resistor; the output terminal of the high-precision reference source (ADR4525ARZ-R7) outputs a +VREF reference voltage (+2.5V), and is electrically connected to the inverting input (pin 2) of the precision operational amplifier (OPA189IDGKT) through a 1kΩ resistor. The non-inverting input (pin 3) of the precision operational amplifier (OPA189IDGKT) is grounded. The output terminal (pin 6) of the precision operational amplifier (OPA189IDGKT) is electrically connected to its own inverting input (pin 2) through a 1kΩ feedback resistor, and the output terminal (pin 6) outputs a –VREF reference voltage (-2.5V) symmetrical to +VREF (+2.5V), forming a ±VREF (±2.5V) fully differential reference pair; The voltage reference circuit also includes a voltage reference circuit ferrite bead (using a BLM18AG601SN1D ferrite bead) and decoupling capacitors. The voltage reference circuit ferrite bead (BLM18AG601SN1D) is connected in series between the power input terminal (VIN pin) of the high-precision reference source (ADR4525ARZ-R7) and the system analog power supply (VAA, i.e., the system +5V analog power supply). The decoupling capacitors are 10µF capacitor (C58), 100nF capacitor (C59), 4.7µF capacitor (C62), and 100nF capacitor (C63), wherein the 10µF capacitor (C58) and the 100nF capacitor (C59) are connected in parallel. Between the power input terminal (VIN pin) and reference ground (REFGND) of the high-precision reference source (ADR4525ARZ-R7), a 4.7µF capacitor (C62) and a 100nF capacitor (C63) are connected in parallel between the output terminal (VOUT pin) and reference ground (REFGND) of the high-precision reference source (ADR4525ARZ-R7). In addition, a decoupling capacitor is connected in parallel between the output terminal (pin 6) and reference ground (REFGND) of the precision operational amplifier (OPA189IDGKT), forming a local decoupling filter network. Together with the common-mode feedback adjustment loop, it suppresses the reference offset caused by power supply fluctuations and ground potential difference.

[0026] Specifically, refer to Figure 3As shown, the voltage reference circuit of the module not only undertakes the basic function of providing stable and low-noise reference for the analog front-end circuit and the high-precision ADC sub-circuit, but also carries out common-mode noise suppression and dynamic matching optimization on the basis of the traditional architecture. The system adopts a symmetric differential reference structure, generates a +VREF reference voltage (+2.5V) through a high-precision reference source (ADR4525ARZ-R7), and then constructs a -VREF reference voltage (-2.5V) through a precision operational amplifier (OPA189IDGKT) to form a full-differential reference pair of ±VREF (±2.5V), thereby providing a symmetric reference for the subsequent analog-to-digital conversion circuit. Compared with the traditional voltage division method, the symmetric output structure has higher DC stability and temperature consistency, and significantly reduces the influence of common-mode drift on the input signal chain.

[0027] To further improve the measurement accuracy of the system in a complex electromagnetic environment, the application introduces a common-mode servo and active noise shaping mechanism in the voltage reference circuit, suppresses the reference offset caused by power fluctuations and ground potential differences by superimposing a common-mode feedback adjustment loop in the reference loop. At the same time, combined with multi-stage filtering and local decoupling network, high-frequency noise is attenuated in sections, so that the reference end noise spectral density is significantly reduced compared with the conventional scheme. In addition, the reference symmetric output end is driven through a buffer stage, has multi-channel synchronous driving capability and output impedance adaptive adjustment function, and can maintain consistent reference stability and linearity in the multi-ADC parallel sampling scene.

[0028] The specific design is as follows: the voltage reference circuit is used to provide stable and low-noise reference voltage for the analog front-end circuit and high-precision ADC sub-circuit. In the design, a high-precision reference source (ADR4525ARZ-R7) is used to generate +VREF reference voltage (+2.5V), and a super-low offset and low drift precision operational amplifier (OPA189IDGKT) is used to realize inverting amplification to obtain a symmetrical -VREF reference voltage (-2.5V). Finally, a differential reference pair of ±VREF (±2.5V) is output, which is used as +VREF and -VREF reference signals in the module. The high-precision reference source (ADR4525ARZ-R7) internally integrates a precision bandgap reference circuit and a buffer amplifier, has an initial accuracy of 0.02% and a temperature drift of 2 ppm / °C, and has excellent output voltage stability, which is suitable for use as a reference in high-resolution signal chains. The power input end (VIN pin) of the voltage reference circuit inputs a voltage from the system analog power supply (VAA, i.e. system +5V analog power supply), filters out high-frequency noise in the power supply through a voltage reference circuit magnetic bead (BLM18AG601SN1D), and sends it into the chip. A 10µF capacitor (C58) and a 100nF capacitor (C59) are configured between the power input end (VIN pin) and the reference ground (REFGND) to improve the power integrity. The output end (VOUT pin) outputs a stable +VREF reference voltage (+2.5V), which is connected to the reference ground (REFGND) through an external 4.7µF capacitor (C62) and a 100nF capacitor (C63) in parallel to further reduce output noise.

[0029] In order to obtain a symmetrical -VREF reference voltage (-2.5V), a precision operational amplifier (OPA189IDGKT) is configured as an inverting amplifier in the circuit, with its non-inverting terminal (pin 3) connected to ground and its inverting terminal (pin 2) connected to +VREF reference voltage (+2.5V) through a 1kΩ resistor, while a 1kΩ feedback resistor is connected in series between the inverting terminal (pin 2) and the output terminal (pin 6), so that the voltage amplification factor is -1, and the output terminal (pin 6) is the -VREF reference voltage (-2.5V). In addition, in order to further improve the low-frequency stability and DC offset resistance of the precision operational amplifier (OPA189IDGKT), a 5kΩ resistor is connected in parallel to ground in the negative feedback circuit to adjust the bias current path. The precision operational amplifier (OPA189IDGKT) has extremely low input offset voltage (typical value of 25µV) and low temperature drift of 0.015µV / °C, as well as rail-to-rail output capability, which is very suitable for such high-stability reference negative voltage generation scenarios. The reference symmetrical output structure has higher DC stability and dynamic response characteristics than the traditional voltage division method, which can significantly improve the overall accuracy and linearity of the analog-to-digital conversion circuit.

[0030] From the connection, the power input end (VIN pin) of the high-precision reference source (ADR4525ARZ-R7) is connected to the system analog power supply (VAA) through the voltage reference circuit magnetic bead (BLM18AG601SN1D), and is locally decoupled to the ground through a 10µF capacitor (C58) and a 100nF capacitor (C59), and the GND pin is connected to the reference ground (REFGND) as the analog reference ground. The output end (VOUT pin) of the high-precision reference source (ADR4525ARZ-R7) is sent to the inverting terminal (pin 2) of the precision operational amplifier (OPA189IDGKT, U30.1) after being filtered by a 4.7µF capacitor (C62) and a 100nF capacitor (C63), and the power supply of the precision operational amplifier (OPA189IDGKT) is supplied by ±5V, and the output end (pin 6) generates a –VREF reference voltage (-2.5V), which can drive multiple analog channels after being buffered by the subsequent stage.

[0031] The voltage reference circuit further comprises a voltage reference circuit magnetic bead (BLM18AG601SN1D) and a decoupling capacitor. The voltage reference circuit magnetic bead (BLM18AG601SN1D) is connected in series between the power input end (VIN pin) of the high-precision reference source (ADR4525ARZ-R7) and the system analog power supply (VAA), and the decoupling capacitor is connected in parallel between the output end (VOUT pin) of the high-precision reference source (ADR4525ARZ-R7) and the reference ground (REFGND), and between the output end (pin 6) of the precision operational amplifier (OPA189IDGKT) and the reference ground (REFGND), forming a local decoupling and filtering network, cooperating with a common-mode feedback regulation loop, and suppressing the reference offset caused by power supply fluctuation and ground potential difference.

[0032] Further, the analog front-end circuit comprises ESD and surge protection sub-circuit, common mode choke and π-type LC filter sub-circuit, multi-channel signal gating sub-circuit (using double four-to-one analog multiplexer MUX509, U27.1 / U27.2), single-ended buffer sub-circuit (using OP A189 operational amplifier, U28.1), differential amplification sub-circuit (using high-precision fully differential amplifier THP210, U29.1), anti-aliasing filter sub-circuit and high-precision ADC sub-circuit (using 32-bit delta-sigma type ADC ADS1281 chip) connected in sequence, the differential amplification sub-circuit (THP210, U29.1) comprises a precision symmetric resistor array (consisting of 1kΩ symmetric resistor network R24, R25, R31, R32 and a precision resistor array chip U26) and a buffer (using OP A189 operational amplifier, U28.2), the precision symmetric resistor array is electrically connected with the signal input end of the differential amplification sub-circuit (THP210, U29.1) to set the gain (default 1V / V, which can be changed by adjusting resistors R26R29), the VOCM pin of the differential amplification sub-circuit (THP210, U29.1) is electrically connected with the output end of the buffer (OP A189, U28.2) through a precision voltage dividing network, and the output end of the buffer (OP A189, U28.2) is fixed at 0V, so that the output signal (VOUTP / VOUTN) of the differential amplification sub-circuit (THP210, U29.1) swings symmetrically around the analog ground (AGND), the high-precision ADC in the high-precision ADC sub-circuit is a 32-bit delta-sigma type (ADS1281 chip), the input end of the high-precision ADC (ADS1281) is electrically connected with the output end of the anti-aliasing filter sub-circuit, the collection dynamic range is ±10V, the minimum resolution can reach 100nV, the sampling rate is adjustable within 2504kHz, and the minimum resolution of 1nT magnetic field collection can be realized.

[0033] Specifically, referring to Figure 4As shown, the analog front-end circuit first suppresses high-frequency spikes and surge interference through a multi-stage surge and ESD protection network to ensure signal integrity in extreme airborne environments; then, the signal enters the multiplexing circuit, which can flexibly select any input signal and system reference pair to achieve dynamic switching and online calibration of the sampling path; the front-end amplification link uses a single-ended buffer, differential amplification, and common-mode servo cascade structure, with the buffer stage providing low source impedance and wideband response, the differential stage setting gain through a precision symmetric resistor array, and the common-mode voltage closed-loop control stabilizing the output reference center point, so that the output signal swings symmetrically around the analog ground and the common-mode level is stable, effectively reducing differential-common-mode crosstalk and temperature drift; the differential output end is equipped with an adjustable bandwidth anti-aliasing filter subcircuit, which not only suppresses out-of-band high-frequency interference, but also optimizes the bandwidth matching for the dynamic characteristics of the high-precision ADC subcircuit (ADS1281) and the spectral characteristics of the airborne magnetic signal, thereby improving the effective resolution and signal-to-noise ratio; the overall channel has linear response capability from millivolt-level input to ±2.5V output, supporting reliable perception of weak magnetic signals (~nT level) in complex interference backgrounds.

[0034] The specific design is as follows: the signal first passes through the self-restoring fuse (BSMD0603 type, F1-F3) of the ESD and surge protection subcircuit to limit the surge current, and then cooperates with the 100Ω current limiting resistor and 1nF ground capacitor to form an ESD and spike absorption network; then, the common-mode choke and π-type LC filter subcircuit (common-mode choke 10µH, L5-L7) jointly suppresses differential and common-mode noise above 1MHz; the clean signal is sent to the multi-channel signal selection subcircuit (dual four-to-one analog multiplexer MUX509, U27.1 / U27.2), which is controlled by the FPGA logic control of the Zynq core control unit (through A0 / A1 lines), to complete the arbitrary combination selection of three signals and the reference +VREF (+2.5V) in the order of 8µs, providing programmable input for the later stage.

[0035] The selected single-ended signal first enters the single-ended buffer sub-circuit (OPA189 operational amplifier, U28.1), which works in unit gain mode, providing low source impedance drive with <25µV offset and <0.015µV / °C temperature drift; then the signal enters the differential amplification sub-circuit (high-precision full-differential amplifier THP210, U29.1), whose external 1kΩ symmetric resistance network (R24, R25, R31, R32) and the precision symmetric resistance array composed of precision resistance array chip U26 set the gain (default 1V / V, which can be changed by adjusting resistors R26~R29), and the VOCM pin of the differential amplification sub-circuit (THP210, U29.1) is electrically connected to the output of the buffer (OPA189 operational amplifier, U28.2) through a precision voltage division network, and the output of the buffer (OPA189, U28.2) is fixed at 0V, so that the output signal (VOUTP / VOUTN) of the differential amplification sub-circuit (THP210, U29.1) swings symmetrically around the analog ground (AGND) and covers ±2.5V in full scale, which can directly drive the high-precision ADC sub-circuit (ADS1281).

[0036] The output of the differential amplification sub-circuit (THP210, U29.1) is connected to the anti-aliasing filter sub-circuit, which includes 100Ω series resistors (R28, R30) and 100nF parallel capacitors (C47, C49) to form a low-pass filter network, which is used to optimize the front-end frequency response of the high-precision ADC sub-circuit (ADS1281) and prevent high-frequency stray noise from affecting the sampling quality; the filtered signal is input to the high-precision ADC sub-circuit (ADS1281), and the high-precision ADC in the high-precision ADC sub-circuit is a 32-bit Δ-Σ type (ADS1281 chip), which has a signal-to-noise ratio of 130dB at a sampling rate of 250SPS, a wide dynamic range of 5V, and flexible synchronization characteristics, a collection dynamic range of ±10V, and a minimum resolution of 100nV, a sampling rate adjustable within 250~4kHz, and a minimum resolution of 1nT for magnetic field collection, meeting the requirements of the airborne magnetic collection system for accurate capture of geomagnetic signals; the input of the high-precision ADC (ADS1281) is electrically connected to the output of the anti-aliasing filter sub-circuit, completing the conversion of analog signals to digital signals.

[0037] Further, the storage and transmission interface comprises a local storage sub-interface and an isolated transmission sub-interface. The local storage sub-interface comprises an SD card (Micro-SD card, supporting a maximum capacity of 32 GB) and an on-chip FIFO cache (integrated in the Zynq core control unit). The VDD pin of the SD card is connected to a 3.3V power supply through a 100mA self-recovery fuse, and a 10µF+100nF composite decoupling capacitor is arranged near the SD card seat. A 47kΩ pull-up resistor is additionally connected to the VDD on the DAT0~DAT3 and CMD lines of the SD card. The detection pin CD of the SD card is connected to the ground through a 10kΩ pull-down resistor. The SD card is electrically connected to the Zynq core control unit through a 4-bit SDIO bus (25MHz clock, achieving a continuous writing speed of 12.5MB / s). The on-chip FIFO cache is integrated in the Zynq core control unit and is electrically connected to the SDIO bus. The SD card supports a maximum capacity of 32 GB, and achieves high-speed data transmission under a 25MHz clock. After the data is accumulated to a preset capacity (256kB) through the on-chip FIFO cache, it is batch written to the SD card through the DMA mode. The isolated transmission sub-interface comprises a UART serial link, a digital isolator (using an ISO1042DWER dual-channel digital isolator), a TVS tube (using an SMAJ15CA model), and an RS-485 / TTL adaptive transceiver (using an SP3485 chip). One end of the UART serial link is electrically connected to the Zynq core control unit, and the other end is electrically connected to the input end of the digital isolator (ISO1042DWER). The output end of the digital isolator (ISO1042DWER) is electrically connected to the input end of the RS-485 / TTL adaptive transceiver (SP3485). The TVS tube (SMAJ15CA) is connected in series between the output end of the RS-485 / TTL adaptive transceiver (SP3485) and the external interface (DB-9 port). The digital isolator (ISO1042DWER) achieves 2.5kVrms isolation to the ground (primary side working power VDD1=3.3V, secondary side working power VDD2=5V, supplied by the on-board isolated DC-DC module, and each side is provided with a 100nF decoupling capacitor). The DE / RE pin of the RS-485 / TTL adaptive transceiver (SP3485) is driven by the isolated TXEN signal (high-level transmission, low-level reception). The terminal can enable a 120Ω matching resistor by selecting a jumper cap. The UART serial link is configured in an 8-N-1 format and a 2Mbps rate, achieving full-duplex data interaction and command transmission between the collection unit and the host computer.

[0038] In particular, with reference to Figure 5As shown, the storage and transmission interface undertakes two core tasks: first, through the SD card interface, a local large-capacity data cache of up to 32 GB is realized; second, through a UART serial link, full-duplex exchange of real-time acquisition data or diagnostic instructions is carried out between the acquisition unit and the upper computer.

[0039] The specific design is as follows: The local storage sub-interface includes an SD card (Micro-SD card) and an on-chip FIFO cache. The SD card uses a 4-bit SDIO bus working mode powered by 3.3 V, which can achieve a continuous writing speed of 12.5 MB / s at a 25 MHz clock, meeting the high-speed flow data disk writing requirement under the multi-channel synchronous sampling working condition. The VDD pin of the SD card is connected to a 3.3 V power supply after being protected by a 100 mA self-recovery fuse, and a 10 µF + 100 nF composite decoupling capacitor is arranged near the proximal end of the SD card seat. A 47 kΩ pull-up resistor is additionally connected to the VDD on the DAT0~DAT3 and CMD lines of the SD card to ensure the logic stability in the empty card or standby state. The detection pin CD of the SD card is connected to the ground through a 10 kΩ pull-down resistor, which is pulled up by the internal short circuit of the card when the card is inserted, and a hot plug interrupt is generated by the Zynq core control unit.

[0040] The on-chip FIFO cache is integrated in the Zynq core control unit and electrically connected to the 4-bit SDIO bus. During the acquisition task, the raw data is first written into the on-chip FIFO cache for temporary storage. Taking 1 kHz sampling and 24-bit data for each of the three axes as an example, 9 kB of raw data is generated per second. When the on-chip FIFO cache accumulates data to 256 kB (preset capacity), the Zynq core control unit triggers the DMA transmission of the SDIO bus, and the 256 kB data block is written to the SD card FAT32 continuous cluster in batches within 22 ms. After the data writing is completed, the on-chip FIFO cache space is immediately released to ensure that the sampling process is not interrupted.

[0041] The isolated transmission sub-interface includes a UART serial link, a digital isolator (ISO1042DWER double-channel digital isolator), a TVS tube (SMAJ15CA), and an RS-485 / TTL adaptive transceiver (SP3485). The UART serial link is configured in an 8-N-1 format and at a rate of 2 Mbps, and can realize full-duplex data interaction and instruction transmission between the acquisition unit and the host computer. One end of the UART serial link is electrically connected to the Zynq core control unit, and the other end is electrically connected to the input end of the digital isolator (ISO1042DWER). The digital isolator (ISO1042DWER) realizes 2.5kVrms isolation from the ground, which can effectively reduce the influence of high-frequency interference and ground loop problems on the communication link. The primary side of the digital isolator (ISO1042DWER) works at 3.3V, and the secondary side works at 5V (supplied by the on-board isolated DC-DC module). In addition, 100nF decoupling capacitors are arranged on both sides of the digital isolator to improve the stability of the power supply.

[0042] The output end of the digital isolator (ISO1042DWER) is electrically connected to the input end of the RS-485 / TTL adaptive transceiver (SP3485). The DE / RE pin of the RS-485 / TTL adaptive transceiver (SP3485) is driven by the isolated TXEN signal (high-level transmission and low-level reception). The terminal can select to enable a 120Ω matching resistor through a jumper cap to adapt to the daisy chain end application scenario. The TVS tube (SMAJ15CA) is connected in series between the output end of the RS-485 / TTL adaptive transceiver (SP3485) and the external interface (DB-9 port), forming a double protection against lightning and surge, and ensuring the communication integrity in the long wiring environment on site.

[0043] Both interfaces are uniformly scheduled by the internal logic of the Zynq core control unit: during the acquisition task, the Zynq core control unit preferentially controls the data to be written to the on-chip FIFO buffer, and then writes it to the SD card in batches through DMA; when the host computer sends a reading request or a configuration command, the Zynq core control unit suspends the write channel of the SDIO bus and switches to the UART serial link to return the confirmation signal and data packet (such as returning the latest 4096-byte data stream). After the data transmission is completed, the normal writing of the SD card is immediately restored, realizing the parallel working mode of data storage and instruction interaction.

[0044] Further, the Zynq core control unit is extended with a DDR3 external storage module, the DDR3 external storage module is electrically connected with the storage interface of the Zynq core control unit through a differential signal pair, and impedance matching design (transmission line impedance control, terminal matching) is adopted to ensure signal integrity; the GPIO pin of the Zynq core control unit is electrically connected with the enable end of a low-noise linear voltage regulator chip (LP5907), and by controlling the on-off of the enable end, the orderly start of the 3.3V digital power supply and other power supply voltages (±12V, ±5V, ±2.5V) is realized, and the power-on sequence management is completed; the collection unit is provided with an aluminum alloy shell, and the PCB adopts a design combining ground plane segmentation and star-shaped junction, which separately layouts analog ground (AGND, corresponding to the grounding requirement of analog front-end circuit and voltage reference circuit), digital ground (corresponding to the grounding requirement of Zynq core control unit, storage and transmission interface, etc. Digital modules), reference ground (REFGND, as the exclusive ground of the voltage reference circuit), and the three are grounded through a star-shaped junction structure (single-point common ground), reducing the electromagnetic interference generated by the cabin equipment.

[0045] Specifically, to meet the high-speed data processing and temporary storage requirements in the process of aeromagnetic measurement, the Zynq core control unit is extended with a DDR3 external storage module for realizing temporary caching of collected data and data interaction in the processing process; the DDR3 external storage module is electrically connected with the storage interface of the Zynq core control unit through a differential signal pair, and for the signal integrity requirement of high-speed data transmission, impedance matching design (transmission line impedance control, terminal matching) is adopted in the design to ensure the integrity of the differential signal transmission process, avoid high-frequency signal crosstalk and timing offset, and ensure the stability and efficiency of data reading and writing.

[0046] In terms of power management, the GPIO pin of the Zynq core control unit is electrically connected with the enable end of a low-noise linear voltage regulator chip (LP5907), and by controlling the on-off of the enable end of the low-noise linear voltage regulator chip (LP5907), the orderly start of the 3.3V digital power supply and other power supply voltages (±12V, ±5V, ±2.5V) is realized, and the power-on sequence management is completed - avoiding circuit logic abnormalities or component damage caused by chaotic start timing of different voltage modules, and improving the reliability of the system power-on process.

[0047] To reduce the influence of the complex electromagnetic environment of the aviation platform on the measurement accuracy of the acquisition unit, the acquisition unit is provided with an aluminum alloy shell. The aluminum alloy shell has good electromagnetic shielding performance, can effectively block the electromagnetic radiation generated by external interference sources such as cabin-mounted motors, frequency converters and radio frequency equipment, and reduce the coupling influence of interference signals on sensitive modules such as internal analog front-end circuits and voltage reference circuits. At the same time, the PCB board adopts a design combining ground plane segmentation and star-shaped junction. The analog ground (AGND), digital ground and reference ground (REFGND) are separately laid out. The analog ground (AGND) corresponds to the grounding requirements of the analog front-end circuit and the voltage reference circuit, the digital ground corresponds to the grounding requirements of the digital modules such as the Zynq core control unit, storage and transmission interface, and the reference ground (REFGND) is the exclusive ground of the voltage reference circuit. The three grounds are connected through a star-shaped junction structure (single-point common ground) to realize common grounding, avoid ground potential difference between different types of grounding circuits, and further reduce the influence of electromagnetic interference on measurement accuracy.

[0048] Further, the ESD and surge protection sub-circuit of the analog front-end circuit includes a self-restoring fuse (BSMD0603 type, F1-F3), a current-limiting resistor (100Ω) and a ground capacitor (1nF). One end of the self-restoring fuse (BSMD0603, F1-F3) is electrically connected to the magnetometer signal input interface of the analog front-end circuit, the other end is electrically connected to one end of the current-limiting resistor (100Ω), the other end of the current-limiting resistor (100Ω) is electrically connected to one end of the ground capacitor (1nF), and the other end of the ground capacitor (1nF) is connected to the analog ground (AGND). The anti-aliasing filter sub-circuit includes a series resistor (100Ω, R28, R30) and a parallel capacitor (100nF, C47, C49). One end of the series resistor (100Ω, R28, R30) is electrically connected to the output end (VOUTP / VOUTN) of the differential amplification sub-circuit (THP210, U29.1), and the other end is electrically connected to the input end of the high-precision ADC sub-circuit (ADS1281). One end of the parallel capacitor (100nF, C47, C49) is electrically connected to one end of the series resistor (100Ω, R28, R30) close to the high-precision ADC (ADS1281), and the other end is connected to the analog ground (AGND), forming an RC low-pass filter network for suppressing out-of-band high-frequency interference, matching the dynamic characteristics of the ADC (ADS1281) and the magnetic signal spectrum characteristics, and improving the effective resolution and signal-to-noise ratio.

[0049] Specifically, the ESD and surge protection sub-circuit of the analog front-end circuit includes self-resetting fuses (BSMD0603 type, F1-F3), current-limiting resistors (100 Ω), and capacitors to ground (1 nF) for suppressing high-frequency spikes and surge interference in extreme airborne environments to protect the signal integrity of the sensitive circuit in the rear stage. One end of the self-resetting fuse (BSMD0603, F1-F3) is electrically connected to the magnetometer signal input interface of the analog front-end circuit, and the other end is electrically connected to one end of the 100 Ω current-limiting resistor; the other end of the current-limiting resistor (100 Ω) is electrically connected to one end of the 1 nF capacitor to ground, and the other end of the capacitor to ground (1 nF) is connected to the analog ground (AGND) - through the synergistic effect of "self-resetting fuse current limiting + current-limiting resistor voltage division + capacitor to ground spike absorption", the surge current can be effectively blocked, the ESD discharge energy can be absorbed, and the subsequent common-mode choke coil and π-type LC filter sub-circuit, multi-channel signal gating sub-circuit (MUX509, U27.1 / U27.2) and other modules can be protected from damage by external transient high voltage or large current.

[0050] The anti-aliasing filter sub-circuit includes series resistors (100 Ω, R28, R30) and parallel capacitors (100 nF, C47, C49) for suppressing out-of-band high-frequency interference in the output signal of the differential amplification sub-circuit (THP210, U29.1), matching the dynamic characteristics of the high-precision ADC sub-circuit (ADS1281) and the aeromagnetic signal spectrum characteristics, and improving the effective resolution and signal-to-noise ratio of analog-to-digital conversion. The specific connection relationship is as follows: one end of the series resistor (100 Ω, R28, R30) is electrically connected to the output end (VOUTP / VOUTN) of the differential amplification sub-circuit (THP210, U29.1), and the other end is electrically connected to the input end of the high-precision ADC sub-circuit (ADS1281); one end of the parallel capacitor (100 nF, C47, C49) is electrically connected to one end of the series resistor (100 Ω, R28, R30) close to the high-precision ADC (ADS1281), and the other end is connected to the analog ground (AGND) - the two together form an RC low-pass filter network, which can specifically filter out high-frequency stray noise (such as high-frequency harmonics introduced by the differential amplification sub-circuit, external electromagnetic coupling noise, etc.) higher than the bandwidth of the aeromagnetic signal, prevent sampling distortion caused by folding high-frequency signals into the sampling bandwidth, and ensure the purity of the signal input to the high-precision ADC sub-circuit (ADS1281).

[0051] A high-precision magnetic field data acquisition method for aeromagnetic measurement based on the high-precision magnetic field data acquisition unit for aeromagnetic measurement described above, characterized by comprising the following steps: S1, receive external 12V input voltage through the power supply circuit of the acquisition unit, sequentially process through the bridge transformer driver (CMP6793), double secondary winding isolation transformer (VPT87DD), full-bridge rectifier circuit (MBRS340T3G), π-type filter network (10µH-22µF-10µH) and low-noise linear voltage regulator (LT3094, LT3042, LP5907), convert into ±12V, ±5V, ±2.5V and 3.3V multi-path isolated stabilized output, adopt power supply circuit magnetic beads, feedthrough capacitor and LC filter to form multi-stage noise filter structure, provide low-noise power supply for the voltage reference circuit of the acquisition module, the analog front-end circuit and the Zynq core control unit, storage and transmission interface of the control module, control the enable end of the low-noise linear voltage regulator chip (LP5907) through the GPIO pin of the Zynq core control unit, realize the orderly start of the 3.3V digital power supply and other power supply voltages; S2, adopt symmetric differential reference structure by the voltage reference circuit of the acquisition unit, output +VREF reference voltage (+2.5V) from the high-precision reference source (ADR4525ARZ-R7), cooperate with 1kΩ resistance and precision operational amplifier (OPA189IDGKT), combine with 1kΩ feedback resistance to generate -VREF reference voltage (-2.5V) symmetric with +VREF (+2.5V), form ±VREF (±2.5V) full-differential reference pair; adopt voltage reference circuit magnetic beads (BLM18AG601SN1D) and decoupling capacitor (10µF C58, 100nF C59, 4.7µF C62, 100nF C63) to form local decoupling filter network, cooperate with common-mode feedback regulation loop to suppress reference offset caused by power supply fluctuation and ground potential difference; S3, the original analog signal output by the magnetometer is received by the analog front-end circuit of the acquisition unit, the surge and spike interference is suppressed through the ESD and surge protection sub-circuit (BSMD0603 self-recovery fuse, 100Ω current limiting resistor, 1nF capacitor to ground), then the differential and common-mode noise greater than 1MHz is suppressed through the common-mode choke coil (10µH L5-L7) and π-type LC filter sub-circuit, then the signal and reference +VREF (+2.5V) are switched through the multi-channel signal gating sub-circuit (MUX509 U27.1 / U27.2) (FPGA controls through A0 / A1 line, 8µs switching speed), then the signal is buffered through the single-ended buffer sub-circuit (OPA189 U28.1), then the gain is set by the differential amplification sub-circuit (THP210 U29.1) which includes a precision symmetric resistor array (1kΩ resistors R24 / R25 / R31 / R32+U26 chip) and a buffer (OPA189 U28.2), the output end of the buffer (OPA189 U28.2) is fixed at 0V to make the signal symmetrically swing around the analog ground (AGND), and finally the anti-aliasing filter sub-circuit (100Ω R28 / R30, 100nF C47 / C49) forms an RC low-pass filter network to suppress out-of-band high-frequency interference; S4, the analog signal after conditioning is converted into digital signal by 32-bit Δ-Σ high-precision ADC (ADS1281) through the high-precision ADC sub-circuit (ADS1281) in the analog front-end circuit, the Zynq core control unit configures and manages the high-precision ADC sub-circuit (ADS1281), controls the adjustable sampling rate, trigger mode and filter parameters of the high-precision ADC sub-circuit (ADS1281) within 250~4kHz, realizes the collection dynamic range of ±10V, the minimum resolution of 100nV and the minimum resolution of 1nT of the magnetic field collection, and outputs the digital signal; S5, the Zynq core control unit synchronously receives the digital signal output by the high-precision ADC sub-circuit (ADS1281), compensates the error of the digital signal, realizes data buffering through the extended DDR3 external storage module, the DDR3 external storage module is connected with the storage interface of the Zynq core control unit through differential signal pair, and impedance matching design (transmission line impedance control, terminal matching) is adopted, runs the airborne magnetic compensation model and completes the model configuration at the same time; S6, through the local storage sub-interface of the storage and transmission interface, the processed data is first cached to the on-chip FIFO cache inside the Zynq core control unit, and after accumulation to 256kB (preset capacity), it is batch written to the SD card (Micro-SD card, maximum 32GB) through the 4-bit SDIO bus (25MHz clock) by the DMA mode, and the full-duplex data interaction and instruction transmission between the acquisition unit and the upper computer are realized through the isolation type transmission sub-interface of the storage and transmission interface, the isolation type transmission sub-interface includes UART serial link (8-N-1 format, 2Mbps rate), digital isolator (ISO1042DWER, 2.5kVrms isolation), TVS tube (SMAJ15CA) and RS-485 / TTL adaptive transceiver (SP3485), the primary side of the digital isolator (ISO1042DWER) is powered by 3.3V, and the secondary side is powered by 5V (isolated DC-DC module), and the terminal of the RS-485 / TTL adaptive transceiver (SP3485) can select 120Ω matching resistor.

[0052] Specifically, the multi-path isolated voltage supply and multi-stage noise filtering design of S1 cooperate with the power-on sequence management to provide a low-noise and high-stability power supply environment for the acquisition module and the control module, avoiding the influence of power supply interference on measurement from the source; the symmetric differential reference generation and local decoupling filtering of S2 ensure the low temperature drift and low noise characteristics of the reference required for analog-to-digital conversion, laying a foundation for high-precision sampling; the analog front-end full-link conditioning (ESD protection, common-mode noise suppression, differential amplification and signal symmetry processing) of S3 effectively filters out surges and high-frequency interference in the airborne environment, improving the purity of weak magnetic signals; S4 realizes adjustable sampling rate of 250~4kHz and 1nT-level magnetic field acquisition resolution through the flexible configuration of 32-bit delta-sigma type high-precision ADC (ADS1281) and Zynq core, meeting the needs of different airborne magnetic measurement scenarios; the real-time error compensation, DDR3 cache (impedance matching ensures signal integrity) and airborne magnetic compensation model running of S5 further correct measurement deviation, ensuring the accuracy and real-time performance of data processing; the FIFO cache+DMA batch storage and isolation type transmission (2.5kVrms isolation+TVS protection) of S6 not only realize efficient and reliable caching of local data, but also ensure the anti-interference ability and full-duplex stability of interaction with the upper computer. Through the cooperation of each step, the overall method effectively solves the problems of low precision, weak anti-interference and unstable data processing and storage in existing airborne magnetic acquisition methods, and is suitable for airborne magnetic measurement scenarios with strict requirements on measurement accuracy and reliability, providing a stable and efficient implementation path for high-quality magnetic field data acquisition.

[0053] The above-described embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A high-precision magnetic field data acquisition unit for aeromagnetic surveying, characterized in that, The application relates to a magnetic field data acquisition unit for airborne magnetic survey, which comprises a collection module and a control module, and the collection module is electrically connected with the control module, The collection module comprises a power supply circuit, a voltage reference circuit and an analog front-end circuit, wherein, The power supply circuit is used for receiving an external 12V input voltage, converting the external 12V input voltage into multiple isolated and stabilized voltage outputs, and providing low-noise power supply for the collection module and the control module; The voltage reference circuit is used for generating a stable differential reference voltage, and providing a low-temperature drift and low-noise reference for analog-to-digital conversion of the analog front-end circuit; The analog front-end circuit is used for receiving original analog signals output by a magnetometer, performing amplitude adjustment, bandwidth limitation, anti-interference processing and analog-to-digital conversion on the original analog signals, and outputting digital signals; The control module comprises a Zynq core control unit and a storage and transmission interface, and the functions of the sub-modules are as follows: The Zynq core control unit is electrically connected with the analog front-end circuit of the collection module, is used for configuring and managing an analog-to-digital conversion sub-circuit in the analog front-end circuit, controlling sampling rate, trigger mode and filter parameters of analog-to-digital conversion, synchronously receiving digital signals output by the analog front-end circuit, performing error compensation and storage management on the digital signals, and realizing real-time operation and configuration of an airborne magnetic compensation model; The storage and transmission interface is electrically connected with the Zynq core control unit, is used for realizing local large-capacity data buffering, uploading processed data to an upper computer, and completing instruction interaction between a high-precision magnetic field data acquisition unit for airborne magnetic survey and the upper computer.

2. The high-precision magnetic field data acquisition unit for aeromagnetic survey according to claim 1, characterized in that, The multiple isolated and stabilized voltage outputs of the power supply circuit comprise +12V, -12V, +5V, -5V, +2.5V, -2.5V and 3.3V, and the power supply circuit comprises a bridge-type transformer driver, a double-secondary-winding isolation transformer, a full-bridge rectification circuit, a pi-type filter network and a low-noise linear stabilizer, the output end of the bridge-type transformer driver is electrically connected with the two ends of the primary winding of the double-secondary-winding isolation transformer, the output end of the secondary winding of the double-secondary-winding isolation transformer is electrically connected with the input end of the full-bridge rectification circuit, the pulsating direct-current output end of the full-bridge rectification circuit is electrically connected with the input end of the pi-type filter network, the output end of the pi-type filter network is electrically connected with the input end of the low-noise linear stabilizer, and the output end of the low-noise linear stabilizer is electrically connected with the voltage reference circuit and the analog front-end circuit of the collection module, the Zynq core control unit and the storage and transmission interface of the control module respectively, and target stabilized voltages are provided; The power supply circuit further comprises a power supply circuit magnetic bead, a feed-through capacitor and an LC filter, the power supply circuit magnetic bead is connected in series in a power supply signal link, one end of the feed-through capacitor is electrically connected with the power supply signal link and the other end is grounded, and the LC filter is connected in parallel at the output end of the low-noise linear stabilizer, and the power supply circuit magnetic bead, the feed-through capacitor and the LC filter form a multi-stage noise filtering structure.

3. A high-precision magnetic field data acquisition unit for aeromagnetic surveying according to claim 2, characterized in that, The voltage reference circuit adopts a symmetrical differential reference structure, comprising a high-precision reference source, a precision operational amplifier and a feedback resistor; an output end of the high-precision reference source outputs a +VREF reference voltage, and is electrically connected to an inverting end of the precision operational amplifier through a resistor, a non-inverting end of the precision operational amplifier is grounded, and an output end of the precision operational amplifier is electrically connected to the inverting end of itself through a feedback resistor, and outputs a -VREF reference voltage symmetrical to +VREF, forming a ±VREF full-differential reference pair; The voltage reference circuit further comprises a voltage reference circuit magnetic bead and a decoupling capacitor, the voltage reference circuit magnetic bead is connected in series between a power input end of the high-precision reference source and a system analog power supply, and the decoupling capacitor is connected in parallel between an output end of the high-precision reference source and a reference ground, and between an output end of the precision operational amplifier and the reference ground, thereby forming a local decoupling filter network.

4. The high-precision magnetic field data acquisition unit for aeromagnetic survey according to claim 3, characterized in that, The analog front-end circuit comprises an ESD and surge protection sub-circuit, a common-mode choke and a π-type LC filter sub-circuit, a multi-channel signal gating sub-circuit, a single-ended buffer sub-circuit, a differential amplification sub-circuit, an anti-aliasing filter sub-circuit and a high-precision ADC sub-circuit which are electrically connected in sequence, the differential amplification sub-circuit comprises a precision symmetrical resistor array and a buffer, the precision symmetrical resistor array is electrically connected to a signal input end of the differential amplification sub-circuit to set the gain, a VOCM pin of the differential amplification sub-circuit is electrically connected to an output end of the buffer through a precision voltage dividing network, and the output end of the buffer is fixed at 0V, so that the output signal of the differential amplification sub-circuit swings symmetrically around the analog ground, and the high-precision ADC in the high-precision ADC sub-circuit is a 32-bit delta-sigma type, and an input end of the high-precision ADC is electrically connected to an output end of the anti-aliasing filter sub-circuit.

5. The high-precision magnetic field data acquisition unit for aeromagnetic survey according to claim 4, characterized in that, The storage and transmission interface comprises a local storage sub-interface and an isolated transmission sub-interface, the local storage sub-interface comprises an SD card and an on-chip FIFO cache, the SD card is electrically connected to a Zynq core control unit through a 4-bit SDIO bus, the on-chip FIFO cache is integrated in the Zynq core control unit and is electrically connected to the SDIO bus, data is accumulated to a preset capacity through the on-chip FIFO cache, and then is written to the SD card in batches through a DMA mode, the isolated transmission sub-interface comprises a UART serial link, a digital isolator, a TVS tube and an RS-485 / TTL adaptive transceiver, one end of the UART serial link is electrically connected to the Zynq core control unit, the other end is electrically connected to an input end of the digital isolator, an output end of the digital isolator is electrically connected to an input end of the RS-485 / TTL adaptive transceiver, the TVS tube is connected in series between an output end of the RS-485 / TTL adaptive transceiver and an external interface, the digital isolator realizes 2.5kVrms isolation to ground, the UART serial link is configured in an 8-N-1 format, and full-duplex data interaction and instruction transmission between the high-precision magnetic field data acquisition unit for aeromagnetic measurement and the host computer are realized.

6. A high-precision magnetic field data acquisition unit for aeromagnetic surveying according to claim 5, characterized in that, The Zynq core control unit is extended with a DDR3 external storage module, which is electrically connected with the storage interface of the Zynq core control unit through a differential signal pair; the GPIO pin of the Zynq core control unit is electrically connected with the enable end of the low-noise linear voltage stabilizer chip; the collection unit is provided with an aluminum alloy shell, and the PCB is designed in combination of ground plane segmentation and star-shaped junction, so that the analog ground, digital ground and reference ground are separately laid out and are grounded through the star-shaped junction structure.

7. A high-precision magnetic field data acquisition unit for aeromagnetic surveying according to claim 6, characterized in that, The ESD and surge protection sub-circuit of the analog front-end circuit comprises a self-restoring fuse, a current-limiting resistor and a ground capacitor, one end of the self-restoring fuse is electrically connected with the magnetometer signal input interface of the analog front-end circuit, the other end is electrically connected with one end of the current-limiting resistor, the other end of the current-limiting resistor is electrically connected with one end of the ground capacitor, and the other end of the ground capacitor is connected with the analog ground. The anti-aliasing filter sub-circuit comprises a series resistor and a parallel capacitor, one end of the series resistor is electrically connected with the output end of the differential amplification sub-circuit, the other end is electrically connected with the input end of the high-precision ADC sub-circuit, one end of the parallel capacitor is electrically connected with the end of the series resistor close to the high-precision ADC, and the other end is connected with the analog ground, forming an RC low-pass filter network.

8. A high-precision magnetic field data acquisition method for aeromagnetic surveying, based on the high-precision magnetic field data acquisition unit for aeromagnetic surveying according to claims 1-7, characterized in that, The method comprises the following steps: S1, receiving external 12V input voltage through the power supply circuit of the collection unit, and sequentially processing through the bridge-type transformer driver, double-secondary winding isolation transformer, full-bridge rectifier circuit, π-type filter network and low-noise linear voltage stabilizer to convert into ±12V, ±5V, ±2.5V and 3.3V multi-path isolated stabilized output, adopting power supply circuit magnetic beads, feedthrough capacitor and LC filter to form a multi-stage noise filtering structure, providing low-noise power supply for the voltage reference circuit of the collection module, the analog front-end circuit and the Zynq core control unit, storage and transmission interface of the control module, and controlling the enable end of the low-noise linear voltage stabilizer chip through the GPIO pin of the Zynq core control unit to realize orderly start of the 3.3V digital power supply and other power supply voltages; S2, adopting a symmetric differential reference structure by the voltage reference circuit of the collection unit, outputting +VREF reference voltage from a high-precision reference source, generating –VREF reference voltage symmetric to +VREF reference voltage through resistance and precision operational amplifier, forming a ±VREF full-differential reference pair, and adopting voltage reference circuit magnetic beads and decoupling capacitor to form a local decoupling filter network, and cooperating with a common-mode feedback regulation loop to suppress reference offset caused by power supply fluctuation and ground potential difference. S3, the original analog signal output by the magnetometer is received by the analog front-end circuit of the acquisition unit, the surge and spike interference is suppressed by the ESD and surge protection sub-circuit, the differential and common-mode noise greater than 1MHz is suppressed by the common-mode choke coil and π-type LC filter sub-circuit, then the signal and reference are switched by the multi-channel signal gating sub-circuit, then the signal is buffered by the single-ended buffer sub-circuit, then the gain is set by the differential amplification sub-circuit, the differential amplification sub-circuit includes a precision symmetric resistor array and a buffer, the buffer output end is fixed to 0V to make the signal swing symmetrically around the analog ground, and finally the anti-aliasing filter sub-circuit forms an RC low-pass filter network to suppress out-of-band high-frequency interference; S4, by the high-precision ADC sub-circuit in the analog front-end circuit, the analog signal after conditioning is converted by the 32-bit Δ-Σ high-precision ADC, the Zynq core control unit configures and manages the high-precision ADC sub-circuit, controls the adjustable sampling rate, trigger mode and filter parameters of the high-precision ADC sub-circuit 250~4kHz, realizes the collection dynamic range of ±10V, the minimum resolution of 100nV and the minimum resolution of 1nT of the magnetic field collection, and outputs the digital signal; S5, the Zynq core control unit synchronously receives the digital signal output by the high-precision ADC sub-circuit, compensates the error of the digital signal, realizes data buffering through the extended DDR3 external storage module, the DDR3 external storage module is connected with the storage interface of the Zynq core control unit through differential signal pairs, and impedance matching design is adopted, the airborne magnetic compensation model is run and the model configuration is completed at the same time; S6, through the local storage sub-interface of the storage and transmission interface, the processed data is first cached to the on-chip FIFO cache in the Zynq core control unit, and after accumulating to the preset capacity, it is batch written to the SD card through the 4-bit SDIO bus by the DMA method, the full-duplex data interaction and instruction transmission between the acquisition unit and the upper computer are realized through the isolation type transmission sub-interface of the storage and transmission interface, the isolation type transmission sub-interface includes UART serial link, digital isolator, TVS tube and RS-485 / TTL adaptive transceiver, the UART serial link is configured in 8-N-1 format, and the digital isolator realizes 2.5kVrms ground isolation.

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