Clock synchronization method and device of virtual machine, storage medium and electronic device

By configuring clock alignment duration in heterogeneous chips to synchronize the clock cycles of heterogeneous virtual machines, the problem of inconsistent virtual machine clock references is solved, deterministic timing synchronization and communication timing consistency are achieved, ensuring synchronization between virtual machines and real hardware, and improving the communication and simulation efficiency of the system.

CN121433447AActive Publication Date: 2026-01-30CHONGQING CHANGAN AUTOMOBILE CO LTD +1
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Patent Information

Application Number
CN202512049233.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-31
Publication Date
2026-01-30
Estimated Expiration
2045-12-31

AI Technical Summary

Technical Problem

In digital twin applications of automotive electronics and industrial control, inconsistent virtual machine clock references of heterogeneous system chips lead to timing logic misalignments, resulting in communication anomalies and the inability of the simulation environment to reproduce the deterministic timing of the real hardware.

Method used

By determining the clock cycle difference between the virtual machines to be communicated in the heterogeneous chip, the non-fixed instruction cycle clock source of the first virtual machine is obtained, the clock alignment duration is configured, and the first and second virtual machines are synchronized using the clock alignment duration. This includes intercepting clock setting requests and driving a physical high-precision timer to trigger an interrupt after the actual expiration time to ensure clock synchronization.

Benefits of technology

It achieves deterministic timing synchronization under a heterogeneous virtualization architecture, ensuring that the communication timing between the virtual MCU and the virtual SOC is consistent with the real hardware, avoiding timing errors introduced by the simulator, preventing interrupt storms and communication timeouts, and improving the system's communication efficiency and simulation efficiency.

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Abstract

The invention provides a clock synchronization method and device of virtual machines, a storage medium and an electronic device.The method comprises the steps that a first virtual machine and a second virtual machine to be communicated in a heterogeneous chip are determined, the clock cycle of a first clock source of the first virtual machine is a non-fixed instruction cycle, and the clock cycle of a second clock source of the second virtual machine is a non-fixed instruction cycle; the clock period of a second clock source of the second virtual machine is a fixed physical clock period; acquiring a first clock source of the first virtual machine; and configuring a clock alignment duration of the heterogeneous chip based on the first clock source, and performing clock synchronization on the first virtual machine and the second virtual machine by adopting the clock alignment duration. Through the embodiment of the invention, the technical problem that clocks among different virtual machines in a heterogeneous chip in the prior art are asynchronous is solved, the communication time sequence among the different virtual machines is ensured to be consistent with real hardware, and virtual-real inconsistency caused by time sequence errors is avoided.
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