Super-large array packaging conductivity testing device and testing method

Abstract

The invention relates to the technical field of sensing product testing, in particular to a super-large array packaging conductivity testing device which comprises a wafer testing table, an open circuit testing plate and a short circuit testing plate, an objective table is installed at the top of the wafer testing table, and a swing arm positioning seat is installed at the top of the wafer testing table and on the back face of the objective table. The outer wall of the swing arm positioning seat is provided with a test probe, the top of the wafer test bench and the back surface of the swing arm positioning seat are provided with a main control unit, and the outer wall of the main control unit is connected with the swing arm positioning seat through a test line. According to the super-large array packaging conductivity testing device, the open circuit testing plate and the short circuit testing plate in the device are used for testing the to-be-tested product, and the problems that an existing testing device and an existing testing method cannot directly point-contact the two ends for measurement, the accuracy of a testing result is poor, the efficiency is low, and the product is prone to being damaged are solved.

Description

Technical Field

[0001] This invention relates to the field of sensor product testing technology, specifically to a large array package conductivity testing device and testing method. Background Technology

[0002] High-density, ultra-large array circuits typically consist of multi-layer high-temperature co-fired ceramic housings, FPCs (flexible printed circuit boards), and multi-pin integrated connectors. The housing contains multiple sintered and laminated circuits (leading the front pads to the back output). The FPC and housing are soldered at multiple points, as are the multi-pin connectors and FPCs. The multi-pin integrated connector has multiple flexible pin contacts. Any malfunction or instability at any of these connection points can lead to open circuits, short circuits between adjacent channels, or excessive voltage / resistance, causing the corresponding chip unit to malfunction, such as no light or low light output (high resistance, low operating current). Therefore, it is necessary to test and confirm the semi-finished product before chip mounting, intercepting / returning defective products to reduce the cost losses in materials, labor, and equipment resulting from defective finished products after packaging.

[0003] However, existing testing devices and methods still have shortcomings, specifically: existing testing devices and methods cannot directly touch both ends for measurement, resulting in poor accuracy and low efficiency, and are prone to damaging the product. Summary of the Invention

[0004] The purpose of this invention is to provide a conductivity testing device and method for ultra-large array packages to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] A conductivity testing device for ultra-large array packages includes a wafer test stage, an open-circuit test board, and a short-circuit test board. A stage is mounted on the top of the wafer test stage, and a swing arm positioning seat is mounted on the top of the wafer test stage and on the back of the stage. Test probes are mounted on the outer wall of the swing arm positioning seat, and a main control unit is mounted on the top of the wafer test stage and on the back of the swing arm positioning seat. The outer wall of the main control unit is connected to the swing arm positioning seat through test lines.

[0007] As a preferred embodiment of the present invention, a copper pillar is installed at the bottom of the open circuit test board, and a chassis is fixedly connected to the bottom of the copper pillar. An open circuit test FPC adapter board is installed at the top of the open circuit test board, and a flexible circuit board is installed on the outer wall of the open circuit test FPC adapter board. An open circuit test multi-PIN connector is provided at the top of the open circuit test board and near the position of the open circuit test FPC adapter board.

[0008] As a preferred embodiment of the present invention, the outer wall of the short-circuit test board is provided with a short-circuit test FPC adapter board, the outer wall of the short-circuit test FPC adapter board is connected to a short-circuit test multi-pin connector, a full short-circuit pad is installed on the outer wall of the short-circuit test board at a position away from the short-circuit test multi-pin connector, a toggle switch is provided on the outer wall of the short-circuit test board between the short-circuit test multi-pin connector and the full short-circuit pad, and a probe test hole is provided on the outer wall of the short-circuit test board near the toggle switch.

[0009] As a preferred embodiment of the present invention, the swing arm positioning seat is provided in two sets, and the two sets of swing arm positioning seats are symmetrically arranged on both sides of the stage. The test line is provided in multiple sets, and the test probe is provided in two sets, which are positive and negative elastic probes respectively.

[0010] As a preferred embodiment of the present invention, the copper pillars are provided in four sets, and the copper pillars are designed as hexagonal prisms, while the base is designed as a U-shaped structure.

[0011] As a preferred embodiment of the present invention, the following steps are included:

[0012] S1, the test sample is assembled with the open circuit test FPC adapter board and chassis fixture. The fixture is placed on the stage of the wafer test stage. The vacuum suction holes on the stage are used for adsorption and positioning. During ordinary wafer testing, two test probes contact the target pad at the same time. The main control unit detects the voltage / resistance value to judge the connection effect or power supply test performance.

[0013] S2. Assemble the device under test (DUT) with the short-circuit test FPC adapter board and short-circuit test board. Turn the toggle switch to the off position. Use a multimeter to test the positive probe at the test hole and the negative probe at the short-circuit pad. Read the impedance value of the multimeter. If the impedance is infinite or there is no short-circuit alarm, there is no short-circuit problem. If the impedance is very small or there is a short-circuit alarm, there is a short circuit. Further test the adjacent channels to confirm the short circuit location. Repeat the operation until all link tests are completed.

[0014] As a preferred embodiment of the present invention, during the test in S1, the connection method needs to be modified for the continuity test. The positive terminal of the test probe is lightly touched to the pad on the upper surface of the product, and the negative terminal of the test probe is connected to the test line of the continuity test board. That is, the negative terminal of the test probe is kept connected to one end of all the channels to be tested. During the test, the positive terminal of the test probe is switched one by one starting from the first pad. The main control unit collects and records the measured voltage / resistance values. The test values ​​are judged to confirm whether the product is conducting and whether the resistance / voltage values ​​are too large. Abnormal test values ​​indicate that the product has poor continuity and has problems such as open circuit / unstable continuity.

[0015] As a preferred embodiment of the present invention, in the repeated operation of S2, the negative probe of the multimeter is always kept on the fully conductive pad, while the positive probe is switched one by one.

[0016] Compared with the prior art, the beneficial effects of the present invention are:

[0017] 1. In this invention, a large array package continuity testing device is set up. The open-circuit test board and short-circuit test board in this device are used to test the product under test. The product under test is assembled with the open-circuit test FPC adapter board and the chassis fixture. The fixture is placed on the stage of the wafer testing station, and the vacuum suction holes densely distributed on the stage are used for adsorption and positioning. During ordinary wafer testing, two test probes simultaneously contact the target pads. The main control unit detects the voltage / resistance value to determine the connection effect or power supply test performance. Then, the product under test is assembled with the short-circuit test FPC adapter board and the short-circuit test board. The toggle switch is turned off, and the positive terminal of the multimeter test probe is used. The probe is used to test the hole, and the negative terminal is fully short-circuited on the pad. The impedance value is read from a multimeter. If the impedance is infinite or there is no short-circuit alarm, there is no short circuit. If the impedance is very low or there is a short-circuit alarm, there is a short circuit. The adjacent channels can be further tested to confirm the short circuit location. The operation is repeated until all links are tested. This provides a high-precision, high-efficiency, and high-reliability full-channel open-circuit and short-circuit stability test system for high-density ultra-large array packaging. It opens up more possibilities for the application of multi-channel array packaging and solves the problems of existing test devices and methods that cannot directly touch the two ends for measurement, resulting in poor test accuracy, low efficiency, and easy damage to the product. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the three-dimensional structure of the wafer testing stage of the present invention;

[0019] Figure 2 This is a schematic diagram of the three-dimensional structure of the open-circuit test board of the present invention;

[0020] Figure 3 This is a schematic diagram illustrating the open-circuit test principle of the present invention;

[0021] Figure 4 This is a schematic diagram of the circuit structure of the short-circuit test board of the present invention;

[0022] Figure 5 This is a front view of the short-circuit test board of the present invention;

[0023] Figure 6 For the present invention Figure 5 Enlarged view of a portion of the image;

[0024] Figure 7 This is a schematic diagram illustrating the short-circuit test principle of the present invention.

[0025] In the diagram: 1. Wafer test stage; 2. Open circuit test board; 3. Short circuit test board; 4. Stage; 5. Swing arm positioning seat; 6. Test probe; 7. Main control unit; 8. Test line; 201. Copper pillar; 202. Chassis; 203. Open circuit test FPC adapter board; 204. Flexible circuit board; 205. Open circuit test multi-pin connector; 301. Short circuit test FPC adapter board; 302. Short circuit test multi-pin connector; 303. All-short circuit pad; 304. Toggle switch; 305. Probe test hole. Detailed Implementation

[0026] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0027] To facilitate understanding of the present invention, a more comprehensive description of the invention will be given below with reference to the accompanying drawings, and several embodiments of the invention will be provided. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the invention will be more thorough and complete.

[0028] For examples, please refer to Figure 1-7 The present invention provides a technical solution:

[0029] A large array package continuity testing device includes a wafer test stage 1, an open circuit test board 2, and a short circuit test board 3. A stage 4 is mounted on the top of the wafer test stage 1. A swing arm positioning seat 5 is mounted on the top of the wafer test stage 1 and on the back of the stage 4. Test probes 6 are mounted on the outer wall of the swing arm positioning seat 5. A main control unit 7 is mounted on the top of the wafer test stage 1 and on the back of the swing arm positioning seat 5. The outer wall of the main control unit 7 is connected to the swing arm positioning seat 5 through test lines 8.

[0030] Furthermore, a copper pillar 201 is installed at the bottom of the open circuit test board 2, and a chassis 202 is fixedly connected to the bottom of the copper pillar 201. An open circuit test FPC adapter board 203 is installed at the top of the open circuit test board 2, and a flexible circuit board 204 is installed on the outer wall of the open circuit test FPC adapter board 203. An open circuit test multi-PIN connector 205 is provided at the top of the open circuit test board 2 and near the open circuit test FPC adapter board 203.

[0031] Furthermore, the outer wall of the short-circuit test board 3 is provided with a short-circuit test FPC adapter board 301, and the outer wall of the short-circuit test FPC adapter board 301 is connected to a short-circuit test multi-pin connector 302. A full short-circuit pad 303 is installed on the outer wall of the short-circuit test board 3 at a position away from the short-circuit test multi-pin connector 302. A toggle switch 304 is provided on the outer wall of the short-circuit test board 3 between the short-circuit test multi-pin connector 302 and the full short-circuit pad 303. A probe test hole 305 is provided on the outer wall of the short-circuit test board 3 near the toggle switch 304.

[0032] Furthermore, there are two sets of swing arm positioning seats 5, and the two sets of swing arm positioning seats 5 are symmetrically arranged on both sides of the stage 4. There are multiple sets of test lines 8, and two sets of test probes 6, which are positive and negative elastic probes respectively.

[0033] Furthermore, there are four sets of copper pillars 201, and the copper pillars 201 are designed as hexagonal prisms, while the chassis 202 is designed as a U-shaped structure.

[0034] Furthermore, this includes the following steps:

[0035] S1, the test sample is assembled with the open circuit test FPC adapter board 203 and the chassis fixture. The fixture is placed on the stage 4 of the wafer test stage 1. The vacuum suction holes on the stage 4 are used for adsorption and positioning. During ordinary wafer testing, the two test probes 6 contact the target pad at the same time. The voltage / resistance value is detected by the main control unit 7 to judge the connection effect or power supply test performance.

[0036] S2. Assemble the device under test with the short-circuit test FPC adapter board 301 and the short-circuit test board 3. Turn the toggle switch 304 to the off position. Use the multimeter to test the positive terminal probe 6, the positive terminal probe test hole 305, and the negative terminal short-circuit pad 303. Read the impedance value of the multimeter. If the impedance is infinite or there is no short-circuit alarm sound, it means there is no short-circuit problem. If the impedance is very small or there is a short-circuit alarm sound, it is a short circuit. Further test the adjacent channels to confirm the short circuit location. Repeat the operation until all link tests are completed.

[0037] Furthermore, during the S1 test, the continuity test requires modification of the connection method. The positive terminal of the test probe 6 is lightly touched to the pad on the upper surface of the product, and the negative terminal of the test probe 6 is connected to the test line of the continuity test board. That is, the negative terminal of the test probe 6 is connected to one end of all the channels under test. During the test, the positive terminal of the test probe 6 is switched one by one starting from the first pad. The main control unit 7 collects and records the measured voltage / resistance values. The test values ​​are judged to confirm whether there is continuity and whether the resistance / voltage values ​​are too large. Abnormal test values ​​indicate that the product has poor continuity and has problems such as open circuit / unstable continuity.

[0038] Furthermore, during repeated operations in S2, the negative probe of the multimeter always remains on the fully conductive pad, while the positive probe switches one by one.

[0039] Workflow of this invention: When the ultra-large array package continuity testing device designed using this solution is running, the test object is assembled together with the open circuit test FPC adapter board 203 and the chassis fixture. The fixture is placed on the stage 4 of the wafer test stage 1. It is adsorbed and positioned by the vacuum suction holes densely distributed on the stage 4. During ordinary wafer testing, two test probes 6 simultaneously contact the target pad. The voltage / resistance value is detected by the main control unit 7 to determine the connection effect or power supply test performance.

[0040] For continuity testing, the connection method needs to be modified. The positive terminal of test probe 6 should be lightly touched to the pad on the upper surface of the product, and the negative terminal of test probe 6 should be connected to the test line of the continuity test board. That is, the negative terminal of test probe 6 should be connected to one end of all channels under test. During the test, the positive terminal of test probe 6 should be switched one by one starting from the first pad. The main control unit 7 collects and records the measured voltage / resistance values. The test values ​​are judged to confirm whether there is continuity and whether the resistance / voltage values ​​are too high. Abnormal test values ​​indicate that the product has poor continuity and has problems such as open circuit / unstable continuity.

[0041] Assemble the device under test (DUT) with the short-circuit test FPC adapter board 301 and the short-circuit test board 3. Turn the toggle switch 304 to the off position. Use the multimeter to test the positive terminal probe 6 at the test hole 305 and the negative terminal at the full short-circuit pad 303. Read the impedance value of the multimeter. If the impedance is infinite or there is no short-circuit alarm, there is no short-circuit problem. If the impedance is very small or there is a short-circuit alarm, there is a short circuit. Further testing of adjacent channels can confirm the short circuit location. Repeat the operation, keeping the negative terminal probe of the multimeter always on the full-conductivity pad and switching the positive terminal probe one by one until all link tests are completed.

[0042] The wafer test stage 1, swing arm positioning seat 5, main control unit 7, connecting line 8, test probe 6, open circuit test FPC adapter board 203, flexible circuit board 204, open circuit test multi-PIN connector 205, short circuit test FPC adapter board 301, short circuit test multi-PIN connector 302, full short circuit pad 303, and toggle switch 304 used in this invention are all existing known electrical devices and can be directly purchased and used on the market. Their structure, circuit, and control principle are all existing known technologies. Therefore, the structure, circuit, and control principle of the wafer test stage 1, swing arm positioning seat 5, main control unit 7, connecting line 8, test probe 6, open circuit test FPC adapter board 203, flexible circuit board 204, open circuit test multi-PIN connector 205, short circuit test FPC adapter board 301, short circuit test multi-PIN connector 302, full short circuit pad 303, and toggle switch 304 are not described in detail here.

[0043] All standard parts used in this application can be purchased from the market. The specific connection methods of each part adopt conventional methods such as bolts, rivets, and welding that are mature in the prior art. The machinery, parts and equipment adopt conventional models in the prior art and are also general components, which are common knowledge in this field.

[0044] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A conductivity testing device for ultra-large array packages, comprising a wafer test stage (1), an open-circuit test board (2), and a short-circuit test board (3), characterized in that: A stage (4) is installed on the top of the wafer test stage (1). A swing arm positioning seat (5) is installed on the top of the wafer test stage (1) and on the back of the stage (4). Test probes (6) are installed on the outer wall of the swing arm positioning seat (5). A main control unit (7) is installed on the top of the wafer test stage (1) and on the back of the swing arm positioning seat (5). The outer wall of the main control unit (7) is connected to the swing arm positioning seat (5) through test lines (8).

2. The ultra-large array package continuity testing device according to claim 1, characterized in that: The bottom of the open circuit test board (2) is equipped with a copper pillar (201), and the bottom of the copper pillar (201) is fixedly connected to a chassis (202). The top of the open circuit test board (2) is equipped with an open circuit test FPC adapter board (203). The outer wall of the open circuit test FPC adapter board (203) is equipped with a flexible circuit board (204). An open circuit test multi-PIN connector (205) is provided on the top of the open circuit test board (2) and near the open circuit test FPC adapter board (203).

3. The ultra-large array package continuity testing device according to claim 1, characterized in that: The short-circuit test board (3) has a short-circuit test FPC adapter board (301) on its outer wall. The short-circuit test FPC adapter board (301) is connected to a short-circuit test multi-PIN connector (302) on its outer wall. A full short-circuit pad (303) is installed on the outer wall of the short-circuit test board (3) at a position away from the short-circuit test multi-PIN connector (302). A toggle switch (304) is provided on the outer wall of the short-circuit test board (3) between the short-circuit test multi-PIN connector (302) and the full short-circuit pad (303). A probe test hole (305) is provided on the outer wall of the short-circuit test board (3) near the toggle switch (304).

4. The ultra-large array package continuity testing device according to claim 1, characterized in that: The swing arm positioning seat (5) is provided in two sets, and the two sets of swing arm positioning seats (5) are symmetrically arranged on both sides of the stage (4). The test line (8) is provided in multiple sets, and the test probe (6) is provided in two sets, which are positive and negative elastic probes respectively.

5. The ultra-large array package continuity testing device according to claim 1, characterized in that: The copper pillars (201) are arranged in four sets, and the copper pillars (201) are designed as hexagonal prisms, while the chassis (202) is designed as a U-shaped structure.

6. The test method for a conductivity testing device for ultra-large array packages according to claims 1-4, characterized in that, Includes the following steps: S1, the test sample is assembled with the open circuit test FPC adapter board (203) and the chassis fixture. The fixture is placed on the stage (4) of the wafer test stage (1). The vacuum suction holes on the stage (4) are used for adsorption and positioning. During ordinary wafer testing, the two test probes (6) contact the target pad at the same time. The voltage / resistance value is detected by the main control unit (7) to judge the connection effect or power supply test performance. S2, assemble the test object with the short circuit test FPC adapter board (301) and the short circuit test board (3), turn the toggle switch (304) to the off position, use the multimeter test probe (6) to test the positive pole probe hole (305) and the negative pole full short circuit pad (303), and read the multimeter impedance value. If the impedance read is infinite or there is no short circuit alarm sound, it means there is no short circuit problem. If the impedance is very small or there is a short circuit alarm sound, it is a short circuit. You can further test the adjacent channels to confirm the short circuit location. Repeat the operation until all link tests are completed.

7. The test method for a conductivity testing device for ultra-large array packages according to claim 6, characterized in that: When performing the test in S1, the connection method needs to be modified for the continuity test. The positive terminal of the test probe (6) is lightly touched to the pad on the upper surface of the product, and the negative terminal of the test probe (6) is connected to the test line of the continuity test board. That is, the negative terminal of the test probe (6) is connected to one end of all the channels to be tested. During the test, the positive terminal of the test probe (6) is switched one by one starting from the first pad. The main control unit (7) collects and records the measured voltage / resistance values. The test values ​​are judged to confirm whether the product is conducting or whether the resistance / voltage values ​​are too large. If the test values ​​are abnormal, it indicates that the product has poor continuity and there are problems such as open circuit / unstable continuity.

8. The test method for a conductivity testing device for ultra-large array packages according to claim 6, characterized in that: In the repeated operation of S2, the negative probe of the multimeter always remains on the fully conductive pad, while the positive probe is switched one by one.

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