Readout circuit for accelerometer and accelerometer module

Abstract

The invention belongs to the technical field of accelerometers, and particularly relates to a reading circuit for an accelerometer and an accelerometer module. In the reading circuit, a temperature compensation module outputs a temperature compensation signal according to the temperature change of a target accelerometer; the controller outputs a first driving signal and a second driving signal for voltage amplitude adjustment according to the first driving signal and the second driving signal; the front-end chopping switch performs chopping modulation on the first driving signal and the second driving signal and outputs a first driving square wave and a second driving square wave to the target accelerometer; the CV module converts a differential capacitance change signal output by the target accelerometer based on the first driving square wave and the second driving square wave into a differential voltage change signal; the rear-end chopping switch is used for carrying out chopping demodulation on the differential voltage change signal and outputting a differential demodulated voltage signal; and the filtering module carries out filtering processing on the differential de-modulated voltage signal and outputs a differential pole plate voltage signal, so that an accelerometer signal output scheme with high precision, low noise and low total temperature zero offset is realized.

Description

Technical Field

[0001] This invention relates to the field of accelerometer technology, and more particularly to a readout circuit and accelerometer module for an accelerometer. Background Technology

[0002] Membrane accelerometers are widely used, but the signals they generate based on acceleration are relatively weak and generally require amplification. However, amplification of the weak signal from a Membrane accelerometer reduces accuracy and leads to poor performance. Furthermore, amplification also amplifies noise, without improving the signal-to-noise ratio. Additionally, Membrane accelerometers have a large temperature drift, resulting in poor zero bias across the entire temperature range.

[0003] Therefore, there is a need to provide a technical solution for accelerometer signal output that is highly accurate, low in noise, and has a low zero deviation across the entire temperature range. Summary of the Invention

[0004] To solve the above-mentioned technical problems, the present invention provides a readout circuit and an accelerometer module for an accelerometer.

[0005] The present invention provides a readout circuit for an accelerometer, comprising:

[0006] The temperature compensation module is used to output a temperature compensation signal based on the temperature change of the target accelerometer.

[0007] The controller, whose input is electrically connected to the output of the temperature compensation module, is used to output a first drive signal and a second drive signal to adjust the voltage amplitude according to the temperature compensation signal.

[0008] The front-end chopper switch has its first input terminal and second input terminal electrically connected to the first output terminal and second output terminal of the controller, respectively. Its first output terminal and second output terminal are electrically connected to the first excitation terminal and second excitation terminal of the target accelerometer through the first capacitor and the second capacitor, respectively, for chopping and modulating the first drive signal and the second drive signal and outputting the first drive square wave and the second drive square wave.

[0009] The CV module, whose first input terminal and second input terminal are electrically connected to the first plate output terminal and the second plate output terminal of the target accelerometer, respectively, is used to convert the differential capacitance change signal output by the target accelerometer based on the first driving square wave and the second driving square wave into a differential voltage change signal.

[0010] The back-end chopper switch has its first input terminal and second input terminal electrically connected to the first output terminal and the second output terminal of the CV module, respectively, for chopping and demodulating the differential voltage change signal and outputting a differential demodulated voltage signal.

[0011] The filtering module has its first input terminal and second input terminal electrically connected to the first output terminal and the second output terminal of the back-end chopper switch, respectively, for filtering the differential modulated voltage signal and outputting the differential plate voltage signal.

[0012] In one possible implementation, the temperature compensation module includes a PTC thermistor unit, a source follower, an operational amplifier unit, and an analog-to-digital converter;

[0013] The PTC thermistor unit is used to sense the temperature of the target accelerometer and output a sampling voltage;

[0014] The first input terminal of the source follower is used to connect to the bias reference voltage, and its second input terminal is electrically connected to the voltage output terminal of the PTC thermistor unit.

[0015] The first input terminal of the operational amplifier unit is used to connect to a reference voltage, and its second input terminal is electrically connected to the output terminal of the source follower.

[0016] The input terminal of the analog-to-digital converter is electrically connected to the output terminal of the operational amplifier unit, and its output terminal serves as the output terminal of the temperature compensation module.

[0017] In one possible implementation, the PTC thermistor unit includes a first resistor, a first PTC thermistor, a second PTC thermistor, a third PTC thermistor, a first NPN transistor, and a second NPN transistor.

[0018] The first end of the first resistor is used to connect to the working voltage, and its second end is electrically connected to the first end of the first PTC thermistor as the voltage output terminal of the PTC thermistor unit.

[0019] The second end of the first PTC thermistor is electrically connected to the first end of the second PTC thermistor and the collector of the second NPN transistor, respectively.

[0020] The second terminal of the second PTC thermistor is electrically connected to the first terminal of the third PTC thermistor and the collector of the first NPN transistor, respectively.

[0021] The second terminal of the third PTC thermistor, the emitter of the first NPN transistor, and the emitter of the second NPN transistor are electrically connected and grounded.

[0022] The bases of the first NPN transistor and the second NPN transistor are used to connect to the first base control signal and the second base control signal, respectively.

[0023] In one possible implementation, the source follower is a first-level source follower.

[0024] In one possible implementation, the voltage output terminal of the PTC thermistor unit is electrically connected to a grounded adjustable capacitor.

[0025] In one possible implementation, the CV module includes a first-stage fully differential operational amplifier unit and a second-stage fully differential operational amplifier unit;

[0026] The inverting input and non-inverting input of the first-stage fully differential operational amplifier unit serve as the first and second inputs of the CV module, respectively, and its non-inverting output and inverting output are electrically connected to the inverting input and non-inverting input of the second-stage fully differential operational amplifier unit through the third capacitor and the fourth capacitor, respectively.

[0027] The non-inverting output terminal and the inverting output terminal of the second-stage fully differential operational amplifier unit serve as the first output terminal and the second output terminal of the CV module, respectively.

[0028] In one possible implementation, the first-stage fully differential operational amplifier unit includes a first fully differential operational amplifier, a second resistor, a third resistor, a fifth capacitor, and a sixth capacitor;

[0029] The inverting input terminal of the first fully differential operational amplifier is electrically connected to the first terminal of the second resistor and the negative terminal of the fifth capacitor as the inverting input terminal of the first stage fully differential operational amplifier unit. Its non-inverting input terminal is electrically connected to the first terminal of the third resistor and the negative terminal of the sixth capacitor as the non-inverting input terminal of the first stage fully differential operational amplifier unit. Its non-inverting output terminal is electrically connected to the second terminal of the second resistor and the positive terminal of the fifth capacitor as the non-inverting output terminal of the first stage fully differential operational amplifier unit. Its inverting output terminal is electrically connected to the second terminal of the third resistor and the positive terminal of the sixth capacitor as the inverting output terminal of the first stage fully differential operational amplifier unit.

[0030] In one possible implementation, the second-stage fully differential operational amplifier unit includes a second fully differential operational amplifier, a fourth resistor, a fifth resistor, a seventh capacitor, and an eighth capacitor;

[0031] The inverting input terminal of the second fully differential operational amplifier is electrically connected to the first terminal of the fourth resistor and the negative terminal of the seventh capacitor, respectively, as the inverting input terminal of the second stage fully differential operational amplifier unit. Its non-inverting input terminal is electrically connected to the first terminal of the fifth resistor and the negative terminal of the eighth capacitor, respectively, as the non-inverting input terminal of the second stage fully differential operational amplifier unit. Its non-inverting output terminal is electrically connected to the second terminal of the fourth resistor and the positive terminal of the seventh capacitor, respectively, as the non-inverting output terminal of the second stage fully differential operational amplifier unit. Its inverting output terminal is electrically connected to the second terminal of the fifth resistor and the positive terminal of the eighth capacitor, respectively, as the inverting output terminal of the second stage fully differential operational amplifier unit.

[0032] In one possible implementation, the filtering module is an RC filter.

[0033] The present invention also provides an accelerometer module, including a bipolar accelerometer and a readout circuit as described above;

[0034] The bipolar accelerometer serves as the target accelerometer in the readout circuit.

[0035] The technical solution provided by this invention has at least the following beneficial effects:

[0036] By setting a temperature compensation module, the voltage amplitudes of the first and second drive signals output by the controller can be adjusted to achieve temperature compensation and solve the problem of large zero deviation across the entire temperature range. By setting a front-end chopper switch, a CV module, a back-end chopper switch, and a filtering module, the impact of noise can be effectively reduced and the accuracy improved. Attached Figure Description

[0037] Figure 1 This is a structural block diagram of the readout circuit for an accelerometer provided in an embodiment of this application;

[0038] Figure 2 This is a waveform diagram of the first driving square wave and the second driving square wave provided in the embodiments of this application;

[0039] Figure 3 This is a schematic diagram of the electrode structure of the target accelerometer provided in an embodiment of this application;

[0040] Figure 4 This is a circuit diagram of the temperature compensation module provided in an embodiment of this application;

[0041] Figure 5 This is a schematic diagram of the structure of the CV module provided in an embodiment of this application;

[0042] Figure 6 This is a circuit schematic diagram of the first-stage fully differential operational amplifier unit provided in the embodiments of this application;

[0043] Figure 7 This is a circuit schematic diagram of the second-stage fully differential operational amplifier unit provided in an embodiment of this application;

[0044] Figure 8 This is a circuit schematic diagram of the chopper switch provided in an embodiment of this application;

[0045] Figure 9 This is a circuit schematic diagram of the filtering module provided in an embodiment of this application;

[0046] Explanation of reference numerals in the attached figures:

[0047] 10. Temperature compensation module; 20. Controller; 30. Front-end chopper switch; 40. CV module; 50. Back-end chopper switch; 60. Filtering module; 101. PTC thermistor unit; 102. Source follower; 103. Operational amplifier unit; 401. First-stage fully differential operational amplifier unit; 402. Second-stage fully differential operational amplifier unit. Detailed Implementation

[0048] To enhance understanding of the present invention, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. These embodiments are only used to explain the invention and do not limit the scope of protection of the invention.

[0049] Please refer to Figures 1 to 8 The present invention provides a readout circuit for an accelerometer, comprising:

[0050] Temperature compensation module 10 is used to output a temperature compensation signal V_C according to the temperature change of the target accelerometer;

[0051] Controller 20, whose input terminal is electrically connected to the output terminal of the temperature compensation module 10, is used to adjust the first drive signal Vo+ and the second drive signal Vo- according to the output voltage amplitude of the temperature compensation signal V_C;

[0052] The front-end chopper switch 30 has its first input terminal and second input terminal electrically connected to the first output terminal and second output terminal of the controller 20, respectively. Its first output terminal and second output terminal are electrically connected to the first excitation terminal and second excitation terminal of the target accelerometer through the first capacitor C1 and the second capacitor C2, respectively. It is used to chop and modulate the first drive signal Vo+ and the second drive signal Vo- and output the first drive square wave Vd+ and the second drive square wave Vd-.

[0053] CV module 40, whose first input terminal and second input terminal are electrically connected to the first plate output terminal ip and the second plate output terminal in of the target accelerometer, respectively, is used to convert the differential capacitance change signals Vip and Vin output by the target accelerometer based on the first driving square wave Vd+ and the second driving square wave Vd- into differential voltage change signals;

[0054] The back-end chopper switch 50 has its first input terminal and second input terminal electrically connected to the first output terminal and the second output terminal of the CV module 40, respectively, for chopping and demodulating the differential voltage change signal and outputting a differential demodulated voltage signal.

[0055] The filtering module 60 has its first input terminal and second input terminal electrically connected to the first output terminal and the second output terminal of the back-end chopper switch 50, respectively, for filtering the differential modulated voltage signal and outputting differential plate voltage signals Vop and Von.

[0056] In this embodiment, the temperature compensation module 10 can be implemented based on a conventional PTC thermistor, using positive temperature coefficient current to convert temperature changes into voltage change signals, which are then output as the temperature compensation signal V_C. The controller 20 can be implemented based on a conventional microcontroller, adjusting the voltage amplitudes of the first drive signal Vo+ and the second drive signal Vo- based on the temperature compensation signal V_C. This adjusts the changes in the structural capacitances (i.e., the first detection capacitor CS1, the second detection capacitor CS2, the third detection capacitor CS3, and the fourth detection capacitor CS4) in the target accelerometer, stabilizing the capacitance output changes and thus better handling the full temperature variations of the target accelerometer. The first drive signal Vo+ and the second drive signal Vo- are two sets of signals with opposite positive and negative values. The CV module 40 can be implemented based on a cascaded fully differential operational amplifier, used for detecting capacitance changes and proportional amplification. Both the front-end chopper switch 30 and the rear-end chopper switch 50 can be implemented using... Figure 8 The chopper switch structure in the circuit uses four MOSFETs (φ1, φ2, φ3, φ4), each with a gate controlled by controller 20. The filter module 60 can use a conventional low-pass filter, primarily used to filter out high-frequency noise at the chopper frequency. The first driving square wave Vd+ forms a VS+ excitation source acting on the first excitation terminal of the target accelerometer through the first capacitor C1, and the second driving square wave Vd- forms a VS- excitation source acting on the second excitation terminal of the target accelerometer through the second capacitor C2. The first driving square wave Vd+ and the second driving square wave Vd- are two sets of square wave signals with opposite positive and negative values. The VS+ and VS- excitation sources are also two sets of square wave signals with opposite positive and negative values, as shown in the diagram. Figure 2 As shown. Figure 3The structural capacitors in the target accelerometer include fixed plates c1, c2, c3, and c4, and moving plates c13 and c24. A first detection capacitor CS1 is formed between fixed plate c1 and moving plate c13; a second detection capacitor CS2 is formed between fixed plate c2 and moving plate c24; a third detection capacitor CS3 is formed between fixed plate c4 and moving plate c24; and a fourth detection capacitor CS4 is formed between fixed plate c3 and moving plate c13. Moving plates c13 and c24 are mounted on the detection mass block and can move up and down with the detection mass block, thereby changing the capacitance values ​​of the first detection capacitor CS1, the second detection capacitor CS2, the third detection capacitor CS3, and the fourth detection capacitor CS4. Moving plate c24 serves as the first excitation terminal, and moving plate c13 serves as the second excitation terminal. The output terminals of fixed plates C1 and C2 are connected to form the first plate output terminal IP of the target accelerometer, and the output terminals of fixed plates C3 and C4 are connected to form the second plate output terminal IN of the target accelerometer. The target accelerometer uses four detection capacitors: a first detection capacitor CS1, a second detection capacitor CS2, a third detection capacitor CS3, and a fourth detection capacitor CS4. The VS+ excitation source simultaneously acts on the second detection capacitor CS2 and the third detection capacitor CS3, while the VS- excitation source simultaneously acts on the first detection capacitor CS1 and the fourth detection capacitor CS4. This increases the input signal quantity, effectively improving the accuracy of the input signal.

[0057] In practical implementation, the signal used by the front-end chopper switch 30 to modulate the input signal and the signal used by the back-end chopper switch 50 to demodulate the signal are the same signal, denoted as Vch. After the input signal is modulated by the front-end chopper switch 30, its spectrum is located in the chopper's odd frequency band. Noise and offset voltage are then superimposed on the modulated input signal, denoted as V1. V1 signal finally passes through the CV module 40 and is then modulated again by the back-end chopper switch 50 to form V2 signal. In this process, the input signal is restored to the original signal after two modulations, while the noise and offset voltage are only modulated once, and their spectrum is located in the chopper's odd frequency band. After filtering by a low-pass filter, the resulting output signal contains virtually no noise or offset voltage.

[0058] In one possible implementation, such as Figure 4 The temperature compensation module 10 includes a PTC thermistor unit 101, a source follower 102, an operational amplifier unit 103, and an analog-to-digital converter (ADC).

[0059] The PTC thermistor unit 101 is used to sense the temperature of the target accelerometer and output a sampling voltage;

[0060] The first input terminal of the source follower 102 is used to connect to the bias reference voltage Vbp, and its second input terminal is electrically connected to the voltage output terminal of the PTC thermistor unit 101.

[0061] The first input terminal of the operational amplifier unit 103 is used to connect to the reference voltage Vcm, and its second input terminal is electrically connected to the output terminal of the source follower 102.

[0062] The input terminal of the analog-to-digital converter (ADC) is electrically connected to the output terminal of the operational amplifier unit 103, and its output terminal serves as the output terminal of the temperature compensation module 10.

[0063] In this embodiment, the PTC thermistor unit 101 can be constructed based on a conventional thermistor to generate a corresponding temperature coefficient current (preferably a positive temperature coefficient current) and achieve voltage sampling through resistive voltage division. The source follower 102 can be a conventional single-stage source follower to output a voltage signal Vt that varies linearly with temperature based on the bias reference voltage Vbp. The operational amplifier unit 103 can be implemented based on a conventional fully differential operational amplifier. The reference voltage Vcm is a comparison voltage generated by the bandgap reference BG that does not change with temperature. The analog-to-digital converter (ADC) can be a conventional model.

[0064] In one possible implementation, the PTC thermistor unit 101 includes a first resistor R1, a first PTC thermistor Rt1, a second PTC thermistor Rt2, a third PTC thermistor Rt3, a first NPN transistor Q1, and a second NPN transistor Q2.

[0065] The first end of the first resistor R1 is used to connect to the working voltage, and its second end is electrically connected to the first end of the first PTC thermistor Rt1 as the voltage output terminal of the PTC thermistor unit 101.

[0066] The second terminal of the first PTC thermistor Rt1 is electrically connected to the first terminal of the second PTC thermistor Rt2 and the collector of the second NPN transistor Q2, respectively.

[0067] The second terminal of the second PTC thermistor Rt2 is electrically connected to the first terminal of the third PTC thermistor Rt3 and the collector of the first NPN transistor Q1, respectively.

[0068] The second terminal of the third PTC thermistor Rt3, the emitter of the first NPN transistor Q1, and the emitter of the second NPN transistor Q2 are electrically connected and grounded.

[0069] The base of the first NPN transistor Q1 and the base of the second NPN transistor Q2 are respectively connected to the first base control signal and the second base control signal.

[0070] In this embodiment, the first resistor R1 is a conventional resistor. The first PTC thermistor Rt1, the second PTC thermistor Rt2, and the third PTC thermistor Rt3 are conventional thermistors. The first NPN transistor Q1 and the second NPN transistor Q2 are conventional NPN transistors. By controlling the on and off states of the first NPN transistor Q1 and the second NPN transistor Q2, the number of operating thermistors in the PTC thermistor unit 101 can be adjusted, achieving adjustable thermistor accuracy. The first base control signal and the second base control signal can be provided by the controller 20.

[0071] In one possible implementation, the source follower 102 is a first-level source follower.

[0072] In this embodiment, the source follower 102 can be composed of two PMOS transistors M1 and M2.

[0073] In one possible implementation, the voltage output terminal of the PTC thermistor unit 101 is electrically connected to a grounded adjustable capacitor Ct.

[0074] In this embodiment, the adjustable capacitor Ct can be a conventional capacitor with an adjustable capacitance value. The adjustable capacitor Ct can perform filtering to reduce interference.

[0075] In one possible implementation, such as Figure 5 The CV module 40 includes a first-stage fully differential operational amplifier unit 401 and a second-stage fully differential operational amplifier unit 402;

[0076] The inverting input and non-inverting input of the first-stage fully differential operational amplifier unit 401 serve as the first and second inputs of the CV module 40, respectively, and its non-inverting output and inverting output are electrically connected to the inverting input and non-inverting input of the second-stage fully differential operational amplifier unit 402 through the third capacitor C3 and the fourth capacitor C4, respectively.

[0077] The non-inverting output terminal and the inverting output terminal of the second-stage fully differential operational amplifier unit 402 serve as the first output terminal and the second output terminal of the CV module 40, respectively.

[0078] In this embodiment, the first-stage fully differential operational amplifier unit 401 is used to detect capacitance changes, and the second-stage fully differential operational amplifier unit 402 is used for proportional amplification.

[0079] In one possible implementation, such as Figure 6 The first stage fully differential operational amplifier unit 401 includes a first fully differential operational amplifier A1, a second resistor R2, a third resistor R3, a fifth capacitor C5, and a sixth capacitor C6.

[0080] The inverting input terminal of the first fully differential operational amplifier A1 is electrically connected to the first terminal of the second resistor R2 and the negative terminal of the fifth capacitor C5, respectively, as the inverting input terminal of the first stage fully differential operational amplifier unit 401. The non-inverting input terminal is electrically connected to the first terminal of the third resistor R3 and the negative terminal of the sixth capacitor C6, respectively, as the non-inverting input terminal of the first stage fully differential operational amplifier unit 401. The non-inverting output terminal is electrically connected to the second terminal of the second resistor R2 and the positive terminal of the fifth capacitor C5, respectively, as the non-inverting output terminal of the first stage fully differential operational amplifier unit 401. The inverting output terminal is electrically connected to the second terminal of the third resistor R3 and the positive terminal of the sixth capacitor C6, respectively, as the inverting output terminal of the first stage fully differential operational amplifier unit 401.

[0081] In this embodiment, the first fully differential operational amplifier A1 can be a conventional fully differential operational amplifier. The second resistor R2 and the third resistor R3 are conventional resistors. The fifth capacitor C5 and the sixth capacitor C6 are conventional capacitors.

[0082] In one possible implementation, such as Figure 7 The second-stage fully differential operational amplifier unit 402 includes a second fully differential operational amplifier A2, a fourth resistor R4, a fifth resistor R5, a seventh capacitor C7, and an eighth capacitor C8.

[0083] The inverting input terminal of the second fully differential operational amplifier A2 is electrically connected to the first terminal of the fourth resistor R4 and the negative terminal of the seventh capacitor C7, respectively, as the inverting input terminal of the second-stage fully differential operational amplifier unit 402. The non-inverting input terminal is electrically connected to the first terminal of the fifth resistor R5 and the negative terminal of the eighth capacitor C8, respectively, as the non-inverting input terminal of the second-stage fully differential operational amplifier unit 402. The non-inverting output terminal is electrically connected to the second terminal of the fourth resistor R4 and the positive terminal of the seventh capacitor C7, respectively, as the non-inverting output terminal of the second-stage fully differential operational amplifier unit 402. The inverting output terminal is electrically connected to the second terminal of the fifth resistor R5 and the positive terminal of the eighth capacitor C8, respectively, as the inverting output terminal of the second-stage fully differential operational amplifier unit 402.

[0084] In this embodiment, the second fully differential operational amplifier A2 can be a conventional fully differential operational amplifier. The fourth resistor R4 and the fifth resistor R5 are conventional resistors. The seventh capacitor C7 and the eighth capacitor C8 are conventional capacitors.

[0085] In one possible implementation, the filtering module 60 is an RC filter.

[0086] In this embodiment, the RC filter can be as follows: Figure 9The structure consists of a sixth resistor R6, a seventh resistor R7, a ninth capacitor C9, and a tenth capacitor C10. The sixth resistor R6 and the seventh resistor R7 are standard resistors. The ninth capacitor C9 and the tenth capacitor C10 are standard capacitors.

[0087] The present invention also provides an accelerometer module, including a bipolar accelerometer and a readout circuit as described above;

[0088] The bipolar accelerometer serves as the target accelerometer in the readout circuit.

[0089] The above embodiments should not limit the present invention in any way. All technical solutions obtained by equivalent substitution or equivalent conversion fall within the protection scope of the present invention.

Claims

1. A readout circuit for an accelerometer, characterized by The application relates to a temperature compensation module for an accelerometer, comprising: a temperature compensation module for outputting a temperature compensation signal according to temperature change of a target accelerometer; a controller, an input end of which is electrically connected to an output end of the temperature compensation module, for outputting a first driving signal and a second driving signal with voltage amplitude adjustment according to the temperature compensation signal; a front-end chopping switch, first and second input ends of which are electrically connected to first and second output ends of the controller respectively, and first and second output ends of which are electrically connected to first and second excitation ends of the target accelerometer through first and second capacitors respectively, for chopping and modulating the first and second driving signals and outputting first and second driving square waves; a CV module, first and second input ends of which are electrically connected to first and second plate output ends of the target accelerometer respectively, for converting a differential capacitance change signal output by the target accelerometer based on the first and second driving square waves into a differential voltage change signal; a rear-end chopping switch, first and second input ends of which are electrically connected to first and second output ends of the CV module respectively, for chopping and demodulating the differential voltage change signal and outputting a differential demodulation voltage signal; a filtering module, first and second input ends of which are electrically connected to first and second output ends of the rear-end chopping switch respectively, for filtering the differential demodulation voltage signal and outputting a differential plate voltage signal.

2. The readout circuit according to claim 1, characterized in that The temperature compensation module comprises a PTC thermistor unit, a source follower, an operational amplifier unit and an analog-to-digital converter. The PTC thermistor unit is used for sensing the temperature of the target accelerometer and outputting a sampling voltage. A first input end of the source follower is used for inputting a bias reference voltage, and a second input end thereof is electrically connected to a voltage output end of the PTC thermistor unit. A first input end of the operational amplifier unit is used for inputting a reference voltage, and a second input end thereof is electrically connected to an output end of the source follower. An input end of the analog-to-digital converter is electrically connected to an output end of the operational amplifier unit, and the output end of the analog-to-digital converter serves as an output end of the temperature compensation module.

3. The readout circuit according to claim 2, characterized in that The PTC thermistor unit comprises a first resistor, a first PTC thermistor, a second PTC thermistor, a third PTC thermistor, a first NPN triode and a second NPN triode. A first end of the first resistor is used for inputting a working voltage, and a second end thereof is electrically connected to a first end of the first PTC thermistor as a voltage output end of the PTC thermistor unit. Second ends of the first and second PTC thermistors are electrically connected to a first end of the second PTC thermistor and a collector of the second NPN triode respectively. Second ends of the second and third PTC thermistors are electrically connected to a first end of the third PTC thermistor and a collector of the first NPN triode respectively. Second ends of the third PTC thermistor, an emitter of the first NPN triode and an emitter of the second NPN triode are electrically connected and grounded. The base of the first NPN transistor and the base of the second NPN transistor are configured to be connected to a first base control signal and a second base control signal, respectively.

4. The readout circuit according to claim 2, characterized in that The source follower is a first-stage source follower.

5. The readout circuit according to claim 2, characterized in that The voltage output end of the PTC thermistor unit is electrically connected with a ground adjustable capacitor.

6. The readout circuit of claim 1, wherein, The CV module comprises a first-stage full-differential operational amplifier unit and a second-stage full-differential operational amplifier unit. The inverting input end and the non-inverting input end of the first-stage full-differential operational amplifier unit are configured as a first input end and a second input end of the CV module, respectively, and the non-inverting output end and the inverting output end thereof are electrically connected to the inverting input end and the non-inverting input end of the second-stage full-differential operational amplifier unit through a third capacitor and a fourth capacitor, respectively. The non-inverting output end and the inverting output end of the second-stage full-differential operational amplifier unit are configured as a first output end and a second output end of the CV module, respectively.

7. The readout circuit according to claim 6, characterized in that The first-stage full-differential operational amplifier unit comprises a first full-differential operational amplifier, a second resistor, a third resistor, a fifth capacitor and a sixth capacitor. The inverting input end of the first full-differential operational amplifier is electrically connected with the first end of the second resistor and the negative end of the fifth capacitor as the inverting input end of the first-stage full-differential operational amplifier unit, the non-inverting input end thereof is electrically connected with the first end of the third resistor and the negative end of the sixth capacitor as the non-inverting input end of the first-stage full-differential operational amplifier unit, the non-inverting output end thereof is electrically connected with the second end of the second resistor and the positive end of the fifth capacitor as the non-inverting output end of the first-stage full-differential operational amplifier unit, and the inverting output end thereof is electrically connected with the second end of the third resistor and the positive end of the sixth capacitor as the inverting output end of the first-stage full-differential operational amplifier unit.

8. The readout circuit according to claim 6, characterized in that The second-stage full-differential operational amplifier unit comprises a second full-differential operational amplifier, a fourth resistor, a fifth resistor, a seventh capacitor and an eighth capacitor. The inverting input end of the second full-differential operational amplifier is electrically connected with the first end of the fourth resistor and the negative end of the seventh capacitor as the inverting input end of the second-stage full-differential operational amplifier unit, the non-inverting input end thereof is electrically connected with the first end of the fifth resistor and the negative end of the eighth capacitor as the non-inverting input end of the second-stage full-differential operational amplifier unit, the non-inverting output end thereof is electrically connected with the second end of the fourth resistor and the positive end of the seventh capacitor as the non-inverting output end of the second-stage full-differential operational amplifier unit, and the inverting output end thereof is electrically connected with the second end of the fifth resistor and the positive end of the eighth capacitor as the inverting output end of the second-stage full-differential operational amplifier unit.

9. The readout circuit of claim 1, wherein, The filter module is an RC filter.

10. An accelerometer module characterized by The readout circuit comprises a bipolar plate accelerometer and any one of claims 1 to 9. The bipolar plate accelerometer is configured as a target accelerometer in the readout circuit.

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