Approximate floating point multiplier based on Chebyshev polynomial

Abstract

The invention provides an approximate floating-point multiplier based on a Chebyshev polynomial, and the multiplier comprises two logarithm conversion modules which achieve logarithm function operation based on the Chebyshev polynomial, and convert an input single-precision floating-point mantissa into a logarithm approximate value with 2 as a base number; the adder is used for carrying out additive operation on the two logarithm approximate values; the exponential conversion module is used for realizing exponential function operation based on a Chebyshev polynomial and converting data output by the adder into an exponential approximate value taking 2 as a base number; and an exponent approximate value which is output by the exponent conversion module and takes 2 as a base number is a multiplication result of two single-precision floating point mantissas.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of digital signal processing and integrated circuit design, and particularly relates to an approximate floating-point multiplier based on Chebyshev polynomials. BACKGROUND

[0002] Floating-point multipliers are key arithmetic units in digital signal processing, scientific computing, and artificial intelligence inference. Under mainstream floating-point number formats such as IEEE-754, the operation usually includes three steps: sign bit processing, exponent addition, and mantissa multiplication. Among them, the mantissa multiplication part is the main factor leading to high hardware complexity and high power consumption. To improve the operation throughput, reduce energy consumption and chip area, approximate calculation methods have gradually become an effective design choice in scenarios such as convolutional neural networks, image processing, and Internet of Things edge computing, which can accept a certain accuracy loss.

[0003] In existing approximate floating-point multiplication techniques, algorithms based on logarithmic domain transformation can effectively reduce hardware resource consumption by converting multiplication into addition and combining compensation approximation. However, such methods often have uneven error distribution, systematic bias, and large maximum error under certain input distributions, affecting their applicability in precision-sensitive scenarios.

[0004] Chebyshev polynomials, as a class of orthogonal polynomials with minimal maximum error characteristics, can achieve optimal uniform approximation of target functions within a given interval and have more uniform error distribution characteristics. Introducing them into the approximate calculation of the mantissa part of the floating-point multiplier can significantly reduce the maximum error at a lower polynomial order, which is beneficial to implementing low-latency, small-area, and high-energy-efficiency floating-point multiplier architectures on FPGA, ASIC, and other hardware platforms.

[0005] Therefore, it is necessary to design an approximate floating-point multiplier based on Chebyshev polynomials, which introduces Chebyshev approximation with minimal maximum error characteristics during mantissa operation, thereby effectively reducing errors while maintaining low hardware overhead, improving precision and energy efficiency ratio. SUMMARY

[0006] The application provides an approximate floating-point multiplier based on Chebyshev polynomials, which introduces Chebyshev approximation with minimal maximum error characteristics during mantissa operation, thereby effectively reducing errors while maintaining low hardware overhead, improving precision and energy efficiency ratio.

[0007] Other purposes and advantages of the application can be further understood from the technical features disclosed in the application.

[0008] To achieve one, some, or all of the above objectives or other objectives, the present invention provides an approximate floating-point multiplier based on Chebyshev polynomials, comprising: two logarithmic conversion modules, which perform logarithmic function operations based on Chebyshev polynomials to convert the input single-precision floating-point mantissas into logarithmic approximations with base 2; an adder, which performs addition operations on the two logarithmic approximations; and an exponentiation conversion module, which performs exponential function operations based on Chebyshev polynomials to convert the addition result output by the adder into an exponential approximation with base 2; wherein the exponential approximation with base 2 output by the exponentiation conversion module is the result of multiplication of the two single-precision floating-point mantissas.

[0009] It also includes a leading zero detector and a shifter; the leading zero detector detects the number of leading zeros in the input single-precision floating-point mantissa and performs shift processing to make the most significant bit of the single-precision floating-point mantissa 1; the single-precision floating-point mantissa processed by the leading zero detector is sent to the logarithmic conversion module for processing; the shifter performs a right shift operation on the addition result output by the adder based on the sum of the leading zeros output by the two leading zero detectors.

[0010] Both the logarithmic conversion module and the exponential conversion module include a constant register for storing constant terms in the Chebyshev polynomial; a product register for storing iteration terms in the Chebyshev polynomial; and an operation unit that retrieves the iteration terms from the product register, performs multiplication with the coefficients in the iterative formula of the Chebyshev polynomial, adds the result of the multiplication to the constant terms retrieved from the constant register, and outputs the logarithmic or exponential result. The output logarithmic or exponential result is stored in the constant register for the next iteration or directly output.

[0011] The Chebyshev polynomial iteration formulas executed by the logarithmic transformation module and the exponential transformation module are as follows: In Formulas 1-4, C1, C2, C3, and C4 are coefficients, and C0, CP1, CP2, and CP3 are constant terms. The coefficients and constant term C0 of the Chebyshev polynomial used for exponential and logarithmic operations are different.

[0012] The computational units of the logarithmic conversion module and the exponential conversion module perform exponential function operations and logarithmic function operations based on the obtained different Chebyshev polynomial coefficients and constant term C0.

[0013] The computational unit uses a shift-add method to perform the multiplication operation between the iterative term and the coefficients in the Chebyshev polynomial iterative formula.

[0014] The single-precision floating-point mantissa and the iteration terms are represented using a data format of 2 bits for integers, 10 bits for fractions, and 14 bits for redundancy; the fitting coefficients are quantized as 10 bits of fixed-point binary fractions; the arithmetic unit performs the following data processing on the retrieved iteration term data: based on the fractional data of the selected fitting coefficients, the iteration term data is copied into 10 groups, and a shift operation is performed on each group of iteration terms; in the 10 groups of data, every two groups of data perform corresponding operations based on the result of a set of mask values ​​to output the corresponding operation results.

[0015] The operation of each pair of iteration terms based on the mask value is implemented by a mask circuit, which includes a multiplexer. The multiplexer has four data input terminals and four data output terminals. The data input terminals respectively input: the data of each pair of iteration terms for which the operation is performed, the addition result of the two pairs of iteration terms, and the data 0. Each pair of iteration terms is logically ANDed with itself, and the output logically ANDed result is used as a control signal input to the selection control terminal of the multiplexer. The multiplexer outputs the corresponding result based on the control signal.

[0016] When the control signal is 00, data 0 is output; when the control signal is 10 or 01, the set of data that is not 0 in the two sets of iteration terms is selected for output; when the control signal is 11, the two sets of iteration terms are added together and then output.

[0017] After each pair of iterative terms is processed by the mask circuit, the output is added by an adder to output the result of the multiplication of the iterative term with the coefficients in the Chebyshev polynomial iterative formula.

[0018] Another technical solution of the present invention provides an approximate floating-point multiplier based on Chebyshev polynomials, comprising a register, an order configuration controller, an iterative operation module, an adder, and a state machine; the single-precision floating-point mantissa and the set order for Chebyshev polynomial approximation are input to the register; the iterative operation module includes a logarithmic conversion module and an exponential conversion module, which performs logarithmic or exponential function operations based on Chebyshev polynomials, converting the single-precision floating-point mantissa to a logarithmic approximation with base 2 or converting the logarithmic approximation after addition to a base 2. The adder performs addition on the logarithmic approximation output by the iterative operation module and inputs the addition result into the register for the iterative operation module to retrieve and perform exponential function operation; the order configuration controller determines the number of iterations for the iterative operation module to perform logarithmic or exponential function operation based on the order of the input Chebyshev polynomial approximation; the state machine records the number of iterations when the iterative operation module performs logarithmic or exponential function operation, and controls the iterative operation module to stop iterative operation when the set number of iterations is reached.

[0019] The approximate floating-point multiplier also includes a leading zero detector and a shifter; the leading zero detector detects the number of leading zeros in the input single-precision floating-point mantissa and performs shift processing to make the most significant bit of the single-precision floating-point mantissa 1; the single-precision floating-point mantissa processed by the leading zero detector is sent to the logarithmic conversion module for processing; the shifter performs a right shift operation on the addition result output by the adder based on the sum of the leading zeros output by the two leading zero detectors.

[0020] Both the logarithmic conversion module and the exponential conversion module include a constant register for storing constant terms in the Chebyshev polynomial; a product register for storing iteration terms in the Chebyshev polynomial; and an operation unit that retrieves iteration terms from the product register, performs multiplication with the coefficients in the Chebyshev polynomial iteration formula, adds the multiplication result to the constant terms retrieved from the constant register, and outputs the logarithmic or exponential result. The output logarithmic or exponential result is stored in the constant register for the next iteration or directly output. The Chebyshev polynomial iteration formula executed by the logarithmic conversion module and the exponential conversion module is as follows: In Formulas 1-4, C1, C2, C3, and C4 are coefficients, and C0, CP1, CP2, and CP3 are constant terms. The coefficients and constant term C0 of the Chebyshev polynomial used for exponential and logarithmic operations are different.

[0021] The single-precision floating-point mantissa and the iteration terms are represented using a data format of 2 bits for integers, 10 bits for fractions, and 14 bits for redundancy; the fitting coefficients are quantized as 10 bits of fixed-point binary fractions; the arithmetic unit performs the following data processing on the retrieved iteration term data: based on the fractional data of the selected fitting coefficients, the iteration term data is copied into 10 groups, and a shift operation is performed on each group of iteration terms; in the 10 groups of data, every two groups of data perform corresponding operations based on the result of a set of mask values ​​to output the corresponding operation results.

[0022] The operation on each pair of iteration terms based on the mask value is implemented using a mask circuit, which includes a multiplexer. The multiplexer has four data inputs and four data outputs. The data inputs are: the data of each pair of iteration terms for the corresponding operation, the result of the addition operation of the two sets of iteration terms, and the data 0. Each pair of iteration terms is logically ANDed with itself, and the output result is used as a control signal input to the selection control terminal of the multiplexer. The multiplexer outputs a corresponding result based on the control signal, including: when the control signal is 00, outputting data 0; when the control signal is 10 or 01, selecting and outputting the non-zero set of data from the two sets of iteration terms; and when the control signal is 11, performing the addition operation on the two sets of iteration terms and then outputting the result.

[0023] After each pair of iterative terms is processed by the mask circuit, the output is added by an adder to output the result of the multiplication of the iterative term with the coefficients in the Chebyshev polynomial iterative formula.

[0024] Compared with existing technologies, the main advantages of this invention include: 1. Compared to methods such as Taylor expansion, which suffer from significantly increased and unevenly distributed errors at interval boundaries, this invention uses Chebyshev polynomials based on the minimum-maximum error criterion for approximation. This achieves a more symmetrical and uniform error distribution across the entire mantissa definition interval, with stronger controllability of the maximum error. This helps suppress error accumulation during computation, making it particularly suitable for signal processing and artificial intelligence inference scenarios where computational stability is critical. 2. Compared to the limited adjustment mechanisms of traditional logarithmic-domain approximation multipliers, this invention achieves flexible reconfiguration of computational accuracy through dynamic configuration of the polynomial order. This design supports multi-level adjustable modes from low power consumption to high precision, allowing for fine-grained energy efficiency and accuracy trade-offs based on actual application needs, enhancing the adaptability and practicality of the hardware in different scenarios. 3. Addressing the sparse distribution of Chebyshev polynomial coefficients, this invention employs a masked adder circuit design, automatically resetting the adder when not involved in computation, thereby reducing overall circuit power consumption.

[0025] To make the above and other objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the specific embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 The structural framework diagram of the approximate multiplier based on Chebyshev polynomials provided in Embodiment 1 of the present invention is shown.

[0028] Figure 2 This is a diagram illustrating an example of calculating the Chebyshev polynomial iterative formula of this invention.

[0029] Figure 3 This is a circuit diagram of the logarithmic conversion module and the exponential conversion module of the present invention.

[0030] Figure 4 This is a schematic diagram of the mask circuit of the present invention.

[0031] Figure 5 This is a framework diagram of an approximate multiplier iterative structure based on Chebyshev polynomials provided in Embodiment 2 of the present invention. Detailed Implementation

[0032] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate preferred embodiments of the application. However, this application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0034] It should be understood that when an element or layer is referred to as "on," "adjacent to," or "connected to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of this application, the first element, component, region, layer, doping type, or portion discussed below may be referred to as a second element, component, region, layer, or portion.

[0035] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0036] Embodiments of the invention are described herein with reference to cross-sectional views illustrating preferred embodiments (and intermediate structures) of this application, thus allowing for the anticipation of variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances. Embodiments of this application should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. Therefore, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device, nor do they limit the scope of this application.

[0037] Example 1 Example 1 provides an approximate floating-point multiplier based on Chebyshev polynomials, such as Figure 1 As shown, the approximate floating-point multiplier includes: two logarithmic conversion modules CP-log, which implement logarithmic function operations based on Chebyshev polynomials to convert the input single-precision floating-point mantissa into a logarithmic approximation with base 2; an adder Adder, which performs addition operations on the two logarithmic approximations; and an exponential conversion module CP-exp, which implements exponential function operations based on Chebyshev polynomials to convert the data output by the adder into an exponential approximation with base 2; the exponential approximation with base 2 output by the exponential conversion module is the result of multiplying the two single-precision floating-point mantissas.

[0038] The approximate floating-point multiplier provided in Example 1 is used for operations on single-precision floating-point mantissas. The operation process involves representing the multiplication of the single-precision floating-point mantissas Ma and Mb as an exponential form with base 2, as shown in Formula 1 below: Therefore, to perform the multiplication operation of this single-precision floating-point mantissa, the key is to convert the floating-point mantissa into a base-2 logarithm, perform the addition operation, and then convert it into a base-2 exponential operation.

[0039] The approximate multiplier in Implementation Example 1, such as Figure 1 As shown, the process of logarithmic and exponential transformations is implemented through logarithmic and exponential transformation modules, and the addition operation of the two logarithmic transformation results is implemented through an adder. Figure 1 In order to realize the calculation process of Formula 1, the most critical step of the circuit is to convert the input single-precision floating-point mantissa into a base-2 logarithm and to convert the logarithmic result after addition into a base-2 exponent.

[0040] Example 1 uses a logarithmic conversion module CP-log to convert the input single-precision floating-point mantissa into a base-2 logarithm and an exponential conversion module CP-exp to convert the addition result of the adder into a base-2 exponential. Both the logarithmic conversion module and the exponential conversion module are based on Chebyshev polynomial approximation and are implemented by hardware circuit design of Chebyshev polynomials.

[0041] Chebyshev polynomials have important applications in approximation theory. The roots of Chebyshev polynomials of the first kind can serve as interpolation nodes, and the constructed interpolation polynomials can minimize the Runge phenomenon and achieve optimal uniform approximation on continuous functions. This invention uses Chebyshev polynomials of the first kind for function approximation, and its recursive relations are shown in Equations 2-1 to 2-3: The function f(x) is approximated using Chebyshev polynomials, and its expansion formula is shown in Equations 2-4 to 2-6: For exponential and logarithmic functions with base 2, applying the Chebyshev polynomial recursive formula for expansion and approximation ensures that the maximum error is evenly distributed throughout the entire interval, thus obtaining a more stable approximation accuracy.

[0042] According to formulas 2-1 to 2-3, we can obtain the following... Figure 3 The diagram shows the basic circuit diagrams of the logarithmic conversion module CP-log and the exponential conversion module CP-exp.

[0043] Based on equations 2-1 to 2-3, iterative formulas as shown in equations 3-1 to 3-4 can be derived: Among them, the fitting coefficients (i.e., coefficients C1, C2, C3, C4 and constant term C0 in formulas 3-1 to 3-4) in exponential and logarithmic operations can be obtained by fitting formulas 2-4 to 2-6. The fitting process can be performed using MATLAB. The specific values ​​of the coefficients and constant term C0 are shown in Tables 1 and 2 below. Table 1: Quantization coefficients of the Chebyshev polynomial logarithmic function fit Table 2: Quantization coefficients of the Chebyshev polynomial exponential function fit When calculating the multiplication of the fitting coefficients and the iteration terms, the fitting coefficients in the table above are all quantized into 10-bit fixed-point binary decimals.

[0044] In this invention, the Chebyshev polynomials can be configured to orders 2-4, and the average relative error (MRE) of the obtained computational results is within 10. -2 Up to 10 -4 Between, the mean squared error (MSE) is 10 -4 Up to 10 -6 Compared to most logarithmic approximation multipliers, the approximation multiplier provided in this invention utilizes a fitting method based on the logarithmic and exponential functions of Chebyshev polynomials. When implementing floating-point mantissa multiplication, iteratively applying the orders of the log and exp functions within a defined interval significantly reduces the approximation error. Unlike traditional schemes based on Taylor expansion or simple polynomial interpolation, Chebyshev polynomials possess the mathematical property of minimizing the maximum error, maintaining a more uniform approximation accuracy across the entire interval and avoiding the problem of excessively high local accuracy leading to a sudden increase in boundary error. Furthermore, Chebyshev polynomials achieve high fitting accuracy at lower orders, reducing the number of multiplication and addition operations required, facilitating hardware implementation; their coefficients are more suitable for quantization and sparsification processing with finite bit widths, and multiplication operations can be replaced by shifting and addition, thereby reducing area and power consumption while maintaining accuracy.

[0045] Example diagram of iterative calculation for the logarithmic transformation module and the exponential transformation module provided in Example 1 is shown below. Figure 2 As shown, the circuit structures of the logarithmic conversion module and the exponential conversion module are as follows: Figure 3 as well as Figure 4As shown, the circuit structures of the logarithmic conversion module and the exponential conversion module are the same. The difference lies in the coefficients (C1, C2, C3, C4) and the constant term C0 of the Chebyshev polynomial used when performing exponential or logarithmic operations.

[0046] like Figure 3 The circuit structures of the logarithmic conversion module and the exponential conversion module shown include the approximate multiplier iterative structure CPR, which is composed of a CTR part and a PTR part. The CTR part is a constant register used to store the constant terms in the Chebyshev polynomial. It stores the original data part of each iteration (as shown in Equation 3-1, the constant term C0 is the original part; as shown in Equation 3-2, the constant term CP1 is the calculation result of Equation 3-1, which is stored in the CTR as a constant term in Equation 3-2 during iterative calculation; the operations of Equations 3-3 and 3-4 are similar). The PTR part is a product register used to store the iterative terms in the Chebyshev polynomial. It stores the iterative terms of each iteration operation (as shown in Equation 3-1, T is the initial product operation iterative term; in Equation 3-2, (2T×T-1) is the product operation iterative term of the second-order operation; all the above values ​​are stored in the PTR).

[0047] like Figure 3 As shown, the multiplication operation of the product term is implemented using a shift-and-add method. The operation unit copies the iteration term data into 10 sets of data (e.g., ...). Figure 3 That is, PTR[0]-PTR[9]), where the 10 sets are copied based on the number of decimal places of the fitting coefficients (as mentioned above, the fitting coefficients are quantized into 10-bit fixed-point decimals, so the data of each iteration term is copied, so 10 sets of data can be copied, and then the fitting coefficients of each set are shifted based on the fitting decimals). The 10 sets of iteration terms are shifted based on the fitting coefficients. The specific shifting operation steps are: expand the 10-bit fixed-point binary decimals, start indexing from the first digit after the decimal point, find each data "1", and record the position of each data "1", and perform a right shift operation based on the position.

[0048] Taking the binary fitting coefficient 0.1001010010 as an example, the 0th, 3rd, 5th and 8th bits of this binary fitting coefficient are all data "1". Therefore, the iterative terms that are multiplied can be copied into 10 groups, and the following operations can be performed: PTR[0] shifted right by one bit, PTR[3] shifted right by 4 bits, PTR[5] shifted right by 6 bits, PTR[8] shifted right by 9 bits, and the data in other PTR[9:0] are changed to all 0.

[0049] There are 5 groups in total, with each pair of data in the 10 groups forming a group. Each pair of data in each group performs corresponding operations based on the result of a mask value to output the corresponding operation result (e.g., PTR[0] and PTR[1] perform operations based on the result of mask[1:0].

[0050] The operation unit uses four different sets of mask values ​​to represent the calculation process of each group. The result of each group is output to the adder, and the results of every two adjacent groups are added to output the final shift-add result.

[0051] The operation based on the mask value for each pair of data is implemented using a mask circuit, such as... Figure 4 The mask circuit shown includes a multiplexer; the multiplexer includes four data input terminals (11, 10, 01, and 00) and four data output terminals; the data input terminals respectively input: each pair of iteration terms (PTR[m], PTR[n]) for the corresponding operation, the addition result of the two sets of iteration terms, and the data 0, where PTR[m] and PTR[n] are input to terminals 10 and 01 respectively, the addition result of PTR[m] and PTR[n] is input to terminal 11, and the data 0 is input to terminal 00. The selection control terminal of the multiplexer is respectively input to the logical AND operation result of PTR[m] and PTR[n] with itself (… Figure 3 The result of the logical AND operation between &PTR[m], &PTR[n], PTR[m], and PTR[n] and themselves is 0 or 1. The multiplexer outputs based on the control signal. Specifically, when the output control signal is 00, data 0 is output from port 00 on the multiplexer. When the output control signal is 10 or 01, the non-zero data from the two sets of iteration terms is selected for output (output from port 10 or port 01). When the output control signal is 11, the two sets of iteration terms are added and then output (output from port 11).

[0052] For the data processing procedure, please refer to [link / reference]. Figure 2The example shown uses a data format of 2 bits for integers, 10 bits for decimals, and 14 bits for redundancy (23 bits for single-precision floating-point mantissas, and 24 bits for decimals and redundancy to improve truncation precision). The fitting coefficients C0 and C1 use the data shown in Table 1. This fitting example uses first-order data (i.e., the first-order data approximation in Formula 3-1; Formulas 3-2 to 3-4 represent second-order, third-order, and fourth-order approximations, respectively). Data A represents the Chebyshev polynomial coefficients C0, and data B represents the Chebyshev polynomial C1×T, where C1 represents the first-order coefficients of the Chebyshev polynomial, and T represents the value obtained by orthogonal transformation of the Chebyshev polynomial. In CP-log, the orthogonal transformation formula is 2X-3, and in CP-exp, the orthogonal transformation formula is 2X-1. Figure 2 In the example, data A is 0.54296857 (00.100010112), C1 is 0.4951171875 (00.01111110112), and T is 0.40625 (00.011012). The data structure at this time is as follows: Figure 2 As shown, data B represents the product of each term in C1×T, implemented using shift-and-add. Data B' is based on... Figure 4 The circuit in the diagram combines the mask value with the result of the calculation of each set of iterative terms. Data B” is the result of the addition operation based on the result of the calculation of each set of iterative terms. Finally, the addition operation of B” and A is performed to obtain the final calculation result. This structure is reused in each Chebyshev polynomial fitting calculation, which can effectively reduce the resource consumption and high latency path caused by multiplication calculation.

[0053] Among them, in Example 1 Figure 1 The logarithmic conversion module and exponential conversion module of the approximate multiplier shown can perform iterative operations based on a set number of iterations.

[0054] As an optional implementation, the approximate multiplier provided in Embodiment 1 further includes a leading zero detector and a shifter; the leading zero detector (LOD) detects the number of leading zeros in the input single-precision floating-point mantissa and performs left shift processing, so that the most significant bit of the single-precision floating-point mantissa is 1; the single-precision floating-point mantissa processed by the leading zero detector is sent to the logarithmic conversion module for processing; the shifter performs a right shift operation on the operation result output by the adder based on the sum of the leading zeros output by the two leading zero detectors.

[0055] The reason for using a leading zero detector for detection and displacement is that when the mantissa is very close to 1.0 (e.g., 1.000000001), the base-2 logarithm will be very close to 0, but the relative error in calculating it may be amplified. Furthermore, in this region, the curvature of the function is large, making polynomial approximation more difficult. Therefore, leading zero detection and shifting can avoid these problems, resulting in a more uniform and lower relative error when performing polynomial approximation. The use of a shifter to perform a right shift based on the sum of the leading zero detector is to compensate for the shifting operation of the leading zero detection module.

[0056] Example 2 Example 2 provides an approximate floating-point multiplier capable of automatic iterative computation. The difference between Example 2 and Example 1 is that Example 2 uses an iterative computation module CPR instead of... Figure 1 In the CP-log and CP-exp operations, based on the set operation order, the iterative operation module first performs logarithmic operations and then exponential operations.

[0057] Example 2 provides an approximate floating-point multiplier based on Chebyshev polynomials, see [link to example]. Figure 5 It includes an Input Register, an Order Configuration Controller (Ctrl-CP), an Iterative Operation Module (CPR), an Adder, and a State Machine (FSM). The register receives the single-precision floating-point mantissa (Ma and Mb) from external input and the set Chebyshev polynomial approximation order (CP-mode). The iterative operation module retrieves the single-precision floating-point mantissa of the external input from the register, performs a logarithmic function operation to output a logarithmic approximation, and feeds the logarithmic approximation back to the register. The adder searches for the logarithmic approximation in the register, performs an addition operation, and feeds the addition result back to the register. At this time, the iterative operation module finds the addition result of the logarithmic approximation in the register, performs an exponential function operation, and converts the addition result into an exponent with base 2.

[0058] In contrast to the scheme in Embodiment 1, Embodiment 2 controls the iterative calculation process through a state machine. Specifically, the order configuration controller determines the number of iterations for the iterative calculation module to perform logarithmic or exponential function operations based on the order of the input Chebyshev polynomial approximation. The state machine records the number of iterations when the iterative calculation module performs logarithmic or exponential function operations, and controls the iterative calculation module to stop iterative calculation when the set number of iterations is reached. The state machine can perform iterative control of data.

[0059] Compared to Example 1, the circuit structure of Example 2 can reduce the hardware circuit area by up to 60% (Example 1 reuses the iterative operation module CPR, eliminating the need to set up a logarithmic conversion module and an exponential conversion module as described in Example 1, thus saving hardware circuit area). It can play an important role in resource-constrained edge computing applications using approximate multipliers.

[0060] The iterative operation module CPR in Example 2 has the same circuit structure as the logarithmic transformation module and the exponential transformation module in Example 1. The logarithmic and exponential transformation modules in Example 1 achieve logarithmic and exponential transformations by selecting different coefficients and constant terms C0. Similarly, the iterative operation module CPR in Example 2 achieves logarithmic and exponential transformations by selecting different coefficients and constant terms C0. Example 1 has already described the logarithmic and exponential transformation modules in detail. The iterative operation module CPR in Example 2 has the same circuit structure and functional implementation as the logarithmic and exponential transformation modules, and will not be described in detail here.

[0061] As an optional implementation, the approximate multiplier provided in Embodiment 2 further includes a leading zero detector (LOD) and a shifter. The leading zero detector (LOD) detects the number of leading zeros in the input single-precision floating-point mantissa and performs a left shift, so that the most significant bit of the single-precision floating-point mantissa is 1. The single-precision floating-point mantissa processed by the leading zero detector is sent to the iterative operation module (CPR) to perform logarithmic function operation and output an approximate logarithmic value. The shifter, based on the sum of the leading zeros output by the two leading zero detectors, performs a right shift operation on the logarithmic approximation value output by the adder.

[0062] The reason for using a leading zero detector for detection and displacement is that when the mantissa is very close to 1.0 (e.g., 1.000000001), the base-2 logarithm will be very close to 0, but the relative error in calculating it may be amplified. Furthermore, in this region, the curvature of the function is large, making polynomial approximation more difficult. Therefore, leading zero detection and shifting can avoid these problems, resulting in a more uniform and lower relative error when performing polynomial approximation. The use of a shifter to perform a right shift based on the sum of the leading zero detector is to compensate for the shifting operation of the leading zero detection module.

[0063] The foregoing has provided a detailed description of an approximate floating-point multiplier based on Chebyshev polynomials provided by this invention. Specific examples have been used to illustrate the structure and working principle of this invention. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this invention. It should be noted that those skilled in the art can make various improvements and modifications to this invention without departing from its principles, and these improvements and modifications also fall within the scope of protection of the claims of this invention.

Claims

1. A Chebyshev polynomial based approximate floating point multiplier, characterized by, The method comprises: two logarithm conversion modules, which are based on Chebyshev polynomials to implement logarithm function operation and convert the input single-precision floating-point mantissa into logarithm approximation values with base 2; an adder, which performs addition operation on the two logarithm approximation values; an exponential conversion module, which is based on Chebyshev polynomials to implement exponential function operation and converts the addition operation result output by the adder into exponential approximation values with base 2; the exponential approximation values with base 2 output by the exponential conversion module are the multiplication operation results of the two single-precision floating-point mantissas.

2. A Chebyshev polynomial based approximate floating point multiplier as claimed in claim 1, wherein, It also comprises a leading zero detector and a shifter; the leading zero detector detects the number of leading zeros of the input single-precision floating-point mantissa and performs shifting processing, so that the most significant bit of the single-precision floating-point mantissa is 1; the single-precision floating-point mantissa processed by the leading zero detector is sent to the logarithm conversion module for processing; a shifter, which performs right shift operation on the addition operation result output by the adder based on the leading zeros output by the two leading zero detectors.

3. A Chebyshev polynomial based approximate floating point multiplier as claimed in claim 1, wherein, Both the logarithm conversion module and the exponential conversion module comprise a constant register, which is used to store constant terms in Chebyshev polynomials; a product register, which is used to store iteration terms in Chebyshev polynomials; an operation unit, which takes out iteration terms from the product register, performs multiplication operation on the iteration terms and coefficients in the Chebyshev polynomial iteration formula, and adds the multiplication operation result and the constant term taken out from the constant register to output logarithm operation result or exponential operation result; the logarithm operation result or exponential operation result output is stored in the constant register for next iteration operation or directly output.

4. A Chebyshev polynomial based approximate floating point multiplier as claimed in claim 3, wherein, The Chebyshev polynomial iteration formula implemented by the logarithm conversion module and the exponential conversion module is as follows: In formula 1-4, C1, C2, C3, C4 are coefficients, C0, CP1, CP2, CP3 are constant terms, and the coefficients and constant term C0 of the Chebyshev polynomial used for exponential operation and logarithm operation are different.

5. A Chebyshev polynomial based approximate floating point multiplier as claimed in claim 4, wherein, The operation unit of the logarithm conversion module and the exponential conversion module implements exponential function operation and logarithm function operation based on the obtained different Chebyshev polynomial coefficients and constant term C0.

6. A Chebyshev polynomial based approximate floating point multiplier as claimed in claim 3, wherein, The operation unit uses the shift and add method to perform multiplication operation on the iteration terms and the coefficients in the Chebyshev polynomial iteration formula.

7. A Chebyshev polynomial based approximate floating point multiplier as claimed in claim 6, wherein, The single-precision floating-point mantissa and the iteration term are represented in the data format of 2-bit integer, 10-bit decimal and 14-bit redundant. The fitting coefficient is quantized as 10-bit fixed-point binary decimal; The operation unit performs the following data processing on the taken iteration term data: according to the decimal data of the selected fitting coefficient, the iteration term data is copied into 10 groups, and shift operation is performed on the iteration term of each group; corresponding operation is performed on every two groups of iteration terms based on the result of a group of mask values to output corresponding operation result.

8. A Chebyshev polynomial based approximate floating point multiplier as claimed in claim 7, wherein, The corresponding operation performed on every two groups of iteration terms based on the result of a group of mask values is implemented by a mask circuit, and the mask circuit comprises a multiplexer. The multiplexer comprises four data input ends and four data output ends; The data input ends respectively input: each two groups of iteration item data for performing corresponding operation, addition operation result of two groups of iteration item data, and data 0; Each two groups of iteration item data respectively perform logical AND operation with itself, and the output logical AND operation result is input as a control signal into the selection control end of the multiplexer; The multiplexer outputs corresponding result based on the control signal.

9. A Chebyshev polynomial based approximate floating point multiplier as claimed in claim 8, wherein, When the control signal is 00, data 0 is output; When the control signal is 10 or 01, one group of data which is not 0 in two groups of iteration item is selected and output; When the control signal is 11, the output is the addition operation result of two groups of iteration item.

10. A Chebyshev polynomial based approximate floating point multiplier as claimed in claim 9, wherein, The result output by the mask circuit after the operation of each two groups of iteration item is input into the adder to perform addition operation, and the multiplication operation result of the iteration item and the coefficient in the Chebyshev polynomial iteration formula is output.

11. A Chebyshev polynomial based approximate floating point multiplier, characterized in that, It comprises a register, an order configuration controller, an iteration operation module, an adder, and a state machine; Single-precision floating-point mantissa and set Chebyshev polynomial approximation order are input into the register; The iteration operation module comprises a logarithm conversion module and an exponential conversion module, and is used for converting the single-precision floating-point mantissa into a logarithm approximation value with base 2 or converting the logarithm approximation value after addition operation into an exponential approximation value with base 2 based on the Chebyshev polynomial to realize logarithm function operation or exponential function operation; The adder performs addition operation on the logarithm approximation value output by the iteration operation module, and inputs the addition operation result into the register for the iteration operation module to call to perform exponential function operation; The order configuration controller determines the iteration number of the iteration operation module for performing logarithm function operation or exponential function operation based on the input Chebyshev polynomial approximation order; The state machine records the iteration number of the iteration operation module for performing logarithm function operation or exponential function operation, and controls the iteration operation module to stop iteration operation when the set iteration number is reached.

12. A Chebyshev polynomial based approximate floating point multiplier as defined in claim 11, wherein, The approximate floating-point multiplier further comprises a leading zero detector and a shifter; The leading zero detector detects the number of leading zeros of the input single-precision floating-point mantissa and performs shift processing, so that the most significant bit of the single-precision floating-point mantissa is 1; The single-precision floating-point mantissa processed by the leading zero detector is sent into the logarithm conversion module for processing; The shifter performs right shift operation on the addition operation result output by the adder based on the number of leading zeros output by the two leading zero detectors.

13. A Chebyshev polynomial based approximate floating point multiplier according to claim 11, wherein, The logarithm conversion module and the exponential conversion module both comprise a constant register used for storing constant term in the Chebyshev polynomial; A product register is used for storing iteration term in the Chebyshev polynomial; An operation unit performs multiplication operation on the iteration term taken out from the product register and the coefficient in the Chebyshev polynomial iteration formula, and adds the multiplication operation result and the constant term taken out from the constant register to output the logarithm operation result or the exponential operation result. The output log or exponential result is stored in the constant register for next iteration or directly outputted; The Chebyshev polynomial iteration formula executed by the log conversion module and the exponential conversion module is as follows: In the formula 1-4, C1, C2, C3, C4 are coefficients, C0, CP1, CP2, CP3 are constant terms, the coefficients and the constant term C0 of the Chebyshev polynomial used in the exponential operation and the log operation are different.

14. A Chebyshev polynomial based approximate floating point multiplier according to claim 13, wherein, The single-precision floating-point mantissa and the iteration term are represented by using a data format of 2-bit integer, 10-bit decimal and 14-bit redundant bits; The fitting coefficient is quantized as a 10-bit fixed-point binary decimal; The operation unit executes the following data processing on the extracted iteration term data: according to the decimal data of the selected fitting coefficient, the iteration term data is copied into 10 groups, and a shift operation is performed on each group of iteration term; Each two groups of data in the 10 groups of data perform corresponding operations based on the results of a group of mask values to output corresponding operation results.

15. A Chebyshev polynomial based approximate floating point multiplier as defined in claim 13, wherein, The corresponding operations on each two groups of iteration terms based on the results of the mask values are implemented by a mask circuit, and the mask circuit includes a multiplexer; The multiplexer includes four data input ends and four data output ends; The data input ends respectively input: each two groups of iteration term data performing corresponding operations, the addition operation result of two groups of iteration term data and data 0; Each two groups of iteration term data respectively perform logical AND operation with themselves, and the output logical AND operation result is input as a control signal to the selection control end of the multiplexer; The multiplexer outputs corresponding results based on the control signal, including: when the control signal is 00, data 0 is outputted; When the control signal is 10 or 01, one group of data which is not 0 in the two groups of iteration term is selected and outputted; When the control signal is 11, the addition operation result of the two groups of iteration term is outputted.

16. A Chebyshev polynomial based approximate floating point multiplier as defined in claim 15, wherein, The results outputted by each two groups of iteration term after the operation of the mask circuit are input to an adder to perform addition operation, and the output is the multiplication operation result of the iteration term and the coefficient in the Chebyshev polynomial iteration formula.

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