Self-gating material, self-gating storage unit and preparation method thereof
By preparing GeSe-based gating materials and memory cells, the thermal stability and lifetime issues of GeSe-based materials were solved, enabling stable application of gating memory in high-temperature environments with faster operating speed and better cycle performance.
Patent Information
- Application Number
- CN202511672231.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-14
- Publication Date
- 2026-03-17
AI Technical Summary
Existing self-gated memory materials based on GeSe have low crystallization temperatures, poor thermal stability, insufficient data retention, and short lifespans, making them difficult to apply in high-temperature environments.
It improves the thermal stability and erase/write life of the gating memory, increases the memory window, reduces leakage current, increases operating speed and cycle count, and enhances device reliability.
Smart Images
Figure CN121687153A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of microelectronics technology, and specifically relates to a self-gating material, a self-gating memory cell, and a method for preparing the same. Background Technology
[0002] Strobe memory (SOM) is a rapidly developing type of volatile semiconductor memory in recent years. Compared with traditional memory, it has advantages such as fast read / write speeds, low power consumption, and long cycle life. Therefore, SOM has become a strong competitor among various new memory technologies and is highly likely to replace DRAM technology as the mainstream next-generation volatile memory technology, thus possessing broad market prospects. At the same time, it can generate new applications in areas where ordinary memory cannot reach, such as space, aerospace technology, and the military.
[0003] The application of gating memory relies on the reversible switching between high and low resistance in its gating material under electrical pulse signal operation to achieve writing and erasing of "0" and "1". The core of gating memory is the gating storage medium material, primarily GeSe-based. Due to its excellent overall performance, it has been widely used in threshold gates and gating memories. However, this material still has some problems: 1) Low crystallization temperature and poor thermal stability, resulting in unreliable data retention and the risk of data loss. For example, in automotive electronics, the operating temperature requirement for storage devices is higher than 120℃; 2) Low lifespan; research shows that GeSe gating memory lifespan can only reach 10... 5 level.
[0004] Therefore, finding a high-speed, long-life, low-leakage self-passing thin film material with a wide operating temperature range has become an important technical problem that needs to be solved by those skilled in the art. Summary of the Invention
[0005] To address the shortcomings of existing technologies, this invention provides a self-gating material, a self-gating storage cell, and a method for preparing the same, thereby overcoming the problems of data loss and low lifetime inherent in existing self-gating materials such as GeSe, which suffer from low crystallization temperatures and poor thermal stability.
[0006] This invention provides a self-gating material comprising germanium, arsenic, selenium, and tellurium; wherein a, b, c, and d refer to the atomic composition of the elements, and the chemical formula of the self-gating material is Ge. a As b Se c Te dWhere a, b, c, and d satisfy 0
[0007] The present invention provides a method for preparing the self-gating material, wherein the self-gating material is prepared by one or more of magnetron sputtering, chemical vapor deposition, atomic layer deposition, and electron beam evaporation.
[0008] Preferably, the magnetron sputtering method uses a GeAsSeTe alloy target for sputtering, and the process parameters include: a base vacuum of 3.0 × 10⁻⁶. -4 The sputtering pressure is below Pa, the sputtering gas includes argon, the sputtering pressure range is 0.40 Pa to 0.45 Pa, the sputtering temperature range is 1 ℃ to 80 ℃, and the sputtering time range is 10 minutes to 30 minutes.
[0009] The present invention provides a self-gated memory cell, the self-gated memory cell including a self-gated material layer, wherein the self-gated material includes the self-gated material.
[0010] Preferably, the thickness of the self-gating material layer is 20 nm-200 nm;
[0011] Preferably, the self-gated memory cell sequentially includes a lower electrode layer, a self-gated material layer, and a lead-out electrode layer.
[0012] Preferably, the material of the lower electrode layer and the lead-out electrode layer is selected from one or more of metals, metal nitrides, and metal oxides; wherein the metals include one or more of W, Pt, Au, Ti, Al, Ag, Cu, and Ni.
[0013] The self-gated memory cell further includes an adhesive layer, wherein the adhesive layer is disposed between the self-gated material layer and the lead-out electrode layer.
[0014] The adhesive layer is made of one or more of the following materials: metal, metal nitride, and metal oxide; wherein the metal includes one or more of the following: W, Pt, Au, Ti, Al, Ag, Cu, and Ni.
[0015] This invention provides a method for fabricating a self-gated memory cell, comprising:
[0016] (1) Preparation of the lower electrode layer;
[0017] (2) Prepare a self-gating material layer on the lower electrode layer;
[0018] (3) Prepare an electrode layer on the self-gating material layer;
[0019] Alternatively, an adhesive layer can be prepared on the self-gated material layer, and then an lead-out electrode layer can be prepared on the adhesive layer.
[0020] In steps (1) and (3), the preparation of the lower electrode layer, the lead-out electrode layer, and the adhesive layer are all selected from one or more of the following methods: sputtering, evaporation, chemical vapor deposition, plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, metal compound vapor deposition, molecular beam epitaxy, atomic vapor deposition, and atomic layer deposition.
[0021] In step (2), the preparation of the self-gated material layer is carried out by one or more of the following methods: magnetron sputtering, chemical vapor deposition, atomic layer deposition, and electron beam evaporation.
[0022] This invention provides an application of the aforementioned self-gating material or the aforementioned self-gating memory unit in the fields of space, aerospace technology, and military.
[0023] Beneficial effects
[0024] The Ge of the present invention a As b Se c Te d The self-gating material exhibits good thermal stability, high erase / write lifetime, large storage window, and low leakage current. Self-gating memory cells using this material have faster operating speeds and better cycle counts, and significantly improved device reliability. Furthermore, the self-gating fabrication method of this invention is simple and allows for precise control of material composition. Attached Figure Description
[0025] Figure 1 The 20nm Ge provided by this invention is shown. a As b Se c Te d The resistance-temperature relationship of the self-gated material, with the composition shown being Ge 20 As 44 Se 28 Te8 is an example;
[0026] Figure 2 The 20nm Ge provided by this invention is shown. a As b Se c Te d The current-voltage relationship of the self-gating memory of the self-gating material is shown in the figure, with the components represented by Ge. 20 As 44 Se 28 Te8 is an example;
[0027] Figure 3The 20nm Ge provided by this invention is shown. a As b Se c Te d The window drift results of the self-gated material are shown in the figure, with the composition shown being Ge. 20 As 44 Se 28 Te8 is an example;
[0028] Figure 4 The 20nm Ge provided by this invention is shown. a As b Se c Te d The erase / write fatigue performance diagram of the self-gating memory of the self-gating material, the composition of which is Ge 20 As 44 Se 28 Te8 is an example. Detailed Implementation
[0029] The invention will be further illustrated below with reference to specific embodiments. To better demonstrate the tunability of the material system of the present invention, characterization tests were performed using several different example components, such as Ge. 20 As 50 Se 28 Te2, Ge 20 As 44 Se 28 Te8, Ge 20 As 36 Se 28 Te 16 Wait 20 As 44-x Se 28 Te 8+x (-6≤x≤9) series components. Test results show that different components exhibit adjustable characteristics in terms of crystallization temperature, leakage current, storage window, thermal stability, and write / erase durability. Among them, Ge... 20 As 44 Se 28 Te8 exhibits a higher crystallization temperature, a larger storage window, and superior cycling performance, making it a preferred component in the material system of this invention. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, it should be understood that after reading the teachings of this invention, those skilled in the art can make various alterations or modifications to the invention, and these equivalent forms also fall within the scope defined by the appended claims.
[0030] Example 1
[0031] This embodiment provides a self-gating material, which includes germanium, arsenic, selenium, and tellurium elements, and the chemical formula of the self-gating material is Ge. a As b Se c Te d Where a, b, c, and d all refer to the atomic components of an element, and satisfy 0
[0032] Specifically, the Ge a As b Se c Te d In this process, the contents of Ge, As, Se, and Te can be adjusted to obtain storage materials with different crystallization temperatures, resistivity, and crystallization activation energies. For example, the Ge... a As b Se c Te d It can further satisfy 0
[0033] As an example, the self-gating material exists in the form of a thin film, and the film thickness ranges from 20 nm to 200 nm.
[0034] Please see Figure 1 Displayed as Ge 20 As 44-x Se 28 Te 8+x (-6≤x≤9) Resistance-temperature relationship of self-gated material.
[0035] from Figure 1 It can be seen from Ge a As b Se c Te d The crystallization temperature of the self-gated material is above 450℃, which is significantly higher than that of GeSe.
[0036] Please see Figure 2 Displayed as Ge 20 As 44-x Se 28 Te 8+x (-6≤x≤9) Current-voltage relationship of the self-selected gate material. Using Ge 20 As 50 Se28 Te2, Ge 20 As 44 Se 28 Te8, Ge 20 As 36 Se 28 Te 16 Example components were tested, and the leakage currents corresponding to their high threshold voltages were 1.2 nA, 0.4 nA, and 1.2 nA, respectively; the leakage currents corresponding to their low threshold voltages were 1.6 nA, 0.9 nA, and 1.9 nA, respectively; and their storage windows were 0.95 V, 1.03 V, and 0.92 V, respectively. It can be seen that Ge... a As b Se c Te d The material system has a large storage window and low leakage current.
[0037] As can be seen from the above, Ge in this embodiment a As b Se c Te d Self-gating materials possess at least two stable resistance states under the influence of electrical pulses, and can achieve reversible switching between high and low resistance values under electrical pulse signal operation, making them suitable storage medium materials for fabricating self-gating memories. Meanwhile, this Ge... a As b Se c Te d The large storage window and low leakage current of the self-gating material result in better thermal stability and stronger erasing and writing capabilities compared to traditional self-gating materials.
[0038] Example 2
[0039] This embodiment provides a self-gated memory cell, which includes a self-gated material layer. The material of the self-gated material layer includes the Ge described in Embodiment 1. a As b Se c Te d Self-selected materials.
[0040] As an example, the thickness of the self-gating material layer ranges from 20 nm to 200 nm.
[0041] As an example, the self-gated memory cell further includes a lower electrode layer, an adhesive layer, and a lead-out electrode layer. The self-gated material layer is disposed on the lower electrode layer, the adhesive layer is disposed on the self-gated material layer, and the lead-out electrode layer is disposed on the adhesive layer. The adhesive layer is used to increase the bonding between the upper electrode layer and the self-gated material, and the adhesive layer material is required to be chemically stable and not react with the self-gated material over a high temperature range. The lead-out electrode layer serves to protect the self-gated material layer and acts as the upper electrode during electrical testing of the device.
[0042] As an example, the materials of the lower electrode layer, the adhesive layer, and the lead-out electrode layer respectively include at least one of W, Pt, Au, Ti, Al, Ag, Cu, and Ni, or a nitride or oxide of at least one of them. In this embodiment, the material of the lead-out electrode layer is preferably Al, and the material of the adhesive layer is preferably TiN.
[0043] It should be noted that if the material of the lead-out electrode layer itself has a high bonding strength with the self-gating material and does not react with the self-gating material during the heating process, the adhesive layer may not be necessary, or the adhesive layer may be considered to be made of the same material as the lead-out electrode layer.
[0044] Please see Figure 3 It is displayed as using Ge 20 As 44-x Se 28 Te 8+x (-6≤x≤9) Window drift result diagram of the self-gating memory of the self-gating material.
[0045] It should be noted that Ge is used. 20 As 50 Se 28 Te2, Ge 20 As 44 Se 28 Te8, Ge 20 As 36 Se 28 Te 16 The test results of the example components all showed Ge a As b Se c Te d The storage window of the auto-gated memory has a large drift and needs to be refreshed periodically to maintain data retention.
[0046] Please see Figure 4 It is displayed as using Ge 20 As 44-x Se 28 Te 8+x(-6≤x≤9) Fatigue performance diagram of the self-gating memory of the self-gating material. It can be seen that the self-gating memory achieves reversible self-gating under the action of an electrical pulse. The voltage pulse used for testing was 20 nanoseconds. Under a 20 nanosecond electrical pulse, the self-gating memory can achieve "erase" (high resistance to low resistance) and "write" (low resistance to high resistance) operations at -6V and 6V respectively. It can be seen that the device achieves 1.0 × 10⁻⁶ cycles of repeated erasing and writing without fatigue. 7 Furthermore, the device exhibits relatively stable resistance values in both high and low resistance states, ensuring the reliability required for device applications.
[0047] The self-selecting memory unit in this embodiment uses Ge a As b Se c Te d Self-gating materials enable self-gating memories to have faster operating speeds, better cycle counts, and higher stability, while lower density change rates further improve device reliability. Among them, Ge... 20 As 44 Se 28 The Te8 offers superior overall performance, with faster write and erase speeds and more cycles.
[0048] Example 3
[0049] This embodiment provides a method for preparing a self-gating material, used to prepare the Ge described in Example 1. a As b Se c Te d Self-selected materials.
[0050] Specifically, any one of the following methods can be used to deposit the Ge: magnetron sputtering, chemical vapor deposition, atomic layer deposition, and electron beam evaporation. a As b Se c Te d Self-gated material. In this embodiment, the Ge is preferably prepared by magnetron sputtering. a As b Se c Te d Self-selected materials.
[0051] As an example, according to the chemical formula Ge of the self-gating material a As b Se c Te d The self-gating material was prepared by sputtering using a GeAsSeTe alloy target.
[0052] As an example, the GeAsSeTe alloy target uses an RF power supply with a sputtering power of 20 W. Of course, in other embodiments, the sputtering power used on the GeAsSeTe alloy target can be other values, for example, in the range of 10W-30W. This should not unduly limit the scope of protection of the present invention.
[0053] As an example, in co-sputtering engineering, the background vacuum is less than 3.0 × 10⁻⁶. -4 The sputtering gas includes argon, the sputtering pressure ranges from 0.40 Pa to 0.45 Pa, the sputtering temperature ranges from 1 ℃ to 80 ℃, and the sputtering time ranges from 10 minutes to 30 minutes. By adjusting the sputtering time, self-gating material layers of different thicknesses can be obtained.
[0054] As an example, it can be seen that after operating the device with a current of different polarities in the last operation, when the device is turned on again, the threshold voltage (the current suddenly increases by more than 3 orders of magnitude) has shifted (the value is different). This difference in threshold voltage is used to store different states of 0 / 1.
[0055] Example 4
[0056] This embodiment provides a method for fabricating a self-gated memory cell, including the following steps:
[0057] S1: Form the following electrode layer;
[0058] S2: A self-gating material layer is formed on the lower electrode layer, wherein the material of the self-gating material layer includes the self-gating material described in Example 1;
[0059] S3: Form an adhesive layer on the self-selecting material layer.
[0060] S4: Form an lead-out electrode layer on the adhesive layer.
[0061] As an example, the lower electrode layer can be prepared using any one of the following methods: sputtering, evaporation, chemical vapor deposition, plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, metal compound vapor deposition, molecular beam epitaxy, atomic vapor deposition, and atomic layer deposition. The material of the lower electrode layer can include at least one of W, Pt, Au, Ti, Al, Ag, Cu, and Ni, or at least one of their nitrides or oxides. In this embodiment, W is preferably used as the material of the lower electrode layer.
[0062] As an example, the self-gating material layer can be prepared using any one of magnetron sputtering, chemical vapor deposition, atomic layer deposition, and electron beam evaporation. In this embodiment, magnetron sputtering is preferably used to prepare the Ge material layer. a Asb Se c Te d Self-selected materials.
[0063] As an example, the adhesive layer can be prepared using any one of sputtering, evaporation, chemical vapor deposition, plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, metal compound vapor deposition, molecular beam epitaxy, atomic vapor deposition, and atomic layer deposition. The adhesive layer enhances the bonding force between the self-gating material layer and the lead-out electrode layer, and its material can include at least one of W, Pt, Au, Ti, Al, Ag, Cu, and Ni, or at least one of their nitrides or oxides. In this embodiment, the adhesive layer is preferably made of TiN material.
[0064] As an example, the lead-out electrode layer can be prepared using any one of the following methods: sputtering, evaporation, chemical vapor deposition, plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, metal compound vapor deposition, molecular beam epitaxy, atomic vapor deposition, and atomic layer deposition. The material of the lead-out electrode layer can include at least one of W, Pt, Au, Ti, Al, Ag, Cu, and Ni, or at least one of their nitrides or oxides. In this embodiment, the material of the lower electrode layer is preferably Al.
[0065] In summary, the Ge of the present invention a As b Se c Te d Self-gated materials possess highly adjustable properties, allowing them to provide specific performance characteristics tailored to actual needs. Among them, Ge... 20 As 44 Se 28 Te8 exhibits good data retention while also demonstrating fast operating speed and good cycle count when applied to device cells in gating memories, making it a suitable storage medium material for fabricating gating memories. The Ge8 of this invention... a As b Se c Te d Compared to traditional GeSe, the self-gating material exhibits better thermal stability, lower leakage current, and better fatigue resistance. Furthermore, the preparation method of the self-gating material provided by this invention is simple and allows for precise control of the material composition. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and possesses high industrial application value.
Claims
1. A self-gating material, characterized in that, The chemical formula of the self-selecting material is Ge. a As b Se c Te d Where a, b, c, and d satisfy 0 <a / (a+b+c+d)≤0.6,0<b / (a+b+c+d)≤0.6,0<c / (a+b+c+d)≤0.6,0<d / (a+b+c+d)≤0.18。 2. A method for preparing the self-gating material according to claim 1, characterized in that, The self-gated material is prepared by one or more of the following methods: magnetron sputtering, chemical vapor deposition, atomic layer deposition, and electron beam evaporation.
3. The preparation method according to claim 2, characterized in that, The magnetron sputtering method: GeAsSeTe alloy target sputtering is used for preparation, and the process parameters include: a base vacuum of 3.0 × 10⁻⁶. -4 The sputtering pressure is below Pa, the sputtering gas includes argon, the sputtering pressure range is 0.40 Pa to 0.45 Pa, the sputtering temperature range is 1 ℃ to 80 ℃, and the sputtering time range is 10 minutes to 30 minutes.
4. A self-gated memory unit, characterized in that, The self-gating memory cell includes a self-gating material layer, wherein the self-gating material includes the self-gating material of claim 1.
5. The self-gated memory unit according to claim 4, characterized in that, The thickness of the self-gating material layer is 20 nm-200 nm; The self-gated memory unit comprises, in sequence, a lower electrode layer, a self-gated material layer, and an outgoing electrode layer.
6. The self-gated memory unit according to claim 5, characterized in that, The materials of the lower electrode layer and the lead-out electrode layer are selected from one or more of metals, metal nitrides, and metal oxides; wherein the metals include one or more of W, Pt, Au, Ti, Al, Ag, Cu, and Ni.
7. The self-gated memory unit according to claim 5, characterized in that, The self-gated memory cell further includes an adhesive layer, wherein the adhesive layer is disposed between the self-gated material layer and the lead-out electrode layer.
8. A method for fabricating a self-gated memory cell, comprising: (1) Preparation of the lower electrode layer; (2) Prepare a self-gating material layer on the lower electrode layer; (3) Prepare an electrode layer on the self-gating material layer; Alternatively, an adhesive layer can be prepared on the self-gated material layer, and then an lead-out electrode layer can be prepared on the adhesive layer.
9. The preparation method according to claim 8, characterized in that, The preparation in steps (1) and (3) is selected from one or more of the following methods: sputtering, evaporation, chemical vapor deposition, plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, metal compound vapor deposition, molecular beam epitaxy, atomic vapor deposition, and atomic layer deposition. The preparation of step (2) is carried out by one or more of the following methods: magnetron sputtering, chemical vapor deposition, atomic layer deposition, and electron beam evaporation.
10. The application of the self-gating material of claim 1 or the self-gating memory unit of claim 4 in the fields of space, aerospace technology, and military.