High-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology

Abstract

The invention discloses an efficient broadband power amplifier combining parasitic compensation and harmonic control technologies, which comprises an input matching network, a grid bias network, a parallel resonance stabilization network, a field effect transistor, a parasitic compensation network, a harmonic control network, a drain bias network and an output matching network, the design of an input and output matching network is realized by adopting a step type matching structure, the circuit bandwidth is expanded, the output efficiency of the power amplifier is improved by designing a parasitic compensation network, meanwhile, a harmonic control network is designed, and second and third harmonics of the power amplifier are suppressed by utilizing the harmonic control network, so that after being tuned by the harmonic network, a radio-frequency signal is transmitted to the power amplifier. The second harmonic power and the third harmonic power are obviously reduced, so that the harmonic power is converted into fundamental power, the output power is increased, the output efficiency is improved, the circuit structure enables the power amplifier to obtain high-efficiency and high-power capabilities in a broadband, and the circuit structure can be popularized and applied to a 5G wireless communication system.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of field effect transistor power amplifier and microwave circuit, in particular to a high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology for the application of transmitting module at the end of the transceiver of the line communication system. BACKGROUND

[0002] In recent years, the growing demand for wireless communication puts forward higher requirements for wireless communication system. As the most important part of the communication system, the wireless transceiver system realizes the long-distance transmission of signals, and its performance directly affects the advantages and disadvantages of the whole wireless communication system. The work bandwidth, output power, linearity and other indicators of the power amplifier as one of the core devices in the wireless transceiver system have a great influence on the quality of signal transmission.

[0003] At the same time, gallium nitride as the third generation of wide band gap semiconductor material has the characteristics of high frequency, high efficiency, high power, etc., which is conducive to the design of low loss and wideband output matching circuit. Therefore, it is widely used in the design of radio frequency devices.

[0004] However, there are many bottlenecks in the design of single-stage radio frequency and microwave power amplifier, especially in high power and high efficiency. These bottlenecks are mainly due to the slow development of semiconductor materials and technology, circuit structure and circuit technology. As can be seen, with the increasing complexity of circuit design and the continuous expansion of working frequency band and bandwidth, the difficulty of improving the performance of the amplifier also increases. SUMMARY

[0005] The technical problem to be solved by the present application is to provide a high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology. The power amplifier is based on parasitic compensation technology and harmonic control technology, so that the power amplifier can obtain high efficiency and high power in a wide frequency band.

[0006] The technical scheme for solving the above technical problem is as follows: a high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology, comprising an input matching network, a gate bias network, a parallel resonant stabilization network, a field effect transistor, a parasitic compensation network, a harmonic control network, a drain bias network and an output matching network.

[0007] The input end of the input matching network is the input end of the whole power amplifier, and the output end is connected with the input end of the parallel resonant stabilization network; The input end of the gate bias network is the input end of the gate-source voltage of the whole power amplifier, and the output end is connected with the input end of the parallel resonant stabilization network; The output end of the parallel resonant stabilization network is connected with the gate of the field effect transistor, and the output end is connected with the drain of the field effect transistor; the input end of the parasitic compensation network, and the drain thereof is connected with the input end of the parasitic compensation network; the output end of the parasitic compensation network is connected with the input end of the harmonic control network, and the output end of the harmonic control network is connected with the input end of the parasitic compensation network; the output end of the harmonic control network is connected with the input end of the output matching network, and the output end of the output matching network is connected with the input end of the harmonic control network; the input end of the drain bias network is the input end of the whole power amplifier drain-source voltage, and the output end thereof is connected with the output end of the harmonic control network and the input end of the output matching network; the output end of the output matching network is the output end of the whole power amplifier.

[0008] Compared with the prior art, the technical scheme of the present application has the beneficial effects that: the core of the present application is to improve the output power and efficiency of the power amplifier based on the parasitic compensation technology and the harmonic control technology. The parasitic compensation network is adopted to compensate the influence of the parasitic parameters on the PA harmonic impedance, and the influence of the parasitic parameters on the first three harmonic impedances of the power amplifier is compensated. The designed parasitic compensation network realizes the open circuit of the second harmonic and the short circuit of the third harmonic at the input end of the harmonic control network, realizes the accurate control of the second and third harmonics, and effectively improves the efficiency of the power amplifier. At the same time, the second and third harmonics of the power amplifier are suppressed by using the harmonic control circuit, so that after the radio frequency signal passes through the harmonic circuit tuning, the second and third harmonic power decreases obviously, and more part of the power is converted into the fundamental power, thereby increasing the output power and improving the efficiency. The circuit structure enables the power amplifier to obtain high efficiency and high power in a wide frequency band.

[0009] Further, the input end of the input matching network is connected with the input end RF in of the whole power amplifier, the other end of the microstrip line TL1 is connected with the capacitor C7, the other end of the capacitor C7 is connected with the microstrip line TL2 and the microstrip line TL3, the other end of the microstrip line TL3 is connected with the microstrip line TL4, the other end of the microstrip line TL4 is connected with the tuning microstrip line TL5, and the other end of the tuning microstrip line TL5 is connected with the input end of the parallel resonance network.

[0010] The beneficial effects of the above further scheme are that: the input matching network designed by the step matching structure can accurately match the source impedance, reduce the Q value during matching, significantly improve the gain and output power of the amplifier, and greatly improve the efficiency of the power amplifier.

[0011] Further, the input end of the gate bias network is connected with the bias voltage V gs and the capacitors C5 and C6, the other ends of the capacitors C5 and C6 are connected with the microstrip line TL17 The other end of the microstrip line TL 17 is connected to the resistance R1, and the other end of the resistance R1 is connected to the microstrip line TL 18 The input end of the gate bias network is connected to the input end of the parallel resonant network.

[0012] The further scheme has the beneficial effect that the gate bias network of the application is composed of two parallel capacitors and a series resistor, which has the functions of passing DC, blocking AC, filtering and increasing the stability of the power amplifier.

[0013] Further, the capacitor C8 and the resistance R2 at the input end of the parallel resonant network are connected to the tuning microstrip line TL5, the other end of the capacitor C2 and the resistance R1 is connected to the tuning microstrip line TL6, and the other end of the tuning microstrip line TL6 is connected to the gate of the field effect transistor.

[0014] The further scheme has the beneficial effect that the RC parallel resonant circuit structure of the parallel resonant stability network of the application can effectively enhance the stability of the field effect transistor, thereby ensuring that the entire power amplifier remains absolutely stable within a large frequency range.

[0015] Further, the gate of the field effect transistor is connected to the capacitor C8 and the resistance R1 of the parallel resonant stability network and the tuning microstrip line TL6, the source of the field effect transistor is grounded, and the drain of the field effect transistor is connected to the input end of the parasitic compensation network.

[0016] The further scheme has the beneficial effect that the field effect transistor of the application adopts the gallium nitride HEMT process, has a frequency range of DC-6GHz and an output power of 10W, has the characteristics of fast operation speed, high robustness, high electron mobility, wide band gap, etc., and has the characteristics of high frequency, high efficiency and high power.

[0017] Further, the microstrip line TL 15 and the microstrip line TL 16 at the input end of the parasitic compensation network are connected to the drain of the field effect transistor, and the output end is connected to the input end of the harmonic control network.

[0018] The further scheme has the beneficial effect that the parasitic compensation network of the application is composed of an L-shaped network of two microstrip lines, which effectively compensates for the influence of the parasitic parameters of the field effect transistor on the harmonic impedance of the entire power amplifier.

[0019] Further, the input end TL7, TL8, TL9, TL 10 of the harmonic control network is connected to the microstrip line TL 15 and the microstrip line TL 16 at the output end of the parasitic compensation network, and the output end is connected to the output end of the drain bias network and the input end of the output matching network.

[0020] The beneficial effect of the further scheme is that the harmonic control network adopted by the application is composed of four microstrip lines to form a cross network, which can control the second and third harmonics, convert the harmonic power into fundamental wave power, and improve the output power and efficiency of the power amplifier.

[0021] Further, the input end of the drain bias network is connected with a bias voltage V ds and parallel capacitors C1, C2, C3, C4, the other end of the capacitors is connected with the microstrip line TL 19 , the other end of the microstrip line TL 19 is connected with the inductor L1, the other end of the inductor L1 is connected with the microstrip line TL 20 , the other end of the microstrip line TL 20 is connected with the output end of the harmonic control network and the input end of the output matching network.

[0022] The beneficial effect of the further scheme is that the drain bias network adopted by the application is composed of a series inductor and a parallel capacitor network composed of four parallel capacitors, which has the functions of passing DC, blocking AC, filtering, weakening self-oscillation, and compensating the load capacitance of the transistor.

[0023] Further, the input end of the output matching network is connected with the microstrip line TL 11 , the other end of the microstrip line TL 11 is connected with the microstrip line TL 12 , the other end of the microstrip line TL 12 is connected with the microstrip line TL 13 and the capacitor C9, the other end of the capacitor C9 is connected with the microstrip line TL 14 , the other end of the microstrip line TL 14 serves as the output end RF out of the entire power amplifier.

[0024] The beneficial effect of the further scheme is that the output matching network designed in a step matching structure can accurately match the impedance, reduce the Q value during matching, greatly improve the gain and output power of the power amplifier, and significantly improve the efficiency of the power amplifier. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 is the principle block diagram of the power amplifier of the application; Figure 2 is the circuit diagram of the power amplifier of the application; Figure 3 is the circuit diagram of the parasitic compensation network and the harmonic control network of the application; Figure 4 is the equivalent circuit diagram of the intrinsic drain output end second harmonic of the application; Figure 5Equivalent circuit diagram of third harmonic of intrinsic drain output terminal of the present application. DETAILED DESCRIPTION

[0026] Exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. It should be understood that the embodiments illustrated and described herein are merely exemplary of the principles and spirit of the present application, and are not intended to limit the scope of the present application.

[0027] The present application provides a high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology, comprising an input matching network, a gate bias network, a parallel resonant stabilization network, a field effect transistor, a parasitic compensation network, a harmonic control network, a drain bias network and an output matching network.

[0028] As shown in Figure 1 , the input end of the input matching network is the input end of the entire power amplifier, and the output end thereof is connected with the input end of the parallel resonant stabilization network; The input end of the gate bias network is the input end of the gate-source voltage of the entire power amplifier, and the output end thereof is connected with the input end of the parallel resonant stabilization network; The output end of the parallel resonant stabilization network is connected with the gate of the field effect transistor, and the output end thereof is connected with the drain of the field effect transistor; The drain of the field effect transistor is connected with the input end of the parasitic compensation network, the source thereof is grounded, and the drain thereof is connected with the input end of the parasitic compensation network; The output end of the parasitic compensation network is connected with the input end of the harmonic control network, and the output end thereof is connected with the input end of the harmonic control network; The output end of the harmonic control network is connected with the input end of the output matching network, and the output end thereof is connected with the input end of the output matching network; The input end of the drain bias network is the input end of the drain-source voltage of the entire power amplifier, and the output end thereof is connected with the output end of the harmonic control network and the input end of the output matching network; The output end of the output matching network is the output end of the entire power amplifier.

[0029] As shown in Figure 2 , the input end of the input matching network is connected with the input end RF in of the entire power amplifier, the other end of the microstrip line TL1 is connected with the capacitor C7, the other end of the capacitor C7 is connected with the microstrip line TL2 and the microstrip line TL3, the other end of the microstrip line TL3 is connected with the microstrip line TL4, the other end of the microstrip line TL4 is connected with the tuning microstrip line TL5, and the other end of the tuning microstrip line TL5 is connected with the input end of the parallel resonant network.

[0030] The input end of the gate bias network is connected with the bias voltage Vgs and capacitor C5, C6, the other end of capacitor C5, C6 is connected to microstrip line TL 17 , the other end of microstrip line TL 17 is connected to resistor R1, the other end of resistor R1 is connected to microstrip line TL 18 , the input end of gate bias network is connected to the input end of parallel resonant network.

[0031] The input end of parallel resonant network is connected to tuning microstrip line TL5, the other end of capacitor C2 and resistor R1 is connected to tuning microstrip line TL6, the other end of tuning microstrip line TL6 is connected to the gate of field effect transistor.

[0032] The gate of field effect transistor is connected to capacitor C8 and resistor R1 of parallel resonant network and tuning microstrip line TL6, the source of field effect transistor is grounded, the drain of field effect transistor is connected to the input end of parasitic compensation network.

[0033] The input end of parasitic compensation network is connected to microstrip line TL 15 and microstrip line TL 16 , the output end of which is connected to the drain of field effect transistor, the input end of harmonic control network.

[0034] The input end of harmonic control network is connected to microstrip line TL7, TL8, TL9, TL 10 , the output end of parasitic compensation network is connected to microstrip line TL 15 and microstrip line TL 16 , the output end of which is connected to the output end of drain bias network and the input end of output matching network.

[0035] The input end of drain bias network is connected to bias voltage V ds and grounded parallel capacitor C1, C2, C3, C4, the other end of capacitor is connected to microstrip line TL 19 , the other end of microstrip line TL 19 is connected to inductor L1, the other end of inductor L1 is connected to microstrip line TL 20 , the other end of microstrip line TL 20 is connected to the output end of harmonic control network and the input end of output matching network.

[0036] The input end of output matching network is connected to microstrip line TL 11 , the other end of microstrip line TL 11 is connected to microstrip line TL 12 , the other end of microstrip line TL 12 is connected to microstrip line TL 13 and capacitor C9, the other end of capacitor C9 is connected to microstrip line TL 14 , the other end of microstrip line TL 14 is the output end RF of the whole power amplifier.out .

[0037] The specific working principle and process of the present application are introduced as follows: Figure 2 The specific working principle and process of the present application are introduced as follows: The radio frequency input signal passes through the input end RF in into the circuit, enters the input end of the parallel resonance stabilization network through the input matching network, then is amplified by the field effect tube, the amplified signal is compensated for the parasitic parameters of the compensation circuit through the parasitic compensation network, then the harmonic signal is controlled through the harmonic control network, and under the power supply and adjustment of the gate bias network and the drain bias network, is output from the output end RF out through the output matching network.

[0038] The parasitic compensation network and the harmonic control network circuit diagram of the present application are shown in Figure 3 The present application realizes a high-efficiency wideband power amplifier combining parasitic compensation and harmonic control technology by adopting parasitic compensation technology and harmonic control technology. The parasitic effects introduced by the intrinsic drain output capacitance ( C ds ), the parasitic inductance ( L d ) and the external parasitic capacitance ( C p ) are compensated for by adopting the parasitic compensation technology. The parasitic compensation network is designed to realize the open circuit of the second harmonic and the short circuit of the third harmonic at the input end of the harmonic control network.

[0039] The second harmonic equivalent circuit diagram of the intrinsic drain output end of the present application is shown in Figure 4 According to the corresponding equivalent circuit, the load impedance at the intrinsic drain of the transistor is: (1), wherein, , is the fundamental angular frequency, is the parasitic capacitance between the drain and the source of the transistor, L d is the parasitic inductance, C p and the package parasitic capacitance.

[0040] At the same time, the third harmonic equivalent circuit diagram of the intrinsic drain output end of the present application is shown in Figure 5 According to the corresponding equivalent circuit, the load impedance at the intrinsic drain of the transistor is: (2), wherein, , ω 0 is the fundamental angular frequency, C dsfor the parasitic capacitance between the transistor drain and source, L d for the parasitic inductance, C p for the package parasitic capacitance.

[0041] to meet the conditions of the second harmonic open circuit and the third harmonic short circuit on the transistor intrinsic drain reference surface: (3), for the parasitic capacitance between the transistor drain and source C ds , the parasitic inductance L d and the package parasitic capacitance C p , the simultaneous equations are solved to obtain the electrical length of the transmission line TL1 and the transmission line TL2 θ 1 , θ 2 : (4), (5), wherein m and n are integers, Z0 is the characteristic impedance of the microstrip, and in actual design, the electrical length θ 1 and θ 2 take the minimum value greater than zero.

[0042] The parasitic compensation technology effectively compensates for the influence of the parasitic parameters on the harmonic impedance of the PA, and significantly improves the efficiency of the PA.

[0043] The harmonic control network designed by using the harmonic control technology improves the output efficiency of the power amplifier, Figure 3 is a circuit diagram of a parasitic compensation network and a harmonic control network. TL3 is set as a quarter wavelength line of the second harmonic, so that the second harmonic is short-circuited at point A. TL4 is set as a quarter wavelength line of the third harmonic, so that the third harmonic is short-circuited at point A. At the same time, TL5 and TL6 are used for tuning to match the fundamental wave to the optimal impedance space, realizing the control of the second and third harmonics, so that after the radio frequency signal passes through the harmonic network tuning, the second and third harmonic powers decrease significantly, and the harmonic power part is converted into the fundamental wave power, thereby increasing the output power and improving the efficiency. At the same time, a step matching structure is used for matching network design, which mainly realizes the series connection of multiple microstrip lines and optimization design. Compared with the traditional multi-branch impedance matching method, the Q value is smaller in step matching, which can reduce the design area and improve the bandwidth of the PA.

[0044] The parasitic compensation network designed based on the parasitic compensation technology can effectively compensate for the parasitic parameters of the field effect transistor, compensate for the influence of the parasitic parameters on the first three harmonic impedances of the power amplifier, realize open circuit of the second harmonic and short circuit of the third harmonic at the input end of the harmonic control network of the designed parasitic compensation network, realize accurate control of the second harmonic and the third harmonic, and effectively improve the efficiency of the power amplifier. Meanwhile, based on the harmonic control technology, the second and third harmonics of the power amplifier are suppressed by using the harmonic control network, so that after the radio frequency signal is tuned by the harmonic control network, the second and third harmonic power is obviously reduced, and more part of the harmonic power is converted into fundamental wave power, so that the output power is increased and the efficiency is improved. The suppression of the second and third harmonics is suppressed by the second and third harmonic control network in the input and output matching network, and the output fundamental wave power and drain efficiency are improved by waveform construction. Specifically, TL7 is set as a quarter wavelength line of the second harmonic, so that the second harmonic is short-circuited at point A. TL8 is set as a quarter wavelength line of the third harmonic, so that the third harmonic is short-circuited at point A, and then the fundamental wave is matched to the optimal impedance space through TL9 and TL 10 After transformation, the output efficiency of the power amplifier is improved.

[0045] In addition, in the entire high-efficiency wide-band gallium nitride power amplifier, the model of the field effect transistor and the size of other resistors and capacitors are determined by comprehensively considering various indexes such as the efficiency, bandwidth and output power of the entire circuit, and through later layout design and reasonable layout, the power amplifier realizes high efficiency, high power and wide-band characteristics.

[0046] The above only describes the preferred embodiments of the present application, and is not used to limit the present application, and any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technologies, characterized in that, It includes an input matching network, a gate bias network, a parallel resonant stabilization network, a field-effect transistor, a parasitic compensation network, a harmonic control network, a drain bias network, and an output matching network; The input terminal of the input matching network is the input terminal of the entire power amplifier, and its output terminal is connected to the input terminal of the parallel resonant stabilizing network. The input terminal of the gate bias network is the input terminal of the gate-source voltage of the entire power amplifier, and its output terminal is connected to the input terminal of the parallel resonant stabilization network. The output terminal of the parallel resonant stabilizing network is connected to the gate of the field-effect transistor, and its output terminal is connected to the drain of the field-effect transistor. The drain of the field-effect transistor is connected to the input terminal of the parasitic compensation network, its source is grounded, and its drain is connected to the input terminal of the parasitic compensation network. The output of the parasitic compensation network is connected to the input of the harmonic control network. The output terminal of the harmonic control network is connected to the input terminal of the output matching network, and its output terminal is connected to the input terminal of the output matching network. The input terminal of the drain bias network is the input terminal of the drain-source voltage of the entire power amplifier, and its output terminal is connected to the output terminal of the harmonic control network and the input terminal of the output matching network. The output terminal of the output matching network is the output terminal of the entire power amplifier.

2. The high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology according to claim 1, characterized in that, The input of the input matching network is connected to the input terminal RF of the entire power amplifier. in The other end of microstrip line TL1 is connected to capacitor C7. The other end of capacitor C7 is connected to microstrip line TL2 and microstrip single line TL3. The other end of microstrip line TL3 is connected to microstrip line TL4. The other end of microstrip line TL4 is connected to tuned microstrip line TL5. The other end of tuned microstrip line TL5 is connected to the input terminal of parallel resonant network.

3. The high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology according to claim 1, characterized in that, The input terminal of the gate bias network is connected to the bias voltage V. gs And capacitors C5 and C6, the other end of which is connected to the microstrip line TL. 17 microstrip line TL 17 The other end is connected to resistor R1, and the other end of resistor R1 is connected to the microstrip line TL. 18 The input terminal of the gate bias network is connected to the input terminal of the parallel resonant network.

4. The high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology according to claim 1, characterized in that, The capacitor C8 and resistor R2 at the input of the parallel resonant network are connected to the tuning microstrip line TL5. The other end of the capacitor C2 and resistor R1 is connected to the tuning microstrip line TL6, and the other end of the tuning microstrip line TL6 is connected to the gate of the field-effect transistor.

5. A high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology according to claim 1, characterized in that, The gate of the field-effect transistor is connected to the capacitor C8, resistor R1, and tuning microstrip line TL6 of the parallel resonant stable network. The source of the field-effect transistor is grounded, and the drain of the field-effect transistor is connected to the input terminal of the parasitic compensation network.

6. The high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology according to claim 1, characterized in that, The microstrip line TL at the input of the parasitic compensation network 15 and microstrip lines TL 16 The drain of the field-effect transistor is connected to the output terminal of the harmonic control network.

7. A high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology according to claim 1, characterized in that, The input terminals TL7, TL8, TL9, and TL of the harmonic control network 10 The microstrip line TL connected to the output of the parasitic compensation network 15 and microstrip lines TL 16 Its output terminal is connected to the output terminal of the drain bias network and the input terminal of the output matching network.

8. A high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology according to claim 1, characterized in that, The input terminal of the drain bias network is connected to the bias voltage V. ds Connect capacitors C1, C2, C3, and C4 in parallel with ground, and connect the other end of the capacitors to the microstrip line TL. 19 microstrip line TL 19 The other end is connected to inductor L1, and the other end of inductor L1 is connected to microstrip line TL. 20 microstrip line TL 20 The other end connects to the output of the harmonic control network and the input of the output matching network.

9. A high-efficiency broadband power amplifier combining parasitic compensation and harmonic control technology according to claim 1, characterized in that, The input of the output matching network is connected to a microstrip line TL. 11 microstrip line TL 11 The other end is connected to the microstrip line TL 12 microstrip line TL 12 The other end is connected to the microstrip line TL 13 And capacitor C9, the other end of capacitor C9 is connected to microstrip line TL 14 microstrip line TL 14 The other end serves as the output terminal RF of the entire power amplifier. out。

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