A reverse conducting insulated gate bipolar transistor and a method of manufacturing the same

Abstract

The application provides an inverse-conducting insulated gate bipolar transistor and a preparation method thereof, and belongs to the technical field of power semiconductor devices, and comprises: a first groove is a gate groove, a second groove is an emitter groove, and a third groove is an ineffective gate groove; in the lateral direction parallel to the cell surface, the first groove, the second groove and the third groove are sequentially and spacedly arranged, and the first groove and the second groove are connected through a fourth groove, and the fourth groove is a gate groove; in the longitudinal direction, the second groove is located between two adjacent fourth grooves. The beneficial effects are as follows: the gate groove and the ineffective gate groove are connected through the lateral gate groove, the forward conduction voltage drop and the conduction loss of the device are reduced; the current channel is increased, the current distribution is more uniform, the heat loss is reduced, the reliability and the power density of the device are improved; the emitter groove is used for repeatedly arranging the polysilicon gate and the metal gate in the lateral and longitudinal directions, the regularly arranged diodes and Schottky diodes are formed, and the reverse diode current distribution is more uniform.

Description

Technical Field

[0001] This invention relates to the field of power semiconductor device technology, and in particular to a reverse-conducting insulated-gate bipolar transistor and its fabrication method. Background Technology

[0002] With the evolving demands for higher integration, superior performance, and lower cost in power semiconductor devices, the Reverse Conducting Insulated Gate Bipolar Transistor (RC-IGBT) has emerged. RC-IGBT devices significantly reduce the number of chips and packaging steps by monolithically integrating the functions of an IGBT and a diode, achieving higher integration and meeting the trends of device miniaturization and weight reduction. The integrated design of the RC-IGBT allows the IGBT and diode to share a thermal path, reducing thermal resistance, improving temperature distribution uniformity, and enhancing power cycling capability and reliability. Furthermore, the integrated design eliminates interconnect impedance between discrete components, optimizing on-state voltage drop; simultaneously, it improves chip area utilization and reduces manufacturing process steps, resulting in overall cost reduction.

[0003] With the development of RC-IGBT device technology, applications are facing increasingly stringent requirements regarding cost and size, as well as higher demands for device power density. Currently, RC-IGBT devices tend to employ micro-trench technology to improve current density. However, these devices still suffer from relatively high forward conduction and reverse recovery losses, and a trade-off between these losses needs to be considered, which limits further performance improvements. Summary of the Invention

[0004] To address the above technical problems, this invention provides a reverse-conducting insulated-gate bipolar transistor; furthermore, it provides a method for fabricating a reverse-conducting insulated-gate bipolar transistor, which reduces conduction loss, reverse recovery loss, and heat loss by optimizing the structure, thereby improving power density.

[0005] The technical problem solved by this invention can be achieved by the following technical solution: a reverse-conducting insulated-gate bipolar transistor, comprising a plurality of cells, each cell comprising a plurality of cell trenches, the plurality of cell trenches comprising: at least one first trench, a plurality of second trenches and at least one third trench, wherein the first trench is a gate trench, the second trench is an emitter trench, and the third trench is an inactive gate trench; wherein, in the transverse direction parallel to the cell surface, the first trench, the second trench and the third trench are sequentially spaced apart, and the first trench and the third trench are connected by a fourth trench, the fourth trench being a gate trench; in the longitudinal direction parallel to the cell surface, the second trench is located between two adjacent fourth trenches.

[0006] The reverse-conducting insulated-gate bipolar transistor of the present invention has a second trench composed of alternating first and second sub-trenches in the lateral and longitudinal directions parallel to the cell surface. The first sub-trench is filled with second gate polysilicon and its inner wall is covered with a second gate oxide layer. The second sub-trench is filled with gate metal.

[0007] The reverse-conducting insulated-gate bipolar transistor of the present invention has a first trench filled with a first gate polysilicon and an inner wall covered with a first gate oxide layer, and a third trench filled with a third gate polysilicon and an inner wall covered with a third gate oxide layer.

[0008] The reverse-conducting insulated-gate bipolar transistor of the present invention has the same structure as the first trench in the fourth trench.

[0009] The reverse-conducting insulated-gate bipolar transistor of the present invention has cell trenches formed in a semiconductor substrate, the semiconductor substrate comprising: a drift region having a first conductivity type; a carrier storage layer having a first conductivity type formed on the upper surface of the drift region; and each cell trench extending downward from the surface of the carrier storage layer into the drift region.

[0010] The reverse-conducting insulated-gate bipolar transistor of the present invention further includes: a body region having a second conductivity type formed in the drift region; a source region having a first conductivity type formed in the body region; an interlayer insulating dielectric layer formed on the upper surface of the carrier storage layer, wherein contact holes corresponding to the body region, the second gate polysilicon, and the gate metal are formed in the interlayer insulating dielectric layer; an emitter metal layer formed on the upper surface of the interlayer insulating dielectric layer and filling the contact holes; a buffer layer having a first conductivity type formed on the lower surface of the drift region; a collector region formed on the lower surface of the buffer layer, wherein the collector region includes a first collector region having a first conductivity type and a second collector region having a second conductivity type, the first collector region and the second collector region being alternately arranged; and a collector metal layer formed on the lower surface of the collector region.

[0011] The reverse-conducting insulated-gate bipolar transistor of the present invention has an ohmic contact region disposed below the contact hole, wherein the implanted ions in the ohmic contact region are one or more combinations of boron and boron fluoride.

[0012] The reverse-conducting insulated-gate bipolar transistor of the present invention has a gate metal material selected from one or more combinations of platinum, tungsten, and aluminum.

[0013] On the other hand, a method for fabricating a reverse-conducting insulated-gate bipolar transistor is provided, for fabricating the reverse-conducting insulated-gate bipolar transistor as described above, comprising: forming at least one first trench, a plurality of second trenches, and at least one third trench in a cell, wherein the first trench is a gate trench, the second trenches are emitter trenches, and the third trench is an inactive gate trench, and the first trench, the second trench, and the third trench are sequentially spaced apart in a transverse direction parallel to the cell surface; forming a fourth trench in the cell, wherein the fourth trench is a gate trench, the first trench and the third trench are connected through the fourth trench, and in a longitudinal direction parallel to the cell surface, the second trench is located between two adjacent fourth trenches.

[0014] The method for fabricating a reverse-conducting insulated-gate bipolar transistor according to the present invention further includes: forming a first type of sub-trench and a second type of sub-trench in the cell; filling the first type of sub-trench with a second gate polysilicon and covering the inner wall with a second gate oxide layer; filling the second type of sub-trench with gate metal; and in the transverse and longitudinal directions parallel to the cell surface, the second trench is composed of the first type of sub-trench and the second type of sub-trench arranged alternately.

[0015] The advantages or beneficial effects of the technical solution of the present invention are as follows: The present invention sets a fourth trench between the first trench and the second trench, so that the gate trench and the ineffective gate trench are connected through the lateral gate trench, thereby increasing the lateral channel and increasing the density of the effective channel to improve the current, reduce the forward conduction voltage drop of the device, and reduce the conduction loss; at the same time, it increases the current channel, makes the current distribution more uniform, reduces the thermal failure caused by current concentration, thereby reducing heat loss and improving the reliability and power density of the device. Attached Figure Description

[0016] Figure 1 A schematic diagram of the layout design of a reverse-conducting insulated-gate bipolar transistor in a preferred embodiment of the present invention;

[0017] Figure 2 In a preferred embodiment of the present invention, Figure 1 A cross-sectional view along the AA' direction;

[0018] Figure 3 In a preferred embodiment of the present invention, Figure 1 A cross-sectional view along the BB' direction;

[0019] Figure 4 This is a schematic flowchart of a method for fabricating a reverse-conducting insulated-gate bipolar transistor, as shown in a preferred embodiment of the present invention.

[0020] Figures 5a-5g This is a cross-sectional schematic diagram of each process step in the preparation method in a preferred embodiment of the present invention.

[0021] Explanation of reference numerals in the attached figures:

[0022] 1. Drift region; 2. Carrier storage layer; 31. First trench; 32. Second trench; 33. Third trench; 34. Fourth trench; 41. First gate oxide layer; 42. Second gate oxide layer; 43. Third gate oxide layer; 51. First gate polysilicon; 52. Second gate polysilicon; 62. Gate metal; 53. Third gate polysilicon; 6. Body region; 7. Source region; 8. Interlayer insulating dielectric layer; 9. Ohmic contact region; 10. Emitter metal layer; 11. Buffer layer; 12. First collector region; 13. Second collector region; 14. Collector metal layer; 15. Contact hole. Detailed Implementation

[0023] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0025] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but this is not intended to limit the scope of the invention.

[0026] See Figure 1 , Figure 2 and Figure 3 In a preferred embodiment of the present invention, based on the aforementioned problems existing in the prior art, a high power density reverse-conducting insulated-gate bipolar transistor (RC-IGBT) is provided, comprising a plurality of cells, each cell comprising a plurality of cell trenches, the plurality of cell trenches comprising: at least one first trench 31, a plurality of second trenches 32 and at least one third trench 33, wherein the first trench 31 is a gate trench, the second trenches 32 are emitter trenches, and the third trenches 33 are inactive gate trenches; wherein, in the transverse direction parallel to the cell surface, the first trenches 31, the second trenches 32 and the third trenches 33 are sequentially spaced apart, and the first trenches 31 and the third trenches 33 are connected by a fourth trench 34, the fourth trench 34 being a gate trench; in the longitudinal direction parallel to the cell surface, the second trenches 32 are located between two adjacent fourth trenches 34.

[0027] Specifically, in this embodiment, a fourth trench 34 is added. The fourth trench 34 and the first trench 31 are both gate trenches. The first trench 31, the second trench 32, and the third trench 33 are all formed by longitudinal slotting parallel to the device surface. The fourth trench 34 is formed by transverse slotting parallel to the device surface, that is, the fourth trench 34 is positioned perpendicular to the first trench 31. The fourth trench 34 is located between two adjacent second trenches 32, and both ends of the fourth trench 34 are in ohmic contact with the first trench 31 and the third trench 33. Compared to the prior art where the gate trench direction is single and consistent, this embodiment adds a transverse gate trench due to the addition of the fourth trench 34. The gate trenches and ineffective gate trenches are connected by adding transverse gate trenches to form transverse channels, thereby increasing the effective channel density to improve current, reducing the on-state voltage drop Vcesat of the RC-IGBT device, and lowering conduction losses.

[0028] A current path refers to the current path formed by charge carrier electrons and holes through an effective channel from the collector to the emitter after the device is turned on. In existing technologies, devices only contain longitudinal trenches, resulting in a relatively concentrated current path in the longitudinal direction parallel to the device surface. This concentrated current distribution can lead to heat concentration, i.e., excessive heat accumulation in localized areas. This not only affects device performance but may also shorten the device's lifespan. In this embodiment of the invention, by adding lateral gate trenches, the current path is increased, and the current flow path is no longer limited to the longitudinal direction but can also flow laterally. This makes the current distribution more uniform, thereby reducing heat concentration, lowering heat loss caused by heat concentration, and improving the device's reliability and power density.

[0029] In the reverse-conducting insulated gate bipolar transistor of the present invention, the second trench 32 is composed of alternating first type sub-trenches and second type sub-trenches in the lateral and longitudinal directions parallel to the cell surface. The first type sub-trench is filled with second gate polysilicon 52 and the inner wall is covered with a second gate oxide layer 42. The second type sub-trench is filled with gate metal 62.

[0030] Specifically, the second trench 32 is the emitter trench, located between two adjacent lateral gate trenches. The emitter trench has two filling methods: filling with second gate polysilicon 52 and filling with gate metal 62. These two filling methods are arranged alternately in the lateral and vertical directions, forming a regularly arranged combination of diodes and Schottky diodes. This makes the current distribution of the reverse diode more uniform, reducing current concentration and thus decreasing reverse heat loss. Simultaneously, the added Schottky diode shortens the reverse recovery time and reduces reverse recovery loss, further improving the device's reliability and power density.

[0031] A PN junction diode has a P-type body region as its anode and an N-type first collector region on the back side as its cathode. A Schottky diode has a metal-semiconductor junction, with a gate metal as its anode and an N-type first collector region on the back side as its cathode. Due to its metal-semiconductor junction (Schottky barrier) structure, the Schottky diode has an extremely short reverse recovery time. As a majority carrier device, when forward-biased, the current is mainly formed by majority carriers in the semiconductor (such as electrons in an N-type semiconductor) crossing the metal-semiconductor barrier, with almost no minority carrier injection or storage. In contrast, when a traditional PN junction diode is turned on, the P and N regions inject and store a large number of minority carriers (electrons in the P region and holes in the N region). When the voltage reverses, these stored minority carriers need time to recombine or be removed, forming a longer reverse recovery current. Since the Schottky diode does not have this process, its reverse recovery time is significantly shortened. Meanwhile, since there is no minority carrier storage, the reverse recovery charge that needs to be released when a Schottky diode switches from the on to the off state is very small, making its switching process almost instantaneous, with a reverse recovery time as short as a few nanoseconds (ns) or even less. Furthermore, the depletion region (space charge region) of the Schottky barrier is narrower than that of a PN junction. When a reverse voltage is applied, a stable reverse electric field can be established in a very short time, completing the recovery of the depletion region and further shortening the transit time. In summary, the Schottky diode, with its metal-semiconductor contact structure, avoids the time-consuming minority carrier recombination process in traditional PN junction diodes, achieving an extremely short reverse recovery time.

[0032] In this embodiment of the invention, by adding a lateral gate trench (i.e., the fourth trench 34) and an emitter trench, the second gate polysilicon 52 and the gate metal 62 are arranged alternately in the horizontal and vertical directions, thereby reducing the conduction loss and reverse recovery loss of the RC-IGBT device, and comprehensively reducing the total loss of the RC-IGBT device, improving the reliability and power density of the device.

[0033] The reverse-conducting insulated-gate bipolar transistor of the present invention has a first gate polysilicon 51 filled in a first trench 31 and the inner wall covered with a first gate oxide layer 41, and a third gate polysilicon 53 filled in a third trench 33 and the inner wall covered with a third gate oxide layer 43.

[0034] In the reverse-conducting insulated-gate bipolar transistor of the present invention, the fourth trench 34 has the same structure as the first trench 31, and is also filled with gate polysilicon and the inner wall is covered with a gate oxide layer.

[0035] The reverse-conductive insulated-gate bipolar transistor of the present invention has cell trenches formed in a semiconductor substrate, such as... Figure 2 and Figure 3As shown, the semiconductor substrate includes: a drift region 1 having a first conductivity type; a carrier storage layer 2 having a first conductivity type, formed on the upper surface of the drift region 1; wherein the implanted ions of the N-type carrier storage layer 2 are heavily doped phosphorus elements; each cell trench extends downward from the surface of the carrier storage layer 2 into the drift region 1.

[0036] The reverse-conducting insulated-gate bipolar transistor of the present invention, such as Figure 2 and Figure 3 As shown, it also includes: a body region 6 having a second conductivity type opposite to the first conductivity type, formed in the drift region 1 and located between cell trenches; wherein the implanted ions of the P-type body region 6 are boron elements; a source region 7 having a first conductivity type, formed in the body region 6; the N-type source region 7 serves as the emitter of the RC-IGBT device; an interlayer insulating dielectric layer 8, formed on the upper surface of the carrier storage layer 2, wherein contact holes 15 corresponding to the body region 6, the second gate polysilicon 52, and the gate metal 62 are formed in the interlayer insulating dielectric layer 8; wherein the material of the interlayer insulating dielectric layer 8 can be low-pressure chemical vapor deposition tetraethyl orthosilicate (LPTEOS), undoped silicon glass (USG), or silicon nitride.

[0037] Emitter metal layer 10 is formed on the upper surface of interlayer insulating dielectric layer 8 and fills contact hole 15; the emitter metal of IGBT and the anode metal of diode are shared, i.e., emitter metal layer 10 of RC-IGBT device; buffer layer 11 with a first conductivity type is formed on the lower surface of drift region 1; wherein, buffer layer 11 is implanted with high-energy N-type ions, such as phosphorus or hydrogen (H) implantation; collector region is formed on the lower surface of buffer layer 11, the collector region includes a first collector region 12 with a first conductivity type and a second collector region 13 with a second conductivity type, the first collector region 12 and the second collector region 13 are arranged alternately; collector metal layer 14 is formed on the lower surface of collector region; collector metal layer 14 is shared by IGBT collector metal and diode cathode metal, i.e., collector metal layer of RC-IGBT device, such as aluminum (Al) / titanium (Ti) / nickel (Ni) / silver (Ag).

[0038] Furthermore, the first conductivity type is N-type and the second conductivity type is P-type; or, the first conductivity type is P-type and the second conductivity type is N-type. This embodiment of the invention uses an example where the first conductivity type is N-type and the second conductivity type is P-type.

[0039] In the reverse-conducting insulated-gate bipolar transistor of the present invention, an ohmic contact region 9 is disposed below the contact hole 15, and the implanted ions in the ohmic contact region 9 are one or more combinations of boron and boron fluoride (BF2). Specifically, the implanted ions in the ohmic contact region 9 are boron, BF2, or a combination of boron and BF2.

[0040] In the reverse-conducting insulated-gate bipolar transistor of the present invention, the gate metal 62 is made of one or more materials selected from platinum, tungsten, and aluminum.

[0041] This invention reduces the total loss of RC-IGBT devices and increases their power density by optimizing the structural design of reverse-conducting insulated-gate bipolar transistors (RC-IGBTs), thereby reducing the conduction loss, reverse recovery loss, and heat loss of the RC-IGBT devices.

[0042] This invention provides a method for fabricating a reverse-conducting insulated-gate bipolar transistor (IGBT), which is used to fabricate the reverse-conducting IGBT as described above. The method includes: forming at least one first trench 31, a plurality of second trenches 32, and at least one third trench 33 in a cell, wherein the first trench 31 is a gate trench, the second trenches 32 are emitter trenches, and the third trench 33 is an inactive gate trench, and the first trenches 31, second trenches 32, and third trenches 33 are sequentially spaced apart in a transverse direction parallel to the cell surface; forming a fourth trench 34 in the cell, wherein the first trenches 31 and third trenches 33 are connected by the fourth trench 34, and in a longitudinal direction parallel to the cell surface, the second trenches 32 are located between two adjacent fourth trenches 34.

[0043] The method for fabricating a reverse-conducting insulated-gate bipolar transistor of the present invention further includes: forming a first type of sub-trench and a second type of sub-trench in a cell; filling the first type of sub-trench with a second gate polysilicon 52 and covering the inner wall with a second gate oxide layer 42; filling the second type of sub-trench with a gate metal 62; and in the transverse and longitudinal directions parallel to the cell surface, the second trench 32 is composed of alternating arrangements of the first type of sub-trench and the second type of sub-trench.

[0044] Specifically, the fabrication method of the reverse-conducting insulated-gate bipolar transistor of the present invention is as follows: Figure 4 As shown, it includes the following steps:

[0045] Step 1: Select an N-type epitaxial wafer (Epitaxy, EPI) as the N-type drift region 1.

[0046] As a preferred option, based on the electrical performance requirements of RC-IGBT devices, the crystal orientation is selected as follows: <100> The N-type drift region 1 has a resistivity of 60Ω*cm~150Ω*cm and a thickness of approximately 150μm.

[0047] Step Two, as follows Figure 5a As shown, N-type ion implantation is performed on the upper surface of the N-type drift region 1 to form an N-type carrier storage layer 2.

[0048] Preferably, the implanted ions in the N-type carrier storage layer 2 are phosphorus, the implantation energy is 100 keV~200 keV, and the implantation dose is 8.0E+12cm.-2 ~2.0E+13cm -2 .

[0049] Step 3, as follows Figure 5b As shown, a trench mask is used to etch the upper surface of the N-type drift region to form a first trench 31, a second trench 32, and a third trench 33. Through dry-wet-dry oxidation, a first gate oxide layer 41 is formed in the first trench 31, a second gate oxide layer 42 is formed in the second trench 32, and a third gate oxide layer 43 is formed in the third trench 33. Then, polysilicon is deposited in the first trench 31 to form a first gate polysilicon 51, polysilicon is deposited in a portion of the second trench 32 to form a second gate polysilicon 52, and polysilicon is deposited in the third trench 33 to form a third gate polysilicon 53.

[0050] Preferably, the dimensions of the first trench 31, the second trench 32, and the third trench 33 are between 0.5 μm and 0.8 μm; and the thicknesses of the first gate oxide layer 41, the second gate oxide layer 42, and the third gate oxide layer 43 are between 800 Å and 1200 Å.

[0051] Preferably, the thickness of the first gate polysilicon 51, the second gate polysilicon 52, and the third gate polysilicon 53 is 5000Å~10000Å.

[0052] Step 4: Remove part of the second gate oxide layer 52 in the second trench 32 and deposit gate metal 62; preferably, the gate metal 62 is selected from materials such as platinum, tungsten, and aluminum.

[0053] Step 5, as follows Figure 5c As shown, P-type boron ion implantation is performed on the upper surface of the N-type drift region 1 to form the P-type body region 6. The N-type source region photomask is used to perform N-type implantation on both sides of the first trench 31 to form the source region 7. After implantation, furnace tube annealing is performed.

[0054] Preferably, the injection concentration in P-type body region 6 is 3.0E+13cm. -2 ~5.0E+13cm -2 The injection energy is 60keV~80keV; in the annealing process, the annealing temperature is about 1150℃ and the annealing time is about 120min.

[0055] Preferably, the ion implantation region of the N-type source region 7 is formed on both sides of the first trench 31 using a photomask of the N-type source region 7 through a self-aligned photolithography process, and N-type ion implantation is performed on it to form the N-type source region 7, which serves as the emitter of the RC-IGBT device.

[0056] Step 6: Deposit an interlayer insulating dielectric layer 8 on the upper surface of the N-type carrier storage layer 2. The material is LPTEOS, USG, or silicon nitride, and the thickness is approximately 1000 Å to 1200 Å. Using the photomask of the contact hole 15, form the emitter contact hole 15 on the P-type body region 6, the second trench gate polysilicon, and the gate metal 62. Implant P-type ions into the emitter contact hole 15 to form an ohmic contact region 9. The P-type ions are boron, BF2, or a combination of boron and BF2.

[0057] Step 7: Sputter AlSiCu or AlCu metal into the emitter metal contact hole 15, with a thickness of 2.5μm~6μm, to form the emitter metal layer 10 of the RC-IGBT device, i.e., the emitter metal layer of the IGBT and the anode metal layer of the diode, as shown below. Figure 5d As shown; PA & PI are deposited, and photolithography and etching are performed to form a passivation layer;

[0058] Step 8, as Figure 5e As shown, the front side of the wafer is coated with a protective adhesive, the wafer is flipped over, and the back side of the wafer is thinned to a thickness of 110 μm to 140 μm. N-type phosphorus ions or H are implanted into the back side of the wafer to form an N-type buffer layer 11, with an implantation concentration of 1.0E+13cm. -2 ~3.0 E+13cm -2 The injected energy is 200 keV to 500 keV;

[0059] Step Nine, as Figure 5f As shown, the back side of the N-type first collector region 12 is ion implanted using a photomask to form the cathode of the diode; the implantation of the P-type second collector region 13 is a general implantation, implanting P-type boron ions to form the collector of the IGBT device.

[0060] Preferably, the implanted ions in the first current collector region 12 of the N-type are phosphorus transport elements, with an implantation energy of 40 keV~60 keV and an implantation concentration of 3.0E+14cm. -2 ~8.0E+14cm -2 .

[0061] Preferably, the injection energy of the P-type second collector region 13 is 20keV~40keV, and the injection concentration is 8.0E+12cm. -2 ~3.0E+13cm -2 After injection, it is activated by laser annealing. The laser annealing conditions are approximately 1000℃ / 15s.

[0062] Step 10, as follows Figure 5gAs shown, back gold is applied to the surfaces of the N-type first collector region 12 and the P-type second collector region 13 to form the collector metal layer 14 of the RC-IGBT device, that is, the collector metal layer of the IGBT and the cathode metal layer of the diode. The composition of the back gold is generally Al / Ti / Ni / Ag; the wafer is flipped over to remove the front protective adhesive.

[0063] This invention reduces the forward voltage drop Vcesat by adding lateral gate trenches, thereby reducing conduction losses; at the same time, it increases the current path, making the current distribution more uniform, thus reducing heat loss. Therefore, it improves the reliability and power density of the device.

[0064] Meanwhile, the emitter trenches repeatedly incorporate polysilicon gates and metal gates at horizontal and vertical intervals, forming regularly arranged diodes and Schottky diodes. This results in a more uniform current distribution in the reverse diodes, reducing current concentration and thus decreasing reverse heat loss. Furthermore, the added Schottky diodes have shorter reverse recovery times, further reducing reverse losses. Therefore, the device's reliability and power density are improved.

[0065] This invention is primarily applied to high power density RC-IGBT devices. The structure of the power RC-IGBT device is not limited to the structure mentioned in this invention; it can also be a superjunction IGBT, etc. The gate structure of the device of this invention can be a planar gate structure or a trench gate structure.

[0066] The above are merely preferred embodiments of the present invention and are not intended to limit the implementation methods and protection scope of the present invention. Those skilled in the art should recognize that any equivalent substitutions and obvious changes made using the content of this specification and illustrations should be included within the protection scope of the present invention.

Claims

1. A reverse-conducting insulated-gate bipolar transistor, comprising a plurality of cells, each cell comprising a plurality of cell trenches, characterized in that, The plurality of cell trenches include: At least one first trench, a plurality of second trenches, and at least one third trench, wherein the first trench is a gate trench, the second trenches are emitter trenches, and the third trench is an invalid gate trench; In the transverse direction parallel to the cell surface, the first trench, the second trench, and the third trench are arranged alternately, and the first trench and the third trench are connected by a fourth trench, which is a gate trench; in the longitudinal direction parallel to the cell surface, the second trench is located between two adjacent fourth trenches. In the transverse and longitudinal directions parallel to the cell surface, the second trench is composed of alternating first type sub-trenches and second type sub-trenches. The first type sub-trench is filled with second gate polysilicon and its inner wall is covered with a second gate oxide layer. The second type sub-trench is filled with gate metal.

2. The reverse-conducting insulated-gate bipolar transistor according to claim 1, characterized in that, The first trench is filled with a first gate polysilicon and its inner wall is covered with a first gate oxide layer, and the third trench is filled with a third gate polysilicon and its inner wall is covered with a third gate oxide layer.

3. The reverse-conducting insulated-gate bipolar transistor according to claim 1, characterized in that, The fourth groove has the same structure as the first groove.

4. The reverse-conducting insulated-gate bipolar transistor according to claim 1, characterized in that, The cell trenches are formed in a semiconductor substrate, the semiconductor substrate comprising: Drift region having a first conductivity type; A carrier storage layer having a first conductivity type is formed on the upper surface of the drift region; Each of the cell trenches extends downward from the surface of the carrier storage layer into the drift region.

5. The reverse-conducting insulated-gate bipolar transistor according to claim 4, characterized in that, Also includes: A body region having a second conductivity type is formed in the drift region; A source region having a first conductivity type is formed in the body region; An interlayer insulating dielectric layer is formed on the upper surface of the carrier storage layer, and contact holes corresponding to the body region, the second gate polysilicon, and the gate metal are formed in the interlayer insulating dielectric layer; An emitter metal layer is formed on the upper surface of the interlayer insulating dielectric layer and fills the contact hole; A buffer layer having a first conductivity type is formed on the lower surface of the drift region; A current collector region is formed on the lower surface of the buffer layer. The current collector region includes a first current collector region having a first conductivity type and a second current collector region having a second conductivity type, and the first current collector region and the second current collector region are arranged alternately. A collector metal layer is formed on the lower surface of the collector region.

6. The reverse-conducting insulated-gate bipolar transistor according to claim 5, characterized in that, An ohmic contact region is provided below the contact hole, and the implanted ions in the ohmic contact region are one or more combinations of boron and boron fluoride.

7. The reverse-conducting insulated-gate bipolar transistor according to claim 1, characterized in that, The gate metal is made of one or more combinations of platinum, tungsten, and aluminum.

8. A method for fabricating a reverse-conducting insulated-gate bipolar transistor, used to fabricate the reverse-conducting insulated-gate bipolar transistor as described in any one of claims 1-7, characterized in that, include: At least one first trench, a plurality of second trenches and at least one third trench are formed in a cell, wherein the first trench is a gate trench, the second trench is an emitter trench and the third trench is an invalid gate trench, and the first trench, the second trench and the third trench are arranged alternately in a transverse direction parallel to the cell surface. A fourth trench is formed in the cell, the fourth trench being a gate trench, the first trench and the third trench being connected through the fourth trench, and in the longitudinal direction parallel to the cell surface, the second trench is located between two adjacent fourth trenches.

9. The method for fabricating a reverse-conducting insulated-gate bipolar transistor according to claim 8, characterized in that, Also includes: A first type of sub-groove and a second type of sub-groove are formed in the unit cell; The first type of sub-trench is filled with a second gate polysilicon and the inner wall is covered with a second gate oxide layer; The second type of sub-trench is filled with gate metal; In the transverse and longitudinal directions parallel to the cell surface, the second groove is composed of alternating arrangements of the first type of sub-grooves and the second type of sub-grooves.

Images