A circuit and method for suppressing transient power-down current surges

Abstract

This invention primarily relates to the field of inrush current suppression technology. To suppress circuit damage caused by instantaneous inrush current during AC power outage recovery due to the capacitor voltage being significantly lower than the peak supply voltage, this invention provides a circuit and method for suppressing instantaneous power outage current inrushes. The core improvement is that a thermistor limits the inrush current during load startup, and after startup, the relay bypasses the thermistor to achieve low-loss operation. When the load is not running, the control chip comprehensively judges based on the amplitude and rate of change of the bus DC voltage: when the bus voltage is detected to be below a first threshold and the rate of decrease is too fast, it is determined to be an instantaneous power outage state, and the relay is actively disconnected and the thermistor is reconnected in series, thereby suppressing the inrush current that may be generated during voltage recovery; after the bus voltage stabilizes and rises back to a higher second threshold, the relay is controlled to smoothly engage, restoring the low-loss power supply mode.

Description

Technical Field

[0001] This invention relates to the field of surge current suppression technology, and in particular to a circuit and method for suppressing transient power failure current surges. Background Technology

[0002] In power electronic devices such as variable frequency air conditioners and servo drives, load startup and momentary voltage dips in the mains often trigger significant current surges. Traditional suppression methods typically employ a single negative temperature coefficient thermistor for current limiting. While simple in structure, this thermistor remains connected in series in the circuit after load startup or when the mains voltage recovers, leading to unnecessary power loss and heat generation, thus reducing overall system efficiency. Furthermore, when the mains experiences a momentary power outage followed by rapid recovery, the residual voltage on the bus capacitor can cause an excessively large potential difference across the relay. If the relay is directly activated at this time, a huge inrush current will be generated, potentially damaging power devices or triggering upstream protection, affecting the system's stability and reliability. Summary of the Invention

[0003] In order to suppress circuit damage caused by the instantaneous inrush current generated during the AC power failure recovery process due to the capacitor voltage being significantly lower than the peak supply voltage, the present invention provides a circuit and method for suppressing the instantaneous power failure current inrush.

[0004] The technical solution adopted by the present invention to solve the above-mentioned technical problems is as follows:

[0005] On one hand, the present invention provides a circuit for suppressing transient power failure current surges, the circuit comprising: a DC voltage detection unit, a control chip, a thermistor, and a relay;

[0006] One end of the thermistor is connected to the AC power supply, the normally open contact of the relay is connected in parallel with the thermistor, and the DC voltage detection unit is used to detect the DC voltage of the bus.

[0007] The control chip is connected to the coil of the relay and the output of the DC voltage detection unit, respectively. The control chip is used to control the relay to open when the load starts, to supply power through the thermistor, and to control the relay to open or close when the load is not running, based on the comparison result of the bus DC voltage and the set voltage threshold and the rate of change of the bus DC voltage.

[0008] Furthermore, when the load is not running, the control chip controls the relay to engage or disengage based on the comparison between the bus DC voltage and the set voltage threshold, as well as the rate of change of the bus DC voltage, including:

[0009] If the DC voltage detection unit detects that the duration of the bus DC voltage being lower than the first voltage threshold reaches the first preset time, and the rate of decrease of the bus DC voltage exceeds the set speed threshold, the control chip controls the relay to disconnect and supplies power through the thermistor.

[0010] If the DC voltage detection unit detects that the DC voltage of the bus reaches the second voltage threshold and the duration reaches the second preset time, it controls the relay to re-engage and switches back to power supply via the relay; wherein, the second voltage threshold is greater than the first voltage threshold.

[0011] Furthermore, the thermistor is a PTC thermistor.

[0012] Furthermore, the circuit also includes a load detection unit, which is connected to the control chip and is used to detect the operating status of the load.

[0013] Furthermore, the circuit also includes: a rectifier filter unit and an inverter unit;

[0014] The AC input terminal of the rectifier and filter unit is connected to the AC power supply through a parallel branch of a thermistor and a relay, and the DC output terminal of the rectifier and filter unit is connected to the DC bus capacitor.

[0015] The DC input terminal of the inverter unit is connected to the DC output terminal of the rectifier and filter unit, and the AC output terminal of the inverter unit is connected to the load.

[0016] Furthermore, the circuit also includes an overcurrent protector connected in series between the AC input terminal and the relay.

[0017] Furthermore, the circuit also includes a freewheeling diode, the cathode and anode of which are connected to the two ends of the relay coil, respectively, to provide a freewheeling path for powering the control chip when the relay coil is de-energized.

[0018] On the other hand, the present invention also provides a method for suppressing transient power failure current surges, comprising the following steps:

[0019] S1: Upon initial power-on, the control chip controls the relay to disconnect, and power is supplied through the thermistor. After power-on, the control chip controls the relay to engage, and power is supplied through the relay.

[0020] S2: Detect the load operating status. If the load is not running, the DC bus voltage is obtained in real time through the DC voltage detection unit. If the DC bus voltage is lower than the first voltage threshold for a period of time that reaches the first preset time, and the rate of decrease of the DC bus voltage exceeds the set speed threshold, the control chip controls the relay to disconnect and supplies power through the thermistor.

[0021] S3: After the relay is disconnected, monitor the DC bus voltage value. When the DC bus voltage value is greater than the second voltage threshold and the duration reaches the second preset time, control the relay to activate and supply power through the relay; wherein, the second voltage threshold is greater than the first voltage threshold.

[0022] Furthermore, after power-on in S1, when the third preset time is reached, the control chip controls the relay to engage and supply power through the relay; after the relay is disconnected in S3 for the fourth preset time, the DC bus voltage value is monitored.

[0023] Furthermore, the detection of load operating status in S2 includes: detecting the load drive signal output by the control chip, or the output current of the load current detection circuit; when the detected load drive signal or output current is lower than a preset threshold, the load is not running.

[0024] The beneficial effects of this invention are:

[0025] (1) It can accurately distinguish between normal load shutdown and instantaneous power grid failure, avoid malfunctions after instantaneous power failure, effectively suppress the inrush current at the moment of voltage recovery, and improve the safety and anti-interference capability of the circuit.

[0026] (2) The relay remains engaged during normal load operation, bypassing the thermistor, eliminating unnecessary power loss and helping to improve overall efficiency. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of a circuit structure for suppressing transient power failure current surges according to the present invention;

[0028] Figure 2 This is a flowchart of a method for suppressing transient power failure current surges according to the present invention. Detailed Implementation

[0029] Because existing technologies suffer from the problem of suppressing large inrush currents during standby AC power outages and subsequent power-on, this invention provides a circuit and method for suppressing inrush currents during power outages. The core improvement of this solution is that a thermistor limits the inrush current during load startup, and after startup, the relay bypasses the thermistor to achieve low-loss operation. When the load is not running, the control chip does not simply control the on / off state based on voltage amplitude, but rather makes a comprehensive judgment based on the amplitude and rate of change of the bus DC voltage: when the bus voltage is detected to be below a first threshold and the rate of decrease is too rapid, it is determined to be a momentary power outage state, and the relay is actively disconnected and the thermistor is reconnected, thereby suppressing the inrush current that may be generated when the voltage recovers; after the bus voltage stabilizes and rises to a higher second threshold, the relay is controlled to smoothly engage, restoring the low-loss power supply mode.

[0030] Compared to the traditional method of using thermistors only when powered on, this approach optimizes the circuit structure and control chip logic, switching the power supply path between relays and thermistors based on the current DC voltage value. On one hand, it fully utilizes the thermistor's ability to suppress high currents, reducing the direct impact of large current surges caused by short-term power outages during prolonged standby on downstream circuits and preventing device damage. On the other hand, the DC voltage value is involved in the control; when the DC voltage is high, keeping the relay engaged allows the circuit to quickly return to its operating state, saving circuit power.

[0031] The technical solution of the present invention will be further described below with reference to the accompanying drawings, but the scope of protection of the present invention is not limited to the following embodiments.

[0032] This embodiment provides a circuit for suppressing transient power failure current surges, such as... Figure 1 As shown, it includes a DC bus voltage detection circuit, a control chip, a relay K1, and a thermistor R101.

[0033] Thermistor R101 is a PTC thermistor. One end of thermistor R101 is connected to the AC power supply (L, N). Relay K1 includes a coil and a normally open contact. The normally open contact of relay K1 is connected in parallel with thermistor R101 to form a parallel power supply branch. The DC voltage detection unit is connected across the DC capacitor on the bus to collect the DC voltage signal (Vdc) of the bus in real time.

[0034] In this embodiment, the control chip is a microcontroller with analog-to-digital conversion capability. The DC voltage detection unit consists of a voltage divider network composed of resistors one through five, which converts the high voltage of the bus into a low voltage signal suitable for acquisition by the control chip.

[0035] The circuit operates as follows: At the moment of load startup, the control chip keeps relay K1 open, and current flows through the thermistor R101 to supply power to the subsequent circuits. Thermistor R101 is in a high-resistance state, suppressing the inrush current generated during startup by charging the bus capacitor. After power-on, the control chip activates relay K1, closing its normally open contacts and short-circuiting thermistor R101. Current then flows through the low-impedance relay K1 contacts, thus eliminating power loss in thermistor R101 during normal operation.

[0036] When the load stops operating, the DC voltage detection unit continuously monitors the DC voltage of the bus. If a momentary power outage occurs, the bus voltage will drop rapidly. The control chip calculates the rate of voltage drop in real time and compares it to a set speed threshold. When the bus voltage is detected to be below the first voltage threshold and this state lasts for a first preset time, and the rate of voltage drop exceeds the set speed threshold, the control chip determines that a momentary power outage has occurred and immediately controls relay K1 to disconnect. At this time, the circuit switches back to the power supply path of the thermistor R101, preparing for recharging when the grid voltage recovers.

[0037] When the grid voltage recovers, the bus voltage begins to rise. The control chip continuously monitors the bus voltage value. When it detects that the bus voltage has reached a second voltage threshold higher than the first voltage threshold, and this state lasts for a second preset time, the control chip determines that the grid has been stably restored. Then, it controls the relay K1 to re-engage, bypassing the thermistor R101 again, and restoring the high-efficiency power supply mode.

[0038] In another embodiment of the present invention, the circuit further includes an overcurrent protector (FPC), a load detection unit, a rectifier filter unit, an inverter unit, and an overcurrent protector.

[0039] The overcurrent protector is located between the AC input terminal and the relay K1 and is used for overcurrent fault protection.

[0040] The freewheeling diode VD3 has its cathode and anode connected to both ends of the relay coil, respectively, to provide a freewheeling path when the relay coil is de-energized, thus protecting the control chip.

[0041] The AC input terminal of the rectifier and filter unit is connected to the AC power supply through the parallel branch of the thermistor R101 and the relay K1, and the DC output terminal of the rectifier and filter unit is connected to the DC bus capacitor C101.

[0042] The DC input terminal of the inverter unit is connected to the DC output terminal of the rectifier and filter unit, and the AC output terminal of the inverter unit is connected to the compressor load.

[0043] The load detection unit is connected to the control chip and is used to detect the actual operating status of the load. This load detection unit can be connected to the current detection circuit on the load side, or it can detect the load drive signal output by the control chip itself.

[0044] When the load detection unit detects the disappearance of the load drive signal or the load current falling below a preset threshold, it determines that the load is not running, and the control chip initiates the aforementioned instantaneous power failure detection and protection program. When the load is running, even if the bus voltage fluctuates, the control chip keeps relay K1 engaged, ensuring that the stable power supply to the load is not affected. By introducing the load operating status as a pre-judgment condition, the accuracy of the control logic is further improved, avoiding maloperation of relay K1 due to normal fluctuations in bus voltage during normal load speed regulation.

[0045] Based on the circuit described above for suppressing transient power failure current surges, the present invention also provides a method for suppressing transient power failure current surges, such as... Figure 2 As shown, the method includes:

[0046] S1: Upon initial power-on, the control chip controls relay K1 to disconnect, and current flows through the thermistor R101 to supply power to the rectifier filter unit and inverter unit, limiting the startup inrush current. After power-on, when the third preset time is reached, the control chip controls relay K1 to engage, supplying power through relay K1.

[0047] S2: The load operating status is determined by detecting the load drive signal output by the control chip or the output current of the load current detection circuit. If the detected load drive signal or output current is lower than a preset threshold, it is determined that the load is not running. If the load is not running, the DC bus voltage is obtained in real time through the DC voltage detection unit; if the duration of the DC bus voltage being lower than the first voltage threshold reaches the first preset time, and the rate of decrease of the DC bus voltage exceeds the set speed threshold, the control chip controls the relay K1 to open, and power is supplied through the thermistor R101 to prevent inrush current when the power grid is restored.

[0048] S3: After relay K1 is disconnected, the control chip begins monitoring the recovery of the bus DC voltage. Since a certain arc-suppression time is required after relay K1 is disconnected, in this embodiment, formal monitoring of the bus voltage value only begins after the relay K1 disconnection time has reached the fourth preset time. When the monitored bus DC voltage value is greater than the second voltage threshold, and this state lasts for the second preset time, the control chip determines that the power grid has stabilized and recovered. Therefore, it controls relay K1 to re-engage, switching back to the mode powered by relay K1, and the system returns to a low-loss standby or operating state.

[0049] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art can make various improvements and modifications without departing from the spirit and principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A circuit for suppressing transient power outage current surges, characterized in that, The circuit includes: a DC voltage detection unit, a control chip, a thermistor, and a relay; One end of the thermistor is connected to the AC power supply, the normally open contact of the relay is connected in parallel with the thermistor, and the DC voltage detection unit is used to detect the DC voltage of the bus. The control chip is connected to the coil of the relay and the output of the DC voltage detection unit, respectively. The control chip is used to control the relay to open when the load starts, to supply power through the thermistor, and to control the relay to open or close when the load is not running, based on the comparison result of the bus DC voltage and the set voltage threshold and the rate of change of the bus DC voltage.

2. The circuit for suppressing transient power failure current surges according to claim 1, characterized in that, When the load is not running, the control chip controls the relay to engage or disengage based on the comparison between the bus DC voltage and the set voltage threshold, as well as the rate of change of the bus DC voltage. This includes: If the DC voltage detection unit detects that the duration of the bus DC voltage being lower than the first voltage threshold reaches the first preset time, and the rate of decrease of the bus DC voltage exceeds the set speed threshold, the control chip controls the relay to disconnect and supplies power through the thermistor. If the DC voltage detection unit detects that the DC voltage of the bus reaches the second voltage threshold and the duration reaches the second preset time, it controls the relay to re-engage and switches back to power supply via the relay; wherein, the second voltage threshold is greater than the first voltage threshold.

3. A circuit for suppressing transient power-down current surges according to claim 1 or 2, characterized in that, The thermistor is a PTC thermistor.

4. A circuit for suppressing transient power-down current surges according to claim 1 or 2, characterized in that, The circuit also includes a load detection unit, which is connected to the control chip and is used to detect the operating status of the load.

5. A circuit for suppressing transient power-down current surges according to claim 1 or 2, characterized in that, The circuit also includes: a rectifier filter unit and an inverter unit; The AC input terminal of the rectifier and filter unit is connected to the AC power supply through a parallel branch of a thermistor and a relay, and the DC output terminal of the rectifier and filter unit is connected to the DC bus capacitor. The DC input terminal of the inverter unit is connected to the DC output terminal of the rectifier and filter unit, and the AC output terminal of the inverter unit is connected to the load.

6. A circuit for suppressing transient power-down current surges according to claim 1 or 2, characterized in that, The circuit also includes an overcurrent protector connected in series between the AC input terminal and the relay.

7. A circuit for suppressing transient power-down current surges according to claim 1 or 2, characterized in that, The circuit also includes a freewheeling diode, whose cathode and anode are connected to the two ends of the relay coil, respectively, to provide a freewheeling path to power the control chip when the relay coil is de-energized.

8. A method for suppressing transient power failure current surges, applied to a circuit for suppressing transient power failure current surges as described in any one of claims 1-7, characterized in that, Includes the following steps: S1: Upon initial power-on, the control chip controls the relay to disconnect, and power is supplied through the thermistor. After power-on, the control chip controls the relay to engage, and power is supplied through the relay. S2: Detect the load operating status. If the load is not running, the DC bus voltage is obtained in real time through the DC voltage detection unit. If the DC bus voltage is lower than the first voltage threshold for a period of time that reaches the first preset time, and the rate of decrease of the DC bus voltage exceeds the set speed threshold, the control chip controls the relay to disconnect and supplies power through the thermistor. S3: After the relay is disconnected, monitor the DC bus voltage value. When the DC bus voltage value is greater than the second voltage threshold and the duration reaches the second preset time, control the relay to activate and supply power through the relay; wherein, the second voltage threshold is greater than the first voltage threshold.

9. A method for suppressing transient power failure current surges according to claim 8, characterized in that, After power-on in S1, when the third preset time is reached, the control chip controls the relay to engage and supply power through the relay; after the relay is disconnected in S3 for the fourth preset time, the DC bus voltage value is monitored.

10. A method for suppressing transient power failure current surges according to claim 8, characterized in that, The detection of load operating status in S2 includes: detecting the load drive signal output by the control chip, or the output current of the load current detection circuit; when the detected load drive signal or output current is lower than a preset threshold, the load is not running.

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