Oscillator circuit with withstand voltage mechanism
By using a transistor electrically coupled to the second power supply voltage as a switching element in the oscillation circuit, and forming a high-frequency, low-impedance path through a bypass capacitor, the problem of component damage caused by excessive voltage across the oscillation circuit is solved, achieving a balance between phase noise and withstand voltage.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- REALTEK SEMICON CORP
- Filing Date
- 2024-11-25
- Publication Date
- 2026-05-26
AI Technical Summary
Existing oscillator circuits are prone to damaging internal components due to excessive voltage across the circuit when reducing phase noise, making it difficult to balance the requirements of phase noise and component withstand voltage.
A transistor electrically coupled to the second power supply voltage is used as a switching element, and a high-frequency, low-impedance path is formed between the first and second power supply voltages through a bypass capacitor to build a withstand voltage mechanism to avoid excessive voltage across the switching element, while maintaining the ability to reduce phase noise.
While avoiding excessive voltage across the switching elements, it maintains the efficiency of reducing phase noise and improves the withstand voltage performance of the oscillation circuit.
Smart Images
Figure CN122092800A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to oscillation circuit technology, and more particularly to an oscillation circuit with a voltage withstand mechanism. Background Technology
[0002] An oscillating circuit, particularly a capacitive-inductive oscillating circuit, is a circuit that comprises electrically coupled capacitors and inductors and operates based on oscillation effects. Oscillating circuits are widely used in, for example, but not limited to, oscillators, filters, tuners, and mixer circuits.
[0003] Oscillating circuits often include circuitry to reduce phase noise. However, this phase noise reduction circuitry may be susceptible to damage from excessive voltage surges during operation. If the voltage and current applied to this circuitry are reduced to avoid excessive voltage surges, the phase noise reduction performance of this circuitry will be affected. Therefore, circuit designers face a challenge in balancing the requirements for phase noise reduction and component withstand voltage. Summary of the Invention
[0004] In view of the problems of the prior art, one object of the present invention is to provide an oscillation circuit with a withstand voltage mechanism to improve the prior art.
[0005] This invention includes an oscillation circuit with a withstand voltage mechanism, comprising: an inductor circuit, a cross-coupled transistor circuit, a capacitor circuit, and a first source degeneration circuit. The inductor circuit is electrically coupled to a pair of oscillation output terminals. The cross-coupled transistor circuit is electrically coupled between the pair of oscillation output terminals and a first terminal. The capacitor circuit is electrically coupled between the pair of oscillation output terminals. The first source degeneration circuit includes: a first inductor, a first capacitor, a second capacitor, and a first source degeneration transistor. The first inductor is electrically coupled between the first terminal and a first power supply voltage. The first capacitor is electrically coupled between the first terminal and a second terminal. The second capacitor is electrically coupled between the first power supply voltage and a third terminal, wherein the third terminal is electrically coupled to a second power supply voltage. The first source degeneration transistor is electrically coupled between the second and third terminals and is turned on by a first feed voltage.
[0006] The features, implementation, and technical effects of this disclosure are described in detail below with reference to the accompanying drawings. Attached Figure Description
[0007] Figure 1 A circuit diagram of an oscillating circuit with a voltage withstand mechanism is shown in one embodiment of the present invention; and
[0008] Figure 2This invention shows a circuit diagram of an oscillating circuit with a voltage withstand mechanism, according to one embodiment of the present invention.
[0009] Symbol Explanation
[0010] 100: Oscillating circuit
[0011] 110: Inductor circuit
[0012] 120: Cross-coupled transistor circuit
[0013] 130: Capacitor Circuit
[0014] 140: First source degradation circuit
[0015] 200: Oscillator Circuit
[0016] 210: Cross-coupled transistor circuit
[0017] 220: Second source degradation circuit
[0018] CS1: First capacitor
[0019] CS2: Second capacitor
[0020] CS3: Third capacitor
[0021] L1: Inductor
[0022] L2: Inductor
[0023] LS1: First Inductor
[0024] LS2: Second Inductor
[0025] MN1: First transistor
[0026] MN2: Second transistor
[0027] MP1: First Transistor
[0028] MP2: Second transistor
[0029] MS1: First source degenerate transistor
[0030] MS2: Second source degenerate transistor
[0031] OT1, OT2: Oscillation output terminals
[0032] TR1: First endpoint
[0033] TR2: Second Endpoint
[0034] TR3: Third Endpoint
[0035] TR4: Fourth Endpoint
[0036] TR5: Fifth Endpoint
[0037] VDD1: First power supply voltage
[0038] VDD2: Second power supply voltage
[0039] VF1: First feed voltage
[0040] VF2: Second feed voltage Detailed Implementation
[0041] One object of the present invention is to provide an oscillation circuit that uses a transistor electrically coupled to a second power supply voltage as a switching element in a source degradation circuit, and forms a high-frequency, low-impedance path between the first power supply voltage and the second power supply voltage by setting a bypass capacitor, so that the source degradation circuit can maintain the efficiency of reducing phase noise while avoiding excessive voltage across the switching element.
[0042] Please refer to Figure 1 . Figure 1 This diagram shows a circuit diagram of an oscillator circuit 100 with a withstand voltage mechanism according to one embodiment of the present invention. The oscillator circuit 100 operates based on the voltage difference between a first power supply voltage VDD1 and a second power supply voltage VDD2, wherein the second power supply voltage VDD2 is ground potential in one embodiment. The oscillator circuit 100 includes: an inductor circuit 110, a cross-coupled transistor circuit 120, a capacitor circuit 130, and a first source degeneration circuit 140.
[0043] Inductor circuit 110 is electrically coupled to a pair of oscillation output terminals OT1 and OT2. In this embodiment, inductor circuit 110 is electrically coupled between oscillation output terminals OT1 and OT2 and the second power supply voltage VDD2. Figure 1 In the diagram, the inductor circuit 110 is shown as comprising an inductor L1 electrically coupled between the oscillation output terminal OT1 and the second power supply voltage VDD2, and an inductor L2 electrically coupled between the oscillation output terminal OT2 and the second power supply voltage VDD2. In practice, the inductor circuit 110 can be optionally implemented using a single inductor coil to achieve the equivalent circuit. Figure 1 The inductors L1 and L2 can be implemented by two coils, for example, but not limited to, twin inductors.
[0044] The cross-coupled transistor circuit 120 is electrically coupled between the oscillation output terminals OT1 and OT2 and the first terminal TR1.
[0045] The cross-coupled transistor circuit 120 includes a first transistor MP1 and a second transistor MP2. In this embodiment, the first transistor MP1 and the second transistor MP2 are both P-type transistors. However, the present invention is not limited thereto.
[0046] The first transistor MP1 has a first drain electrically coupled to a first oscillation output terminal (e.g., oscillation output terminal OT1) connected to oscillation output terminals OT1 and OT2, and a first source electrically coupled to a first terminal TR1. The second transistor MP2 has a second drain electrically coupled to a second oscillation output terminal (e.g., oscillation output terminal OT2) connected to oscillation output terminals OT1 and OT2, and a second source electrically coupled to the first terminal TR1. The first gate of the first transistor MP1 is electrically coupled to the second oscillation output terminal (e.g., oscillation output terminal OT2), and the second gate of the second transistor MP2 is electrically coupled to the first oscillation output terminal (e.g., oscillation output terminal OT1).
[0047] Capacitor circuit 130 is electrically coupled between the oscillation output terminals OT1 and OT2. Figure 1 For simplicity, the capacitor circuit 130 is shown as a block. However, in one embodiment, the capacitor circuit 130 may be a switching capacitor array or multiple voltage-controlled capacitors (not shown), and may optionally include an output buffer circuit (not shown). In another embodiment, the capacitor circuit 130 includes at least one metal-oxide-metal capacitor (MOMCAP).
[0048] The first source degradation circuit 140 includes: a first inductor LS1, a first capacitor CS1, a second capacitor CS2, and a first source degradation transistor MS1.
[0049] The first inductor LS1 is electrically coupled between the first terminal TR1 and the first power supply voltage VDD1. The first capacitor CS1 is electrically coupled between the first terminal TR1 and the second terminal TR2. The second capacitor CS2 is electrically coupled between the first power supply voltage VDD1 and the third terminal TR3, wherein the third terminal TR3 is electrically coupled to the second power supply voltage VDD2.
[0050] The first source degradation transistor MS1 is electrically coupled between the second terminal TR2 and the third terminal TR3, and is turned on by a first feed voltage VF1. In this embodiment, the first source degradation transistor MS1 is implemented as a P-type transistor. However, the present invention is not limited thereto.
[0051] In the above structure, the inductor circuit 110 is used to resonate with the capacitor circuit 130 to jointly determine the main resonant inductor of the resonant frequency. The cross-coupled transistor circuit 120 is used to provide the negative resistance required for oscillation.
[0052] The first source degradation circuit 140 is configured to resonate to reduce phase noise. In one embodiment, such as when the resonant frequency of the inductor circuit 110 is F, the first source degradation circuit 140 preferably has a resonant frequency of 2F.
[0053] In the components included in the first source degradation circuit 140, the second capacitor CS2 will serve as a bypass capacitor, forming a high-frequency, low-impedance path between the first power supply voltage VDD1 and the grounded third terminal TR3, so that the first inductor LS1, the first capacitor CS1, and the first source degradation transistor MS1 form a resonant circuit.
[0054] When the first capacitance value of the first capacitor CS1 is C1 and the second capacitance value of the second capacitor CS2 is C2, the equivalent series capacitance of the first capacitor CS1 and the second capacitor CS2 will be (C1×C2) / (C1+C2). In one embodiment, the second capacitance value C2 is much larger than the first capacitance value C1, so that the equivalent series capacitance of the first capacitor CS1 and the second capacitor CS2 is close to the first capacitance value C1. In one embodiment, "close" means that the difference between the equivalent capacitance value and the first capacitance value C1 is less than a threshold value, and can be regarded as equal.
[0055] In some technologies, the switching elements used in source degradation circuits that incorporate inductors and capacitors to initiate oscillations are susceptible to damage from excessive voltage across the source. Conversely, if the power supply voltage is reduced to avoid excessive voltage across the switching elements, the ability of the source degradation circuit to reduce phase noise will decrease.
[0056] The oscillation circuit of the present invention uses a transistor electrically coupled to the second power supply voltage as a switching element in the source degradation circuit, and forms a high-frequency, low-impedance path between the first power supply voltage and the second power supply voltage by setting a bypass capacitor, so that the source degradation circuit can maintain the efficiency of reducing phase noise while avoiding excessive voltage across the switching element.
[0057] Please refer to Figure 2 . Figure 2 This diagram shows a circuit diagram of an oscillating circuit 200 with a voltage withstand mechanism, according to one embodiment of the present invention.
[0058] The oscillation circuit 200 also operates based on the voltage difference between the first power supply voltage VDD1 and the second power supply voltage VDD2, and also includes an inductor circuit 110, a cross-coupled transistor circuit 120, a capacitor circuit 130, and a first source degradation circuit 140. The following paragraphs will not be related to... Figure 1 The structure and operation of the same components are described.
[0059] In this embodiment, the oscillation circuit 200 further includes a cross-coupled transistor circuit 210 and a second source degradation circuit 220.
[0060] The cross-coupled transistor circuit 210 is electrically coupled between the oscillation output terminals OT1 and OT2 and the fourth terminal TR4.
[0061] More specifically, in this embodiment, the cross-coupled transistor circuit 210 includes a first transistor MN1 and a second transistor MN2. In this embodiment, the first transistor MN1 and the second transistor MN2 may each be implemented by an N-type transistor. However, the present invention is not limited thereto.
[0062] The first transistor MN1 has a first drain electrically coupled to the first oscillation output terminal (e.g., oscillation output terminal OT1) of the oscillation output terminals OT1 and OT2, and a first source electrically coupled to the fourth terminal TR4. The second transistor MN2 has a second drain electrically coupled to the second oscillation output terminal (e.g., oscillation output terminal OT2) of the oscillation output terminals OT1 and OT2, and a second source electrically coupled to the fourth terminal TR4. The first gate of the first transistor MN1 is electrically coupled to the second oscillation output terminal (e.g., oscillation output terminal OT2), and the second gate of the second transistor MN2 is electrically coupled to the first oscillation output terminal (e.g., oscillation output terminal OT1).
[0063] The cross-coupled transistor circuit 210 and the cross-coupled transistor circuit 120 will actually form a pair of complementary metal-oxide-semiconductor (CMOS) transistors.
[0064] The second source degradation circuit 220 is electrically coupled between the fourth terminal TR4 and the second power supply voltage VDD2.
[0065] More specifically, in this embodiment, the second source degradation circuit 220 includes a second inductor LS2, a third capacitor CS3, and a second source degradation transistor MS2. The second inductor LS2 is electrically coupled between a fourth terminal TR4 and a second power supply voltage VDD2. The third capacitor CS3 is electrically coupled between the fourth terminal TR4 and a fifth terminal TR5. The second source degradation transistor MS2 is electrically coupled between the fifth terminal TR5 and the second power supply voltage VDD2, and is turned on under the control of a second feed voltage VF2. In this embodiment, the second source degradation transistor MS2 is implemented using a P-type transistor. However, the present invention is not limited thereto.
[0066] The second source degradation circuit 220 is structurally similar to the first source degradation circuit 140. However, since the second power supply voltage VDD2 is, for example, ground, the second source degradation transistor MS2 does not need to be electrically coupled to the second power supply voltage VDD2 through an additional bypass capacitor. Therefore, the second source degradation circuit 220 can be identical to the first source degradation circuit 140, achieving the technical effect of reducing phase noise during resonance. Further details will not be elaborated here.
[0067] It should be noted that the above-described implementation is merely an example. In other embodiments, those skilled in the art can make modifications without departing from the spirit of the invention.
[0068] In summary, the oscillation circuit of this invention uses a transistor electrically coupled to the second power supply voltage as a switching element within the source degradation circuit, and forms a high-frequency, low-impedance path between the first and second power supply voltages by setting a bypass capacitor, so that the source degradation circuit can maintain the efficiency of reducing phase noise while avoiding excessive voltage across the switching element.
[0069] Although the embodiments of this disclosure are described above, these embodiments are not intended to limit this disclosure. Those skilled in the art can make changes to the technical features of this disclosure based on its express or implied content. All such changes may fall within the scope of patent protection sought by this disclosure. In other words, the scope of patent protection of this disclosure shall be determined by the claims of this specification.
Claims
1. An oscillation circuit with a voltage holding mechanism, comprising: an inductive circuit electrically coupled between a pair of oscillation output terminals; a cross-coupled transistor circuit electrically coupled between the pair of oscillation output terminals and a first terminal; a capacitor circuit electrically coupled between the pair of oscillation output terminals; and a first source degeneration circuit, comprising: a first inductor electrically coupled between the first terminal and a first supply voltage; a first capacitor electrically coupled between the first terminal and a second terminal; a second capacitor electrically coupled between the first supply voltage and a third terminal, wherein the third terminal is electrically coupled to a second supply voltage; and a first source degeneration transistor electrically coupled between the second terminal and the third terminal and controlled to turn on by a first feed-in voltage.
2. The oscillation circuit of claim 1, wherein the cross-coupled transistor circuit comprises: a first transistor having a first drain electrically coupled to a first oscillation output terminal of the pair of oscillation output terminals and a first source electrically coupled to the first terminal; and a first transistor having a first drain electrically coupled to a first oscillation output of the pair of oscillation outputs and a first source electrically coupled to the first terminal; a second transistor having a second drain electrically coupled to a second oscillation output terminal of the pair of oscillation output terminals and a second source electrically coupled to the first terminal; wherein a first gate of the first transistor is electrically coupled to the second oscillation output terminal and a second gate of the second transistor is electrically coupled to the first oscillation output terminal.
3. The oscillation circuit of claim 1, wherein the inductive circuit is electrically coupled between the pair of oscillation output terminals and the second supply voltage.
4. The oscillation circuit of claim 1, further comprising: a cross-coupled transistor circuit electrically coupled between the pair of oscillation output terminals and a fourth terminal; and a second source degeneration circuit electrically coupled between the fourth terminal and the second supply voltage.
5. The oscillation circuit of claim 4, wherein the cross-coupled transistor circuit comprises: a first transistor having a first drain electrically coupled to a first oscillation output terminal of the pair of oscillation output terminals and a first source electrically coupled to the fourth terminal; and a second transistor having a second drain electrically coupled to a second oscillation output terminal of the pair of oscillation output terminals and a second source electrically coupled to the fourth terminal; wherein a first gate of the first transistor is electrically coupled to the second oscillation output terminal and a second gate of the second transistor is electrically coupled to the first oscillation output terminal.
6. The oscillation circuit of claim 4, wherein the second source degeneration circuit comprises: a second inductor electrically coupled between the fourth terminal and the second supply voltage; a third capacitor electrically coupled between the fourth terminal and a fifth terminal; and a second source degeneration transistor electrically coupled between the fifth terminal and the second supply voltage and controlled to turn on by a second feed-in voltage.
7. The oscillation circuit of claim 1, wherein a first capacitance value of the first capacitor is C1, a second capacitance value of the second capacitor is C2, and an equivalent series capacitance value of the first capacitor and the second capacitor is (C1xC2) / (C1+C2).
8. The oscillation circuit of claim 7, wherein the second capacitance value is greater than the first capacitance value such that the equivalent series capacitance value of the first capacitor and the second capacitor is close to the first capacitance value. 9. The oscillator circuit of claim 1, wherein the capacitance circuit is a switched capacitance array or a plurality of voltage controlled capacitors, and optionally includes an output buffer circuit.
10. The oscillator circuit of claim 9, wherein the capacitance circuit includes at least one metal-oxide-metal capacitor.