A method and apparatus for synchronously detecting an output image, an electronic device, and a medium

Abstract

Embodiments of the present application disclose a method and device for synchronously detecting output images, electronic equipment and a medium. The method comprises: in response to a frame synchronization signal and a unit pixel group synchronization signal of an image decoding output device, receiving at least two target images output by the image decoding output device; wherein the unit pixel group synchronization signal comprises a horizontal synchronization signal or a vertical synchronization signal; dividing each unit pixel group of the at least two target images into a preset number of cache pixel groups for caching, and recording the time stamp of each cache pixel group; and according to the time stamp, detecting whether the corresponding cache pixel groups in the at least two target images are synchronized. The above scheme can cache the images before displaying by setting a cache space, and determine whether the at least two output images are synchronized according to the cached time stamp, thereby solving the problems of low efficiency and low accuracy of the current scheme which requires manual observation and only uses synchronization signals for judgment.

Description

Technical Field

[0001] This application relates to the field of image data synchronization detection technology, and in particular to a method, apparatus, electronic device and medium for synchronous detection of output images. Background Technology

[0002] Currently, based on diverse user needs, multiple image data streams can be stitched together for display. When displaying multiple images on a screen, the requirement for synchronous display of multiple images must be met. That is, the corresponding images of the same frame should be displayed on the screen simultaneously, and the scanning progress of each row or column should also be synchronized to ensure good display effects and avoid the problem that some images are fully scanned and displayed, while others are only scanned and displayed in a portion of the area, leaving other areas undisplayed.

[0003] Current solutions to the above problems include relying on the user's visual observation of the display effect to determine whether the images in each image area are displayed synchronously, and whether the row and column scanning is synchronized. However, this method is inefficient, inaccurate, and time-consuming. Alternatively, the synchronization signal of the image output device can be used to determine whether each image is output synchronously, and thus whether each image can be displayed synchronously, or images with different colors in adjacent frames can be generated for subsequent judgment. However, the above solutions can only roughly determine whether each image is frame synchronized, and cannot determine whether the initial phase is synchronized or the row synchronization status. Summary of the Invention

[0004] This application provides a method, apparatus, electronic device, and medium for detecting the synchronization of output images, so as to accurately determine the frame synchronization, initial phase synchronization, and row and column synchronization of each image by using the timestamps recorded when the target image is cached.

[0005] According to one aspect of this application, a method for synchronous detection of an output image is provided, the method comprising:

[0006] In response to the frame synchronization signal and the unit pixel group synchronization signal of the image decoding output device, the system receives at least two target images output by the image decoding output device; wherein the unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal.

[0007] For at least two target images, each unit pixel group is divided into cache pixel groups according to a preset number of unit pixel groups, and the timestamp of each cache pixel group is recorded.

[0008] Based on the timestamp, detect whether the corresponding cached pixel groups in at least two target images are synchronized.

[0009] According to one aspect of this application, a synchronous detection device for output images is provided, the device comprising:

[0010] An image receiving module is configured to receive at least two target images output by an image decoding output device in response to a frame synchronization signal and a unit pixel group synchronization signal; wherein the unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal.

[0011] The caching module is used to cache the pixel groups of at least two target images into cache pixel groups according to a preset number of pixel groups, and record the timestamp of each cache pixel group.

[0012] The synchronization detection module is used to detect whether the corresponding cached pixel groups in at least two target images are synchronized based on the timestamp.

[0013] According to another aspect of this application, an electronic device is provided, the electronic device comprising:

[0014] At least one processor; and

[0015] A memory connected to the synchronous detection of at least one processor output image; wherein,

[0016] The memory stores a computer program that can be executed by at least one processor, such that the at least one processor is able to perform the synchronous detection method for the output image of any embodiment of this application.

[0017] According to another aspect of this application, a computer-readable storage medium is provided, which stores computer instructions for causing a processor to execute and implement the synchronous detection method for output images of any embodiment of this application.

[0018] The technical solution of this application embodiment, in response to the frame synchronization signal and the unit pixel group synchronization signal of the image decoding output device, receives at least two target images output by the image decoding output device; wherein, the unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal; each unit pixel group of the at least two target images is divided into cache pixel groups according to a preset number of unit pixel groups for caching, and the timestamp of each cache pixel group is recorded; based on the timestamp, it is detected whether the corresponding cache pixel groups in the at least two target images are synchronized. The above solution can solve the problems of low efficiency and low accuracy of the current solution that requires manual observation and relies solely on synchronization signals for judgment by setting a cache space to cache before the image is displayed, and determine whether the at least two output images are synchronized based on the cache timestamp.

[0019] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this application, nor is it intended to limit the scope of this application. Other features of this application will become readily apparent from the following description. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 A flowchart illustrating a synchronous detection method for output images provided in an embodiment of this application;

[0022] Figure 2 This is a schematic diagram of device connection provided in an embodiment of this application;

[0023] Figure 3 A schematic diagram of the synchronization signal provided in the embodiments of this application;

[0024] Figure 4 A flowchart illustrating a synchronous detection method for output images provided in another embodiment of this application;

[0025] Figure 5 This is a schematic diagram of a unit pixel group cache provided in another embodiment of this application;

[0026] Figure 6 A flowchart illustrating a synchronous detection method for an output image, as provided in another embodiment of this application;

[0027] Figure 7 A schematic diagram of the first-level cache space provided in yet another embodiment of this application;

[0028] Figure 8 This is a schematic diagram of another level of cache space provided in yet another embodiment of this application;

[0029] Figure 9 This is an internal structure diagram of a synchronous detection device corresponding to a specific implementation method provided in this application embodiment;

[0030] Figure 10 A schematic diagram of the structure of a synchronous detection device for output images provided in an embodiment of this application;

[0031] Figure 11 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0032] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0033] It should be noted that the terms "first," "second," "third," "fourth," "actual," "preset," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0034] Figure 1 This is a flowchart illustrating a method for synchronous detection of output images provided in an embodiment of this application. This embodiment is applicable to situations requiring synchronous detection of at least two output images. The method can be executed by an output image synchronous detection device, which can be implemented in hardware and / or software. This device can be configured in an electronic device, specifically a synchronous detection device deployed between an image decoding output device and an image display device. Figure 1 As shown, the method includes:

[0035] S110, in response to the frame synchronization signal and the unit pixel group synchronization signal of the image decoding output device, receive at least two target images output by the image decoding output device; wherein, the unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal.

[0036] The image decoding output device can be a device capable of receiving encoded images from a data source, decoding them, and outputting them to an image display device for display. Typically, the image decoding output device is connected to the image display device, and the image decoding output device outputs the decoded image to the image display device for display. In this embodiment, a synchronization detection device is connected between the image decoding output device and the image display device. The image decoding output device outputs the image to the synchronization detection device, which performs synchronization detection on the output image before sending it to the image display device for display. For example, as shown... Figure 2 As shown, there can be at least one image decoding output device. In this embodiment, the image decoding output device outputs at least two images. These at least two images can be output by one image decoding output device or by two or more image decoding output devices. The synchronization detection device receives the at least two images output by the image decoding output device, performs synchronization detection, and then outputs them to the image display device for display.

[0037] In this embodiment, the target image is output row by row or column by column, that is, output in units of pixels. During the output of the target image, the image decoding output device triggers the transmission of image data via a synchronization signal, such as... Figure 3 As shown, the pulse in Hsync represents the unit pixel group synchronization signal, and the pulse in Vsync represents the frame synchronization signal. The image decoding output device generates a frame synchronization signal to indicate the start of outputting a frame of target image, and generates a unit pixel group synchronization signal to indicate the start of outputting a unit pixel group. After detecting the frame synchronization signal and the unit pixel group synchronization signal generated by the image decoding output device, the synchronization detection device starts receiving a frame of target image in response to the frame synchronization signal, and starts receiving a unit pixel group in response to the unit pixel group synchronization signal. The synchronization detection device receives at least two target images sent by the image decoding output device in response to the frame synchronization signal and the unit pixel group synchronization signal.

[0038] S120. For at least two target images, each unit pixel group is divided into cache pixel groups according to the preset number of unit pixel groups, and the timestamp of each cache pixel group is recorded.

[0039] The preset number of pixel groups can be determined in advance based on actual conditions, reflecting the minimum unit data size for caching the target image. The preset number of pixel groups can be greater than or equal to one. Caching can be performed once for each received pixel group, or once for each set of multiple pixel groups. During the synchronous detection device's reception of the target image, when the number of received pixel groups reaches the preset number, the received pixel groups are cached as cached pixel groups. The timestamp can be the start time of caching this pixel group. A cache address can be set after caching the pixel group to cache its timestamp.

[0040] S130. Based on the timestamp, detect whether the corresponding cached pixel groups in at least two target images are synchronized.

[0041] For example, if at least two target images are synchronized, then the timestamps for caching at least two target images should also be synchronized. For instance, the timestamps for caching the same frame of target images in at least two channels should be synchronized, and the timestamps for caching the same cached pixel group in the same frame of target images should also be synchronized. Therefore, based on the timestamps, it is possible to detect whether the corresponding cached pixel groups in at least two target images are synchronized, thereby achieving synchronization detection of at least two target images.

[0042] In this embodiment of the application, detecting whether corresponding cached pixel groups in at least two target images are synchronized based on the timestamp includes:

[0043] If the timestamp difference of the first buffer pixel group in at least two target images is greater than a preset difference, then it is determined that the initial phase of at least two target images is not synchronized.

[0044] If the difference in timestamps of the first buffer pixel group in at least two target images is less than or equal to a preset difference, and the difference in timestamps of other buffer pixel groups is greater than the preset difference, then it is determined that the unit pixel group of at least two target images is not synchronized, and it is determined that the unit pixel group synchronization signal of the image decoding output device that outputs at least two target images is not synchronized.

[0045] The preset difference can be determined based on actual conditions, reflecting the maximum difference in timestamps of the buffered pixel groups of at least two acceptable target images. The first buffered pixel group can be determined based on the frame synchronization signal and the unit pixel group synchronization signal. If a unit pixel group is received after a frame synchronization signal is detected, the number of detected unit pixel group synchronization signals, i.e., the number of received unit pixel groups, is counted. The buffered pixel group obtained when the accumulated number of unit pixel groups first meets the preset number of unit pixel groups is the first buffered pixel group. After buffering the first buffered pixel group, if the timestamp difference of the first buffered pixel group in the same frame of at least two target images is greater than the preset difference, it reflects that the timestamp difference of the first buffered pixel group of at least two target images is large, and it is determined that the initial phase of at least two target images is not synchronized. In the case of initial phase asynchrony of at least two target images, it can reflect that the frame synchronization signals of at least two target images are not synchronized, and the frame synchronization signal of the image decoding output device can be adaptively adjusted to achieve synchronization.

[0046] If the difference between the timestamps of the first buffer pixel group in at least two target images is less than or equal to a preset difference, it indicates that the initial phase of at least two target images is synchronized. However, if the difference between the timestamps of other buffer pixel groups is greater than the preset difference, it indicates that the unit pixel groups of at least two target images are not synchronized, that is, the unit pixel group synchronization signal is not synchronized. The unit pixel group synchronization signal of the image decoding output device can be adjusted to achieve synchronization.

[0047] The technical solution of this application embodiment, in response to the frame synchronization signal and the unit pixel group synchronization signal of the image decoding output device, receives at least two target images output by the image decoding output device; wherein, the unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal; each unit pixel group of the at least two target images is divided into cache pixel groups according to a preset number of unit pixel groups for caching, and the timestamp of each cache pixel group is recorded; based on the timestamp, it is detected whether the corresponding cache pixel groups in the at least two target images are synchronized. The above solution can solve the problems of low efficiency and low accuracy of the current solution that requires manual observation and relies solely on synchronization signals for judgment by setting a cache space to cache before the image is displayed, and determine whether the at least two output images are synchronized based on the cache timestamp.

[0048] Figure 4 This is a flowchart illustrating a synchronous detection method for output images, provided as another embodiment of this application. This embodiment is an optimization based on the above embodiments; schemes not described in detail in this embodiment are found in the above embodiments. Figure 4 As shown, the method in this embodiment of the application specifically includes the following steps:

[0049] S210, in response to the frame synchronization signal and the unit pixel group synchronization signal of the image decoding output device, receive at least two target images output by the image decoding output device; wherein, the unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal.

[0050] S220. Based on the frame synchronization signal and the unit pixel group synchronization signal of the image decoding output device, count the number of unit pixel groups in the received current frame target image.

[0051] Here, the current frame is the target image frame being received after the frame synchronization signal is detected. For example, each time the synchronization detection device detects a frame synchronization signal, it reflects the reception of one target image frame; each detected unit pixel group synchronization signal reflects the reception of one unit pixel group. After the synchronization detection device detects a frame synchronization signal, it accumulates the number of received unit pixel group synchronization signals starting from zero. The number of unit pixel group synchronization signals reflects the number of unit pixel groups received. For example, as... Figure 3 As shown, when a frame synchronization signal is detected, the unit pixel group synchronization signal is detected. If four pulses in the upper Hsync are detected, it indicates that four unit pixel groups have been received.

[0052] S230. If the number of unit pixel groups is an integer multiple of the preset number of unit pixel groups, then the received cached pixel groups are cached.

[0053] For example, a unit pixel group is the smallest unit received from the target image. During storage, the entire unit pixel group is cached; it is not split into individual cached units. The counted number of unit pixel groups is the total number of unit pixel groups received since the start of receiving the target image in the current frame. Therefore, it can be determined whether the number of unit pixel groups is an integer multiple of a preset number of unit pixel groups. If it is, it reflects that the number of currently received, uncached unit pixel groups has reached the preset number of unit pixel groups. This portion of unit pixel groups is then treated as cached pixel groups and cached.

[0054] In this embodiment of the application, if the number of unit pixel groups is an integer multiple of the preset number of unit pixel groups, then the received cached pixel groups are cached, including:

[0055] If the number of unit pixel groups in the current frame target image received is less than or equal to the effective number of unit pixel groups in the target image, and the number of unit pixel groups is an integer multiple of the preset number of unit pixel groups, then the received cached pixel groups are cached.

[0056] If the number of unit pixel groups in the current frame target image received is greater than the effective number of unit pixel groups in the target image, but less than the total number of unit pixel groups in the target image, the caching step is not continued until the next frame target image is received. For example, assuming a unit pixel group is 1 row and the preset unit pixel group is 16 rows, the number of detected line synchronization signals is counted starting from the detection of the frame synchronization signal. If the number of detected line synchronization signals is 9, which is not an integer multiple of 16, the detection of line synchronization signals continues, and the target image continues to be received. If the number of detected line synchronization signals is 16, which is an integer multiple of 16, the currently received unit pixel groups are cached as cache pixel groups. The detection of line synchronization signals continues. If the number of detected line synchronization signals is 30, which is not an integer multiple of 16, the detection of line synchronization signals continues, and the target image continues to be received. If the number of detected line synchronization signals is 32, which is an integer multiple of 16, the already received but not yet cached unit pixel groups are cached as cache pixel groups. The detection of line synchronization signals continues, and unit pixel groups are received. If the number of unit pixel groups in the current frame target image received is greater than the effective number of unit pixel groups in the target image, but less than the total number of unit pixel groups in the target image, then the caching step will not be performed until the next frame target image is received.

[0057] For example, the target image includes hidden-face parameters in addition to valid image data. Assuming the resolution of the valid image data is 1920*1080, the actual size of the target image after adding the hidden-face parameters is 2200*1125. The effective number of pixel groups is the number of pixel groups in the valid image data, and the total number of pixel groups is the number of pixel groups including both valid image data and hidden-face parameters. During caching, only valid image data is cached. Specifically, as shown... Figure 5 As shown, if a frame synchronization signal is detected, then a unit pixel group synchronization signal is detected. If the number of unit pixel groups received in the current frame target image is less than or equal to the effective number of unit pixel groups, then receiving unit pixel groups of the target image continues. If the number of unit pixel groups is an integer multiple of the preset number of unit pixel groups, then the step of buffering the received but not yet buffered unit pixel groups is executed. If the counted number of unit pixel groups is less than or equal to the effective number of unit pixel groups, then receiving unit pixel groups and buffering continues. If the counted number of unit pixel groups is greater than the effective number of unit pixel groups, but the number of unit pixel groups is less than the total number of unit pixel groups, then it is determined that blanking parameters are currently being received, the buffering step is no longer executed, only unit pixel groups are received, and the system waits for the next frame synchronization signal. When the next frame synchronization signal is detected, the reception of the next frame target image begins.

[0058] S240, Record the timestamp of each cached pixel group.

[0059] S250. Based on the timestamp, detect whether the corresponding cached pixel groups in at least two target images are synchronized.

[0060] This application provides a synchronization detection method for output images. Responding to a frame synchronization signal and a unit pixel group synchronization signal from an image decoding output device, the method receives at least two target images output by the image decoding output device. The unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal. Based on the frame synchronization signal and the unit pixel group synchronization signal from the image decoding output device, the number of unit pixel groups in the received current frame target image is counted. If the number of unit pixel groups is an integer multiple of a preset number of unit pixel groups, the received cached pixel groups are cached, and the timestamp of each cached pixel group is recorded. Based on the timestamps, it is detected whether the corresponding cached pixel groups in the at least two target images are synchronized. This scheme can accurately count the number of unit pixel groups received in the current frame by statistically analyzing the frame synchronization signal and the unit pixel group synchronization signal, thereby orderly caching a certain number of unit pixel groups and improving caching efficiency. By recording the cache timestamps and determining whether the caching time of the unit pixel groups is synchronized, the synchronization of the images output by the image output device can be accurately determined.

[0061] Figure 6 This is a flowchart illustrating a synchronous detection method for output images, provided as another embodiment of this application. This embodiment is an optimization based on the above embodiments; solutions not described in detail in this embodiment are found in the above embodiments. Figure 6 As shown, the method in this embodiment of the application specifically includes the following steps:

[0062] S310, in response to the frame synchronization signal and the unit pixel group synchronization signal of the image decoding output device, receive at least two target images output by the image decoding output device; wherein, the unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal.

[0063] S320. Determine the size of a single-level buffer space based on the amount of data in a single frame of the target image in each target image path, and set at least two levels of buffer space.

[0064] For example, at least two levels of cache space can be set up, with the caching process and the target image display process executed in different cache spaces to avoid mutual interference. For instance, if a group of cached pixels is currently being stored in the first-level cache space, the target image in the second-level cache space is being displayed. If a target image in the first-level cache space is currently being displayed, the cached pixel groups that need to be cached are cached in the first-level cache space. Each cache space has the same size, satisfying the space requirements for storing a single frame of the target image. Specifically, the size of a single-level cache space can be determined based on the data volume of a single frame of the target image in each path, ensuring that the size of a single-level cache space is greater than or equal to the data volume of a single frame of the target image.

[0065] S330: Split and cache adjacent frame images from at least two target images into different levels of cache space.

[0066] For example, adjacent frames of at least two target images can be cached in different levels of cache space to distinguish between adjacent target images. On the one hand, the caching process and the display process of adjacent target images can be executed in different cache spaces to avoid the target images starting to be displayed before they are fully cached, thus preventing the caching and display processes from interfering with each other. On the other hand, adjacent target images can be split into different levels of cache space, thereby making it possible to visually and intuitively determine whether the target images are synchronized at both the frame level and the pixel group level.

[0067] Specifically, during the caching process, initially, if frame synchronization signals from at least two target images are received almost simultaneously, at least two current frame target images can be cached in the first-level cache space. If the caching of one current frame target image ends, the process can be switched to the second-level cache space. If one frame of that target image ends in the second-level cache space, the process continues to switch cache spaces for storage. If a third-level cache space exists, the process is switched to that space. If no third-level cache space exists, the process is switched back to the first-level cache space.

[0068] S340. If, in the first-level cache space, there exists a single-frame target image from any channel that has been cached, and there exists a single-frame target image from other channels that has not been cached, then it is determined that the cached pixel groups of at least two target images are not synchronized.

[0069] For example, if the data volume of each single-frame target image is consistent, in the first-level cache space, if at least two target images are synchronized, they should theoretically start caching and complete caching simultaneously. In the cache space, if any single-frame target image has been cached but other single-frame images have not, then it is determined that the cached pixel groups of at least two target images are not synchronized.

[0070] Specifically, such as Figure 7 As shown, assuming at least one image decoding output device has four outputs and sends four target images to the synchronous detection device, the storage progress of the four target images in the first-level cache space is as follows: Figure 7 As shown, the first number after IN indicates the number of data source channels, i.e., which channel of the target image; the second number indicates the frame number, i.e., which frame of the target image; and the third number indicates the number of cached pixel groups, i.e., which cached pixel group. IN2-1-5 represents the fifth cached pixel group in the first frame of the second channel of the target image. Figure 7 Different colored cells represent cached pixel groups. Cell alignment indicates that the cache timestamps are synchronized. The alignment of IN11-1 and IN21-1 indicates that these two cached pixel groups are stored synchronously, meaning their initial phases are consistent. However, the eight cached pixel groups of the second target image are cached first, while the other target images are not cached, indicating that the cached pixel groups of each target image are not synchronized, reflecting the lack of synchronization of the unit pixel groups of each target image.

[0071] In this embodiment of the application, splitting and caching adjacent frame images from at least two target images into different levels of cache space includes:

[0072] If any single-frame target image in the first-level cache space has been cached, then switch to another-level cache space to continue caching at least two target images.

[0073] Accordingly, the method further includes:

[0074] If in another level of cache space there exists a cache pixel group that is the target image of the current frame, and there exists another cache pixel group that includes the target image of a historical frame, then it is determined that at least two cache pixel groups of target images are not synchronized; where the historical frame is any frame before the current frame.

[0075] In this embodiment of the application, during the process of caching the target image, if any single-frame target image has been cached in the first-level cache space, the process switches to another level cache space to continue the caching process. For example... Figure 7 and Figure 8 As shown, in Figure 7In the first-level buffer space, eight buffered pixel groups of the second-path first-frame target image have been completed, but only seven buffered pixel groups of the first-path and third-path first-frame target images, and only six buffered pixel groups of the fourth-path first-frame target image, have been buffered. If no frame synchronization signal for the second-path target image is detected at this point, the first, third, and fourth-path target images can continue to be buffered in this buffer space. If a frame synchronization signal for sending the second-path second-frame target image is detected, the remaining buffered pixel groups of each target image can continue to be buffered in another level of buffer space. Figure 8 As shown, the eight buffer pixel groups of the second frame of the second channel are buffered, while the eighth buffer pixel group of the first frame of the first channel and the eighth buffer pixel group of the first frame of the third channel are also buffered. The seventh and eighth buffer pixel groups of the first frame of the fourth channel are also buffered. For the first, third, and fourth channels, after buffering the first frame, the buffer pixel groups of the second frame are buffered.

[0076] For example, such as Figure 8 As shown, the other level of cache space includes not only the cached pixel group of the current frame of one target image, but also the cached pixel group of the historical frames of other target images, reflecting that the cached pixel groups of at least two target images are not synchronized.

[0077] This application provides a synchronization detection method for output images. It caches at least two target images by dividing each unit pixel group into cache pixel groups according to a preset number of unit pixel groups. The method includes: determining the size of a single-level cache space based on the data volume of a single frame target image in each target image, and setting at least two levels of cache space; splitting adjacent frame images in the at least two target images and caching them into different levels of cache space. If, in the first-level cache space, a single frame target image from any one of the target images has been cached, while single frames target images from other target images have not been cached, then it is determined that the cache pixel groups of at least two target images are not synchronized. This scheme determines whether the cache pixel groups are synchronized based on their caching progress, thereby reflecting whether the received unit pixel groups are synchronized. This allows for a more intuitive and accurate determination of the synchronization status of the output image; that is, it can detect whether the initial phase of the output image is synchronized, and also determine whether the unit pixel groups are synchronized.

[0078] Figure 9 This application provides an embodiment of the internal structure diagram of a synchronous detection device corresponding to a specific implementation method. The specific implementation method includes:

[0079] I. Image Acquisition Module

[0080] The system detects frame synchronization signals and line synchronization signals. Upon receiving a frame synchronization signal, it begins receiving a new frame of the target image; upon receiving a line synchronization signal, it begins receiving pixel rows. The system counts the frame and line synchronization signals. For each detected frame synchronization signal, the `Frame` variable is incremented by 1. If a new frame synchronization signal is received, the system starts counting the detected line synchronization signals from zero, incrementing `Line` by 1 for each detected line synchronization signal. Let `n` be the preset number of pixel rows. If the counted `Line` is an integer multiple of `n`, it checks if `Line` is less than or equal to the number of valid pixel rows. If so, a buffering step is performed, buffering the currently received but not yet buffered pixel rows. If not, it checks if `Line` is less than the total number of pixel rows. If `Line` is less than the total number of pixel rows, it continues receiving pixel rows but does not perform the buffering step. If `Line` equals the total number of pixel rows, in response to the next frame synchronization signal, it begins processing the next frame of the target image.

[0081] II. Cache Processing Module

[0082] Assuming the image decoding output device has four outputs, the synchronous detection device has four inputs, and buffers are allocated according to input 1, input 2, input 3, and input 4. For example, if the resolution of the input source image is 1920*1080, and buffers are arranged in a 2*2 layout, then the buffer size is 3840*2160. The buffer positions corresponding to input 1 are x[0,1919], y[0,1079], the buffer positions corresponding to input 2 are x[1919,3839], y[0,1079], the buffer positions corresponding to input 3 are x[0,1919], y[1079,2159], and the buffer positions corresponding to input 4 are x[1919,3839], y[1079,2159].

[0083] The cache space is divided into two levels: a front-end cache space and a back-end cache space, both of equal size. During the caching process, if the caching of a target image frame ends, the same switching cache space continues to store all target images.

[0084] During the storage of n pixel rows of the target image, the timestamps of the n pixel rows buffer are recorded and represented by INx-y-zn-time, where x represents the input source channel number, y represents the frame number, z represents the nth row number, and time represents the timestamp. IN2-1-5n-time represents the timestamp of the fifth nth row buffer of the first frame of the target image from the second channel.

[0085] III. Line synchronization detection module

[0086] If the timestamp difference of the first n lines of the same frame from different paths is less than a preset difference, it indicates that the initial phase of each target image is aligned; otherwise, it indicates that the initial phase is not aligned. If the timestamp difference of the subsequent n lines is greater than or equal to the preset difference, it indicates that there is a deviation in the line synchronization signal, and they are not synchronized.

[0087] IV. Output Module

[0088] like Figure 7 and Figure 8 As shown, after a frame synchronization signal is detected, all four target images are buffered simultaneously, but Figure 7 As shown, the second target image is buffered first, while the other target images are not buffered, indicating that the initial phase of each target image is synchronized, but the line synchronization signal is not synchronized. Figure 8 As shown, the second frame of the second target image continues to be cached. However, since the first frame of the other target images has not yet been cached, the cache line of the first frame of the target image is still contained in another level of cache space. It can also be determined that the pixel rows of each target image are not synchronized and the row synchronization signal is not synchronized.

[0089] Figure 10 This is a schematic diagram of a synchronous detection device for output images provided in an embodiment of this application. This device can execute the synchronous detection method for output images provided in any embodiment of this application, and possesses the corresponding functional modules and beneficial effects for executing the method. For example... Figure 10 As shown, the device includes:

[0090] The image receiving module 410 is used to receive at least two target images output by the image decoding output device in response to the frame synchronization signal and the unit pixel group synchronization signal of the image decoding output device; wherein, the unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal.

[0091] The caching module 420 is used to cache the pixel groups of at least two target images into cache pixel groups according to a preset number of pixel groups, and record the timestamp of each cache pixel group.

[0092] The synchronization detection module 430 is used to detect whether the corresponding cached pixel groups in at least two target images are synchronized based on the timestamp.

[0093] In this embodiment of the application, the caching module 420 caches each unit pixel group of at least two target images according to the cache pixel group, including:

[0094] Based on the frame synchronization signal and unit pixel group synchronization signal of the image decoding output device, the number of unit pixel groups in the received current frame target image is counted.

[0095] If the number of unit pixel groups is an integer multiple of the preset number of unit pixel groups, then the received cached pixel groups are cached.

[0096] In this embodiment of the application, if the number of unit pixel groups is an integer multiple of the preset number of unit pixel groups, the caching module 420 caches the received cache pixel groups, including:

[0097] If the number of unit pixel groups in the current frame target image received is less than or equal to the effective number of unit pixel groups in the target image, and the number of unit pixel groups is an integer multiple of the preset number of unit pixel groups, then the received cached pixel groups are cached.

[0098] If the number of unit pixel groups in the current frame target image received is greater than the effective number of unit pixel groups in the target image, but less than the total number of unit pixel groups in the target image, then the caching step will not be performed until the next frame target image is received.

[0099] In this embodiment of the application, the synchronization detection module 430 detects whether the corresponding cached pixel groups in at least two target images are synchronized based on the timestamp, including:

[0100] If the timestamp difference of the first buffer pixel group in at least two target images is greater than a preset difference, then it is determined that the initial phase of at least two target images is not synchronized.

[0101] If the difference in timestamps of the first buffer pixel group in at least two target images is less than or equal to a preset difference, and the difference in timestamps of other buffer pixel groups is greater than the preset difference, then it is determined that the unit pixel group of at least two target images is not synchronized, and it is determined that the unit pixel group synchronization signal of the image decoding output device that outputs at least two target images is not synchronized.

[0102] In this embodiment, the caching module 420 caches at least two target images by dividing each unit pixel group into cache pixel groups according to a preset number of unit pixel groups, including:

[0103] Based on the amount of data in a single frame of the target image in each path, determine the size of the single-level cache space and set at least two levels of cache space;

[0104] At least two target images are split and cached into different levels of cache space.

[0105] In this embodiment of the application, the device further includes:

[0106] The synchronization judgment module is used to determine that the cached pixel groups of at least two target images are not synchronized if, in the first-level cache space, there is a single-frame target image of any channel that has been cached and a single-frame target image of other channels that has not been cached.

[0107] In this embodiment, the caching module 420 splits and caches adjacent frame images from at least two target images into different levels of cache space, including:

[0108] If any single-frame target image in the first-level cache space has been cached, then switch to another-level cache space to continue caching at least two target images.

[0109] Correspondingly, the synchronization judgment module is also used for:

[0110] If in another level of cache space there exists a cache pixel group that is the target image of the current frame, and there exists another cache pixel group that includes the target image of a historical frame, then it is determined that at least two cache pixel groups of target images are not synchronized; where the historical frame is any frame before the current frame.

[0111] The synchronous detection device for output images provided in this application can execute the synchronous detection method for output images provided in any embodiment of this application, and has the corresponding functional modules and beneficial effects of the method.

[0112] Figure 11 A schematic diagram of an electronic device 10, which can be used to implement embodiments of this application, is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (such as helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the application described and / or claimed herein.

[0113] like Figure 11As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, connected to the synchronous detection of the output image of the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from the storage unit 18 into the RAM 13. The RAM 13 can also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0114] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of monitors, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and output image synchronization detection unit 19, such as network card, modem, wireless output image synchronization detection transceiver, etc. The output image synchronization detection unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0115] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the synchronous detection method for output images.

[0116] In some embodiments, the method for synchronous detection of the output image can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 10 via ROM 12 and / or the synchronous detection unit 19 for the output image. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the synchronous detection method for the output image described above can be performed. Alternatively, in other embodiments, processor 11 can be configured to perform the synchronous detection method for the output image by any other suitable means (e.g., by means of firmware).

[0117] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0118] Computer programs used to implement the methods of this application may be written in any combination of one or more programming languages. These computer programs may be provided to the processor of a general-purpose computer, a special-purpose computer, or other programmable image synchronization detection device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0119] In the context of this application, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium can be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0120] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0121] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or computing systems that include middleware components (e.g., application servers), or computing systems that include frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected through the synchronous detection of digital data output images in any form or medium (e.g., a synchronous detection network for output images). Examples of synchronous detection networks for output images include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0122] A computing system can include clients and servers. Clients and servers are generally geographically separated and typically interact via a network that synchronously detects output images. The client-server relationship is established by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0123] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this application can be executed in parallel, sequentially, or in different orders, as long as the desired information of the technical solution of this application can be achieved, and this is not limited herein.

[0124] The specific embodiments described above do not constitute a limitation on the scope of protection of this application. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A method for synchronous detection of output images, characterized in that, The method includes: In response to the frame synchronization signal and the unit pixel group synchronization signal of the image decoding output device, the system receives at least two target images output by the image decoding output device; wherein the unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal. For at least two target images, each unit pixel group is divided into cache pixel groups according to a preset number of unit pixel groups, and the timestamp of each cache pixel group is recorded. Based on the timestamp, detect whether the corresponding cached pixel groups in at least two target images are synchronized.

2. The method according to claim 1, characterized in that, For at least two target images, each pixel group is cached according to the cache pixel group, including: Based on the frame synchronization signal and the unit pixel group synchronization signal of the image decoding output device, the number of unit pixel groups in the received current frame target image is counted. If the number of unit pixel groups is an integer multiple of the preset number of unit pixel groups, then the received cached pixel groups are cached.

3. The method according to claim 2, characterized in that, If the number of unit pixel groups is an integer multiple of the preset number of unit pixel groups, then the received cached pixel groups are cached, including: If the number of unit pixel groups in the current frame target image received is less than or equal to the effective number of unit pixel groups in the target image, and the number of unit pixel groups is an integer multiple of the preset number of unit pixel groups, then the received cached pixel groups are cached. If the number of unit pixel groups in the current frame target image received is greater than the effective number of unit pixel groups in the target image, but less than the total number of unit pixel groups in the target image, then the caching step will not be performed until the next frame target image is received.

4. The method according to claim 1, characterized in that, Based on the timestamp, detect whether the corresponding cached pixel groups in at least two target images are synchronized, including: If the timestamp difference of the first buffer pixel group in at least two target images is greater than a preset difference, then it is determined that the initial phase of at least two target images is not synchronized. If the difference in timestamps of the first buffer pixel group in at least two target images is less than or equal to a preset difference, and the difference in timestamps of other buffer pixel groups is greater than the preset difference, then it is determined that the unit pixel group of at least two target images is not synchronized, and it is determined that the unit pixel group synchronization signal of the image decoding output device that outputs at least two target images is not synchronized.

5. The method according to claim 1, characterized in that, For at least two target images, each pixel group is divided into cache pixel groups according to a preset number of pixel groups, including: Based on the amount of data in a single frame of the target image in each path, determine the size of the single-level cache space and set at least two levels of cache space; At least two target images are split and cached into different levels of cache space.

6. The method according to claim 5, characterized in that, The method further includes: If, in the first-level cache space, there exists a single-frame target image from any path that has been cached, and there exists a single-frame target image from other paths that has not been cached, then it is determined that the cached pixel groups of at least two target images are not synchronized.

7. The method according to claim 5, characterized in that, Split and cache adjacent frames from at least two target images into different levels of cache space, including: If any single-frame target image in the first-level cache space has been cached, then switch to another-level cache space to continue caching at least two target images. Accordingly, the method further includes: If in another level of cache space there exists a cache pixel group that is the target image of the current frame, and there exists another cache pixel group that includes the target image of a historical frame, then it is determined that at least two cache pixel groups of target images are not synchronized; where the historical frame is any frame before the current frame.

8. A synchronous detection device for output images, characterized in that, The device includes: An image receiving module is configured to receive at least two target images output by an image decoding output device in response to a frame synchronization signal and a unit pixel group synchronization signal; wherein the unit pixel group synchronization signal includes a row synchronization signal or a column synchronization signal. The caching module is used to cache the pixel groups of at least two target images into cache pixel groups according to a preset number of pixel groups, and record the timestamp of each cache pixel group. The synchronization detection module is used to detect whether the corresponding cached pixel groups in at least two target images are synchronized based on the timestamp.

9. An electronic device, characterized in that, The electronic device includes: At least one processor; and A memory connected to the synchronous detection of the output image of the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the synchronous detection method for the output image according to any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause a processor to execute the synchronous detection method for the output image according to any one of claims 1-7.

Images