Array printed circuit board, printed circuit board and method for manufacturing the same

Abstract

An array printed circuit board, a printed circuit board, and a method of manufacturing the same are provided. The array printed circuit board includes a plurality of substrate regions in which a plurality of printed circuit boards are respectively disposed, and a peripheral region connected to the plurality of substrate regions. At least one substrate region of the plurality of substrate regions includes a separation hole. The at least one substrate region and the peripheral region include a wiring, and the wiring includes one or more wiring layers. The wiring includes an outer side wiring including a first portion between an edge of the at least one substrate region and a first side of the separation hole adjacent to the edge of the at least one substrate region.

Description

Technical Field

[0001] This disclosure relates to array printed circuit boards, printed circuit boards, and methods of manufacturing the same. Background Technology

[0002] To improve the productivity of printed circuit board (PCB) manufacturing processes, an array of PCBs comprising multiple PCBs can be used. The array of PCBs may include multiple regions where the multiple PCBs are respectively positioned, and regions configured to connect the multiple PCBs. The array of PCBs may include wiring connecting the multiple PCBs for testing the array of PCBs.

[0003] After testing the array printed circuit board, it can be cut into printed circuit boards. After cutting, the wiring connecting multiple printed circuit boards for testing the array printed circuit board will be exposed on the side surface of the printed circuit board, which may cause problems such as electrical short circuits. Summary of the Invention

[0004] Overall, this disclosure aims to provide array printed circuit boards, printed circuit boards and methods for manufacturing the same, which can improve reliability and productivity.

[0005] According to some embodiments, this disclosure relates to an array printed circuit board, the array printed circuit board including a plurality of substrate regions and a peripheral region, wherein a plurality of printed circuit boards are respectively disposed in the plurality of substrate regions, and the peripheral region is connected to the plurality of substrate regions. At least one of the plurality of substrate regions includes a separation via. The at least one substrate region and the peripheral region include wiring, and the wiring includes one or more wiring layers. The wiring includes an outer wiring, the outer wiring including a first portion located between an edge of the at least one substrate region and a first side of the separation via, the first side of the separation via being adjacent to the edge of the at least one substrate region.

[0006] According to some embodiments, this disclosure relates to a printed circuit board including a stacked structure and a separation via. The stacked structure includes an insulating layer and wiring, and the wiring includes a plurality of wiring layers. The separation via is configured to separate at least one of the plurality of wiring layers. The wiring includes dummy wiring located between an edge of the stacked structure and a first side of the separation via, the first side of the separation via being adjacent to the edge of the stacked structure.

[0007] In some embodiments, this disclosure relates to a method of manufacturing a printed circuit board, the method comprising: forming an array of printed circuit boards, testing the array of printed circuit boards, forming separation holes, and cutting the array of printed circuit boards. In the formation of the array of printed circuit boards, the array of printed circuit boards includes: a plurality of substrate regions, with a plurality of printed circuit boards respectively disposed in the plurality of substrate regions; a peripheral region configured to connect the plurality of substrate regions; test pads located in the peripheral region; and connection wiring electrically connecting the test pads and at least one of the plurality of substrate regions. In the testing of the array of printed circuit boards, the test pads and the connection wiring are used to test the array of printed circuit boards. The separation holes are configured to disconnect the connection wiring from wiring in the at least one substrate region.

[0008] According to some embodiments, this disclosure allows for the separation of wiring exposed on the side surface of a printed circuit board from wiring disposed in the internal area of ​​the printed circuit board. Therefore, when the printed circuit board is mounted on a fixture or bracket of an external electronic device, unwanted electrical short circuits that might be caused by wiring exposed on the side surface of the printed circuit board can be prevented. This improves the reliability of the printed circuit board.

[0009] According to some embodiments, this disclosure allows for the separation of a portion of wiring exposed on the side surface of a printed circuit board from a portion of wiring disposed in the internal region of the printed circuit board via a simple process. Therefore, the productivity of printed circuit boards with improved reliability can be increased. Attached Figure Description

[0010] The exemplary embodiments will be more clearly understood through the following detailed description in conjunction with the accompanying drawings.

[0011] Figure 1 This is a plan view illustrating an example of an array printed circuit board according to some embodiments.

[0012] Figure 2 It is based on some implementation methods along Figure 1 The cross-sectional view taken by line A-A' in the diagram.

[0013] Figure 3 It is based on some implementation methods Figure 1 An enlarged plan view of part B in the diagram.

[0014] Figure 4 It is based on some implementation methods along Figure 3 The cross-sectional view taken from line C-C' in the diagram.

[0015] Figure 5This is a plan view showing an example of a printed circuit board according to some embodiments.

[0016] Figure 6 It is based on some implementation methods along Figure 5 The cross-sectional view taken from line E-E' in the diagram.

[0017] Figures 7 to 9 This is a plan view illustrating an example of a method for manufacturing a printed circuit board according to some embodiments.

[0018] Figures 10 to 12 This is a cross-sectional view illustrating an example of a method for manufacturing a printed circuit board according to some embodiments.

[0019] Figures 13 to 15 This is a plan view illustrating an example of a method for manufacturing a printed circuit board according to some embodiments.

[0020] Figure 16 This is a partial plan view illustrating an example of an array printed circuit board according to some embodiments. Detailed Implementation

[0021] In the following text, exemplary embodiments will be described in detail with reference to the accompanying drawings.

[0022] For clarity of description, irrelevant parts have been omitted, and throughout this disclosure, the same or similar parts are indicated by the same reference numerals.

[0023] Furthermore, since the dimensions and / or thicknesses of the parts, regions, components, units, layers, films, substrates, etc. shown in the accompanying drawings may be arbitrarily shown for better understanding and ease of illustration, this disclosure is not limited to the dimensions and / or thicknesses shown. In the accompanying drawings, the thicknesses of parts, regions, components, units, layers, films, substrates, etc., may be enlarged or exaggerated for ease of illustration and / or simple depiction.

[0024] It should be understood that when a component, such as a part, region, structure, unit, layer, film, or substrate, is referred to as being "on" another component, it may be directly on the other component or there may be an intermediate component. In contrast, when a component is referred to as being "directly on" another component, there is no intermediate component. Furthermore, when a component is referred to as being "on" or "above" a reference component, the component may be positioned on or below the reference component, and is not necessarily "on" or "above" the reference component in the opposite direction of gravity.

[0025] Furthermore, throughout this disclosure, unless explicitly stated otherwise, the terms “comprising” or “including” and variations thereof shall be understood to indicate the inclusion of other components rather than the exclusion of any other components.

[0026] Furthermore, throughout this disclosure, the terms "in a plane," "in a plane," "on a plan view," or "in a plan view" may indicate a portion as viewed from above or at the top, and the terms "on a section" or "in a cross-sectional view" may indicate a section as viewed from the side and taken along a vertical direction.

[0027] In the following text, see references Figures 1 to 6 The array printed circuit board 100a and the printed circuit board 100 according to some embodiments will be described in detail.

[0028] Figure 1 This is a plan view showing an example of an array printed circuit board 100a according to some embodiments. Figure 2 It is based on some implementation methods along Figure 1 The cross-sectional view taken by line A-A' in the diagram.

[0029] exist Figure 1 and Figure 2 In this array, the printed circuit board 100a may include multiple substrate regions 10 and peripheral regions 20. Multiple printed circuit boards 100 may be disposed in the multiple substrate regions 10 respectively. The peripheral regions 20 may be connected to the substrate regions 10 or may be disposed near the edges of the substrate regions 10.

[0030] After a dicing process that cuts the array printed circuit board 100a into individual printed circuit boards 100, at least a portion of the substrate region 10 can be formed into printed circuit boards 100. In the substrate region 10, electronic components 150 and wiring 120 (e.g., circuit wiring 122, etc.) electrically connected to the electronic components 150 can be provided to correspond to each printed circuit board 100.

[0031] The peripheral region 20 may be disposed near the edge of the substrate region 10 and configured to connect multiple substrate regions 10 into a single unit. The peripheral region 20 may include rail portions 22 and bridging portions 24. The rail portions 22 may extend longitudinally along the edge of the substrate region 10. The bridging portions 24 may connect the rail portions 22 and the substrate region 10, or may be disposed between two adjacent substrate regions 10. For example, the bridging portions 24 may include multiple bridging portions 24 spaced apart from each other by through-holes 24a.

[0032] In some embodiments, the track portion 22 may include a first track portion 22a and a second track portion 22b. The first track portion 22a may extend in a first direction (X-axis direction in the figure) (e.g., the major axis direction), and the second track portion 22 may extend in a second direction (Y-axis direction in the figure) (e.g., the minor axis direction) intersecting (e.g., perpendicular to) the first direction. The first track portion 22a may be disposed outside the substrate region 10 or between multiple substrate regions 10. The second track portion 22b may be disposed outside the substrate region 10 or between multiple substrate regions 10.

[0033] exist Figure 1 In this configuration, the bridging portion 24 is disposed between the edge (e.g., a long edge) of the substrate region 10 and the first track portion 22a extending in a first direction (X-axis direction in the figure) along the long axis direction, and / or disposed between the edges (e.g., individual edges) of the substrate region 10 extending in the first direction along the long axis direction. Figure 1 In this embodiment, the bridging portion 24 is connected to the first track portion 22a extending in a first direction along the long axis, but not to the second track portion 22b extending in a second direction along the short axis. This improves stability and simplifies the structure. However, this disclosure is not limited thereto. In some embodiments, the bridging portion 24 may be connected to at least one of the long and short edges of the substrate region 10, and one or more bridging portions 24 may be connected to one edge. Unlike the above description, in some embodiments, the bridging portion 24 may be connected to the short edge of the substrate region 10, but may not be connected to the long edge of the substrate region 10.

[0034] exist Figure 1 In this configuration, the first track portion 22a is not disposed between a pair of substrate regions 10 and another pair of substrate regions 10 located in the second direction (Y-axis direction in the figure). That is, the first track portion 22a may not be disposed between the first substrate region 10a and the second substrate region 10b forming a pair of substrate regions 10, and a bridging portion 24 may be disposed instead. Figure 1 In the middle, the second track portion 22b is disposed on the first side of the substrate region 10 in the first direction (X-axis direction in the figure). Figure 1 (left side of the middle), and not provided on the second side of the substrate region 10 in the first direction ( Figure 1 (The right side of the middle). However, this disclosure is not limited thereto, and the shape, position, arrangement, etc. of the first track portion 22a or the second track portion 22b can be modified differently.

[0035] The through-holes 24a disposed between the bridging portions 24 can pass through the array printed circuit board 100a and can have a shape extending along the edge of the substrate region 10. This reduces the time and difficulty of the cutting process for dicing the array printed circuit board 100a into individual printed circuit boards 100, and prevents or minimizes damage to the printed circuit boards 100 during the cutting process. Figure 1 In this embodiment, the via 24a includes a plurality of vias 24a corresponding to an edge of the substrate region 10 in a first direction (X-axis direction in the figure) along the long axis, and the vias 24a extend to completely correspond to an edge of the substrate region 10 in a second direction (Y-axis direction in the figure) along the short axis. However, this disclosure is not limited thereto, and the shape, position, arrangement, etc., of the vias 24a can be modified in various ways.

[0036] In the peripheral region 20, guide holes 180 may be provided, which are configured to fix the array printed circuit board 100a to a desired location or manufacturing equipment during the manufacturing process. Figure 1 In this embodiment, each guide hole 180 is adjacent to a corner portion and has a circular planar shape. However, this disclosure is not limited to the number, location, arrangement, shape, etc. of the guide holes 180.

[0037] Since the array printed circuit board 100a can include multiple substrate regions 10 as described above, the productivity of the manufacturing process of the printed circuit board 100 can be improved. For example, the mounting process of the multiple electronic components 150 included in the printed circuit board 100 can be simplified. Furthermore, the testing of the multiple printed circuit boards 100 included in the array printed circuit board 100a can be performed together in the testing process of the array printed circuit board 100a, reducing process costs, process time, etc. After the testing process of the array printed circuit board 100a, the peripheral region 20 can be cut in a dicing process to form individual printed circuit boards 100.

[0038] exist Figure 1 In the array printed circuit board 100a, there are eight substrate regions 10, but this disclosure is not limited to the number of substrate regions 10 included in the array printed circuit board 100a.

[0039] The array printed circuit board 100a may include a stacked structure 130 and electronic components 150. The stacked structure 130 includes an insulating layer 110 and wiring 120. The electronic components 150 are electrically connected to the wiring 120. The array printed circuit board 100a may also include a protective layer 140 and a molding portion 160. For example, the substrate region 10 or the printed circuit board 100 may include an insulating layer 110, wiring 120, a protective layer 140, electronic components 150, and a molding portion 160, and the peripheral region 20 may include an insulating layer 110, wiring 120, and a protective layer 140.

[0040] In some embodiments, wiring 120 may include multiple wiring layers and / or contact paths. Wiring 120 may include circuit wiring 122 disposed in substrate region 10, test pads 124 disposed in peripheral region 20, and outer wiring 128 spaced apart from the separation via 170 in substrate region 10 (see reference). Figure 3 ) and inner wiring 129 (reference) Figure 3 ).

[0041] Circuit wiring 122 may be disposed in substrate region 10 to correspond to printed circuit board 100 for operation of printed circuit board 100 or electronic components 150 included in printed circuit board 100. For example, circuit wiring 122 may be disposed in wiring region 12 in substrate region 10 (see reference). Figure 3 )middle.

[0042] In the peripheral region 20 (e.g., track portion 22), test pads 124 configured to test the array printed circuit board 100a can be provided. For example, test pads 124 can be provided on one side of the array printed circuit board 100a. Figure 1 (Left side of the array printed circuit board 100a). The side of the array printed circuit board 100a with the test pads 124 can be inserted into a test apparatus configured to perform a test process on the array printed circuit board 100a, and the array printed circuit board 100a and the test apparatus can be electrically connected to each other.

[0043] In the testing process of the array printed circuit board 100a, the test pad 124 can receive voltage or signal from the test equipment and can be connected via wiring 126 (see reference). Figure 7 The received voltage or signal is supplied to the substrate area 10 or the printed circuit board 100. For example, in the test process of the array printed circuit board 100a, the test pad 124 can receive power supply voltage, ground voltage and various signals for testing, and the received voltage or signal can be supplied to the substrate area 10 or the printed circuit board 100 through the connection wiring 126.

[0044] Connection wiring 126 can be disposed in substrate region 10 and peripheral region 20, and can electrically connect test pad 124 and circuit wiring 122. After the testing process, a disconnect hole 170 configured to disconnect connection wiring 126 can be formed in substrate region 10. Therefore, in the final structure, connection wiring 126 can be maintained in the form of outer wiring 128 and inner wiring 129 spaced apart from each other through the disconnect hole 170. Connection wiring 126, outer wiring 128 and inner wiring 129 will be described in more detail later.

[0045] Wiring 120 (e.g., circuit wiring 122, connection wiring 126, outer wiring 128, or inner wiring 129) may include at least one of copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), palladium (Pd), or alloys thereof, or may be formed from at least one of copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), palladium (Pd), or alloys thereof. However, this disclosure is not limited to the material of wiring 120.

[0046] Insulating layer 110 can be disposed between multiple wiring layers included in wiring 120. The multiple wiring layers included in wiring 120 can be electrically insulated from each other through insulating layer 110, and can be electrically connected to each other through contact paths passing through insulating layer 110 to form a predetermined electrical connection structure.

[0047] The insulating layer 110 may comprise a thermosetting resin (such as epoxy resin), a thermoplastic resin (such as polyimide), or a prepreg formed by impregnating a resin into reinforcing fibers, or may be formed from a thermosetting resin (such as epoxy resin), a thermoplastic resin (such as polyimide), or a prepreg. However, this disclosure is not limited to the material of the insulating layer 110.

[0048] A protective layer 140 may be disposed on the stacked structure 130, which includes an insulating layer 110 and wiring 120. The protective layer 140 may protect the stacked structure 130 in parts other than those where electronic components 150, test pads 124, etc. are disposed.

[0049] The protective layer 140 may include a first protective layer 142 and a second protective layer 144. The first protective layer 142 may be disposed on a first surface of the stacked structure 130. The second protective layer 144 may be disposed on a second surface of the stacked structure 130 opposite to the first surface of the stacked structure 130. The first protective layer 142 may be disposed on the first surface of the stacked structure 130 in a portion other than the portion used for testing the electrical connection between the pads 124 and the electronic components 150. The second protective layer 144 may be disposed on the second surface of the stacked structure 130 in a portion other than the portion used for electrically connecting the electronic components 150.

[0050] The protective layer 140 (e.g., a first protective layer 142 or a second protective layer 144) may include a solder resist (e.g., a photoimageable solder resist (PSR)) or be formed of a solder resist (e.g., a photoimageable solder resist (PSR)). For example, the protective layer 140 may include, or be formed of, a thermosetting solder resist or the like. However, this disclosure is not limited to the material of the protective layer 140.

[0051] Electronic component 150 may be mounted on a first surface and / or a second surface of stacked structure 130. For example, electronic component 150 may be mounted on a first surface 101 and a second surface 102 of printed circuit board 100 that are opposite to each other. The first surface 101 of printed circuit board 100 may refer to the outer surface of a first protective layer 142 adjacent to the first surface of stacked structure 130, and the second surface 102 of printed circuit board 100 may refer to the outer surface of a second protective layer 144 adjacent to the second surface of stacked structure 130.

[0052] In some embodiments, electronic components 150 adjacent to the first surface 101 of the printed circuit board 100 may include a first storage element 152a, an active element 154, a logic element 156, etc., and electronic components 150 adjacent to the second surface 102 of the printed circuit board 100 may include a second storage element 152b, a passive element 158, etc.

[0053] For example, the first storage element 152a or the second storage element 152b may include non-volatile memory (such as NAND flash memory systems) or volatile memory (such as dynamic random access memory (DRAM), static random access memory (SRAM), etc.). Active element 154 may include voltage regulators, etc. Logic element 156 may include a central processing unit (CPU), neural processing unit (NPU), microcontroller unit (MCU), application processor (AP), application-specific integrated circuit (ASIC), etc. Passive element 158 ​​may include resistors, inductors, capacitors, RLC circuits, etc. However, this disclosure is not limited thereto, and the types, arrangements, etc., of electronic elements 150 may be modified differently.

[0054] The molded portion 160 may be disposed between the side surface and / or lower portion of the electronic component 150 and the stack structure 130. The molded portion 160 may protect the electronic component 150 and a portion of the wiring 120 connected to the electronic component 150, and stably fix the electronic component 150. The molded portion 160 may include, or be formed of, an insulating material (e.g., resin, etc.). However, this disclosure is not limited thereto, and the material of the molded portion 160 may be modified in different ways.

[0055] In some embodiments, substrate region 10 may include a first substrate region 10a and a second substrate region 10b. In the first substrate region 10a, a first surface 101 of the printed circuit board 100 may be disposed on the upper surface of the array printed circuit board 100a, and a second surface 102 of the printed circuit board 100 may be disposed on the lower surface of the array printed circuit board 100a. In the second substrate region 10b, a second surface 102 of the printed circuit board 100 may be disposed on the upper surface of the array printed circuit board 100a, and a first surface 101 of the printed circuit board 100 may be disposed on the lower surface of the array printed circuit board 100a. That is, in the array printed circuit board 100a, the first surface 101 of one printed circuit board 100 and the second surface 102 of another printed circuit board 100 may be disposed on the same surface. When the first substrate region 10a and the second substrate region 10b are included, the productivity of the array printed circuit board 100a can be improved.

[0056] exist Figure 1 In the circuit, the first substrate region 10a and the second substrate region 10b are alternately arranged in a first direction (the X-axis direction in the figure), and also alternately arranged in a second direction (the Y-axis direction in the figure). However, this disclosure is not limited thereto. The arrangement of the first substrate region 10a and the second substrate region 10b can be modified in different ways. The first substrate region 10a and the second substrate region 10b may not be provided, and the same surface of the printed circuit board 100 may be provided on the same surface of the plurality of substrate regions 10. Various other modified embodiments are possible.

[0057] exist Figure 2 In the array printed circuit board 100a, the wiring 120 includes four wiring layers. However, this disclosure is not limited thereto, and the number of wiring layers in the wiring 120 included in the array printed circuit board 100a can be modified differently. For example, the wiring 120 included in the array printed circuit board 100a may include two or more (e.g., 20 or fewer) wiring layers.

[0058] In some embodiments, the printed circuit board 100 including the electronic component 150 may be an electronic device, a semiconductor device, or a semiconductor package, or may be included within an electronic device, semiconductor device, or semiconductor package. For example, the printed circuit board 100 may be a solid-state driver, etc. However, this disclosure is not limited thereto, and the printed circuit board 100 may be any of a variety of electronic devices, semiconductor devices, or semiconductor packages, or may be included within a variety of electronic devices, semiconductor devices, or semiconductor packages.

[0059] refer to Figure 3 and Figure 4The array printed circuit board 100a will be described in more detail.

[0060] Figure 3 It is based on some implementation methods Figure 1 An enlarged plan view of part B in the diagram. Figure 4 It is based on some implementation methods along Figure 3 The cross-sectional view taken by line C-C' in the diagram. For clarity and simple illustration, Figure 3 The outer wiring 128 and inner wiring 129 in a portion of the peripheral region 20 and the substrate region 10 are conceptually shown.

[0061] exist Figure 3 and Figure 4 In this circuit, substrate region 10 may include wiring region 12 and edge region 14. Circuit wiring 122 included in the printed circuit board 100 may be disposed in wiring region 12. Edge region 14 may be disposed outside wiring region 12. Circuit wiring 122 may not be disposed in edge region 14 to achieve electrical stability. Connection wiring 126 configured as a test array printed circuit board 100a (see reference) may be disposed in edge region 14. Figure 7 The wiring 120 may be provided in the edge region 14, except for the connecting wiring 126 or the outer wiring 128. That is, in the edge region 14, at least a portion of the connecting wiring 126 or the outer wiring 128 may be provided without the circuit wiring 122.

[0062] The wiring region 12 may be spaced apart from the edge of the substrate region 10 by a first distance D1 in the portion excluding the portion connected to the bridging portion 24, and may be spaced apart from the edge of the substrate region 10 by a second distance D2 in the portion connected to the bridging portion 24, the second distance D2 being greater than the first distance D1. The first distance D1 or the second distance D2 may refer to the linewidth of the edge region 14, for example, the maximum linewidth of the edge region 14. The wiring region 12 may be spaced apart from the edge of the substrate region 10 by a relatively large second distance D2 in the portion connected to the bridging portion 24, thereby improving stability in the cutting process. However, this disclosure is not limited thereto; the wiring region 12 may be spaced apart from the edge of the substrate region 10 at a uniform distance. Various other modified embodiments are possible.

[0063] In some embodiments, the outer wiring 128 and inner wiring 129, which are spaced apart from each other by the separation hole 170, can be formed by the remainder of the connection wiring 126 that electrically connects the test pads 124 and the circuit wiring 122 in the test process of the array printed circuit board 100a.

[0064] In some embodiments, a separation via 170 may be provided in the substrate region 10 (e.g., in the wiring region 12) to separate at least one of a plurality of wiring layers disposed in the substrate region 10. For example, the separation via 170 may separate an outer wiring 128 and an inner wiring 129. Since the separation via 170 may be provided in the wiring region 12, the circuit wiring 122 may include an outer wiring 122w disposed outside the separation via 170 in a plan view. For example, the outer wiring 122w may be disposed between a virtual extension line connecting the outer edge of the separation via 170 and the edge of the wiring region 12.

[0065] In some embodiments, the separation via 170 can be configured to disconnect the connection wiring 126 and can separate the outer wiring 128 and the inner wiring 129 after the testing process of the array printed circuit board 100a. The separation via 170 may be referred to as a separation portion, separation pattern, separation via, electrical separation via, physical separation via, etc.

[0066] The separation hole 170 can completely pass through the array printed circuit board 100a, the printed circuit board 100, the substrate region 10, or the wiring region 12 in the thickness direction. Therefore, the separation hole 170 can be easily formed. However, this disclosure is not limited to this; the separation hole 170 can also partially pass through the array printed circuit board 100a, the printed circuit board 100, the substrate region 10, or the wiring region 12 in the thickness direction, and disconnect the connecting wiring 126. Various other modified embodiments are possible.

[0067] The separation hole 170 can be disposed in the substrate region 10 (e.g., in the wiring region 12) and can be adjacent to the edge of the substrate region 10 (e.g., the edge of the wiring region 12). That is, the distance (e.g., minimum distance) between the separation hole 170 and the edge of the substrate region 10 (e.g., the edge of the wiring region 12) can be less than the distance (e.g., minimum distance) between the separation hole 170 and the center of the substrate region 10 (e.g., the center of the wiring region 12). Thus, the separation hole 170 can be prevented from affecting the arrangement of the circuit wiring 122 disposed in the wiring region 12.

[0068] The outer wiring 128 can be disposed on the edge of the substrate region 10 and the first side of the separation hole 170 adjacent to the edge of the substrate region 10. Figure 3The outer wiring 128 may include a first portion, a second portion, and a third portion. The first portion may be disposed between the edge of the substrate region 10 and the first side of the separation hole 170. The second portion may be disposed in the track portion 22. The third portion may be disposed in the bridging portion 24 and connect the first portion and the second portion. For example, the first portion of the outer wiring 128 may include a portion disposed in the edge region 14 and a portion disposed in the wiring region 12. At least a portion of the outer wiring 128 (e.g., the first portion and / or the third portion) may extend parallel to the extension direction of the bridging portion 24. The extension direction of the bridging portion 24 may refer to a direction that intersects (e.g., is perpendicular) with the track portion 22 to which the bridging portion 24 is connected.

[0069] The outer wiring 128 may be electrically insulated from other portions of the wiring 120 disposed in the substrate region 10 (e.g., wiring region 12) (e.g., circuit wiring 122 or inner wiring 129). For example, the outer wiring 128 may be electrically insulated from other portions of the wiring 120 disposed in the substrate region 10 (e.g., wiring region 12) (e.g., circuit wiring 122 or inner wiring 129) through the separation hole 170.

[0070] The inner wiring 129 may extend from the edge of the substrate region 10 into the interior of the substrate region 10, or from the second side of the separation hole 170 opposite to the first side of the separation hole 170. Figure 3 The inner wiring 129 extends into the interior of the substrate region 10 (from the lower side of the enlarged circle). That is, the inner wiring 129 may be disposed in the substrate region 10 (e.g., in wiring region 12) and may be spaced apart from the first portion of the outer wiring 128 via the separation hole 170. The inner wiring 129 may form part of a circuit wiring 122 configured to correspond to the operation of the printed circuit board 100 for the operation of the electronic component 150, or may be electrically connected to the printed circuit board 100 for the operation of the electronic component 150.

[0071] The outer wiring 128 and the inner wiring 129 may be formed from the remaining portion of the connecting wiring 126 as described above, and the outer wiring 128 and the inner wiring 129 may be formed from portions of a layer formed by the same process. For example, the outer wiring 128 and the inner wiring 129 may comprise the same material and may be arranged to correspond to each other on the first and second sides of the separation hole 170. For example, the outer wiring 128 may comprise at least one outer wiring element disposed on the first side of the separation hole 170, and the inner wiring 129 may comprise at least one inner wiring element disposed on the second side of the separation hole 170, and the at least one outer wiring element may be opposite the at least one inner wiring element. In a portion of the outer wiring 128 and a portion of the inner wiring 129 facing each other, the outer wiring 128 and the inner wiring 129 may have the same linewidth. The statement "outer wiring 128 and inner wiring 129 are arranged to correspond to each other on the first and second sides of the separation hole 170" can mean that the outer wiring 128 and inner wiring 129 are located at the same position in a first direction (X-axis direction in the figure), and / or that the outer wiring 128 and inner wiring 129 are arranged to have a slight difference in the first direction. Having the same linewidth can mean that the linewidth of the outer wiring 128 and the linewidth of the inner wiring 129 have a difference within the process tolerance (e.g., within 10%).

[0072] The separation hole 170 separates and electrically insulates the outer wiring 128 and the inner wiring 129. The separation hole 170 may have a shape extending in a direction parallel to the edge adjacent to the separation hole 170 of the substrate region 10 or the wiring region 12. In some embodiments, the separation hole 170 may have a shape extending in a direction intersecting (e.g., perpendicular to) the extending direction of the first portion of the outer wiring 128 and / or the inner wiring 129. For example, the first portion of the outer wiring 128 and / or the inner wiring 129 may extend in the extending direction of the bridging portion 24, and the separation hole 170 may have a shape extending in a direction intersecting the extending direction of the bridging portion 24.

[0073] For example, the length L of the separation hole 170 can be greater than the width W of the separation hole 170. The width W of the separation hole 170 can refer to the width of the separation hole 170 in the extension direction of the bridging portion 24, the first portion of the outer wiring 128, and / or the inner wiring 129 (e.g., maximum width). The length L of the separation hole 170 can refer to the length of the separation hole 170 in the direction intersecting (e.g., perpendicular) to the extension direction of the bridging portion 24, the first portion of the outer wiring 128, and / or the inner wiring 129 (e.g., maximum length). In some embodiments, the length L of the separation hole 170 can refer to the length of the separation hole 170 in the direction parallel to the edge adjacent to the separation hole 170 in the substrate region 10 or the wiring region 12 (e.g., maximum length). Thus, the outer wiring 128 and the inner wiring 129 can be stably separated.

[0074] The length L of the disconnect hole 170 can be equal to or greater than the linewidth of the outer wiring 128 or the inner wiring 129. For example, the length L of the disconnect hole 170 can be greater than the linewidth of the outer wiring 128 or the inner wiring 129. Thus, the disconnect hole 170 can completely disconnect the outer wiring 128 and the inner wiring 129, and can stably disconnect the outer wiring 128 and the inner wiring 129. For example, the ratio of the length L of the disconnect hole 170 to the linewidth of the outer wiring 128 can be in the range of 1.2 to 3 (e.g., 1.2 to 2). In some embodiments, the ratio of the length L of the disconnect hole 170 to the linewidth of the inner wiring 129 can be in the range of 1.2 to 3 (e.g., 1.2 to 2). When the ratio of the length L of the disconnect hole 170 to the linewidth of the outer wiring 128 or the ratio of the length L of the disconnect hole 170 to the linewidth of the inner wiring 129 is 1.2 or greater, the disconnect hole 170 can stably disconnect the connecting wiring 126. When the ratio of the length L of the separation hole 170 to the line width of the outer wiring 128 or the ratio of the length L of the separation hole 170 to the line width of the inner wiring 129 is 3.0 or less, the length L of the separation hole 170 can be prevented from exceeding a certain level.

[0075] However, this disclosure is not limited thereto, and the ratio of the length L of the separation hole 170 to the line width of the outer wiring 128 or the ratio of the length L of the separation hole 170 to the line width of the inner wiring 129 may be less than 1.2 or greater than 3.

[0076] exist Figure 3 In this design, the separation hole 170 includes an inner portion and an end portion. The inner portion may extend along the length direction of the separation hole 170 (in the first direction or the X-axis direction in the figures) and may have a uniform width, while the end portion may be located on the opposite side of the inner portion along the length direction of the separation hole 170 and may have a circular shape. Therefore, structural stability can be improved, but this disclosure is not limited thereto.

[0077] In the width direction of the separation hole 170 (the second direction or the Y-axis direction in the figure), the separation hole 170 can be spaced apart from the edge of the wiring area 12 by a separation distance D.

[0078] In some embodiments, the width W of the separating hole 170 may be greater than the first distance D1, the second distance D2, or the separation distance D. Thus, the separating hole 170 can have a width W sufficient to stably separate the outer wiring 128 and the inner wiring 129 of the connecting wiring 126. In some embodiments, the separating hole 170 can be formed using a drill bit (e.g., a router drill) used in a cutting process. This simplifies the process of forming the separating hole 170. However, this disclosure is not limited thereto.

[0079] In some embodiments, the width W of the separating hole 170 may be equal to or less than the first distance D1, the second distance D2, or the separation distance D. This reduces the area of ​​the separating hole 170. In some embodiments, the separating hole 170 can be formed by a laser cutting process. However, this disclosure is not limited thereto.

[0080] In some embodiments, the spacing distance D can be greater than the first distance D1 or the second distance D2. Therefore, the process allowance in forming the separation hole 170 can be sufficient. However, this disclosure is not limited thereto. In some embodiments, the spacing distance D can be equal to or less than the first distance D1 or the second distance D2. Therefore, the separation hole 170 can be prevented from affecting the arrangement of the circuit wiring 122 provided in the wiring area 12.

[0081] The connection wiring 126 may include multiple connection wirings 126 for testing processes of the array printed circuit board 100a. The multiple connection wirings may have different line widths. For example, the connection wiring 126 may include a first connection wiring with a first line width and a second connection wiring with a second line width greater than the first line width. Thus, the outer wiring 128 may include multiple outer wirings with different line widths, and the inner wiring 129 may include multiple inner wirings with different line widths, each corresponding to one of the multiple outer wirings. Therefore, the separation via 170 may include multiple separation vias with different lengths (e.g., a first separation via 170a and a second separation via 170b).

[0082] For example, the first outer wiring 128a and the first inner wiring 129a may be spaced apart from each other by a first separation hole 170a, and the second outer wiring 128b and the second inner wiring 129b may be spaced apart from each other by a second separation hole 170b. The first outer wiring 128a and the first inner wiring 129a may be formed from the remaining portion of the first connecting wiring, and the second outer wiring 128b and the second inner wiring 129b may be formed from the remaining portion of the second connecting wiring. The line width of the second outer wiring 128b (e.g., the second line width) may be greater than the line width of the first outer wiring 128a (e.g., the first line width), and the line width of the second inner wiring 129b (e.g., the second line width) may be greater than the line width of the first inner wiring 129a (e.g., the first line width).

[0083] The length of the first separation aperture 170a may be equal to or greater than the first linewidth of the first outer wiring 128a or the first inner wiring 129a. For example, the ratio of the length of the first separation aperture 170a to the first linewidth may be in the range of 1.2 to 3 (e.g., 1.2 to 2). The length of the second separation aperture 170b may be equal to or greater than the second linewidth of the second outer wiring 128b or the second inner wiring 129b. For example, the ratio of the length of the second separation aperture 170b to the second linewidth may be in the range of 1.2 to 3 (e.g., 1.2 to 2). However, this disclosure is not limited thereto.

[0084] In this disclosure, an example is given of a plurality of separation holes 170 comprising two separation holes of different lengths (i.e., a first separation hole 170a and a second separation hole 170b), but the disclosure is not limited thereto. The plurality of separation holes 170 may have the same length, or may comprise three or more separation holes of different lengths.

[0085] For simplicity and clarity, in Figure 3 In this configuration, an outer wiring 128 and an inner wiring 129 are provided in a bridging portion 24, but this disclosure is not limited thereto. Reference will be made later. Figure 16 Detailed description of the implementation method.

[0086] In the attached diagram, connection wiring 126 (in) Figure 7 The middle or outer wiring 128 electrically connects the test pad 124 and the substrate region 10 through the bridging portion 24 and the track portion 22. Therefore, the separation hole 170 can be disposed adjacent to the edge of the substrate region 10 adjacent to the bridging portion 24. Figure 3 In this configuration, the separation hole 170 is disposed adjacent to the upper edge of the substrate region 10, and is not disposed in the portions adjacent to the lower edge, left edge and right edge of the substrate region 10.

[0087] However, this disclosure is not limited thereto. For example, the connecting wiring 126 or the outer wiring 128 may be provided in the bridging portion 24 that connects to at least one of the long or short edges of the substrate region 10, and the separation hole 170 may be provided adjacent to at least one of the long or short edges of the substrate region 10 in which the bridging portion 24 is provided. In some embodiments, the connecting wiring 126 or the outer wiring 128 may be provided in the bridging portion 24 that connects two substrate regions 10 (i.e., the first substrate region 10a (see reference)). Figure 1 ) and the second substrate region 10b (reference) Figure 1 In the bridging portion 24, the separation hole 170 can be positioned adjacent to the bridging portion 24 connecting the two substrate regions 10 (i.e., the first substrate region 10a and the second substrate region 10b). Thus, the position of the separation hole 170 can be modified differently depending on the position of the connecting wiring 126 or the outer wiring 128.

[0088] A cutting process can be performed on the array printed circuit board 100a to separate the array printed circuit board 100a into individual printed circuit boards 100. Thus, multiple printed circuit boards 100 can be formed.

[0089] refer to Figure 5 and Figure 6 The printed circuit board 100 according to some embodiments will be described in detail.

[0090] Figure 5 This is a plan view showing an example of a printed circuit board 100 according to some embodiments. Figure 6 It is based on some implementation methods along Figure 5 The cross-sectional view taken from line E-E' in the diagram. Figure 5 It shows the corresponding Figure 3 The part, and Figure 6 It shows the corresponding Figure 4 The part.

[0091] exist Figure 5 and Figure 6 In this process, a cutting process can be performed. During the cutting process, the array printed circuit board 100a (reference) Figure 3 (This can be found in the bridging section 24 (reference)) Figure 3 It is cut in ) and the outer area 20 (reference) can be removed. Figure 3 Therefore, the printed circuit board 100 may include a substrate region 10 (see reference). Figure 3 At least a part of ).

[0092] In some embodiments, the printed circuit board 100 or the stacked structure 130 included in the printed circuit board 100 may include a wiring region 12 and an edge region 14. The wiring region 12 may contain circuit wiring 122 included in the printed circuit board 100. The edge region 14 may be located outside the wiring region 12. In the edge region 14, at least a portion of the dummy wiring 128d may be provided without the circuit wiring 122.

[0093] Unless otherwise described, refer to Figures 1 to 4 The description of the insulating layer 110, wiring 120, stacking structure 130, protective layer 140, electronic components 150 and molding portion 160 of the array printed circuit board 100a can be applied to the printed circuit board 100.

[0094] In the cutting process of the array printed circuit board 100a, the array printed circuit board 100a can be cut such that the printed circuit board 100 has a recessed portion R in the portion connected to the bridging portion 24. Therefore, the second edge 104b of the printed circuit board 100 can be closer to the interior of the printed circuit board 100 than the first edge 104a of the printed circuit board 100. The first edge 104a of the printed circuit board 100 can be an edge in the portion of the printed circuit board 100 other than the portion connected to the bridging portion 24. The second edge 104b of the printed circuit board 100 can be an edge in the portion of the printed circuit board 100 connected to the bridging portion 24. Thus, problems that might be undesirably caused by the portion of the wiring 120 exposed on the side surface of the printed circuit board 100 (e.g., dummy wiring 128d) can be effectively prevented.

[0095] For example, the second edge 104b of the printed circuit board 100 may be spaced apart from the first edge 104a of the printed circuit board 100 by a third distance D3, and the second edge 104b of the printed circuit board 100 may be spaced apart from the edge of the wiring area 12 by a fourth distance D4. The fourth distance D4 may be greater than the third distance D3. Thus, a cutting process can be performed to space the wiring area 12 at a relatively large fourth distance D4, thereby improving electrical stability. However, this disclosure is not limited thereto, and the fourth distance D4 may be equal to or less than the third distance D3.

[0096] In some embodiments, wiring 120 exposed on the side surface of the printed circuit board 100 (e.g., dummy wiring 128d) can be separated from the inner wiring 129, and problems that may be caused by wiring 120 exposed on the side surface of the printed circuit board 100 (e.g., dummy wiring 128d) can be prevented. In some embodiments, a cutting process can be performed such that the first edge 104a and the second edge 104b of the printed circuit board 100 are aligned on the same line. Thus, the printed circuit board 100 may not include the recessed portion R in the portion connected to the bridging portion 24.

[0097] In some embodiments, a separation hole 170 configured to separate dummy wiring 128d and inner wiring 129 may be provided in the printed circuit board 100 or stack structure 130 (e.g., in wiring region 12). The separation hole 170 may be provided in wiring region 12, and in a plan view, circuit wiring 122 may include outer wiring 122w disposed outside the separation hole 170. The outer wiring 128 (see reference 20) can be removed by removing the peripheral region 20. Figure 3 The second and third parts of the outer wiring 128 may retain at least a portion of the first part of the outer wiring 128 to form dummy wiring 128d.

[0098] Unless otherwise described, the description of the outer wiring 128 (e.g., the first portion of the outer wiring 128) of the array printed circuit board 100a can be applied to the dummy wiring 128d. Unless otherwise described, the description of the split hole 170 and the inner wiring 129 of the array printed circuit board 100a can be applied to the split hole 170 and the inner wiring 129 of the printed circuit board 100.

[0099] The separation hole 170 may be adjacent to the edge of the printed circuit board 100 (e.g., stack structure 130). For example, the separation hole 170 may be located in the wiring area 12 and adjacent to the edge of the wiring area 12.

[0100] The dummy wiring 128d can be disposed on the edge of the printed circuit board 100 (e.g., the second edge 104b) and the first side of the separation hole 170 adjacent to that edge (e.g., the second edge 104b) of the printed circuit board 100. Figure 5 The dummy wiring 128d may include portions disposed in edge region 14 and portions disposed in wiring region 12. The dummy wiring 128d may extend in a direction intersecting (e.g., perpendicularly) with the edge of printed circuit board 100 (e.g., second edge 104b).

[0101] The dummy wiring 128d can be electrically insulated from other portions of wiring 120 located in the substrate region 10 (e.g., in wiring region 12) (e.g., circuit wiring 122 or inner wiring 129). For example, the outer wiring 128 can be electrically insulated from other portions of wiring 120 located in the substrate region 10 (e.g., in wiring region 12) (e.g., circuit wiring 122 or inner wiring 129) via a separation hole 170. The dummy wiring 128d can be referred to as a separated wiring, electrically separated wiring, separated pattern, electrically separated pattern, etc.

[0102] The inner wiring 129 may include a second side of the printed circuit board 100 (e.g., stack structure 130) or the separation hole 170 opposite to the first side of the separation hole 170. Figure 5 The portion extending from the lower side of the enlarged circle to the interior of the wiring area 12. That is, the inner wiring 129 can be located in the wiring area 12 and can be spaced apart from the dummy wiring 128d by the separation hole 170.

[0103] In some implementations, the dummy wiring 128d and the inner wiring 129 can be connected by the connecting wiring 126 (see reference). Figure 7 The remaining portion of the dummy wiring 128d and the inner wiring 129 can be formed from portions of a layer formed by the same process. For example, the dummy wiring 128d and the inner wiring 129 can comprise the same material and can be arranged to correspond to each other on the first and second sides of the separation hole 170. For example, the dummy wiring 128d can comprise at least one dummy wiring element disposed on the first side of the separation hole 170, and the inner wiring 129 can comprise at least one inner wiring element disposed on the second side of the separation hole 170, and at least one dummy wiring element can be opposite each other. In a portion of the dummy wiring 128d and a portion of the inner wiring 129 facing each other, the dummy wiring 128d and the inner wiring 129 can have the same linewidth. The statement "the dummy wiring 128d and the inner wiring 129 are arranged to correspond to each other on the first and second sides of the separation hole 170" can mean that the dummy wiring 128d and the inner wiring 129 are located at the same position in the first direction (the X-axis direction in the figure), and / or the dummy wiring 128d and the inner wiring 129 are arranged to have a slight difference in the first direction. Having the same linewidth can mean that the linewidth of the dummy wiring 128d and the linewidth of the inner wiring 129 have a difference within the process tolerance (e.g., within 10%).

[0104] The separation hole 170 can separate and electrically insulate the dummy wiring 128d and the inner wiring 129. The separation hole 170 may have a shape extending in a direction parallel to the edge adjacent to the printed circuit board 100 (e.g., stack structure 130). In some embodiments, the separation hole 170 may have a shape extending in a direction intersecting (e.g., perpendicular to) the extension direction of a first portion of the dummy wiring 128d and / or the inner wiring 129.

[0105] For example, the length of the split hole 170 may be greater than the width of the split hole 170. In some embodiments, the length of the split hole 170 may be equal to or greater than the linewidth of the dummy wiring 128d or the linewidth of the inner wiring 129. For example, the ratio of the length of the split hole 170 to the linewidth of the dummy wiring 128d may be in the range of 1.2 to 3 (e.g., 1.2 to 2). In some embodiments, the ratio of the length of the split hole 170 to the linewidth of the inner wiring 129 may be in the range of 1.2 to 3 (e.g., 1.2 to 2). However, this disclosure is not limited thereto, and the ratio of the length of the split hole 170 to the linewidth of the dummy wiring 128d or the ratio of the length of the split hole 170 to the linewidth of the inner wiring 129 may be less than 1.2 or greater than 3.

[0106] In the width direction of the separation hole 170 (the second direction or the Y-axis direction in the figure), the separation hole 170 can be spaced apart from the edge of the wiring area 12 by a separation distance D.

[0107] In some embodiments, the spacing distance D can be greater than the third distance D3 or the fourth distance D4. Therefore, the process allowance in forming the separation hole 170 can be sufficient. However, this disclosure is not limited thereto. In some embodiments, the spacing distance D can be equal to or less than the third distance D3 or the fourth distance D4. Therefore, the separation hole 170 can be prevented from affecting the arrangement of the circuit wiring 122 provided in the wiring area 12.

[0108] In some embodiments, dummy wiring 128d may include a plurality of dummy wirings with different linewidths, and inner wiring 129 may include a plurality of inner wirings with different linewidths and corresponding to the plurality of dummy wirings respectively. Therefore, split hole 170 may include a plurality of split holes with different lengths (e.g., a first split hole 170a (reference...)). Figure 3 ) and second separation hole 170b (reference) Figure 3 )). refer to Figure 3 and Figure 4 The description of multiple outer routings, multiple inner routings, and multiple split vias can be applied to multiple dummy routings, multiple inner routings, and multiple split vias.

[0109] In some implementations, the outer wiring 128 exposed to the outside after the cutting process can be replaced with a dummy wiring 128d that is electrically insulated from the circuit wiring 122 or the inner wiring 129 disposed in the wiring area 12.

[0110] According to some embodiments, wiring 120 (e.g., dummy wiring 128d) exposed on the side surface of the printed circuit board 100 can be separated from circuit wiring 122 or inner wiring 129 disposed in the inner region of the printed circuit board 100 (e.g., in wiring region 12). Therefore, when the printed circuit board 100 is mounted on a fixture or bracket of an external electronic device, undesirable electrical short circuits that might be caused by wiring 120 (e.g., dummy wiring 128d) exposed on the side surface of the printed circuit board 100 can be prevented. This improves the reliability of the printed circuit board 100.

[0111] In the comparative example, wiring exposed on the side surface of the printed circuit board is electrically connected to wiring located in the internal area of ​​the printed circuit board. When the printed circuit board is mounted on a fixture or bracket of an external electronic device, the wiring exposed on the side surface of the printed circuit board may undesirably be electrically connected to the external electronic device (e.g., the ground of the external electronic device), and electrical short circuits may be undesirably caused. If the side surface of the printed circuit board can be further removed to prevent the above-mentioned problems, the area where the wiring is located may be undesirably reduced, and problems may exist due to the wiring exposed on the side surface of the printed circuit board.

[0112] Reference Figures 7 to 15 This section will describe in detail examples of methods for manufacturing printed circuit boards according to some embodiments. With respect to components not described in detail below, it will be understood that the component is at least similar to a corresponding component already described elsewhere in this disclosure. The parts not described above will be described in detail.

[0113] Figures 7 to 9 This is a plan view illustrating an example of a method for manufacturing a printed circuit board according to some embodiments. Figures 7 to 9 It shows the corresponding Figure 3 or Figure 5 The part.

[0114] exist Figures 7 to 9 In the process of manufacturing the printed circuit board 100, the process may include: a process of forming an array of printed circuit boards 100a, a process of testing the array of printed circuit boards 100a, and a process of forming a separation hole 170 and cutting the array of printed circuit boards 100a into individual printed circuit boards 100.

[0115] First of all, Figure 7 In this process, the process of forming the array printed circuit board 100a can be performed, and the testing process of the array printed circuit board 100a can also be performed.

[0116] In the process of forming the array printed circuit board 100a, the array printed circuit board 100a can be formed. The array printed circuit board 100a may include: a plurality of substrate regions 10, a plurality of printed circuit boards 100 respectively disposed in the plurality of substrate regions 10; a peripheral region 20 connecting the plurality of substrate regions 10; test pads 124 disposed in the peripheral region 20; and connection wiring 126 electrically connecting the test pads 124 and the substrate regions 10.

[0117] Connection wiring 126 can extend from test pad 124 and through bridging portion 24 into the interior of substrate region 10 (e.g., the interior of wiring region 12). Connection wiring 126 may include multiple connection wirings configured to transmit power supply voltage, ground voltage, and various signals for testing. For example, connection wiring 126 may include multiple connection wirings with different linewidths. For example, connection wiring 126 may include a first connection wiring with a first linewidth and a second connection wiring with a second linewidth greater than the first linewidth. However, this disclosure is not limited thereto.

[0118] In some embodiments, during the process of forming the array printed circuit board 100a, the separation hole 170 (see reference) can be used. Figure 8 Preliminary markings are formed in at least a portion of the corresponding portion of the array printed circuit board 100a. For example, the array printed circuit board 100a may include preliminary holes 170p as preliminary markings. The location of the separation holes 170 to be set can be easily identified or determined during the process of forming the separation holes 170. When the connection wiring 126 can be disposed inside the array printed circuit board 100a, the location of the separation holes 170 to be set can be easily identified or anticipated by marking the location of the separation holes 170 using preliminary markings (e.g., preliminary holes 170p).

[0119] In some embodiments, the preliminary hole 170p may include a first preliminary hole 171p and a second preliminary hole 172p disposed on opposite sides of the connecting wiring 126. For example, the first preliminary hole 171p and the second preliminary hole 172p may be configured to correspond to opposite ends of the separation hole 170. Thus, in the process of forming the separation hole 170, the separation hole 170 can be formed to connect the first preliminary hole 171p and the second preliminary hole 172p. Thus, the separation hole 170 can be easily formed. However, this disclosure is not limited thereto; the preliminary hole 170p may include at least one of the first preliminary hole 171p and the second preliminary hole 172p, or may also include additional holes other than the first preliminary hole 171p and the second preliminary hole 172p.

[0120] The size (e.g., diameter) of the preliminary hole 170p can be equal to or greater than the bit size (e.g., bit diameter) of the drill bit (e.g., end mill drill bit) used in the cutting process. However, this disclosure is not limited thereto, and the size (e.g., diameter) of the preliminary hole 170p can be smaller than the bit size (e.g., bit diameter) of the drill bit (e.g., end mill drill bit) used in the cutting process.

[0121] Subsequently, the testing process for the array printed circuit board 100a can be performed.

[0122] In the testing process of the array printed circuit board 100a, the side of the array printed circuit board 100a with the test pads 124 can be inserted into a test device configured to perform the testing process of the array printed circuit board 100a, and the array printed circuit board 100a and the test device can be electrically connected to each other.

[0123] In the testing process of the array printed circuit board 100a, test pads 124 and connection wiring 126 can be used to test whether the array printed circuit board 100a is working properly and whether there are defects in the array printed circuit board 100a. In the testing process of the array printed circuit board 100a, the test pads 124 can receive voltage or signals from the test equipment, and the received voltage or signals can be provided to the substrate area 10 or the printed circuit board 100 through the connection wiring 126. For example, in the testing process of the array printed circuit board 100a, the test pads 124 can receive power supply voltage, ground voltage, and various signals used for testing, and the received voltage or signals can be provided to the substrate area 10 or the printed circuit board 100 through the connection wiring 126.

[0124] In some embodiments, the preliminary via 170p is formed prior to the testing process of the array printed circuit board 100a. However, this disclosure is not limited thereto, and the preliminary via 170p may be formed after the testing process of the array printed circuit board 100a.

[0125] Subsequently, Figure 8 In this process, a disconnect wiring 126 (see reference) can be formed in substrate region 10. Figure 7 The separation hole 170. Thus, the connecting wiring 126 can be separated into an outer wiring 128 and an inner wiring 129 spaced apart from each other by the separation hole 170.

[0126] The separation hole 170 can completely pass through the array printed circuit board 100a, the printed circuit board 100, the substrate region 10, or the wiring region 12. Therefore, the separation hole 170 can be easily formed. However, this disclosure is not limited thereto; the separation hole 170 can also partially pass through the array printed circuit board 100a, the printed circuit board 100, the substrate region 10, or the wiring region 12 in the thickness direction, and disconnect the connecting wiring 126. Various other modified embodiments are possible.

[0127] In the process of forming the separation hole 170, a preliminary hole 170p (reference) can be used. Figure 7 This forms a separation hole 170. For example, the separation hole 170 can be formed to connect to the first preliminary hole 171p (see reference). Figure 7 ) and the second preliminary hole 172p (reference) Figure 7 For example, the separation hole 170 can be formed using a drill bit (e.g., a milling cutter) used in a cutting process that cuts an array of printed circuit boards 100a into multiple printed circuit boards 100. When the separation hole 170 can be formed using a drill bit (e.g., a milling cutter) used in the cutting process, the size (e.g., diameter) of the separation hole 170 can be equal to or greater than the drill bit size (e.g., drill bit diameter) of the drill bit (e.g., a milling cutter) used in the cutting process. However, this disclosure is not limited thereto. The process of forming the separation hole 170 can be performed by any of a variety of processes, or the size (e.g., width or diameter) of the separation hole 170 can be modified differently.

[0128] Subsequently, Figure 9 In this process, a cutting process can be performed. During the cutting process, the array printed circuit board 100a (reference) Figure 8 The substrate 10 can be cut into multiple printed circuit boards 100. During the cutting process, a substrate region 10 (see reference 10) can be formed. Figure 8 A printed circuit board 100 is formed from at least a portion of the substrate region 10. An outer wiring 128 (see reference) is provided in the substrate region 10. Figure 8 A portion of (e.g., the first portion) can form dummy wiring 128d.

[0129] In the cutting process, an array of printed circuit boards 100a can be cut into multiple printed circuit boards 100 using a drill bit (e.g., a milling cutter). However, this disclosure is not limited thereto, and the cutting process can be performed by any of a variety of processes.

[0130] In some embodiments, a dicing process for cutting the array printed circuit board 100a into a plurality of printed circuit boards 100 is performed after the process of forming the separation hole 170. However, this disclosure is not limited thereto. In some embodiments, the process of forming the separation hole 170 and the dicing process may be performed together, or the process of forming the separation hole 170 may be performed after the dicing process. Various other modified embodiments are possible.

[0131] According to some embodiments, the portion of wiring 120 exposed on the side surface of the printed circuit board 100 (e.g., dummy wiring 128d) can be separated from the portion of wiring 120 located in the internal region of the printed circuit board 100 (e.g., circuit wiring 122 or inner wiring 129) by a simple process. Therefore, the productivity of the printed circuit board 100 with improved reliability can be increased.

[0132] Figures 10 to 12 This is a cross-sectional view illustrating an example of a method for manufacturing a printed circuit board according to some embodiments. Figures 10 to 12 The diagram shows a corresponding embodiment according to some implementations. Figure 4 or Figure 6 The part that is not described in detail below can be understood to be at least similar to the one already referenced. Figures 7 to 9 The corresponding components are described. Parts not described above will be described in detail.

[0133] exist Figures 10 to 12 In the process of manufacturing the printed circuit board 100, the process may include: a process of forming an array of printed circuit boards 100a, a process of testing the array of printed circuit boards 100a, and a process of forming a separation hole 170 and cutting the array of printed circuit boards 100a into individual printed circuit boards 100.

[0134] First of all, Figure 10 In this process, the process of forming the array printed circuit board 100a can be performed, and the testing process of the array printed circuit board 100a can also be performed.

[0135] In the process of forming the array printed circuit board 100a, the array printed circuit board 100a can be formed. The array printed circuit board 100a may include: a plurality of substrate regions 10, in which a plurality of printed circuit boards 100 are respectively disposed; a peripheral region 20 connecting the plurality of substrate regions 10; test pads 124 disposed in the peripheral region 20; and connection wiring 126 electrically connecting the test pads 124 and the substrate regions 10. The connection wiring 126 may extend from the test pads 124 and extend through bridging portions 24 into the interior of the substrate regions 10 (e.g., the interior of wiring regions 12).

[0136] In some embodiments, during the process of forming the array printed circuit board 100a, the separation hole 170 (see reference) can be used. Figure 11 A preliminary mark is formed in at least a portion of the corresponding part of the array printed circuit board 100a. For example, the array printed circuit board 100a may include an opening 107f as a preliminary mark. The opening 107f can be formed by removing a portion of the protective layer 140 (e.g., the first protective layer 142 or the second protective layer 144). Through the opening 107f of the protective layer 140, the location where the separation hole 170 will be set can be easily identified or determined in the process of forming the separation hole 170. When the connection wiring 126 can be disposed inside the array printed circuit board 100a, the location where the separation hole 170 will be set can be easily identified or anticipated by marking the location of the separation hole 170 using the preliminary mark (e.g., the opening 107f of the protective layer 140).

[0137] In some embodiments, opening 107f may include a first opening and a second opening disposed on opposite sides of the connecting wiring 126. In some embodiments, opening 107f may be formed entirely within the portion where the separation hole 170 will be disposed. However, this disclosure is not limited thereto. Opening 107f may include at least one of the first opening and the second opening, and opening 107f may also include additional openings in addition to the first and second openings, or opening 107f may be formed corresponding to the portion where the separation hole 170 will be disposed.

[0138] exist Figure 10 In this configuration, opening 107f is formed in the first protective layer 142. In some embodiments, opening 107f may be formed in the second protective layer 144. For example, opening 107f may be formed at least at the surface where the dicing process is performed. When a dicing process is performed on the upper surface of the array printed circuit board 100a, opening 107f may be formed at the surface where the dicing process is performed. Figure 1 The first protective layer 142 in the printed circuit board 100 in the first substrate region 10a shown, and the opening 107f can be formed in the first protective layer 142 ... Figure 1 The second protective layer 144 is located in the printed circuit board 100 within the second substrate region 10b shown. When a cutting process is performed on the lower surface of the array printed circuit board 100a, an opening 107f can be formed in the second protective layer 144 of the printed circuit board 100a. Figure 1 The second protective layer 144 in the printed circuit board 100 in the first substrate region 10a shown, and the opening 107f can be formed in the second protective layer 14 ... Figure 1 The first protective layer 142 is located in the printed circuit board 100 in the second substrate region 10b shown. In some embodiments, an opening 107f may be formed in each of the first protective layer 142 and the second protective layer 144.

[0139] The size (e.g., diameter) of the opening 107f can be equal to or greater than the size (e.g., drill diameter) of the drill bit (e.g., end mill drill bit) used in the cutting process.

[0140] Subsequently, the testing process for the array printed circuit board 100a can be performed.

[0141] In some embodiments, the opening 107f of the protective layer 140 is formed before the testing process of the array printed circuit board 100a. However, this disclosure is not limited thereto, and the opening 107f of the protective layer 140 may be formed after the testing process of the array printed circuit board 100a.

[0142] In some embodiments, the initial marked opening 107f is formed by removing a portion of the protective layer 140. This allows for easy identification or determination of the presence or absence of the protective layer 140, and easy identification or anticipation of the portion where the separation hole 170 will be formed. However, this disclosure is not limited thereto. In some embodiments, the array printed circuit board 100a or printed circuit board 100 (see reference 100a) can be removed. Figure 12 A portion of the layer included in the initial marking is used to form the opening 107f.

[0143] Subsequently, Figure 11 In this process, a disconnect wiring 126 (see reference) can be formed in substrate region 10. Figure 10 The separation hole 170. Thus, the connecting wiring 126 can be separated into an outer wiring 128 and an inner wiring 129 spaced apart from each other by the separation hole 170.

[0144] In the process of forming the separation hole 170, the opening 170f of the protective layer 140 (see reference) can be used. Figure 10 The separation hole 170 is formed. For example, the separation hole 170 can be formed using a drill bit (e.g., a milling cutter bit) used in a cutting process that cuts an array of printed circuit boards 100a into multiple printed circuit boards 100. When the separation hole 170 can be formed using a drill bit (e.g., a milling cutter bit) used in the cutting process, the size (e.g., diameter) of the separation hole 170 can be equal to or greater than the drill bit size (e.g., drill bit diameter) of the drill bit (e.g., a milling cutter bit) used in the cutting process. However, this disclosure is not limited thereto. The process of forming the separation hole 170 can be performed by any of a variety of processes, or the size (e.g., width or diameter) of the separation hole 170 can be modified differently.

[0145] Subsequently, Figure 12 In this process, a cutting process can be performed. During the cutting process, the array printed circuit board 100a (reference) Figure 11The substrate 10 can be cut into multiple printed circuit boards 100. During the cutting process, a substrate region 10 (see reference 10) can be formed. Figure 11 A printed circuit board 100 is formed from at least a portion of the substrate region 10. An outer wiring 128 (see reference) is provided in the substrate region 10. Figure 11 A portion of (e.g., the first portion) can form dummy wiring 128d.

[0146] In the cutting process, an array of printed circuit boards 100a can be cut into multiple printed circuit boards 100 using a drill bit (e.g., a milling cutter). However, this disclosure is not limited thereto, and the cutting process can be performed by any of a variety of processes.

[0147] In some embodiments, a dicing process for cutting the array printed circuit board 100a into a plurality of printed circuit boards 100 is performed after the process of forming the separation hole 170. However, this disclosure is not limited thereto. In some embodiments, the process of forming the separation hole 170 and the dicing process may be performed together, or the process of forming the separation hole 170 may be performed after the dicing process. Various other modified embodiments are possible.

[0148] According to some embodiments, the portion of wiring 120 exposed on the side surface of the printed circuit board 100 (e.g., dummy wiring 128d) can be separated from the portion of wiring 120 located in the internal region of the printed circuit board 100 (e.g., circuit wiring 122 or inner wiring 129) by a simple process. Therefore, the productivity of the printed circuit board 100 with improved reliability can be increased.

[0149] Figures 13 to 15 This is a plan view illustrating an example of a method for manufacturing a printed circuit board according to some embodiments. Figures 13 to 15 The diagram shows a corresponding embodiment according to some implementations. Figure 3 or Figure 5 The part that is not described in detail below can be understood to be at least similar to the one already referenced. Figures 7 to 12 The corresponding components are described. Parts not described above will be described in detail.

[0150] exist Figures 13 to 15 In the process of manufacturing the printed circuit board 100, the process may include: a process of forming an array of printed circuit boards 100a, a process of testing the array of printed circuit boards 100a, and a process of forming a separation hole 170 and cutting the array of printed circuit boards 100a into individual printed circuit boards 100.

[0151] First of all, Figure 13 In this process, the process of forming the array printed circuit board 100a can be performed, and the testing process of the array printed circuit board 100a can also be performed.

[0152] In the process of forming the array printed circuit board 100a, the array printed circuit board 100a can be formed. The array printed circuit board 100a may include: a plurality of substrate regions 10, in which a plurality of printed circuit boards 100 are respectively disposed; a peripheral region 20 connecting the plurality of substrate regions 10; test pads 124 disposed in the peripheral region 20; and connection wiring 126 electrically connecting the test pads 124 and the substrate regions 10. The connection wiring 126 may extend from the test pads 124 and extend through bridging portions 24 into the interior of the substrate regions 10 (e.g., the interior of wiring regions 12).

[0153] In some embodiments, during the process of forming the array printed circuit board 100a, it may be unnecessary to form the separation hole 170 (see reference). Figure 14 The initial marking of ).

[0154] Subsequently, Figure 14 In this process, a disconnect wiring 126 (see reference) can be formed in substrate region 10. Figure 13 The separation hole 170. Thus, the connecting wiring 126 can be separated into an outer wiring 128 and an inner wiring 129 spaced apart from each other by the separation hole 170.

[0155] In the process of forming the separation hole 170, a laser can be used to form the separation hole 170. When a laser is used, the separation hole 170 can have a small size (e.g., a small width). Furthermore, the preliminary markings used to form the separation hole 170 can be omitted, and the manufacturing process can be simplified. However, this disclosure is not limited thereto, and the process of forming the separation hole 170 can be performed by any of a variety of processes.

[0156] Subsequently, Figure 15 In this process, a cutting process can be performed. During the cutting process, the array printed circuit board 100a (reference) Figure 14 The substrate 10 can be cut into multiple printed circuit boards 100. During the cutting process, a substrate region 10 (see reference 10) can be formed. Figure 14 A printed circuit board 100 is formed from at least a portion of the substrate region 10. An outer wiring 128 (see reference) is provided in the substrate region 10. Figure 14 A portion of (e.g., the first portion) can form dummy wiring 128d.

[0157] In the cutting process, an array of printed circuit boards 100a can be cut into multiple printed circuit boards 100 using a drill bit (e.g., a milling cutter). However, this disclosure is not limited thereto, and the cutting process can be performed by any of a variety of processes.

[0158] In some embodiments, a dicing process for cutting the array printed circuit board 100a into a plurality of printed circuit boards 100 is performed after the process of forming the separation hole 170. However, this disclosure is not limited thereto. In some embodiments, the process of forming the separation hole 170 and the dicing process may be performed together, or the process of forming the separation hole 170 may be performed after the dicing process. Various other modified embodiments are possible.

[0159] According to some embodiments, the portion of wiring 120 exposed on the side surface of the printed circuit board 100 (e.g., dummy wiring 128d) can be separated from the portion of wiring 120 located in the internal region of the printed circuit board 100 (e.g., circuit wiring 122 or inner wiring 129) by a simple process. Therefore, the productivity of the printed circuit board 100 with improved reliability can be increased.

[0160] In the following text, Figure 16 The array printed circuit board will be described in detail below. For any component not described in detail below, it will be understood that the component is at least similar to a corresponding component already described elsewhere in this disclosure. Details not described above will be described in detail.

[0161] Figure 16 This is a partial plan view illustrating an example of an array printed circuit board according to some embodiments. Figure 16 The diagram illustrates the relationship with, according to some implementation methods Figure 3 The part corresponding to the part in the magnified circle.

[0162] exist Figure 16 In this bridging portion 24, multiple outer wirings 128 can be disposed within a bridging portion 24, and multiple inner wirings 129 can be disposed corresponding to the multiple outer wirings 128 respectively. A separation hole 170 can separate the multiple outer wirings 128 and the multiple inner wirings 129 in a bridging portion 24.

[0163] For example, in a bridging section 24, the third outer wiring 128e and the fourth outer wiring 128f can be disposed on the first side of the separation hole 170, and the third inner wiring 129e and the fourth inner wiring 129f can be disposed on the second side of the separation hole 170. The third outer wiring 128e and the third inner wiring 129e can be formed from the remaining portion of the third connecting wiring, and the fourth outer wiring 128f and the fourth inner wiring 129f can be formed from the remaining portion of the fourth connecting wiring. Through a separation hole 170, the third outer wiring 128e and the third inner wiring 129e can be disconnected, and the fourth outer wiring 128f and the fourth inner wiring 129f can be disconnected. Thus, multiple connecting wirings (e.g., the third connecting wiring and the fourth connecting wiring) can be disconnected with a simple process.

[0164] The width of the separation hole 170 can be greater than the sum of the line widths of the third outer wiring 128e and the fourth outer wiring 128f. The width of the separation hole 170 can also be greater than the sum of the line widths of the third outer wiring 128e, the fourth outer wiring 128f, and the spacing between the third outer wiring 128e and the fourth outer wiring 128f. In some embodiments, the width of the separation hole 170 can be greater than the sum of the line widths of the third inner wiring 129e and the fourth inner wiring 129f. The width of the separation hole 170 can also be greater than the sum of the line widths of the third inner wiring 129e, the fourth inner wiring 129f, and the spacing between the third inner wiring 129e and the fourth inner wiring 129f. Therefore, the third outer wiring 128e and the third inner wiring 129e can be stably separated, and the fourth outer wiring 128f and the fourth inner wiring 129f can also be stably separated.

[0165] In a printed circuit board formed by a cutting process that cuts an array of printed circuit boards into individual printed circuit boards, in a portion corresponding to a bridging portion 24, a plurality of dummy traces may be disposed on a first side of a separation aperture 170, and a plurality of inner traces 129, each corresponding to a plurality of dummy traces, may be disposed on a second side of the separation aperture 170. The plurality of dummy traces and the plurality of inner traces 129 may comprise the same material and may be arranged to correspond to each other on the first and second sides of the separation aperture 170. In portions of the dummy traces and the inner traces 129 facing each other, the dummy traces and the inner traces 129 may have the same linewidth.

[0166] However, this disclosure is not limited thereto. In some embodiments, a plurality of separation holes 170 may be provided in a bridging portion 24 of the array printed circuit board to correspond to a plurality of outer wirings 128 or a plurality of inner wirings 129, respectively. In this case, in the printed circuit board, in a portion corresponding to a bridging portion 24, a plurality of separation holes 170 may be provided to correspond to a plurality of dummy wirings or a plurality of inner wirings 129, respectively.

[0167] While this disclosure contains numerous specific implementation details, these should not be construed as limiting the scope of protection that may be claimed, its equivalents, or the described claims. Certain features described in the context of separate embodiments in this disclosure may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented separately or in any suitable sub-combination in multiple embodiments. Furthermore, although features may be described above as functioning in certain combinations, in some cases, one or more features from a combination may be excluded from that combination, and the combination may be for sub-combinations or variations thereof.

Claims

1. An array printed circuit board, the array printed circuit board comprising: Multiple substrate regions, and multiple printed circuit boards are respectively disposed in the multiple substrate regions; as well as The peripheral region is connected to the plurality of substrate regions. At least one of the plurality of substrate regions includes a separation hole. Wherein, the at least one substrate region and the peripheral region include wiring, wherein the wiring includes one or more wiring layers, and The wiring includes an outer wiring, which includes a first portion located between the edge of the at least one substrate region and a first side of the separation hole, wherein the first side of the separation hole is adjacent to the edge of the at least one substrate region.

2. The array printed circuit board according to claim 1, in, The at least one substrate region includes a wiring region and an edge region located outside the wiring region. The wiring area includes the circuit wiring of the first printed circuit board, and The wiring area includes the separation hole.

3. The array printed circuit board according to claim 2, wherein, The circuit wiring includes external wiring, which is located outside the separation via in the plan view of the array printed circuit board.

4. The array printed circuit board according to claim 1, wherein, The outer wiring is electrically insulated from other portions of the wiring located in the at least one substrate region.

5. The array printed circuit board according to claim 1, in, The wiring also includes inner wiring located on the second side of the separation hole. Wherein, the second side of the separation hole is opposite to the first side of the separation hole, and The inner wiring is separated from the outer wiring by the separation hole.

6. The array printed circuit board according to claim 5, in, The outer wiring and the inner wiring comprise the same material. The outer wiring includes at least one outer wiring element disposed on the first side of the separation hole. The inner wiring includes at least one inner wiring element disposed on the second side of the separation hole, and The at least one outer wiring element is located opposite the at least one inner wiring element.

7. The array printed circuit board according to claim 1, wherein, The separation hole has an elongated shape in a first direction or in a second direction, the first direction being parallel to the edge of the at least one substrate region adjacent to the separation hole, and the second direction intersecting the path of the first portion of the outer wiring.

8. The array printed circuit board according to claim 1, in, The length of the separation hole in the direction parallel to the edge adjacent to the separation hole in the at least one substrate region is greater than the line width of the outer wiring. The ratio of the length of the separation hole to the line width of the outer wiring is 1.2 to 3.

9. The array printed circuit board according to claim 1, in, The at least one substrate region includes a plurality of separation holes, and Among the plurality of separation holes, at least two separation holes have different lengths.

10. A printed circuit board, the printed circuit board comprising: A stacked structure, the stacked structure including an insulating layer and wiring, wherein the wiring includes multiple wiring layers; and A separation via, the separation via being configured to separate at least one of the plurality of wiring layers; The wiring includes dummy wiring, which is located between the edge of the stacked structure and the first side of the separation hole, and the first side of the separation hole is adjacent to the edge of the stacked structure.

11. The printed circuit board of claim 10, further comprising: Electronic components, the electronic components being located on the stacked structure, The wiring includes circuit wiring that is electrically connected to the electronic components. The stacked structure includes a wiring area and an edge area located outside the wiring area. The circuit wiring is located within the wiring area. Wherein, at least a portion of the dummy wiring is located in the edge region, and The separation hole is located in the wiring area.

12. The printed circuit board according to claim 11, wherein, In the plan view of the printed circuit board, the circuit wiring includes external wiring located outside the separation hole.

13. The printed circuit board according to claim 10, wherein, The dummy wiring is electrically insulated from the other parts of the wiring.

14. The printed circuit board according to claim 10, wherein, The wiring also includes inner wiring located on the second side of the separation hole. Wherein, the second side of the separation hole is opposite to the first side of the separation hole, and The inner wiring is separated from the dummy wiring by the separation hole.

15. The printed circuit board according to claim 14, in, The dummy wiring and the inner wiring are made of the same material. The dummy wiring includes at least one dummy wiring element arranged on the first side of the separation hole. The inner wiring includes at least one inner wiring element disposed on the second side of the separation hole, and The at least one dummy wiring element is located opposite the at least one inner wiring element arranged on the second side of the separation hole.

16. The printed circuit board according to claim 10, wherein, The separation hole has an elongated shape in a first direction or in a second direction, the first direction being parallel to the edge of the stacked structure adjacent to the separation hole, and the second direction intersecting the path of the dummy wiring extension.

17. A method for manufacturing a printed circuit board, the method comprising: An array printed circuit board is formed, wherein the array printed circuit board includes: a plurality of substrate regions, wherein a plurality of printed circuit boards are respectively disposed in the plurality of substrate regions; a peripheral region configured to connect the plurality of substrate regions; a test pad located in the peripheral region; and a connection wiring electrically connecting the test pad and at least one of the plurality of substrate regions. The array printed circuit board is tested using the test pads and the connection wiring. Forming separation holes; and Cut the array printed circuit board; The separation hole is configured to disconnect the connection wiring from the wiring in the at least one substrate region.

18. The manufacturing method according to claim 17, wherein, Forming the array printed circuit board includes forming preliminary markings in at least one substrate region.

19. The manufacturing method according to claim 18, wherein, The preliminary markings are preliminary separation holes or openings. Forming the initial separation hole or the opening includes removing a portion of a layer from the array printed circuit board.

20. The manufacturing method according to claim 17, wherein, Forming the separation hole includes forming the separation hole by using a milling cutter or a laser.

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