A Test Method for Dynamic On-Resistance of GaN HEMT

Abstract

This invention proposes a method for testing the dynamic on-resistance of GaN HEMTs, including the design of the test circuit, the connection method of the test device, the method of applying the test pulse signal, and the calculation method of the dynamic on-resistance. The proposed method for testing the dynamic on-resistance of GaN HEMTs can quickly and accurately measure the dynamic on-resistance of GaN HEMTs, providing a basis for reliability evaluation and degradation assessment of GaN HEMTs. The steps are as follows: Step 1: Configure the test circuit topology and fabricate the test circuit board for the dynamic on-resistance of GaN HEMTs; Step 2: Connect the test device, which includes a high-voltage power supply, an oscilloscope, a power supply unit, a signal generator, and the test circuit board; Step 3: Apply a pulse signal and simultaneously acquire feedback data. A predefined pulse signal is applied to the gate of the GaN HEMT under test through the signal generator, and the waveform data of the device under test is captured using the oscilloscope; Step 4: Calculate the dynamic on-resistance of the device under test based on the acquired waveform data.

Description

Technical Field

[0001] This invention provides a method for testing the dynamic on-resistance of GaN HEMTs, which relates to a method for testing the parameters of semiconductor power devices and belongs to the field of semiconductor device parameter testing. Background Technology

[0002] Gallium nitride (GaN) is a widely studied wide-bandgap semiconductor material. Compared to silicon (Si) and silicon carbide (SiC), GaN has a larger bandgap and a higher critical breakdown electric field, exhibiting superior material properties. GaN high electron mobility transistors (GaN HEMTs) utilize these characteristics, possessing high breakdown electric field, high electron mobility, and low on-resistance, and have found wide application in high-efficiency power conversion systems.

[0003] In practical applications, GaN HEMTs typically operate in high-frequency, high-voltage switching states. Combined with the effects of heteroepitaxial processes, GaN HEMTs contain numerous electron traps, leading to charge trapping during switching—a phenomenon known as the trapping effect. This trapping effect causes device degradation, the most noticeable being a decrease in on-resistance.

[0004] Traditional on-resistance testing often employs DC testing methods, specifically measuring the volt-ampere characteristic curve under DC bias. This method only reflects the static characteristics of the device under steady-state conditions. Under stresses such as high voltage and temperature, the dynamic on-resistance value of the device differs significantly from that under static conditions. Therefore, the static on-resistance value cannot provide accurate assessment of device degradation for practical applications. Measuring the dynamic on-resistance of GaN HEMTs typically involves clamping circuits, but existing methods suffer from drawbacks such as time delay, severe oscillation, and the inability to directly obtain the drain voltage when the device is turned on. Therefore, based on the characteristics of GaN HEMTs, it is necessary to propose a testing method that can rapidly obtain the dynamic on-resistance of GaN HEMTs.

[0005] This invention proposes a test method for the dynamic on-resistance of GaN HEMTs. Using this test circuit and method, the dynamic on-resistance of GaN HEMTs can be measured quickly and accurately, providing a basis for reliability evaluation and degradation assessment of GaN HEMTs. Summary of the Invention

[0006] 1. Objective: To address the shortcomings of existing technologies, this invention proposes a method for testing the dynamic on-resistance of GaN HEMTs.

[0007] 2. Technical Solution

[0008] A method for testing the dynamic on-resistance of GaN HEMTs includes the following steps:

[0009] Step 1: Configure the test circuit topology and fabricate the test circuit board for GaN HEMT dynamic on-resistance.

[0010] First, the test circuit is designed, which consists of three parts: a drive circuit, a clamping circuit, and a power loop.

[0011] The drive circuit comprises three modules: a power isolation module, a voltage regulator module, and a drive module. The power isolation module isolates the power supply from the device under test (DUT), preventing high voltage in the power circuit from damaging the power supply if the DUT fails. The voltage regulator module ensures a stable and reliable gate voltage signal supplied to the DUT. The drive module receives the pulse signal from the signal generator and transmits it to the DUT.

[0012] The clamping circuit consists of an operational amplifier, a Schottky diode, a Zener diode, an input resistor, and a feedback resistor. It can directly read the drain voltage value of the device after it changes from the off state to the on state.

[0013] The power circuit consists of a load inductor, a freewheeling diode, a device under test (DUT), a storage capacitor, a filter capacitor, and a coaxial shunt. The load inductor and freewheeling diode are connected in parallel as the load of the power circuit, between the DUT and the high-voltage source. The source of the DUT is divided into a power source and a Kelvin source using two pins. The power source is connected to the power reference ground, and the Kelvin source is connected to the reference ground of the drive circuit. The storage capacitor stores energy and releases it when needed. The coaxial shunt is connected in series between the power source and the power reference ground to measure the drain-source current Ids when the device is turned on.

[0014] Connect the drive circuit to the gate of the device under test (DUT), and the clamping circuit to the drain and source of the DUT. After completing the design of the test circuit, select the components and complete the fabrication of the test circuit board.

[0015] Step Two: Connect the testing setup, which includes a high-voltage power supply, an oscilloscope, a power supply unit, a signal generator, and a test circuit board. The positive terminal of the high-voltage power supply is connected to the drain of the device under test, and the negative terminal is connected to the power reference ground. Oscilloscope channel 1 is connected to the output of the operational amplifier chip in the test circuit, and oscilloscope channel 2 is connected to a coaxial shunt. The power supply unit powers the chips in the clamping circuit and drive circuit of the test circuit board and is connected to the corresponding positions in the circuit. The signal generator is connected to the drive circuit.

[0016] Step 3: Apply pulse signals and simultaneously acquire feedback data. A dual-pulse testing method is used. The first pulse determines the magnitude of the leakage current of the device under test (DUT). The width of the first pulse signal is adjusted to ensure the leakage current value of the DUT reaches a preset level during testing. A second pulse is applied within a time period not exceeding 5μs to capture the dynamic on-resistance of the device at the specified leakage current magnitude. A predefined pulse signal is applied via a signal generator, and the waveform data of the DUT is captured using an oscilloscope. The waveform data includes: a stable reading X1 of oscilloscope channel 1 during the second pulse signal; and a stable reading X2 of oscilloscope channel 2 during the second pulse signal.

[0017] Step 4: Calculate the dynamic on-resistance of the device under test based on the acquired waveform data. The dynamic on-resistance is calculated using the following formula:

[0018]

[0019] Where Ron is the GaN HEMT dynamic on-resistance, X1 is the stable reading of oscilloscope channel 1 during the second pulse signal, and X2 is the stable reading of oscilloscope channel 2 during the second pulse signal.

[0020] 3. Advantages and effects:

[0021] This invention proposes a method for testing the dynamic on-resistance of GaN HEMTs, which has the following advantages:

[0022] (1) The test circuit design adopts a clamping circuit based on a high-speed operational amplifier, which can quickly and accurately read the low drain-source voltage value of GaN HEMT after it changes from the off state to the on state, avoid complex formula calculations, and improve test efficiency.

[0023] (2) The double-pulse test method is adopted. By adjusting the width of the first pulse, the drain current of the GaN HEMT reaches the preset value. For different test current requirements, only the pulse signal width needs to be adjusted, which has a certain degree of flexibility.

[0024] (3) The test method for dynamic on-resistance of GaN HEMT disclosed in this invention includes a specific test circuit architecture, test process and test data processing, which can be used to quickly test the dynamic on-resistance of GaN HEMT and make up for the shortcomings of existing test methods. Attached Figure Description

[0025] To make the content of this invention easier to understand, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0026] Figure 1 A flowchart of a method for testing the dynamic on-resistance of GaN HEMTs.

[0027] Figure 2 This is the schematic diagram of the drive circuit.

[0028] Figure 3 This is the schematic diagram of the clamping circuit.

[0029] Figure 4 This is a power circuit schematic. Implementation method:

[0030] The present invention will be further described below with reference to specific embodiments, so that those skilled in the art can better understand and implement the present invention, but the embodiments are not intended to limit the present invention.

[0031] This invention provides a method for testing the dynamic on-resistance of GaN HEMTs. A specific embodiment uses an INN700TK350B type GaN HEMT, and its test flowchart is shown below. Figure 1 As shown, the specific implementation steps are as follows:

[0032] Step 1: Configure the test circuit topology and fabricate the test circuit board for GaN HEMT dynamic on-resistance.

[0033] The schematic diagram of the driver circuit of INN700TK350B is as follows: Figure 2 As shown. The power isolation module uses an isolated DC / DC power module B0512S-1WR3. The voltage regulator module uses an LM317LIPK linear regulator, which adjusts the 12V output voltage of the DC / DC power module to the required drive voltage. The drive module uses a Si8271GB-IS isolated gate driver chip, which has two independent power input ports: the input-side power supply VDDI and the drive-side power supply VDD. The drive-side power supply VDD is provided by the voltage regulator module and is not grounded with the input-side power supply VDDI. The magnitude of the drive-side power supply VDD determines the magnitude of the gate voltage transmitted by the drive circuit to the device.

[0034] The target of dynamic on-resistance testing is the on-resistance of a device after switching from a high-voltage off-state to an on-state. Therefore, it is necessary to measure the on-state voltage and current between the drain and source, and then divide these two to obtain the on-resistance. On-state voltage is generally measured using a high-precision digital oscilloscope, but the voltage change during the transition from a high-voltage off-state to a low-voltage on-state often exceeds the oscilloscope's range. For example, an 8-bit oscilloscope's analog-to-digital converter can provide 2... 8 =256 quantization levels. If the drain voltage of a GaN HEMT is 400V when it is off and 1V when it is on, then the minimum voltage that the oscilloscope can resolve is 400 / 256=1.56V. At this time, the oscilloscope's measurement value cannot reflect the device's on-state voltage.

[0035] To solve this problem, a clamping circuit is adopted to clamp the voltage when the device is in the off state to a smaller value, reduce the voltage swing, and improve the accuracy of the oscilloscope reading.

[0036] The schematic diagram of the clamping circuit adopted in this embodiment is as Figure 3 shown. D1 and D2 are Schottky diodes; Dz is a Zener diode; M3 is an ultra-high-speed voltage feedback operational amplifier; R1 is an input resistor; Rf is a feedback resistor.

[0037] For the operational amplifier ADA4817, if the voltage U +in at the positive input terminal is less than the input voltage U2, it will operate in the reverse bias state; otherwise, it will operate in the forward bias state. Denote the on-state voltage drop of D1 and D2 when the GaN HEMT is on as U0, then:

[0038]

[0039]

[0040] At this time, U +in = U1 < U2, and the operational amplifier is in the reverse bias state.

[0041] According to the "virtual short" principle of the operational amplifier:

[0042]

[0043] According to the "virtual open" principle of the operational amplifier:

[0044]

[0045] Since R1 = Rf, then:

[0046]

[0047] Therefore, through the clamping circuit, the on-state voltage of the GaN HEMT can be converted into the voltage at the output terminal of the operational amplifier .

[0048] The schematic diagram of the power loop is as Figure 4 shown. Inductors L1 and L2 are selected and connected in parallel with the silicon carbide diode D_load as the load; eight polypropylene film capacitors C0-1 to C0-8 are selected and connected in parallel as the energy storage capacitors; chip capacitors C0-11 to C0-13 are selected as the filter capacitors.

[0049] The device's source is divided into a Kelvin source and a power source using two pins. The Kelvin source is connected to the drive circuit's reference ground (GND), providing a clean reference potential to the device's gate drive side. The power source is connected to the power reference ground (PGND) via a coaxial shunt, used to pass through and measure the current when the device is turned on. Since the drive circuit reference ground and the power reference ground are not common grounds, and the drive circuit reference ground is floating, connected only to the power reference ground through the device source, it is possible to achieve the same potential for both reference grounds, but the current only flows from the power source back to the negative terminal of the power supply, without affecting the accuracy of the coaxial shunt's current measurement.

[0050] Complete the circuit design and component selection, and fabricate the test circuit board.

[0051] Step 2: Connect the test setup. The test setup includes a high-voltage power supply, oscilloscope, power supply unit, signal generator, and test circuit board.

[0052] In the test conditions set in this embodiment, the device's on-state leakage current is 2.2A and the off-state voltage is 400V.

[0053] The selected high-voltage power supply has a maximum output of 600V and a maximum power of 3kW, and is connected to the power circuit of the test board.

[0054] The oscilloscope needs to be connected to two channels: Channel 1 is connected to the output of the operational amplifier in the clamping circuit to monitor the change of Um; Channel 2 is connected to the coaxial shunt to monitor the conduction current. After the connection is completed, the unit of Channel 2 of the oscilloscope needs to be set to current, and the ratio is determined according to the resistance value of the coaxial shunt.

[0055] The power supply requires a total of 4 channels: in the drive circuit, the input terminals of the DC / DC power module and the driver chip each require a 5V power supply; in the clamping circuit, the operational amplifier requires a 10V power supply, and the circuit itself requires a 4V power supply.

[0056] The signal generator provides the test signal and is connected to the driver module of the test board.

[0057] Step 3: Apply a pulse signal and simultaneously collect feedback data.

[0058] The standard test method for measuring the dynamic on-resistance of GaN HEMTs is the two-pulse test. During the first pulse signal, the device gate is turned on, and the on-current begins to increase. Due to the presence of the load inductance, the current magnitude does not change abruptly but increases linearly, and the width of the first pulse determines the magnitude of the current increase. When the first pulse ends, the gate is turned off, and the on-current becomes zero. After a short interval, the second pulse arrives. Due to the presence of the freewheeling diode in the load, the on-current will immediately return to the level before the end of the first pulse. At this point, the dynamic on-resistance can be calculated from the device's response during the second pulse cycle.

[0059] In this embodiment, the on-state leakage current is determined to be 2.2A. First, the width of the first pulse signal is adjusted according to the set current. Next, the power supplies, oscilloscope, signal generator, and high-voltage power supply are connected. Then, the high-voltage power supply is turned on. When the high-voltage voltage rises to 400V, the signal generator is triggered, and the oscilloscope captures the test waveform. After the test is completed, the high-voltage power supply is turned off first, followed by the power supply to the drive.

[0060] Step 4: Calculate the dynamic on-resistance of the device under test based on the acquired waveform data. The stable reading of oscilloscope channel 1 during the second pulse signal is X1; the stable reading of oscilloscope channel 2 during the second pulse signal is X2. Calculate the dynamic on-resistance using the following formula:

[0061]

[0062] Where Ron is the GaN HEMT dynamic on-resistance, X1 is the stable reading of oscilloscope channel 1 during the second pulse signal, and X2 is the stable reading of oscilloscope channel 2 during the second pulse signal.

[0063] The device selected in this embodiment is an INN700TK350B GaN HEMT, and the test conditions are: Vds=400V, Id=2.2A, Vg=6V. The dynamic on-resistance of the device can be obtained according to formula (6).

Claims

1. A test circuit and test method for the dynamic on-resistance of a GaN HEMT, characterized in that, The test circuit and test method include: Step 1: Configure the test circuit topology and fabricate the test circuit board for the dynamic on-resistance of the GaN HEMT. The test circuit includes a driver circuit, a clamping circuit, and a main power loop. The drive circuit includes a power isolation module, a voltage regulator module, and a drive module; the clamping circuit consists of an operational amplifier, a Schottky diode, a Zener diode, an input resistor, and a feedback resistor; the main power circuit includes a high-voltage power supply connection terminal, a load inductor, a freewheeling diode, a device under test, an energy storage capacitor, a filter capacitor, and a coaxial shunt. Step 2: Connect the testing device, which includes a high-voltage power supply, an oscilloscope, a power supply, a signal generator, and a test circuit board. The positive terminal of the high-voltage power supply is connected to the drain of the device under test, and the negative terminal is grounded. Oscilloscope channel 1 is connected to the output of the operational amplifier chip in the test circuit, and oscilloscope channel 2 is connected to the coaxial shunt. The signal generator is connected to the signal input of the drive circuit. Step 3: Apply a pulse signal and simultaneously collect feedback data. The dual-pulse testing method is employed. First, the size of the first pulse is adjusted according to the requirements for testing the drain current, thus predefining the pulse signal. Then, the predefined dual-pulse signal is applied, and waveform data is acquired. The waveform data includes: the stable reading X1 of oscilloscope channel 1 during the second pulse signal; and the stable reading X2 of oscilloscope channel 2 during the second pulse signal. Step 4: Calculate the dynamic on-resistance of the device under test based on the acquired waveform data. The formula for calculating the dynamic on-resistance of GaN HEMT is as follows: Where Ron is the GaN HEMT dynamic on-resistance, X1 is the stable reading of oscilloscope channel 1 during the second pulse signal, and X2 is the stable reading of oscilloscope channel 2 during the second pulse signal. By following the steps above, the dynamic on-resistance of GaN HEMTs can be tested.

2. The method for testing the dynamic on-resistance of a GaN HEMT according to claim 1, characterized in that: In step one, the test board separates the reference ground of the main power circuit and the reference ground of the drive circuit. In the test board PCB layout, the source of the GaN HEMT under test is brought out with two pins, designated as a power source and a Kelvin source. The power source is connected in series with a coaxial shunt and then to the power reference ground; the Kelvin source is connected to the reference ground on the output side of the driver chip.

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