Light emitting diode epitaxial wafer and preparation method thereof, and light emitting diode

Abstract

The application discloses a light-emitting diode epitaxial wafer and a preparation method thereof and a light-emitting diode, and relates to the field of semiconductor photoelectric devices. The light-emitting diode epitaxial wafer comprises a substrate and a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer arranged on the substrate in sequence, wherein the stress release layer comprises a first sub-layer and a second sub-layer; the first sub-layer is a first Si-doped GaN layer; the second sub-layer comprises alternately stacked AlInGaN layers and second Si-doped GaN layers; the Si doping concentration of the second Si-doped GaN layer is less than the Si doping concentration of the first Si-doped GaN layer; and the Si doping concentration of the first Si-doped GaN layer is less than the Si doping concentration of the N-type GaN layer. By implementing the application, the light-emitting efficiency of the light-emitting diode can be improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor optoelectronic devices, and more particularly to a light-emitting diode epitaxial wafer and its fabrication method, and a light-emitting diode. Background Technology

[0002] Currently, GaN-based LED devices with InGaN quantum wells as the active layer are widely used in various fields. However, due to the lack of suitable homogeneous epitaxial substrates, GaN is usually grown on sapphire, silicon carbide, or silicon substrates with significant lattice mismatch. This lattice mismatch between GaN and the substrate undoubtedly leads to a large number of dislocation defects, thus affecting the epitaxial quality. Furthermore, because there is also a significant lattice mismatch between the InGaN quantum well active layer and GaN, the InGaN quantum well is subjected to compressive stress from GaN. Both dislocation defects and compressive stress negatively impact the performance of LED devices, leading to reduced luminous efficiency. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide an epitaxial wafer for a light-emitting diode and a method for preparing the same, which can improve the luminous efficiency of the light-emitting diode.

[0004] Another technical problem that this invention aims to solve is to provide a light-emitting diode with high luminous efficiency.

[0005] To address the aforementioned problems, this invention discloses a light-emitting diode epitaxial wafer, comprising a substrate and a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer sequentially disposed on the substrate. The stress relief layer comprises a first sublayer and a second sublayer, wherein the first sublayer is a first Si-doped GaN layer, and the second sublayer comprises alternating AlInGaN layers and second Si-doped GaN layers.

[0006] The Si doping concentration of the second Si-doped GaN layer is lower than that of the first Si-doped GaN layer;

[0007] The Si doping concentration of the first Si-doped GaN layer is lower than that of the N-type GaN layer.

[0008] As an improvement to the above technical solution, the Al component ratio in the AlInGaN layer is ≤0.7, and the In component ratio in the AlInGaN layer is ≥0.35, so that the difference between the lattice constant of the AlInGaN layer and the lattice constant of the second Si-doped GaN layer is smaller.

[0009] As an improvement to the above technical solution, the bandgap width of the AlInGaN layer is greater than that of the InGaN layer.

[0010] As an improvement to the above technical solution, the thickness of the first Si-doped GaN layer is 20 nm to 360 nm, and the Si doping concentration is 1.08 × 10⁻⁶. 18 cm -3 ~7.2×10 18 cm -3 .

[0011] As an improvement to the above technical solution, the number of cycles in the second sub-layer is 5 to 60;

[0012] The AlInGaN layer has a thickness of 0.6 nm to 2.5 nm, an Al content of 0.05 to 0.8%, and an In content of 0.2 to 0.5%.

[0013] The thickness of the second Si-doped GaN layer is 0.6 nm to 2.5 nm, and its Si doping concentration is 5.18 × 10⁻⁶. 17 cm -3 ~3.6×10 18 cm -3 .

[0014] As an improvement to the above technical solution, the thickness of the N-type GaN layer is 1μm to 3μm, and its Si doping concentration is 3.5×10⁻⁶. 18 cm -3 ~1×10 19 cm -3 .

[0015] Accordingly, the present invention also discloses a method for preparing a light-emitting diode epitaxial wafer, used to prepare the above-mentioned light-emitting diode epitaxial wafer, characterized in that it includes:

[0016] A substrate is provided on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially grown. The stress relief layer includes a first sublayer and a second sublayer. The first sublayer is a first Si-doped GaN layer, and the second sublayer includes alternating AlInGaN layers and second Si-doped GaN layers.

[0017] The Si doping concentration of the second Si-doped GaN layer is lower than that of the first Si-doped GaN layer;

[0018] The Si doping concentration of the first Si-doped GaN layer is lower than that of the N-type GaN layer.

[0019] As an improvement to the above technical solution, the growth temperature of the first Si-doped GaN layer is 820℃~930℃, and the growth pressure is 90 torr~360 torr.

[0020] As an improvement to the above technical solution, the growth temperature of the AlInGaN layer is 800℃~920℃, and the growth pressure is 90 torr~360 torr;

[0021] The growth temperature of the second Si-doped GaN layer is 800℃~920℃, and the growth pressure is 90 torr~360 torr.

[0022] Accordingly, the present invention also discloses a light-emitting diode, which includes the above-mentioned light-emitting diode epitaxial wafer.

[0023] Implementing this invention has the following beneficial effects:

[0024] 1. In the epitaxial wafer of the light-emitting diode of the present invention, the stress buffer layer includes a first sublayer and a second sublayer, wherein the first sublayer is a first Si-doped GaN layer, and the second sublayer is a superlattice structure formed by alternating layers of AlInGaN layers and second Si-doped GaN layers. The first Si-doped GaN layer is in direct contact with the N-type GaN layer, forming a transition with the multi-quantum-well layer and reducing compressive stress. The structure of the AlInGaN layer and the second Si-doped GaN layer effectively weakens the adverse effects of bottom dislocations, significantly reducing the compressive stress within the multi-quantum-well layer, thereby increasing the electron-hole overlap probability and improving luminous efficiency. Furthermore, the present invention controls the Si doping concentration in the second Si-doped GaN layer to be less than the Si doping concentration in the first Si-doped GaN layer, which in turn controls the Si doping concentration in the N-type GaN layer. This creates a stepped deceleration effect on the electron carrier generated by the N-type GaN layer, improving the electron-hole matching degree in the multi-quantum-well layer and further enhancing luminous efficiency.

[0025] 2. By controlling the In and Al composition in the AlInGaN layer, the present invention can make the difference between the lattice constants of the AlInGaN layer and the second Si-doped GaN layer extremely small, which can further reduce the compressive stress in the multi-quantum well layer, improve the crystal quality of the stress buffer layer, reduce the conduction of dislocations to the multi-quantum well layer, and improve the luminescence efficiency. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the structure of a light-emitting diode epitaxial wafer in one embodiment of the present invention;

[0027] Figure 2 This is a flowchart of a method for preparing an epitaxial wafer for a light-emitting diode according to an embodiment of the present invention. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described in further detail below.

[0029] refer to Figure 1This invention discloses a light-emitting diode epitaxial wafer, comprising a substrate 1 and a buffer layer 2, an undoped GaN layer 3, an N-type GaN layer 4, a stress buffer layer 5, a multiple quantum well layer 6, an electron blocking layer 7, and a P-type GaN layer 8 sequentially disposed on the substrate 1. The stress buffer layer 5 includes a first sub-layer 51 and a second sub-layer 52. The first sub-layer 51 is a first Si-doped GaN layer, and the second sub-layer is a superlattice structure formed by alternating layers of AlInGaN layers 521 and Si-doped GaN layers 522. The Si doping concentration of the second Si-doped GaN layer 522 is less than the Si doping concentration of the first Si-doped GaN layer, which is less than the Si doping concentration of the N-type GaN layer 4. Based on the stress buffer layer 5, not only is the compressive stress within the multiple quantum well layer 6 effectively reduced, but the matching degree of electron and hole concentrations within the multiple quantum well layer 6 is also optimized, thereby improving the luminous efficiency.

[0030] Specifically, the thickness of the first Si-doped GaN layer is 20 nm to 360 nm, with exemplary thicknesses of 25 nm, 45 nm, 80 nm, 105 nm, 150 nm, 200 nm, 280 nm, or 320 nm, but not limited thereto. Preferably, it is 50 nm to 200 nm, and more preferably, it is 100 nm to 200 nm.

[0031] The Si doping concentration in the first Si-doped GaN layer is 1.08 × 10⁻⁶. 18 cm -3 ~7.2×10 18 cm -3 An example is 1.5 × 10 18 cm -3 3.4×10 18 cm -3 5×10 18 cm -3 6.1×10 18 cm -3 Or 7.1×10 18 cm -3 However, it is not limited to this. Preferably, the Si doping concentration in the first Si-doped GaN layer is 1.08 × 10⁻⁶. 18 cm -3 ~4.3×10 18 cm -3 .

[0032] The second sublayer 52 has 5 to 60 periods, with examples of 8, 15, 24, 35, 40, or 50, but is not limited thereto. Preferably, the second sublayer 52 has 15 to 30 periods.

[0033] The thickness of the AlInGaN layer 521 is 0.6 nm to 2.5 nm, with exemplary thicknesses of 0.8 nm, 1.2 nm, 1.4 nm, 1.7 nm, 2.1 nm, or 2.4 nm, but not limited thereto. Preferably, the thickness of the AlInGaN layer 521 is 1 nm to 2.5 nm.

[0034] The Al content in the AlInGaN layer 521 is 0.05 to 0.8%, with exemplary values ​​of 0.08, 0.15, 0.24, 0.35, 0.43, 0.5, 0.67, 0.73, or 0.79, but not limited thereto. Preferably, the Al content in the AlInGaN layer 521 is 0.1 to 0.75%.

[0035] The In content in the AlInGaN layer 521 is 0.2% to 0.5%, with exemplary values ​​of 0.23%, 0.26%, 0.31%, 0.34%, 0.37%, 0.39%, 0.44%, or 0.48, but not limited thereto. Preferably, the In content in the AlInGaN layer 521 is 0.25% to 0.4%.

[0036] The thickness of the second Si-doped GaN layer 522 is 0.6 nm to 2.5 nm, and exemplary thicknesses are 0.8 nm, 1.2 nm, 1.4 nm, 1.7 nm, 2.1 nm, or 2.4 nm, but it is not limited thereto. Preferably, the thickness of the second Si-doped GaN layer 522 is 1 nm to 2.5 nm.

[0037] The Si doping concentration in the second Si-doped GaN layer 522 is 5.18 × 10⁻⁶. 17 cm -3 ~3.6×10 18 cm -3 An example is 6.3 × 10 17 cm -3 7.2×10 17 cm -3 7.9×10 17 cm -3 8.6×10 17 cm -3 Or 1.5×10 18 cm -3 However, it is not limited to this. Preferably, the Si doping concentration in the second Si-doped GaN layer 522 is 8 × 10⁻⁶. 17 cm -3 ~1×10 18 cm -3 .

[0038] Preferably, in one embodiment, the Al component in the AlInGaN layer 521 is ≤0.7, and the In component is ≥0.35, so that the difference between the lattice constant of the AlInGaN layer 521 and the lattice constant of the second Si-doped GaN layer is small. Based on this control, the compressive stress in the multi-quantum well layer 6 can be further reduced, and the crystal quality of the stress buffer layer can be improved, reducing the conduction of dislocations to the multi-quantum well layer 6 and improving the luminescence efficiency.

[0039] Preferably, in one embodiment, the Al content in the AlInGaN layer 521 is controlled to be ≥0.5, so that the band gap of the AlInGaN layer 521 is greater than the band gap of the second Si-doped GaN layer 522. Based on this control, the rate-limiting effect on electron carriers can be improved, the matching degree of electrons and holes in the multi-quantum-well layer can be improved, and the luminescence efficiency can be improved.

[0040] The substrate 1 is a sapphire substrate, a silicon substrate, or a silicon carbide substrate, but is not limited to these. Preferably, it is a sapphire substrate, and more preferably, it is a patterned sapphire substrate.

[0041] The buffer layer 2 is an AlN layer or an AlGaN layer, but is not limited to these. The thickness of the buffer layer 2 is 20 nm to 100 nm.

[0042] The thickness of the undoped GaN layer 3 is 1 μm to 5 μm. The dopant element of the N-type GaN layer 4 is Si, but it is not limited to this. The doping concentration of the N-type GaN layer 4 is 3.5 × 10⁻⁶. 18 cm -3 ~1×10 19 cm -3 The thickness of the N-type GaN layer 4 is 1 μm to 3 μm.

[0043] The multiple quantum well layer 6 has a periodic structure with a period number of 3 to 15. Each period of the multiple quantum well layer 6 includes sequentially stacked quantum well layers and quantum barrier layers. The quantum well layers are InGaN layers with an In content of 0.15 to 0.5% and a thickness of 1.5 nm to 5 nm. The quantum barrier layers are GaN layers or Si-doped GaN layers, but are not limited to these. Preferably, the quantum barrier layer is a Si-doped GaN layer with a Si doping concentration of 2.5 × 10⁻⁶. 17 cm -3 ~4.5×10 17 cm -3 The thickness is 8nm to 15nm. Preferably, in one embodiment, each cycle of the multi-quantum well layer 6 includes a quantum well layer, a well back cover layer and a quantum barrier layer stacked sequentially, the well back cover layer being a GaN layer with a thickness of 1nm to 2nm.

[0044] The electron blocking layer 7 is an AlGaN layer or an InAlGaN layer, but is not limited to these. Preferably, the electron blocking layer is an AlGaN layer with an Al content of 0.3 to 0.5% and a thickness of 20 nm to 100 nm.

[0045] The doping element in the p-type GaN layer 8 is Mg, but it is not limited to this. The doping concentration of Mg in the p-type GaN layer 8 is 5 × 10⁸. 18 cm -3 ~5×10 20 cm -3 The thickness of the p-type GaN layer 8 is 40nm to 200nm.

[0046] Accordingly, refer to Figure 2 The present invention also discloses a method for preparing a light-emitting diode epitaxial wafer, which includes the following steps:

[0047] S1: Provides a substrate;

[0048] S2: A buffer layer, an undoped GaN layer, a stress buffer layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially grown on the substrate.

[0049] Specifically, in one embodiment of the present invention, step S2 includes:

[0050] S21: Grow a buffer layer on the substrate;

[0051] Specifically, AlGaN layers can be grown using MOCVD or PVD as buffer layers, but are not limited to these methods.

[0052] S22: Growing an undoped GaN layer on the buffer layer;

[0053] Specifically, in one embodiment of the present invention, an undoped GaN layer is grown by MOCVD at a growth temperature of 950°C to 1100°C and a growth pressure of 100 torr to 300 torr.

[0054] S23: Growing an N-type GaN layer on an undoped GaN layer;

[0055] Specifically, in one embodiment of the present invention, an N-type GaN layer is grown by MOCVD at a growth temperature of 1000℃ to 1100℃ and a growth pressure of 100 torr to 150 torr.

[0056] S24: Growing a stress buffer layer on an N-type GaN layer;

[0057] Specifically, step S24 includes the following steps:

[0058] S241: Growing the first sublayer on an N-type GaN layer;

[0059] Specifically, in one embodiment of the present invention, a first Si-doped GaN layer is grown by MOCVD at a growth temperature of 820°C to 930°C and a growth pressure of 90 torr to 360 torr.

[0060] S242: A second sublayer is grown on the first sublayer to obtain a stress buffer layer;

[0061] Specifically, in one embodiment of the present invention, an AlInGaN layer and a second Si-doped GaN layer are periodically grown by MOCVD until a second sublayer is obtained.

[0062] The growth temperature of the AlInGaN layer is 800℃~920℃, and the growth pressure is 90 torr~360 torr; the growth temperature of the second Si-doped GaN layer is 800℃~920℃, and the growth pressure is 90 torr~360 torr.

[0063] S25: Growth of multiple quantum well layers on stress buffer layers;

[0064] Specifically, in one embodiment of the present invention, quantum well layers and quantum barrier layers are periodically grown by MOCVD until a multi-quantum well layer is obtained. The growth temperature of the quantum well layer is 700℃~800℃, and the growth pressure is 100torr~200torr. The growth temperature of the quantum barrier layer is 800℃~950℃, and the growth pressure is 100torr~200torr.

[0065] Preferably, in another embodiment of the present invention, a quantum well layer, a well capping layer, and a quantum barrier layer are periodically grown by MOCVD until a multi-quantum well layer is obtained. The growth temperature of the well capping layer is 700°C to 750°C, and the growth pressure is 100 torr to 200 torr.

[0066] S26: Growth of an electron blocking layer on a multi-quantum-well layer;

[0067] Specifically, in one embodiment of the present invention, an AlGaN layer or an InAlGaN layer is grown by MOCVD as an electron blocking layer. Preferably, the AlGaN layer is grown by MOCVD at a growth temperature of 950°C to 1100°C and a growth pressure of 100 torr to 400 torr.

[0068] S27: Grow a P-type GaN layer on an electron blocking layer;

[0069] Specifically, in one embodiment of the present invention, a P-type GaN layer is grown by MOCVD at a growth temperature of 850°C to 950°C and a growth pressure of 200 torr to 400 torr.

[0070] The present invention will be further described below with reference to specific embodiments:

[0071] Example 1

[0072] This embodiment provides a light-emitting diode epitaxial wafer, which includes a substrate and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer sequentially disposed on the substrate.

[0073] The substrate is sapphire, the buffer layer is an AlN layer with a thickness of 40 nm, the undoped GaN layer has a thickness of 2 μm, the N-type GaN layer has a thickness of 2 μm, and the Si doping concentration is 9.5 × 10⁻⁶. 18 cm -3 .

[0074] The stress buffer layer comprises a first sub-layer and a second sub-layer. The first sub-layer is a first Si-doped GaN layer with a thickness of 150 nm and a Si doping concentration of 3.2 × 10⁻⁶. 18 cm -3 The second sublayer is a superlattice structure composed of alternating AlInGaN layers and a second Si-doped GaN layer, with a period number of 20. The AlInGaN layer 521 has a thickness of 1.8 nm, with an Al content of 0.1% and an In content of 0.4%, and a lattice constant of approximately [missing value]. The bandgap is approximately 1.53 eV. The second Si-doped GaN layer is 1.8 nm thick, with a Si doping concentration of 9.4 × 10⁻⁶. 17 cm -3 .

[0075] The multiple quantum well layers have a periodic structure with 10 periods, and each period consists of sequentially stacked quantum well layers (In). 0.22 Ga 0.78 The structure consists of an N-layer, a capping layer (GaN layer), and a quantum barrier layer (Si-doped GaN layer). The thickness of the quantum well layer is 3.5 nm, the thickness of the capping layer is 1.3 nm, and the thickness of the quantum barrier layer is 10 nm. The Si doping concentration is 5 × 10⁻⁶. 17 cm -3 The electron blocking layer is Al. 0.35 Ga 0.65 The N-layer has a thickness of 50 nm. The p-type GaN layer has a thickness of 180 nm and a Mg doping concentration of 1.3 × 10⁻⁶. 20 cm -3 .

[0076] The method for fabricating the epitaxial wafer of the light-emitting diode in this embodiment includes the following steps:

[0077] (1) Provide a substrate;

[0078] (2) Grow a buffer layer on the substrate;

[0079] Specifically, AlN layers are grown via PVD.

[0080] (3) Grow an undoped GaN layer on the buffer layer;

[0081] Specifically, undoped GaN layers were grown by MOCVD at a growth temperature of 980℃ and a growth pressure of 240 torr.

[0082] (4) An N-type GaN layer is grown on an undoped GaN layer;

[0083] Specifically, an N-type GaN layer was grown by MOCVD at a growth temperature of 1080℃ and a growth pressure of 110 torr.

[0084] (5) Grow the first sublayer on the N-type GaN layer;

[0085] Specifically, the first Si-doped GaN layer was grown using MOCVD as the first sublayer. The growth temperature was 850℃ and the growth pressure was 300 torr.

[0086] (6) A second sublayer is grown on the first sublayer to obtain a stress buffer layer;

[0087] Specifically, an AlInGaN layer and a second Si-doped GaN layer are periodically grown using MOCVD until a second sublayer is obtained. The growth temperature of the AlInGaN layer is 830℃, and the growth pressure is 220 torr; the growth temperature of the second Si-doped GaN layer is 900℃, and the growth pressure is 220 torr.

[0088] (7) Grow a multi-quantum well layer on the stress buffer layer;

[0089] Specifically, a quantum well layer, a capping layer, and a quantum barrier layer are periodically grown using MOCVD until a multi-quantum well layer is obtained. The growth temperature of the quantum well layer is 750℃ and the growth pressure is 150 torr, the growth temperature of the capping layer is 730℃ and the growth pressure is 150 torr, and the growth temperature of the quantum barrier layer is 900℃ and the growth pressure is 150 torr.

[0090] (8) An electron blocking layer on a multi-quantum-well layer;

[0091] Specifically, Al is grown via MOCVD. 0.35 Ga 0.65The N-layer, serving as an electron blocking layer, is grown at a temperature of 1030℃ and a growth pressure of 300 torr.

[0092] (9) Grow a P-type GaN layer on the electron blocking layer;

[0093] Specifically, a P-type GaN layer was grown by MOCVD at a growth temperature of 890℃ and a growth pressure of 300 torr.

[0094] Example 2

[0095] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 1 in that:

[0096] The AlInGaN layer has an Al content of 0.48% and an In content of 0.42%, with a lattice constant of approximately [missing value]. The band gap width is approximately 3.03 eV. Everything else is the same as in Example 1.

[0097] Example 3

[0098] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 2 in that:

[0099] The AlInGaN layer has an Al content of 0.6% and an In content of 0.35%, with a lattice constant of approximately [missing value]. The band gap width is approximately 3.61 eV. Everything else is the same as in Example 1.

[0100] Comparative Example 1

[0101] This comparative example provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that:

[0102] The stress buffer layer does not include the first sublayer.

[0103] Everything else is the same as in Example 1.

[0104] Comparative Example 2

[0105] This comparative example provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that:

[0106] The electron blocking layer does not include the second sublayer.

[0107] Everything else is the same as in Example 1.

[0108] Comparative Example 3

[0109] This comparative example provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that:

[0110] The second sublayer does not include the AlInGaN layer.

[0111] Everything else is the same as in Example 1.

[0112] Comparative Example 4

[0113] This comparative example provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that:

[0114] The second sublayer does not include the second Si-doped GaN layer.

[0115] Everything else is the same as in Example 1.

[0116] The LED epitaxial wafers obtained in Examples 1-3 and Comparative Examples 1-4 were fabricated into chips with a size of 10 mil × 24 mil, and their luminous brightness was tested at a current of 60 mA. The specific results are as follows:

[0117] Luminous intensity / mW Example 1 199.3 Example 2 204.6 Example 3 206.7 Comparative Example 1 193.6 Comparative Example 2 192.8 Comparative Example 3 193.3 Comparative Example 4 194.5

[0118] As can be seen from the table, the stress buffer layer of the present invention can improve luminous efficiency. Furthermore, a comparison between Example 1 and Comparative Examples 1 to 4 shows that when the structure of the stress buffer layer in the present invention is modified, it is difficult to effectively improve brightness.

[0119] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A light-emitting diode epitaxial wafer, comprising a substrate and a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress-relieving layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer sequentially disposed on the substrate, characterized in that, The stress relief layer includes a first sub-layer and a second sub-layer. The first sub-layer is a first Si-doped GaN layer, and the second sub-layer includes alternating AlInGaN layers and second Si-doped GaN layers. The Si doping concentration of the second Si-doped GaN layer is lower than that of the first Si-doped GaN layer; The Si doping concentration of the first Si-doped GaN layer is lower than that of the N-type GaN layer.

2. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The Al component in the AlInGaN layer is ≤0.7, and the In component in the AlInGaN layer is ≥0.35, so that the difference between the lattice constant of the AlInGaN layer and the lattice constant of the second Si-doped GaN layer is small.

3. The light-emitting diode epitaxial wafer as described in claim 1 or 2, characterized in that, The bandgap of the AlInGaN layer is greater than that of the InGaN layer.

4. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The thickness of the first Si-doped GaN layer is 20 nm to 360 nm, and the Si doping concentration is 1.08 × 10⁻⁶. 18 cm -3 ~7.2×10 18 cm -3 .

5. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The number of periods in the second sublayer is 5 to 60; The AlInGaN layer has a thickness of 0.6 nm to 2.5 nm, an Al content of 0.05 to 0.8%, and an In content of 0.2 to 0.5%. The thickness of the second Si-doped GaN layer is 0.6 nm to 2.5 nm, and its Si doping concentration is 5.18 × 10⁻⁶. 17 cm -3 ~3.6×10 18 cm -3 .

6. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The thickness of the N-type GaN layer is 1 μm to 3 μm, and its Si doping concentration is 3.5 × 10⁻⁶. 18 cm -3 ~1×10 19 cm -3 .

7. A method for preparing a light-emitting diode epitaxial wafer, used to prepare a light-emitting diode epitaxial wafer as described in any one of claims 1 to 6, characterized in that, include: A substrate is provided on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially grown. The stress relief layer includes a first sublayer and a second sublayer. The first sublayer is a first Si-doped GaN layer, and the second sublayer includes alternating AlInGaN layers and second Si-doped GaN layers. The Si doping concentration of the second Si-doped GaN layer is lower than that of the first Si-doped GaN layer; The Si doping concentration of the first Si-doped GaN layer is lower than that of the N-type GaN layer.

8. The method for fabricating a light-emitting diode epitaxial wafer as described in claim 7, characterized in that, The growth temperature of the first Si-doped GaN layer is 820℃~930℃, and the growth pressure is 90 torr~360 torr.

9. The method for fabricating a light-emitting diode epitaxial wafer as described in claim 7, characterized in that, The growth temperature of the AlInGaN layer is 800℃~920℃, and the growth pressure is 90 torr~360 torr. The growth temperature of the second Si-doped GaN layer is 800℃~920℃, and the growth pressure is 90 torr~360 torr.

10. A light-emitting diode, characterized in that, Includes the light-emitting diode epitaxial wafer as described in any one of claims 1 to 6.

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