Buffer amplifier arrangement

Abstract

A buffer amplifier device includes a first-side buffer amplifier and a first-side current mirror circuit; the first-side current mirror circuit is electrically connected to the first-side buffer amplifier. The first-side buffer amplifier is configured to output a first-side current; the first-side current mirror circuit is configured to output a first-side replicated current associated with the first-side current; the first-side buffer amplifier is configured to receive a first-side input voltage and output a first-side output voltage; the first-side output voltage is equal to the first-side input voltage, or the first-side output voltage is a fixed multiple of the first-side input voltage.

Description

Technical Field

[0001] This application relates to an amplifier device, and more particularly to a buffer amplifier device. Background Technology

[0002] Buffer amplifiers are common electronic components in circuits, making them very important. However, current methods for measuring the output current of buffer amplifiers are not simple enough, limiting their applications. This problem urgently needs to be solved. Summary of the Invention

[0003] To address the aforementioned problems, the purpose of this application is to provide a buffer amplifier device.

[0004] To achieve the aforementioned objectives of this application, the buffer amplifier device of this application includes: a first-side buffer amplifier; and a first-side current mirror circuit electrically connected to the first-side buffer amplifier, wherein the first-side buffer amplifier is configured to output a first-side current; the first-side current mirror circuit is configured to output a first-side replica current associated with the first-side current; the first-side buffer amplifier is configured to receive a first-side input voltage and output a first-side output voltage; the first-side output voltage is equal to the first-side input voltage, or the first-side output voltage is a fixed multiple of the first-side input voltage.

[0005] Furthermore, in a specific embodiment of the buffer amplifier device of this application as described above, the first replication current on the first side is equal to the first current on the first side, or the first replication current on the first side is a fixed multiple of the first current on the first side.

[0006] Furthermore, in a specific embodiment of the buffer amplifier device of this application as described above, the first buffer amplifier on the first side includes: a first differential amplifier electrically connected to the first current mirror circuit on the first side; a second differential amplifier electrically connected to the first current mirror circuit on the first side and the first differential amplifier; a first transistor electrically connected to the first current mirror circuit on the first side, the first differential amplifier, and the second differential amplifier; a second transistor electrically connected to the first current mirror circuit on the first side, the first differential amplifier, the second differential amplifier, and the first transistor; a first voltage input terminal on the first side electrically connected to the first differential amplifier and the second differential amplifier; and a first voltage output terminal on the first side electrically connected to the first differential amplifier, the second differential amplifier, the first transistor, and the second transistor, wherein the first current on the first side flows through the first voltage output terminal on the first side.

[0007] Furthermore, in a specific embodiment of the buffer amplifier device of this application as described above, the first-side first current mirror circuit includes: a third transistor electrically connected to the first differential amplifier and the first transistor; a fourth transistor electrically connected to the second differential amplifier, the second transistor and the third transistor; and a first-side first current output terminal electrically connected to the third transistor and the fourth transistor, wherein the first-side first replication current flows through the first-side first current output terminal.

[0008] Furthermore, in a specific embodiment of the buffer amplifier device of this application as described above, the buffer amplifier device further includes: a first isolation element electrically connected to the first-side first buffer amplifier; a second-side first buffer amplifier electrically connected to the first isolation element; and a second-side first current mirror circuit electrically connected to the second-side first buffer amplifier, wherein the second-side first buffer amplifier is configured to output a second-side first current; and the second-side first current mirror circuit is configured to output a second-side first replicated current associated with the second-side first current.

[0009] Furthermore, in a specific embodiment of the buffer amplifier device of this application as described above, the first isolation element is a capacitor; the second-side first replication current is equal to the second-side first current, or the second-side first replication current is a fixed multiple of the second-side first current.

[0010] Furthermore, in a specific embodiment of the buffer amplifier device of this application as described above, the buffer amplifier device further includes: a first-side second buffer amplifier electrically connected to the first-side first current mirror circuit; and a first-side second current mirror circuit electrically connected to the first-side second buffer amplifier, wherein the first-side second buffer amplifier is configured to output a first-side second current; the first-side second current mirror circuit is configured to output a first-side second replicated current associated with the first-side second current; and the buffer amplifier device is configured to form a differential current detection driver.

[0011] Furthermore, in a specific embodiment of the buffer amplifier device of this application as described above, the buffer amplifier device further includes: a first switch electrically connected to the first current mirror circuit on the first side, wherein when the first switch is turned on, the buffer amplifier device is configured to form the differential current detection driver; the second replica current on the first side is equal to the second current on the first side, or the second replica current on the first side is a fixed multiple of the second current on the first side.

[0012] Furthermore, in a specific embodiment of the buffer amplifier device of this application as described above, the buffer amplifier device further includes: a first isolation element electrically connected to the first-side first buffer amplifier; a second-side first buffer amplifier electrically connected to the first isolation element; a second-side first current mirror circuit electrically connected to the second-side first buffer amplifier; a second switch electrically connected to the second-side first current mirror circuit; a second-side second buffer amplifier electrically connected to the second switch; and a second-side second current mirror circuit. The circuit includes a second current mirror circuit electrically connected to the second buffer amplifier on the second side; and a second isolation element electrically connected to the second buffer amplifier on the first side, the first switch, the second buffer amplifier on the second side, and the second switch, wherein the first buffer amplifier on the second side is configured to output a first current on the second side; the first current mirror circuit on the second side is configured to output a first replica current on the second side associated with the first current on the second side; the second buffer amplifier on the second side is configured to output a second current on the second side; and the second current mirror circuit on the second side is configured to output a second replica current on the second side associated with the second current on the second side.

[0013] Furthermore, in a specific embodiment of the buffer amplifier device of this application as described above, the first isolation element is a capacitor; the second isolation element is a capacitor; the second-side first replication current is equal to the second-side first current, or the second-side first replication current is a fixed multiple of the second-side first current; the second-side second replication current is equal to the second-side second current, or the second-side second replication current is a fixed multiple of the second-side second current.

[0014] The advantage of this application is that it allows for easy measurement of the output current of a buffer amplifier, thereby increasing the versatility of the buffer amplifier.

[0015] To further understand the technology, methods, and effects of this application and to achieve the intended purpose of this application, please refer to the following detailed description and accompanying drawings; furthermore, the purpose, characteristics, and features of this application can be understood more deeply and specifically; however, the accompanying drawings are provided for reference and description only and are not intended to limit the scope of this disclosure. Attached Figure Description

[0016] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the various drawings denote the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings depict only some embodiments disclosed in this application and should not be construed as limiting the scope of this application.

[0017] Figure 1This is a circuit block diagram of a first embodiment of the buffer amplifier device of this application.

[0018] Figure 2 This is a circuit diagram of a specific circuit embodiment of the first embodiment of the buffer amplifier device of this application.

[0019] Figure 3 This is a block diagram of the application circuit for a first embodiment of the buffer amplifier device of this application.

[0020] Figure 4 This is a circuit block diagram for the application of the fixed voltage difference in this application.

[0021] Figure 5 This is a circuit block diagram of a third embodiment of the buffer amplifier device of this application.

[0022] Figure 6 This is a circuit diagram of a specific circuit embodiment of the buffer amplifier device of this application in the third embodiment.

[0023] Figure 7 This is a circuit block diagram illustrating the application principle of differential current in this application.

[0024] Figure 8 This is a circuit block diagram illustrating the application principle of differential current in this application.

[0025] Figure 9 This is a circuit block diagram illustrating the application principle of differential current in this application.

[0026] Figure 10 This is a circuit block diagram of the differential current detection driver application on the current receiving side of this application.

[0027] Figure 11 The circuit block diagram used for analysis is for the application of the differential current detection driver on the current receiving side of this application.

[0028] Figure 12 This is a circuit block diagram of a differential detection application embodiment of this application.

[0029] Figure 13 This is a circuit block diagram of full-duplex current loop communication for a differential detection application embodiment of this application.

[0030] Explanation of reference numerals in the attached figures:

[0031] 10: Buffer amplifier device;

[0032] 102: First buffer amplifier on the first side;

[0033] 104: First current mirror circuit on the first side;

[0034] 106: Second side first buffer amplifier;

[0035] 108: Second side first current mirror circuit;

[0036] 110: First-side second buffer amplifier;

[0037] 111: First controller;

[0038] 112: First side second current mirror circuit;

[0039] 113: First upper-end buffer amplifier;

[0040] 114: Second side, second buffer amplifier;

[0041] 115: First upper current mirror;

[0042] 116: Second current mirror circuit on the second side;

[0043] 118: First lower-end buffer amplifier;

[0044] 120: First lower end current mirror;

[0045] 122: First upper output voltage:

[0046] 124: First upper output current;

[0047] 126: First upper end replicates the current output terminal;

[0048] 128: First lower terminal output voltage;

[0049] 130: First lower terminal output current;

[0050] 132: First lower end replicates the current output terminal;

[0051] 134: Second controller;

[0052] 136: Second upper-end buffer amplifier;

[0053] 138: Second upper current mirror;

[0054] 140: Second lower-end buffer amplifier;

[0055] 142: Second lower end current mirror;

[0056] 144: Second upper output voltage;

[0057] 146: Second upper output current;

[0058] 148: Second upper end replicates current output terminal;

[0059] 150: Second lower output voltage;

[0060] 152: Second lower output current;

[0061] 154: Second lower end replicates the current output terminal;

[0062] 156: Third controller;

[0063] 158: Third upper-end buffer amplifier;

[0064] 160: Third upper current mirror;

[0065] 162: Third lower-end buffer amplifier;

[0066] 164: Third lower end current mirror;

[0067] 166: Third upper output voltage;

[0068] 168: Third upper output current;

[0069] 170: Third upper end replicates current output terminal;

[0070] 172: Third lower output voltage;

[0071] 174: Third lower output current;

[0072] 176: Third lower end replicates the current output terminal;

[0073] 178: First capacitor;

[0074] 180: Second capacitor;

[0075] 182: First high-voltage battery string;

[0076] 184: Second high-voltage battery string;

[0077] 186: Third high-voltage battery string;

[0078] 188: Comparator;

[0079] 190: Non-inverting driver, buffer amplifier;

[0080] 192: Inverting driver, inverter;

[0081] 194: Signal output terminal;

[0082] 196: Signal input terminal;

[0083] 198: Capacitor;

[0084] 200: Transformer;

[0085] 202: Transient current source;

[0086] 1021: First differential amplifier;

[0087] 1022: Second differential amplifier;

[0088] 1023: The first transistor;

[0089] 1024: Second transistor;

[0090] 1041: Third transistor;

[0091] 1042: The fourth transistor;

[0092] CA: First isolation element;

[0093] CB: Second isolation element;

[0094] DL: Dashed line;

[0095] Ia: First current path;

[0096] IA1: First current on the first side;

[0097] IA2: First current on the second side;

[0098] IA11: First replica current on the first side;

[0099] IA22: Second side first replication current;

[0100] Ib: Second current path;

[0101] IB1: Second current on the first side;

[0102] IB2: Second current on the second side;

[0103] IB11: Second replication current on the first side;

[0104] IB22: Second replica current on the second side;

[0105] ICM: Common-mode current;

[0106] Idif: Differential current;

[0107] IoutA1: First current output terminal on the first side;

[0108] IoutA2: The first current output terminal on the second side;

[0109] IoutB1: Second current output terminal on the first side;

[0110] IoutB2: Second current output terminal on the second side;

[0111] Rsen: Sensing resistance;

[0112] SW1: First switch;

[0113] SW2: Second switch;

[0114] VA01: First input voltage on the first side;

[0115] VA02: Second input voltage on the second side;

[0116] VB01: Second input voltage on the first side;

[0117] VB02: First input voltage on the second side;

[0118] VA1: First output voltage on the first side;

[0119] VA2: Second-side first output voltage;

[0120] VB1: Second output voltage on the first side;

[0121] VB2: Second output voltage on the second side;

[0122] Vdd: Operating voltage;

[0123] VDRV: Drive signal;

[0124] Vgn: Second gate voltage;

[0125] Vgp: First gate voltage;

[0126] VinA1: First voltage input terminal on the first side;

[0127] VinA2: Second side first voltage input terminal;

[0128] VinB1: Second voltage input terminal on the first side;

[0129] VinB2: Second voltage input terminal on the second side;

[0130] VoutA1: First voltage output terminal on the first side;

[0131] VoutB1: Second voltage output terminal on the first side;

[0132] Vss: Grounding voltage;

[0133] Vss1: First grounding terminal;

[0134] Vss2: Second grounding terminal;

[0135] Vss3: Third grounding terminal. Detailed Implementation

[0136] Numerous specific details are provided in this application to provide a comprehensive understanding of the embodiments thereof; however, those skilled in the art will understand that this application may be practiced without one or more of these specific details; in other instances, well-known details have not been shown or described to avoid obscuring the features of this application. The technical content and detailed description of this application are as follows, and are illustrated with accompanying drawings.

[0137] In a circuit, any point has two values: voltage (e.g., voltage relative to ground) and current flowing through that point. Voltage output refers to the output voltage being the input voltage, and an ideal buffer amplifier's output voltage will be equal to the input voltage (or equal to a fixed multiple of the input voltage). Voltage output has sufficient bidirectional current drive capability to maintain the output at, for example, the input voltage, unaffected by external conditions (e.g., load current).

[0138] The term "current output" refers to the output target being current. An ideal current output amplifier's output current equals its transconductance amplifier gain multiplied by the input voltage. Current output amplifiers possess sufficient voltage ramp-up / pull-down range to maintain the output current, unaffected by external conditions (such as load voltage). The principle of a current mirror is to maintain the output current, ideally unaffected by external conditions (such as load voltage). Utilizing the matching principle, a current mirror can ideally perfectly replicate the current from one circuit to another as a current output.

[0139] Please refer to Figure 1 This is a circuit block diagram of a first embodiment of the buffer amplifier device 10 of this application. The buffer amplifier device 10 of this application includes a first-side first buffer amplifier 102 and a first-side first current mirror circuit 104, which is electrically connected to the first-side first buffer amplifier 102. The first-side first buffer amplifier 102 includes a first-side first voltage input terminal VinA1 and a first-side first voltage output terminal VoutA1, and the first-side first current mirror circuit 104 includes a first-side first current output terminal IoutA1.

[0140] The first-side buffer amplifier 102 is configured to receive a first-side first input voltage VA01 and output a first-side first output voltage VA1; the first-side first output voltage VA1 is equal to the first-side first input voltage VA01, or the first-side first output voltage VA1 is a fixed multiple of the first-side first input voltage VA01. When the first-side first voltage output terminal VoutA1 maintains the first-side first output voltage VA1, the first-side first voltage output terminal VoutA1 needs to supply an external load (not shown). Figure 1 The first-side first current mirror circuit 104 is configured to output a first-side first replicated current IA11 associated with the first-side first current IA1; for example, the first-side first replicated current IA11 is equal to the first-side first current IA1, or the first-side first replicated current IA11 is a fixed multiple of the first-side first current IA1. The first-side first current IA1 flows through the first-side first voltage output terminal VoutA1, and the first-side first replicated current IA11 flows through the first-side first current output terminal IoutA1.

[0141] Please refer to Figure 2 This is a circuit diagram of a specific circuit embodiment of the first embodiment of the buffer amplifier device 10 of this application. Figure 2 The components shown are Figure 1 For the sake of simplicity, the same components shown will not be described again here; please refer to [the website / reference needed]. Figure 1 The first buffer amplifier 102 on the first side also includes a first differential amplifier 1021, a second differential amplifier 1022, a first transistor 1023 and a second transistor 1024, and the first current mirror circuit 104 on the first side also includes a third transistor 1041 and a fourth transistor 1042. All of these components are electrically connected to each other. Figure 2 It also displays the operating voltage Vdd, ground voltage Vss, first gate voltage Vgp, and second gate voltage Vgn.

[0142] This application Figure 1 and Figure 2 This can be referred to as a dual-output buffer amplifier device; the first output voltage VA1 of the first voltage output terminal VoutA1 of a bidirectional current-driven voltage output buffer amplifier is equal to the voltage of the first voltage input terminal VinA1 (or equal to a fixed multiple of the voltage of the first voltage input terminal VinA1); the first current IA1 is the load (not shown) faced by the first voltage output terminal VoutA1. Figure 1 or Figure 2The first transistor 1023 and the third transistor 1041 are characteristic-matched P-type metal-oxide-semiconductor field-effect transistors, while the second transistor 1024 and the fourth transistor 1042 are characteristic-matched N-type metal-oxide-semiconductor field-effect transistors.

[0143] The first differential amplifier 1021 and the second differential amplifier 1022 respectively feed back control to the first transistor 1023, the third transistor 1041, the second transistor 1024, and the fourth transistor 1042, so that the first output voltage VA1 of the first voltage output terminal VoutA1 tracks the first input voltage VA01 of the first voltage input terminal VinA1. The first current mirror circuit 104 copies the output first current IA1 of the first side to the first current output terminal IoutA1, so that the first copied current IA11 tracks the first current IA1 of the first voltage output terminal VoutA1.

[0144] One application of this application is the ability to drive and simultaneously monitor load current. The driver has a built-in current mirror output, enabling precise and real-time monitoring of the output current. This method is more direct and faster than sensing the current through differential amplification using a shunt resistor. By combining the drive voltage and output current information, the load impedance can be determined simultaneously. Applications of real-time load current (and impedance) monitoring include detection and protection against abnormal conditions such as no-load and overload; source measurement functions (i.e., measuring voltage, current, etc., while supplying power); impedance measurement (including DC and AC impedance); and applications such as message transmission, where the receiving end can receive voltage or current signals and simultaneously feed back information to the driver based on load modulation.

[0145] Traditional current signals are differentially amplified through a shunt resistor to sense the current, but this method has several problems: the resistor may affect the signal path when connected in series with the signal path, and the amplifier may also be exposed (at the output end) causing interference sensing; the detection speed is limited by the sensitivity and stability of the amplifier; the detection sensitivity is limited by the speed and voltage range; and the dynamic range is limited by the sensitivity and voltage range.

[0146] The application of an amplifier must be accompanied by peripheral circuits, which may include power supply, signal source, signal receiver, controller, etc. The controller can encode the input message, provide signal waveform, analyze the current output waveform, perform analog or digital signal processing or decoding on the current waveform when necessary, output the message, etc. Since these technical contents can be implemented by those skilled in the art after understanding the description of this application, they will not be described in detail here.

[0147] One application of this application is active detection; for ease of explanation, the discussion will be placed in a practical application context; please refer to... Figure 3 This is a block diagram of the application circuit of the first embodiment of the buffer amplifier device 10 of this application; Figure 3 The components shown are Figure 1 For the sake of simplicity, the same components shown will not be described again here. The buffer amplifier device 10 also includes a first isolation element CA, a second-side first buffer amplifier 106, and a second-side first current mirror circuit 108, all of which are electrically connected to each other. Figure 3 It also shows the second-side first voltage input terminal VinA2 of the second-side first buffer amplifier 106, the second-side first current output terminal IoutA2 of the second-side first current mirror circuit 108, the ground voltage Vss, and the second isolation element CB. In other words, the entire Figure 3 It can also be regarded as a single-wire isolated coupling device, which uses two buffer amplifier devices.

[0148] The first-side first buffer amplifier 102 is configured to output the first-side first current IA1 toward the first isolation element CA; the second-side first buffer amplifier 106 is configured to output the second-side first current IA2 toward the first isolation element CA; the second-side first current mirror circuit 108 is configured to output a second-side first replicated current IA22 associated with the second-side first current IA2; for example, the second-side first replicated current IA22 is equal to the second-side first current IA2, or the second-side first replicated current IA22 is a fixed multiple of the second-side first current IA2. The first isolation element CA is a capacitor, and the second isolation element CB is a capacitor.

[0149] The current detection method in this application is an active cancellation (compensation detection) method. The output of the buffer amplifier cancels out the input current that causes voltage changes, thereby maintaining a constant voltage. The required current is the input current that this application aims to detect. For example, to detect force, we can use our hand to resist an applied force to keep our hand in a fixed position; the force we use is the reaction force of the applied force. Similarly, to detect heat dissipation, we can use heating to maintain a constant temperature; the wattage required for heating is the wattage required for heat dissipation. This application detects current by using a voltage output buffer amplifier to maintain a constant voltage; the current used by the buffer amplifier is the input current.

[0150] In other words, the general method for detecting a variable to be measured is to observe the change (result) caused by the variable and infer the variable from it. However, this method requires a good sensing element and a prior establishment of a correlation between the variable and the changed quantity (e.g., Hooke's Law, calorific value, Ohm's Law, etc.). However, the compensation detection method of this application directly counteracts the variable, canceling it out to maintain the result unchanged. The biggest advantage of this application is that it is insensitive to the mechanism of change, and therefore suitable for, for example, nonlinear or complex systems or systems requiring a large dynamic response range.

[0151] by Figure 3 For example, assuming the left side is the driving end and the right side is the receiving end, the voltage waveform of the first output voltage VA1 of the first buffer amplifier 102 on the first side will change, while the first output voltage VA2 of the second buffer amplifier 106 on the second side remains constant. At this time, the voltage difference across the first isolation element CA will change due to the changing voltage waveform of the first output voltage VA1 on the first side, thus generating current. This current is the input current for the first buffer amplifier 106 on the second side. At this time, the first buffer amplifier 106 on the second side must completely absorb (cancele the variable) this input current in order to maintain the first output voltage VA2 on the second side constant.

[0152] In other words, to cope with the first current IA1 flowing into the second-side first buffer amplifier 106, the second-side first buffer amplifier 106 will output a second-side first current IA2 (where the second-side first current IA2 is equal to the negative of the first-side first current IA1) to cancel the input current, thereby keeping the second-side first output voltage VA2 unchanged. The second-side first buffer amplifier 106 must know internally how much current it uses to maintain a constant voltage, and the additional current output (i.e., the second-side first replicated current IA22) is exactly a copy of this output current (i.e., the second-side first current IA2) used as current data for current detection.

[0153] Another application of this application is in duplex (single-wire) isolated transmission; please refer again. Figure 3Two dual-output buffer amplifiers (i.e., the first buffer amplifier 102 on the first side and the first buffer amplifier 106 on the second side) are connected in series through a fixed impedance (e.g., the first isolation element CA, which is a capacitor). The receiving end detects the current, and both sides can detect the current and output voltage waveforms. The continuous first current IA1 on the first side is equal to the negative first current IA2 on the second side (because the current is positive in the output direction), where the current formula is: IA1 = -IA2 = [(CA*CB) / (CA+CB)]*[(dVA1 / dt)-(dVA2 / dt)]. Both sides can simultaneously drive the signal current by changing the voltage, and both sides can simultaneously monitor their respective signal currents. Both sides can analyze the current changes, and by subtracting the current changes caused by their own driving, they can capture the current changes caused by the voltage changes at the remote end, and then decode the remote message to achieve the function of full-duplex transmission.

[0154] Here, "single-line" refers to an asymmetrical current loop, suitable for situations where common-mode effects are minimal, such as when there is a common ground or a fixed voltage difference between the two grounds. Please refer to [reference needed]. Figure 4 This is a circuit block diagram of the fixed voltage difference application of this application. Figure 4 The display includes a first controller 111, a first ground terminal Vss1, a first upper-end buffer amplifier 113, a first upper-end current mirror 115, a first lower-end buffer amplifier 118, a first lower-end current mirror 120, a first upper-end output voltage 122, a first upper-end output current 124, a first upper-end replica current output terminal 126, a first lower-end output voltage 128, a first lower-end output current 130, a first lower-end replica current output terminal 132, a second controller 134, a second ground terminal Vss2, a second upper-end buffer amplifier 136, a second upper-end current mirror 138, a second lower-end buffer amplifier 140, a second lower-end current mirror 142, a second upper-end output voltage 144, a second upper-end output current 146, and a second upper-end replica current output terminal. The system includes a current output terminal 148, a second lower output voltage terminal 150, a second lower output current terminal 152, a second lower replica current output terminal 154, a third controller 156, a third ground terminal Vss3, a third upper buffer amplifier 158, a third upper current mirror 160, a third lower buffer amplifier 162, a third lower current mirror 164, a third upper output voltage terminal 166, a third upper output current terminal 168, a third upper replica current output terminal 170, a third lower output voltage terminal 172, a third lower output current terminal 174, a third lower replica current output terminal 176, a first capacitor 178, a second capacitor 180, a first high-voltage battery string 182, a second high-voltage battery string 184, and a third high-voltage battery string 186.

[0155] The application of this fixed voltage difference can be, for example, Figure 4As shown; the first high-voltage battery string 182, the second high-voltage battery string 184 and the third high-voltage battery string 186 perform full-duplex transmission of data and control signals between circuit blocks at different voltage levels; the first controller 111, the second controller 134 and the third controller 156 perform monitoring, balancing and protection functions on the first high-voltage battery string 182, the second high-voltage battery string 184 and the third high-voltage battery string 186, etc.

[0156] Another application of this application is in differential current detection drivers; please refer to... Figure 5 This is a circuit block diagram of the third embodiment of the buffer amplifier device 10 of this application; Figure 5 The components shown are Figure 1 For the sake of simplicity, the same components shown will not be described again here. The buffer amplifier device 10 also includes a first switch SW1, a first-side second buffer amplifier 110, and a first-side second current mirror circuit 112, all of which are electrically connected to each other. Figure 5 It also displays the first current Ia, the second current Ib, the first-side second voltage input terminal VinB1 of the first-side second buffer amplifier 110, the first-side second input voltage VB01, the first-side second voltage output terminal VoutB1 and the first-side second output voltage VB1, and the first-side second current output terminal IoutB1 of the first-side second current mirror circuit 112.

[0157] The first-side second buffer amplifier 110 is configured to output a first-side second current IB1; the first-side second current mirror circuit 112 is configured to output a first-side second replicated current IB11 associated with the first-side second current IB1; for example, the first-side second replicated current IB11 is equal to the first-side second current IB1, or the first-side second replicated current IB11 is a fixed multiple of the first-side second current IB1. When the first switch SW1 is turned on, the buffer amplifier device 10 is configured to form a differential current detection driver; when the first switch SW1 is turned off, it functions as two independent drive amplifiers. In other words, Figure 5 The first switch SW1 is used to connect the two Figure 1 The buffer amplifier device 10 is connected in series, and Figure 5 The first switch SW1 offers two functional options: independent drive and differential current detection. When the first switch SW1 is off, the independent drive function is used; when the first switch SW1 is on, the differential current detection function is used. Therefore, if only the differential current detection function is needed but the independent drive function is not required, then... Figure 5Alternatively, the first switch SW1 can be omitted, and the first current output terminal IoutA1 on the first side can be directly connected to the second voltage output terminal VoutB1 on the first side. In other words, the first switch SW1 is not a necessary component for the differential current detection function, and directly connecting the first current output terminal IoutA1 on the first side to the second voltage output terminal VoutB1 on the first side constitutes the differential current detector.

[0158] Please refer to Figure 6 This is a circuit diagram of a specific embodiment of the buffer amplifier device 10 of this application. Figure 6 The components shown are Figure 2 , Figure 5 For the sake of simplicity, the same components will not be described again here. The first current IA1 on the first side is equal to the first current Ia, and also equal to the first replica current IA11 on the first side; the second current Ib is equal to the first replica current IA11 on the first side plus the second current IB1 on the first side, and also equal to the first current Ia plus the second current IB1 on the first side. Therefore, the second current IB1 on the first side is equal to the second current Ib minus the first current Ia. The buffer amplifier's current is positive when flowing out (Source) and negative when flowing in (Sink).

[0159] The operating principle of differential current detection is explained as follows: In signal transmission applications, to avoid (or combat) interference, differential current is usually used as a signal (e.g., a current loop). In the case of wiring matching, interference usually manifests as common-mode voltage (and / or common-mode current). This application uses a pair of dual-output buffer amplifiers to subtract the currents of the two transmitted paths to detect the differential current. The specific implementation method is described below:

[0160] The first input voltage VA01 and the second input voltage VB01 on the first side maintain a certain relationship (e.g., remain equal and do not change over time). For example, the first input voltage VA01 and the second input voltage VB01 on the first side can be an intermediate voltage, where the intermediate voltage = (operating voltage Vdd + ground voltage Vss) / 2. The first voltage output terminal VoutA1 of the first buffer amplifier 102 on the first side outputs the first current Ia to the first path and replicates the first current Ia to the second path.

[0161] At this time, the second current facing the first-side second voltage output terminal VoutB1 of the first-side second buffer amplifier 110 is the second current Ib. However, since the first-side first buffer amplifier 102 has already provided the first current Ia, the output current required by the first-side second buffer amplifier 110 (that is, the first-side second current IB1) ​​is the second current Ib minus the first current Ia, which is Ib-Ia.

[0162] The first-side second current mirror circuit 112 replicates the output current, which is the differential current: IB11 = IB1 = Ib - Ia. When the first-side first input voltage VA01 is equal to the first-side second input voltage VB01, errors caused by effects such as channel length modulation can be avoided. Furthermore, while receiving current, the drive voltage can also perform differential drive; however, the output current of the differential current detector will also include the differential current generated by its own drive. Since this differential current caused by its own drive is a known current, it can be easily subtracted and corrected.

[0163] The application principle of differential current is explained as follows: When transmitting signals between two locations, current transmission is typically used when the distance is long or interference is severe. In circuit theory, current must be continuous, so two conductors (e.g., twisted pair) are often used to form a current loop. Some established hardware and software communication protocols use the term "current loop," but this application only aims to illustrate that current inevitably forms a loop. The term "current loop" is used in a broad literal sense, including but not limited to existing communication protocols. Since current inevitably forms a loop, the so-called balanced current signal, for the receiving end, is necessarily a differential current signal. Differential current can be transmitted using two continuous conductors (e.g., twisted pair). If the two ends are not grounded, a current transformer or two capacitors can be used in the middle for isolation, allowing alternating current signals to pass through while the DC voltage is isolated (not grounded).

[0164] Please refer to Figure 7 This is a circuit block diagram illustrating the application principle of differential current in this application; please refer to... Figure 8 This is a circuit block diagram illustrating the second embodiment of the differential current application principle of this application; please refer to... Figure 9 This is a circuit block diagram illustrating the application principle of differential current in this application, representing the third embodiment. Figures 7 to 9The display includes a comparator 188, a sensing resistor Rsen, a differential current Idif, a non-inverting driver 190, an inverting driver 192, a signal output terminal 194, a signal input terminal 196, a capacitor 198, and a transformer 200. The square wave signal received at the signal input terminal 196 is the same as the square wave signal output at the signal output terminal 194. The sensing resistor Rsen can also be called the input impedance, and can be an actual resistance or an equivalent impedance. If the impedance of the sensing resistor Rsen is low, it does not affect the current, thereby forming current detection; if the impedance of the sensing resistor Rsen is high, it does not affect the voltage, thereby forming voltage detection. The current detection mechanism of this application adopts a low equivalent impedance design.

[0165] Please refer to Figure 10 This is a circuit block diagram of the differential current detection driver application on the current receiving side of this application. Figure 10 The components shown are Figure 5 For the sake of simplicity, the same components shown will not be described again here. Figure 10 It also displays the first isolation element CA, the second isolation element CB, the non-inverting driver 190, the inverting driver 192, the common-mode current ICM, the differential current Idif, the ground voltage Vss, the transient current source 202, and the drive signal VDRV. The differential current detection driver is used in the implementation of current loop communication, for example... Figure 10 As shown, where Figure 10 The transient current source 202 represents the common-mode transient pulse that is difficult to avoid during system operation. Relative to... Figure 8 In other words, Figure 10 A differential current detector architecture is used to detect the differential current Idif.

[0166] Figure 10 The two dashed lines DL shown will Figure 10 It is divided into three parts; among them, Figure 10 The leftmost part is called the receiving side, which is the differential current detection driver of this application. Here, it is used as a current input terminal, that is, as a current input terminal. The first output voltage VA1 and the second output voltage VB1 of the first side can keep the intermediate voltage constant (wherein, the intermediate voltage is approximately the intermediate voltage of the circuit power supply; operating the circuit at the intermediate voltage allows for space between the output terminal and the power supply). Figure 10 The middle part consists of the first isolation element CA and the second isolation element CB. The rate of change of the transient voltage crosses the isolation element (i.e., the first isolation element CA or the second isolation element CB, which can also be referred to as the isolation capacitor) to generate the common-mode current ICM, which is expressed by the formula: ICM = isolation capacitor * (d transient voltage / dt). For the sake of simplifying the analysis, this application assumes that the first isolation element CA is equal to the second isolation element CB.

[0167] When analyzing a circuit, the isolation capacitor can be equivalently replaced by the common-mode current ICM (also known as a current source). Figure 10 The rightmost part is called the transmission side, which is the signal source for differential drive. This drive signal VDRV is connected to the differential current detector through an isolation capacitor. The voltage change rate generated by the right-hand driver generates a differential current Idif through the isolation capacitor, with the formula: Idif = isolation capacitor * (dVDRV / dt). The direction of the differential current Idif is out of the buffer amplifier at 190 degrees, so it is negative in the diagram.

[0168] The calculation of the receiving-side current in the differential detection embodiment is explained below: Please refer to... Figure 11 This is a circuit block diagram used for analysis in the application of the differential current detection driver on the current receiving side of this application. Figure 11 The components shown are Figure 10 For the sake of simplicity, the components shown are identical, so their descriptions will not be repeated here. The first path (that is,...) Figure 11 The current seen at the output terminal of the first output voltage VA1 of the line above (with the first voltage output terminal VoutA1 on the first side) is the common-mode current ICM minus the differential current Idif. Therefore, the first buffer amplifier 102 on the first side must output the first current IA1 on the first side equal to the common-mode current ICM minus the differential current Idif to keep the first output voltage VA1 on the first side unchanged (wherein, the current flowing into the buffer amplifier 190 is also the common-mode current ICM minus the differential current Idif, and is also equal to the negative current flowing out of the buffer amplifier 190); the first current IA1 output by the first buffer amplifier 102 on the first side is replicated into the first replicated current IA11 on the first side, and then the first replicated current IA11 on the first side is added to the second path (that is, ...) through the first switch SW1. Figure 11 The middle line has the second voltage output terminal VoutB1 on the first side), wherein if the first output voltage VA1 on the first side is set to be equal to the second output voltage VB1 on the first side, the current mirror is almost perfectly matched, for example, there is no channel length modulation effect.

[0169] If we disregard the first-side replication current IA11, the current required for the second output voltage VB1 of the second path would originally be the common-mode current ICM plus the differential current Idif (where the current flowing into the inverter 192 is also the common-mode current ICM plus the differential current Idif, which is also equal to the negative current flowing out of the inverter 192). However, after adding the first-side replication current IA11, the second current IB1 output by the second buffer amplifier 110 on the first side will be equal to the common-mode current ICM plus the differential current Idif minus the first-side replication current IA11, that is, IA11 + IB1 = ICM + Idif, IB1 = ICM + Idif - IA11 = ICM + Idif - IA1 = ICM + Idif - (ICM - Idif) = 2 * Idif. Therefore, the common-mode current ICM is canceled out, while the differential current Idif is accumulated. Minor imperfections or mismatches in the circuit will cause slight errors proportionally, but they will not affect the effectiveness of canceling common-mode and accumulating differential-mode. These minor errors can be calculated and corrected, so they will not be elaborated upon here. The transient current is calculated as: Transient current = Isolation capacitor * (dV / dt) = Isolation capacitor * Isolation voltage change rate.

[0170] Please refer to Figure 12 This is a circuit block diagram of a differential detection application embodiment of this application; Figure 12 For the sake of simplicity, the components shown are the same as those shown in the previous diagrams, so their descriptions will not be repeated here. Figure 12 This is an example of half-duplex current loop communication. Figure 12 The buffer amplifier device 10 also includes a first isolation element CA, a second-side first buffer amplifier 106, a second-side first current mirror circuit 108, a second switch SW2, a second-side second buffer amplifier 114, a second-side second current mirror circuit 116, and a second isolation element CB, all of which are electrically connected to each other. Figure 12 It also displays the second output voltage VB2 on the second side and the second current output terminal IoutB2 on the second side.

[0171] The second-side first buffer amplifier 106 is configured to output a second-side first current IA2; the second-side first current mirror circuit 108 is configured to output a second-side first replicated current IA22 associated with the second-side first current IA2; for example, the second-side first replicated current IA22 is equal to the second-side first current IA2, or the second-side first replicated current IA22 is a fixed multiple of the second-side first current IA2. The second-side second buffer amplifier 114 is configured to output a second-side second current IB2; the second-side second current mirror circuit 116 is configured to output a second-side second replicated current IB22 associated with the second-side second current IB2; for example, the second-side second replicated current IB22 is equal to the second-side second current IB2, or the second-side second replicated current IB22 is a fixed multiple of the second-side second current IB2. The first isolation element CA is a capacitor; the second isolation element CB is a capacitor.

[0172] Figure 12 Two differential current detection drivers are used; the left side is the differential current detector (referred to as the receiving side), and the right side (referred to as the transmitting side) uses two voltage output amplifiers. The first switch SW1 remains on to... Figure 12 The left side is configured as the receiving end to perform the differential current detector function; the second input voltage VA02 on the second side of the first voltage input terminal VinA2 and the first input voltage VB02 on the second side of the second voltage input terminal VinB2 can keep the aforementioned intermediate voltage constant, and the differential current output (that is, the second current output terminal IoutB1 on the first side) can be output by subsequent circuitry (not shown). Figure 12 Decoded into various messages. The second switch SW2 remains open. Figure 12 Two amplifiers are placed on the right to perform differential current drive; the message passes through another circuit (not shown). Figure 12 The voltage is encoded into a differential waveform and transmitted to the first voltage input terminal VinA2 and the second voltage input terminal VinB2 on the second side.

[0173] Figure 12 After appropriate message exchange, the circuits can switch roles; that is, the controller on the left (not shown) Figure 12 The first switch SW1 can be turned off to start sending out the encoded waveform, while the controller on the right (not shown) Figure 12 The second switch SW2 can be turned on and the current output signal of the second current output terminal IoutB2 on the second side (that is, the second replicated current IB22 on the second side) can be decoded. Half-duplex is bidirectional transmission, but at any given time, transmission can only be performed in one direction.

[0174] Please refer to Figure 13 This is a circuit block diagram of full-duplex current loop communication in the differential detection application embodiment of this application. Figure 13 The components shown are Figure 12 For the sake of simplicity, the same components shown will not be described again here. Figure 13 Two differential current detection drivers are used; one is on the left, and the other is on the right. The controller on the left (not shown) Figure 13 The left-hand circuit is controlled by a controller, while the right-hand controller (not shown) Figure 13 Then the circuit on the right is controlled, and both the first switch SW1 and the second switch SW2 are turned on to be set to full-duplex mode (simultaneous reception and transmission), so as to perform the differential current detector function while also sending drive signals.

[0175] The controller on the left outputs an encoded differential voltage waveform through the first voltage input terminal VinA1 and the second voltage input terminal VinB1 on the first side; the controller on the right outputs an encoded differential voltage waveform through the first voltage input terminal VinA2 and the second voltage input terminal VinB2 on the second side; the differential current output of the left side (i.e., the second replicated current IB11 on the first side) can be processed by the subsequent circuitry of the left controller (not shown). Figure 13 The differential current output on the right (i.e., the second replica current IB22 on the second side) can be decoded into various messages by the subsequent controller circuit on the right (not shown). Figure 13 The data is decoded into various messages. When decoding, these controllers can, for example, deduct the differential current caused by their own transmitted signals, or be designed with coding characteristics distinct (e.g., carrier frequency differences). Full-duplex allows for simultaneous bidirectional transmission.

[0176] The following content is about Figure 13The formulas are: IA1 = First differential current + ICM - Second differential current. The current flowing from left to right through the first isolation element CA = First differential current + ICM - Second differential current. -IA2 = First differential current + ICM - Second differential current. IA11 + IBI = IA1 + IBI1 = Negative first differential current + ICM + Second differential current. The current flowing from left to right through the second isolation element CB = Negative first differential current + ICM + Second differential current. -IA22 - IBI2 = -IA2 - IBI2 = Negative first differential current + ICM + Second differential current. Therefore, IBI11 = IBI1 = Negative first differential current + ICM + Second differential current - IA1 = Negative first differential current + ICM + Second differential current - (First differential current + ICM - Second differential current) = 2 * (Second differential current - First differential current). Therefore, IB22=IB2=-IA2+First differential current-ICM-Second differential current=First differential current+ICM-Second differential current+First differential current-ICM-Second differential current=2*(First differential current-Second differential current).

[0177] The circuit structure of this application consists of a buffer amplifier with an external current output (replicating the current at the voltage output terminal of the buffer amplifier). The voltage output amplifier is used as the current input terminal to actively detect the input current. When detecting differential input current, this application uses current addition and subtraction to cancel common-mode current and accumulate differential current. Applications of this application include at least: synchronous current detection via voltage output; full-duplex isolated AC current communication (e.g., battery string) using current detection characteristics; detection of differential current accumulated by common-mode cancellation using current output; and DC isolation using capacitors or transformers for AC differential current communication.

[0178] The following describes the external performance of the differential current detector of this application: Regarding input impedance, the voltage detection receiver is in a high impedance state; within a certain voltage limit, the current is very small, and the voltage can change freely (passive detection); conversely, the current detection receiver is in a low impedance state; within a certain current limit, the voltage is maintained constant. Regarding differential and common modes, the voltage detection receiver must have an additional mechanism to release the common-mode current, so its response to common-mode signals (low impedance) is completely different from its response to differential-mode signals (high impedance); conversely, the current detection receiver of this application basically does not distinguish between differential and common modes, but rather detects the differential-mode signal by replicating the current to cancel the common-mode signal, so its response to differential and common modes is basically the same, both being low impedance. The transmission port is usually external (outside the integrated circuit), so there is usually an opportunity to observe the behavior of the receiver from the transmission line. Please refer to [reference needed]. Figure 10 , Figure 10The right side is called the transmitting side, and the left side is called the receiving side (that is, the current detection mentioned above).

[0179] The advantage of this application is that it allows for easy measurement of the output current of a buffer amplifier, thereby increasing the versatility of the buffer amplifier.

[0180] Although this application has been described with reference to embodiments thereof, it should be understood that this application is not limited to its details; various substitutions and modifications have been proposed in the foregoing description, and other substitutions and modifications will be apparent to those skilled in the art; therefore, all such substitutions and modifications are intended to be included within the scope of this application.

Claims

1. A buffer amplifier device, characterized in that, include: First side first buffer amplifier; and A first-side first current mirror circuit is electrically connected to a first-side first buffer amplifier. The first buffer amplifier on the first side is configured to output a first current on the first side; the first current mirror circuit on the first side is configured to output a first replica current on the first side associated with the first current on the first side; the first buffer amplifier on the first side is configured to receive a first input voltage on the first side and output a first output voltage on the first side; the first output voltage on the first side is equal to the first input voltage on the first side, or the first output voltage on the first side is a fixed multiple of the first input voltage on the first side.

2. The buffer amplifier device according to claim 1, characterized in that, The first replication current on the first side is equal to the first current on the first side, or the first replication current on the first side is a fixed multiple of the first current on the first side.

3. The buffer amplifier device according to claim 2, characterized in that, The first buffer amplifier on the first side includes: A first differential amplifier is electrically connected to the first current mirror circuit on the first side; A second differential amplifier is electrically connected to the first current mirror circuit on the first side and the first differential amplifier. A first transistor is electrically connected to the first current mirror circuit on the first side, the first differential amplifier, and the second differential amplifier. The second transistor is electrically connected to the first current mirror circuit on the first side, the first differential amplifier, the second differential amplifier, and the first transistor. A first voltage input terminal on the first side is electrically connected to the first differential amplifier and the second differential amplifier; and A first voltage output terminal on the first side is electrically connected to the first differential amplifier, the second differential amplifier, the first transistor, and the second transistor. The first current on the first side flows through the first voltage output terminal on the first side.

4. The buffer amplifier device according to claim 3, characterized in that, The first current mirror circuit on the first side includes: A third transistor is electrically connected to the first differential amplifier and the first transistor; A fourth transistor, electrically connected to the second differential amplifier, the second transistor, and the third transistor; and The first current output terminal on the first side is electrically connected to the third transistor and the fourth transistor. The first replication current on the first side flows through the first current output terminal on the first side.

5. The buffer amplifier device according to claim 2, characterized in that, Also includes: A first isolation element is electrically connected to the first buffer amplifier on the first side; A second-side first buffer amplifier is electrically connected to the first isolation element; and The second-side first current mirror circuit is electrically connected to the second-side first buffer amplifier. The second-side first buffer amplifier is configured to output a second-side first current; the second-side first current mirror circuit is configured to output a second-side first replica current associated with the second-side first current.

6. The buffer amplifier device according to claim 5, characterized in that, The first isolation element is a capacitor; the first replication current on the second side is equal to the first current on the second side, or the first replication current on the second side is a fixed multiple of the first current on the second side.

7. The buffer amplifier device according to claim 2, characterized in that, Also includes: A first-side second buffer amplifier, electrically connected to the first-side first current mirror circuit; and The first-side second current mirror circuit is electrically connected to the first-side second buffer amplifier. The first-side second buffer amplifier is configured to output a first-side second current; the first-side second current mirror circuit is configured to output a first-side second replicated current associated with the first-side second current; and the buffer amplifier device is configured to form a differential current detection driver.

8. The buffer amplifier device according to claim 7, characterized in that, Also includes: A first switch, which is electrically connected to the first current mirror circuit on the first side. When the first switch is turned on, the buffer amplifier device is configured to form the differential current detection driver. Wherein, the second replication current on the first side is equal to the second current on the first side, or the second replication current on the first side is a fixed multiple of the second current on the first side.

9. The buffer amplifier device according to claim 8, characterized in that, Also includes: A first isolation element is electrically connected to the first buffer amplifier on the first side; A second-side first buffer amplifier is electrically connected to the first isolation element; The second-side first current mirror circuit is electrically connected to the second-side first buffer amplifier. A second switch is electrically connected to the second side of the first current mirror circuit; A second buffer amplifier on the second side, which is electrically connected to the second switch; The second current mirror circuit on the second side is electrically connected to the second buffer amplifier on the second side. and A second isolation element is electrically connected to the first-side second buffer amplifier, the first switch, the second-side second buffer amplifier, and the second switch. The second-side first buffer amplifier is configured to output a second-side first current; the second-side first current mirror circuit is configured to output a second-side first replicated current associated with the second-side first current; the second-side second buffer amplifier is configured to output a second-side second current; and the second-side second current mirror circuit is configured to output a second-side second replicated current associated with the second-side second current.

10. The buffer amplifier device according to claim 9, characterized in that, The first isolation element is a capacitor; the second isolation element is a capacitor; the second-side first replication current is equal to the second-side first current, or the second-side first replication current is a fixed multiple of the second-side first current; The second replica current on the second side is equal to the second current on the second side, or the second replica current on the second side is a fixed multiple of the second current on the second side.

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