Test path planning apparatus, wafer testing apparatus and wafer testing method
By using an artificial intelligence model to obtain the current test map based on the product number and batch number through the test path planning device, the test fixture pattern and path are determined, which solves the problem of inflexible test path planning in the existing technology and achieves faster testing speed and lower power consumption.
CN122283377APending Publication Date: 2026-06-26NUVOTON
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Patent Information
- Application Number
- CN202511472521.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-12-25
- Filing Date
- 2025-10-15
- Publication Date
- 2026-06-26
AI Technical Summary
Technical Problem
Existing technologies lack flexibility in chip test path planning, failing to automatically determine test paths based on existing test maps, resulting in long test times and high power consumption.
Method used
A test path planning device is adopted. The map acquisition module and the interpretation module use an artificial intelligence learning model to obtain the current test map based on the product number and batch number, and determine the test fixture pattern and path to avoid defective bare crystals.
Benefits of technology
It improves testing speed, reduces unnecessary power consumption, and enables more efficient chip testing.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN122283377A_ABST
Abstract
This invention provides a test path planning apparatus, a wafer testing apparatus, and a wafer testing method. The test path planning apparatus includes a map acquisition module and an interpretation module. The map acquisition module provides a current test map corresponding to the current testing stage of the wafer based on the input product number and batch number. The current test map is a map image including multiple dies to be tested and multiple defective dies. The interpretation module is electrically connected to the map acquisition module and is used to acquire the current test map and use an interpretation model to determine the test fixture pattern and test path corresponding to the current test map.
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