Semiconductor structure and method of manufacturing the same, electronic device

Abstract

This application provides a semiconductor structure and its fabrication method, as well as an electronic device. The method includes: forming a first wafer and a second wafer; flipping the second wafer and bonding the first wafer and the second wafer; thinning a second substrate in the second wafer; etching vias in a waveguide reserved area; filling the vias with waveguide material to form a vertical optical waveguide; depositing waveguide material on the thinned second substrate to form an inter-chip horizontal optical waveguide; the inter-chip horizontal optical waveguide connecting multiple second optical communication transceiver modules and extending to the edge of the second substrate; the first wafer and the second wafer after filling with waveguide material forming a first stacked structure; flipping the second stacked structure and bonding the first stacked structure and the second stacked structure to form a semiconductor structure; and the vertical optical waveguide penetrating the semiconductor structure.

Description

Technical Field

[0001] This application relates to semiconductor manufacturing technology, and more particularly to a semiconductor structure and its preparation method, and electronic devices. Background Technology

[0002] As Moore's Law deepens, 3D integration on the back of the wafer has become an important direction for improving computing power and integration density. 3D integration of individual chips can fully utilize space and reduce latency. In contrast, planar integration is not conducive to improving integration density, while front-side 3D integration makes it difficult to optimize the layer order, causing data transmission to have to traverse unrelated chip layers, resulting in wasted time and energy. Summary of the Invention

[0003] This application provides a semiconductor structure and its fabrication method, as well as an electronic device, which can reduce the energy loss of data interaction within a computing system while increasing integration density.

[0004] The technical solution of this application embodiment is implemented as follows:

[0005] This application provides a method for fabricating a semiconductor structure, including: forming a first wafer and a second wafer; the first wafer and the second wafer having the same structure; the first wafer including a first substrate, a first chip, a second chip, and a second substrate stacked sequentially in a first direction, wherein the first chip includes a plurality of first optical communication transceiver modules, and the second chip includes a plurality of second optical communication transceiver modules; the orthographic projections of the plurality of first optical communication modules in the first direction and the orthographic projections of the plurality of second optical communication modules in the first direction coincide; waveguide reserved areas are provided in the first chip and the second chip; the orthographic projections of the waveguide reserved areas in the first direction and the orthographic projections of the first optical communication transceiver modules in the first direction are adjacent; flipping the second wafer and bonding the first wafer and the second wafer. The process involves: thinning a second substrate in a second wafer; etching vias in a waveguide reserved area; filling the vias with waveguide material to form a vertical optical waveguide; depositing waveguide material on top of the second substrate of the thinned second wafer to form an inter-chip horizontal optical waveguide; the inter-chip horizontal optical waveguide connecting multiple second optical communication transceiver modules and extending to the edge of the second substrate of the thinned second wafer; the first and second wafers filled with waveguide material forming a first stacked structure; flipping the second stacked structure and bonding the first and second stacked structures to form a semiconductor structure; the inter-chip horizontal optical waveguide being distributed on two surfaces of the semiconductor structure in a first direction; and the vertical optical waveguide penetrating the semiconductor structure; the fabrication method of the second stacked structure is the same as that of the first stacked structure.

[0006] In some possible implementations, forming a first wafer and a second wafer includes: forming a first chip on a first substrate; fabricating a first optical communication transceiver module in the first chip and forming a waveguide reserved area adjacent to the first optical communication transceiver module; forming a second chip on a second substrate; fabricating a second optical communication transceiver module in the second chip and forming a waveguide reserved area adjacent to the second optical communication transceiver module; flipping the first substrate and bonding the first chip and the second chip to form a first wafer; forming a second wafer; the fabrication method of the second wafer is the same as the fabrication method of the first wafer.

[0007] In some possible implementations, flipping the second wafer and bonding the first and second wafers includes: removing the first substrate in the second wafer and the first substrate in the first wafer; flipping the second wafer; and bonding the first chip in the first wafer and the first chip in the second wafer.

[0008] In some possible implementations, flipping the second stacked structure and bonding the first stacked structure to the second stacked structure to form a semiconductor structure includes: removing the unthinned second substrate in the first stacked structure to expose a first surface of the first stacked structure; removing the unthinned second substrate in the second stacked structure to expose a second surface of the second stacked structure; flipping the second stacked structure and bonding the first and second surfaces to form a semiconductor structure.

[0009] In some possible implementations, the method further includes: forming an on-chip horizontal optical waveguide between a first wafer and a second wafer; the orthographic projection of the on-chip horizontal optical waveguide in a first direction falls inside the orthographic projection of the first wafer in the first direction; and the on-chip horizontal optical waveguide connects a plurality of first optical communication transceiver modules or a plurality of second optical communication transceiver modules of the second wafer.

[0010] In some possible implementations, where an on-chip horizontal optical waveguide is formed between a first wafer and a second wafer, the method of forming a first stacked structure includes: thinning a first substrate of the first wafer; depositing waveguide material on the thinned first substrate to form an on-chip horizontal optical waveguide; removing the first substrate of the second wafer and flipping the second wafer; and bonding a first chip of the second wafer to the on-chip horizontal optical waveguide.

[0011] In some possible implementations, the first chip and the second chip are different chips; the first chip and the second chip are either: a computing chip or a high-bandwidth storage chip.

[0012] This application provides a semiconductor structure fabricated using the above-described semiconductor structure fabrication method. The semiconductor structure includes: a first stacked structure, a second stacked structure, a vertical optical waveguide, and an inter-chip horizontal optical waveguide; the first stacked structure and the second stacked structure are stacked in a first direction; the first stacked structure includes a first wafer and a second wafer stacked in the first direction; the second stacked structure includes a first wafer and a second wafer stacked in the first direction; wherein the first wafer in the first stacked structure and the first wafer in the second stacked structure are bonded together; the vertical optical waveguide is located inside the first stacked structure and the second stacked structure; the vertical optical waveguide penetrates the first stacked structure and the second stacked structure in the first direction; the inter-chip horizontal optical waveguide is located on the surface of the first stacked structure away from the second stacked structure and the surface of the second stacked structure away from the first stacked structure; the inter-chip horizontal optical waveguide and the vertical optical waveguide intersect.

[0013] In some possible implementations, for the first stacked structure and / or the second stacked structure, an on-chip horizontal optical waveguide is provided between the first wafer and the second wafer; the orthographic projection of the on-chip horizontal optical waveguide in a first direction falls inside the orthographic projection of the first wafer in the first direction; the on-chip horizontal optical waveguide connects multiple first optical communication transceiver modules or multiple second optical communication transceiver modules of the second wafer.

[0014] This application provides an electronic device, including: a system motherboard; a semiconductor structure as described above; the semiconductor structure is mounted on the system motherboard and electrically connected to the system motherboard.

[0015] The technical solutions provided by the embodiments of this application may include the following beneficial effects:

[0016] In this embodiment, vertical and horizontal optical waveguides are embedded in a three-dimensionally stacked chip. These waveguides form a crisscrossing, three-dimensional optical communication network, enabling signal paths between chips. This allows for increased integration density of the semiconductor structure while achieving efficient information transmission and reducing energy loss during data interaction within the computing system through the optical communication network formed by the vertical and horizontal waveguides.

[0017] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description

[0018] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0019] Figure 1 This is a schematic diagram illustrating one implementation process of the semiconductor structure fabrication method in this application.

[0020] Figures 2 to 9 This is a schematic flowchart of a method for fabricating a semiconductor structure in an embodiment of this application.

[0021] Figure 10 This is a schematic diagram of the first type of semiconductor structure in the embodiments of this application.

[0022] Figure 11 This is a schematic diagram of a first type of stacked structure in an embodiment of this application.

[0023] Figure 12 This is a schematic diagram of a second structure of the first stacking structure in the embodiments of this application.

[0024] Figure 13 This is a schematic diagram of a second semiconductor structure in an embodiment of this application.

[0025] The reference numerals and names in the figure are as follows:

[0026] 10 - Semiconductor structure; 11a - First substrate of wafer a; 12a - Second substrate of wafer a; 13a - First chip of wafer a; 14a - Second chip of wafer a; 12b - Second substrate of wafer b; 13b - First chip of wafer b; 14b - Second chip of wafer b; 21 - Optical communication transceiver module; 22 - Vertical optical waveguide; 23 - Inter-chip horizontal optical waveguide; 24 - In-chip horizontal optical waveguide; 31 - First stacked structure; 32 - Second stacked structure. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings. The described embodiments should not be regarded as limitations on this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0029] In the following description, the terms "first, second, third" are used merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first, second, third" may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0030] Unless otherwise defined, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the embodiments of this application is for the purpose of describing the embodiments of this application only and is not intended to limit this application.

[0031] With Moore's Law continuously evolving, 3D integration technology on the back of wafers holds great potential in improving system computing power and integration density, as well as enhancing the functionality of computing systems, making it an important direction for integrated circuit system integration. Simultaneously, 3D integration is a crucial way to fully utilize wafer space, continuously improving system computing power and reducing data interaction latency within a limited space. 3D integration of wafer chips is a key means of development in the field of integrated circuit packaging.

[0032] However, planar integration is not conducive to improving integration density or further reducing inter-chip data interaction latency. Frontal three-dimensional integration, due to the stacking of multiple layers in the same direction, makes it difficult to optimize the position and order of different layers; that is, data transmission often needs to pass through unrelated chip layers, resulting in wasted transmission time and energy. Currently, it can only solve the photoelectric conversion of signals for interaction between the computing system and external systems, but cannot complete optical communication within the chip, resulting in energy waste.

[0033] This application provides a semiconductor structure and its fabrication method, as well as an electronic device, which can reduce the energy loss of data interaction within a computing system while increasing integration density.

[0034] Figure 1 This is a schematic diagram illustrating one implementation process of the semiconductor structure fabrication method in this application. See also... Figure 1 As shown, the method for fabricating the above-mentioned semiconductor structure includes:

[0035] In step 101, a first wafer and a second wafer are formed.

[0036] In some embodiments, the first wafer and the second wafer have the same structure; the first wafer includes a first substrate, a first chip, a second chip, and a second substrate stacked sequentially in a first direction, wherein the first chip includes a plurality of first optical communication transceiver modules, and the second chip includes a plurality of second optical communication transceiver modules; the orthographic projections of the plurality of first optical communication modules in the first direction and the orthographic projections of the plurality of second optical communication modules in the first direction coincide, and waveguide reserved areas are provided in the first chip and the second chip; the orthographic projections of the waveguide reserved areas in the first direction and the orthographic projections of the first optical communication transceiver modules in the first direction are adjacent.

[0037] In some embodiments, the first wafer and the second wafer have the same structure, that is, the methods for fabricating the first wafer and the second wafer are the same. The second wafer includes a first substrate, a first chip, a second chip, and a second substrate stacked sequentially in a first direction.

[0038] In some embodiments, the first wafer includes a first substrate, a first chip, a second chip, and a second substrate stacked sequentially in a first direction (i.e., the vertical direction). Similarly, the second wafer also includes a first substrate, a first chip, a second chip, and a second substrate stacked sequentially in the first direction.

[0039] In some embodiments, the first chip includes multiple first optical communication transceiver modules, and the second chip includes multiple second optical communication transceiver modules. That is, both the first and second chips are fabricated with multiple optical communication transceiver modules (first optical communication transceiver modules and second optical communication transceiver modules). The optical communication transceiver module is a highly integrated miniature system within the chip, used for photoelectric and electro-optical conversion.

[0040] In some embodiments, the orthographic projections of the plurality of first optical communication modules in a first direction and the orthographic projections of the plurality of second optical communication modules in the first direction coincide; that is, in the case of a first chip and a second chip stacked, the positions of the plurality of first optical communication modules in the first chip and the positions of the plurality of second optical communication modules in the second chip are aligned, so that their orthographic projections coincide.

[0041] In some embodiments, setting a waveguide reserved area in the first chip and the second chip means reserving a location for an optical waveguide in the first chip and the second chip. No other devices that would interfere with the optical performance of the optical waveguide are placed in the waveguide reserved area of ​​the chip.

[0042] In one example, during the chip design phase, the waveguide reserved area and the active area of ​​the transistor are isolated on the chip layout. Thus, in the fabricated chip, no logic circuits, metal interconnects, etc., are placed in the waveguide reserved area.

[0043] In some embodiments, the orthographic projection of the waveguide reserved area in the first direction and the orthographic projection of the first optical communication transceiver module in the first direction are adjacent. It can be understood that the waveguide reserved area in the chip is adjacent to the position of the optical communication transceiver module; thus, the optical communication transceiver module can acquire optical signals from the optical waveguide and complete photoelectric conversion, while the chip acquires data from the optical communication transceiver module. Since the positions of the first optical communication transceiver module and the second optical communication transceiver module are aligned in the first direction, it can also be said that in each chip, the position of the waveguide reserved area is adjacent to the position of the optical communication transceiver module in the chip.

[0044] In some possible implementations, the first chip and the second chip are different chips. The first chip and the second chip are either: a computing chip or a high-bandwidth memory chip.

[0045] In some embodiments, taking a first wafer as an example, the first chip and the second chip in the first wafer are chips of different types. For example, the first chip is a computing chip and the second chip is a high bandwidth memory (HBM) chip; or, the first chip is an HBM chip and the second chip is a computing chip.

[0046] In some possible implementations, at the beginning of semiconductor structure fabrication, a wafer (such as a first wafer and a second wafer) should be prepared first. The following describes the wafer fabrication method using the second wafer as an example. Step 101 above may include: forming a first chip on a first substrate; fabricating a first optical communication transceiver module in the first chip and forming a waveguide reserved area adjacent to the first optical communication transceiver module; forming a second chip on a second substrate; fabricating a second optical communication transceiver module in the second chip and forming a waveguide reserved area adjacent to the second optical communication transceiver module; flipping the first substrate and bonding the first chip and the second chip to form a first wafer; forming a second wafer; the fabrication method of the second wafer is the same as that of the first wafer.

[0047] In some embodiments, two substrates are provided, namely a first substrate and a second substrate. A first chip is fabricated on the first substrate. A second chip is fabricated on the second substrate. Next, a first optical communication transceiver module is fabricated in the first chip, and a reserved area for an optical waveguide (i.e., a waveguide reserved area) is reserved adjacent to the first optical communication transceiver module; a second optical communication transceiver module is fabricated in the second chip, and a reserved area for an optical waveguide (i.e., a waveguide reserved area) is reserved adjacent to the second optical communication transceiver module. The first substrate is flipped, and the first chip and the second chip are bonded together to form a first wafer. The first wafer includes, from top to bottom: a first substrate, a first chip, a second chip, and a second substrate.

[0048] In one example, both the first and second substrates are silicon (Si) substrates.

[0049] In some embodiments, the preparation methods of the first wafer and the second wafer are the same, and will not be described in detail in the embodiments of this application.

[0050] In step 102, the second wafer is flipped and the first and second wafers are bonded together.

[0051] In some embodiments, the second wafer is flipped so that the second substrate of the second wafer faces upward, and then the second wafer is placed on top of the first wafer to bond the first wafer and the second wafer.

[0052] In some embodiments, the first optical communication transceiver module and the second optical communication transceiver module in the first wafer are aligned with the first optical communication transceiver module and the second optical communication transceiver module in the second wafer in the vertical direction, that is, their orthographic projections in the first direction coincide.

[0053] In some possible implementations, step 102 may include: removing the first substrate in the second wafer and the first substrate in the first wafer; flipping the second wafer; and bonding the first chip in the first wafer and the first chip in the second wafer.

[0054] In some embodiments, after the first wafer and the second wafer are fabricated, the first substrate in the first wafer and the first substrate in the second wafer are removed by etching. The second wafer is then flipped so that the second substrate in the second wafer faces upwards; the first chip of the second wafer and the first chip of the second wafer are then bonded together. At this point, the structure formed from top to bottom is: the second substrate of the second wafer, the second chip of the second wafer, the first chip of the second wafer, the first chip of the first wafer, the second chip of the first wafer, and the second substrate of the first wafer.

[0055] In step 103, the second substrate in the second wafer is thinned.

[0056] In some embodiments, the second substrate in the second wafer can be thinned to a predetermined height by etching or chemical mechanical planarization (CMP).

[0057] In step 104, vias are etched in the waveguide reserved area.

[0058] Understandably, the waveguide reserved areas in the first and second wafers are aligned, and vias can be etched into the waveguide reserved areas using an etching process. The vias penetrate the structure in the stacked second wafer and the first wafer, excluding the second substrate.

[0059] In step 105, waveguide material is filled into the via to form a vertical optical waveguide.

[0060] In some embodiments, waveguide material is filled into the vias to form a vertical optical waveguide. The vertical optical waveguide is used to realize on-chip optical communication.

[0061] In some embodiments, the waveguide material may be any of the following: lithium niobate, silicon nitride, or polymer (such as fluorinated polyimide).

[0062] In step 106, waveguide material is deposited over the second substrate of the thinned second wafer to form an inter-wafer horizontal optical waveguide.

[0063] In some embodiments, inter-chip horizontal optical waveguides connect multiple second optical communication transceiver modules and extend to the edge of the second substrate of the thinned second wafer. The first wafer and the second wafer, after being filled with waveguide material, form a first stacked structure.

[0064] In some embodiments, waveguide material is deposited on a second substrate after the second wafer has been thinned, and then a portion of the waveguide material is etched using photolithography to form a patterned inter-chip horizontal optical waveguide; the inter-chip horizontal optical waveguide connects multiple second optical communication modules and extends to the edge of the second substrate. Thus, the inter-chip horizontal optical waveguide can be used for inter-chip optical communication.

[0065] In some embodiments, the first wafer and the second wafer after forming the optical waveguide constitute a first stacked structure.

[0066] In step 107, the second stacked structure is flipped, and the first stacked structure and the second stacked structure are bonded to form a semiconductor structure. Inter-chip horizontal optical waveguides are distributed on two surfaces of the semiconductor structure in the first direction; vertical optical waveguides penetrate the semiconductor structure; the fabrication method of the second stacked structure is the same as the fabrication method of the first stacked structure.

[0067] In some embodiments, a second stacked structure is fabricated using the same method as the first stacked structure. The second stacked structure is then flipped so that the inter-chip horizontal optical waveguides in the second stacked structure are located on the bottommost layer. Next, the first and second stacked structures are bonded to form a semiconductor structure. The inter-chip horizontal optical waveguides in the semiconductor structure are distributed on two surfaces of the semiconductor structure in a first direction, while the vertical optical waveguides penetrate the entire semiconductor structure.

[0068] In some possible implementations, step 107 may include: removing the unthinned second substrate in the first stacked structure to expose the first surface of the first stacked structure; removing the unthinned second substrate in the second stacked structure to expose the second surface of the second stacked structure; flipping the second stacked structure and bonding the first and second surfaces to form a semiconductor structure.

[0069] In some embodiments, the unthinned second substrate in the first stacked structure is removed to expose the first surface (i.e., the side of the first stacked structure away from the inter-chip horizontal optical waveguide); the unthinned second substrate in the second stacked structure is removed to expose the second surface (i.e., the side of the second stacked structure away from the inter-chip horizontal optical waveguide); the second stacked structure is flipped so that the second surface faces down, and the first surface and the first surface are bonded to form a semiconductor structure. The vertical optical waveguide in the first stacked structure and the optical waveguide in the second stacked structure have their orthographic projections in the first direction coincide, that is, the vertical optical waveguide in the first stacked structure and the optical waveguide in the second stacked structure are aligned and can be considered as approximately a single unit. The inter-chip horizontal optical waveguide is distributed on two opposite surfaces of the semiconductor structure.

[0070] In the embodiments of this application, back-to-back three-dimensional integration between chips can be achieved by repeatedly flipping and bonding the wafers.

[0071] In some possible implementations, an on-chip horizontal optical waveguide can be disposed within the semiconductor structure according to actual needs. When forming the on-chip horizontal optical waveguide, the method for fabricating the semiconductor structure may further include, before bonding the first wafer and the second wafer: forming the on-chip horizontal optical waveguide between the first wafer and the second wafer; the orthographic projection of the on-chip horizontal optical waveguide in a first direction falling within the orthographic projection of the first wafer in the first direction; and the on-chip horizontal optical waveguide connecting a plurality of first optical communication transceiver modules or a plurality of second optical communication transceiver modules of the first wafer.

[0072] It is understandable that, in addition to inter-chip horizontal waveguides distributed on the outer surface of the semiconductor structure, embedded horizontal waveguides (i.e., on-chip horizontal waveguides) can also be set inside the semiconductor structure.

[0073] In some embodiments, an on-chip horizontal optical waveguide is formed on the first wafer before bonding the first wafer and the second wafer, and then the first wafer and the second wafer are bonded; the on-chip horizontal optical waveguide is located between the first wafer and the second wafer after bonding.

[0074] In some embodiments, the orthographic projection of the on-chip horizontal optical waveguide in the first direction falls inside the orthographic projection of the first wafer in the first direction. That is, the length of the on-chip horizontal optical waveguide in the horizontal direction is less than the length of the first wafer in the horizontal direction, thus ensuring that the on-chip horizontal optical waveguide can be used only for on-chip optical communication.

[0075] In some embodiments, in the vertical direction, the front side of the first wafer faces upwards, and the back side faces downwards. The bonding method between the first wafer and the second wafer may include: 1. bonding the front side of the first wafer and the front side of the second wafer together; 2. bonding the front side of the first wafer and the back side of the second wafer together; 3. bonding the back side of the first wafer and the back side of the second wafer together. Thus, the bonding method can be selected according to actual needs (such as the function of different chips, signal flow requirements, etc.), and the stacking order and layout between wafers can be flexibly adjusted.

[0076] In some embodiments, an on-chip horizontal waveguide connects a plurality of first optical communication transceiver modules or a plurality of second optical communication transceiver modules on a second wafer. It is understood that when the front side of the first wafer and the front side of the second wafer are bonded, the on-chip horizontal waveguide connects a plurality of first optical communication transceiver modules in the first chip of the second wafer together; when the front side of the first wafer and the back side of the second wafer are bonded, the on-chip horizontal waveguide connects a plurality of second optical communication transceiver modules in the second chip of the second wafer together; and when the back side of the first wafer and the back side of the second wafer are bonded, the on-chip horizontal waveguide connects a plurality of second optical communication transceiver modules in the second chip of the second wafer together.

[0077] In one example, a first wafer and a second wafer are fabricated. At this time, the first wafer and the second wafer include a first substrate, a first chip, a second chip, and a second substrate stacked sequentially from top to bottom in a first direction. The first substrate of the first wafer is thinned, and an on-chip horizontal optical waveguide is formed on the thinned first substrate. The first substrate in the second wafer is removed, exposing the first chip, and the second wafer is flipped. The first chip of the second wafer and the thinned first substrate of the first wafer are bonded together. At this time, the on-chip horizontal optical waveguide is located between the first wafer and the second wafer, and the on-chip horizontal optical waveguide connects multiple first optical communication transceiver modules in the first chip of the second wafer together.

[0078] In another example, a first wafer and a second wafer are fabricated. In this case, the first wafer and the second wafer include a first substrate, a first chip, a second chip, and a second substrate stacked sequentially from top to bottom in a first direction. The first substrate of the first wafer is thinned, and an on-chip horizontal optical waveguide is formed on the thinned first substrate. The second substrate in the second wafer is removed, exposing the second chip. The second chip of the second wafer and the thinned first substrate of the first wafer are bonded together. At this point, the on-chip horizontal optical waveguide is located between the first wafer and the second wafer, and the on-chip horizontal optical waveguide connects multiple second optical communication transceiver modules in the second chip of the second wafer.

[0079] In some possible implementations, where an on-chip horizontal optical waveguide is formed between a first wafer and a second wafer, the method of forming a first stacked structure includes: thinning a first substrate of the first wafer; depositing waveguide material on the thinned first substrate to form an on-chip horizontal optical waveguide; removing the first substrate of the second wafer and flipping the second wafer; and bonding a first chip of the second wafer to the on-chip horizontal optical waveguide.

[0080] In some embodiments, after forming the first wafer and the second wafer, the first substrate of the first wafer is thinned to a preset height, and waveguide material is deposited on the thinned first substrate to form an on-chip horizontal optical waveguide; then, the first substrate of the second wafer is removed, the second wafer is flipped, and the first chip of the second wafer and the on-chip horizontal optical waveguide are bonded together.

[0081] In some embodiments, by controlling the amount of substrate removed during the flipping and thinning process, it is possible to insert an on-chip horizontal optical waveguide in a multilayer chip for horizontal optical communication within the chip.

[0082] In some embodiments, when the optical waveguide passes through the chip layer, a photoelectric conversion module (i.e., a data transceiver module) performs data interaction. An optical waveguide exists on the surface of the semiconductor structure for optical communication interaction outside the semiconductor structure. The three-dimensional integration of the chip can be a back-to-back stacking or a face-to-face stacking (including the stacking order of different memory chips and computing chips, and the different situations where there are silicon wafer remnants under the optical waveguide layer).

[0083] In one example, taking the absence of an on-chip horizontal optical waveguide as an example, the fabrication method of the semiconductor structure described in the embodiments of this application will be explained. Figures 2 to 9 This is a schematic flowchart of a method for fabricating a semiconductor structure according to an embodiment of this application; Figure 10 This is a schematic diagram of the first type of semiconductor structure in the embodiments of this application.

[0084] Step 1: See Figure 2 A first substrate 11a is provided for wafer a, and a first chip 13a (such as a computing chip) of wafer a is fabricated on the first substrate 11a of wafer a.

[0085] It should be noted that, Figure 2 Figure (a) shown is a top view, and Figure (b) is a cross-sectional view taken along the line connecting the optical communication transceiver modules in Figure (a). Figures 3 to 10 View relationships in Figure 2 The view relationships are the same, that is, the left side is the top view and the right side is the sectional view.

[0086] Step 2: See Figure 3Four optical communication transceiver modules 21 are fabricated in the first chip 13a of wafer a. The first chip 13a of wafer a has a reserved area for fabricating optical waveguides adjacent to the optical communication transceiver modules 21, i.e., the waveguide reserved area.

[0087] It should be noted that, Figure 3 The number of optical communication transceiver modules 21 in the first chip 13a of wafer a shown is 4, which is only an example. It can be designed according to actual needs. This application does not limit this. Figure 3 The arrangement of the optical communication transceiver modules shown in the chip is just one example. Various arrangements of optical communication transceiver modules can be designed according to actual needs.

[0088] Step 3: See Figure 4 Following the same method, a second chip 14a of wafer a is formed on a second substrate 12a of wafer a; four optical communication transceiver modules 21 are formed in the second chip 14a of wafer a.

[0089] Step 4: See Figure 5 The second substrate 12a of wafer a is flipped, and the second chip 14a of wafer a is bonded together with the first chip 13a of wafer a to form wafer a. At this time, the structure of wafer a from top to bottom is: the second substrate 12a of wafer a, the second chip 14a of wafer a, the first chip 13a of wafer a, and the first substrate 11a of wafer a.

[0090] Step 5: See Figure 6 Flip wafer a and remove the first substrate 11a of wafer a.

[0091] Step 6: See Figure 7 Following the method for preparing wafer a, wafer b is formed, and the first substrate of wafer b is removed. At this time, the structure of wafer b from top to bottom is as follows: the first chip 13b of wafer b, the second chip 14b of wafer b, and the second substrate 12b of wafer b.

[0092] Step 7: See Figure 8 Flip wafer b, bond the first chip 13b of wafer b to the first chip 13a of wafer a, and thin the second substrate 12b of wafer b.

[0093] Step 8: See Figure 9 The waveguide pre-reserved area is etched to form a via, and waveguide material is filled into the via to form a vertical optical waveguide 22; waveguide material is deposited on the second substrate 12b of wafer b, and a portion of the waveguide material is etched back to form a patterned inter-chip horizontal optical waveguide 23. For example... Figure 9As shown in (a), the inter-chip horizontal optical waveguide 23 connects four optical communication transceiver modules in a straight line and extends to the edge of the second substrate 12b of wafer b. The stacked structure at this time is the first stacked structure 31.

[0094] It should be noted that, Figure 9 The linear shape of the inter-chip horizontal waveguide 23 shown is only an example. In practical applications, optical waveguides (including inter-chip horizontal waveguides, intra-chip horizontal waveguides, and vertical waveguides) can be linear, curved, or polygonal, etc. This application does not specifically limit this.

[0095] Step 9: See Figure 10 Following steps one through eight above, a second stacked structure 32 is fabricated, the structure of which is identical to that of the first stacked structure 31. The second substrate 12a of wafer a in the first stacked structure 31 is removed, and the second substrate 12a of wafer a in the second stacked structure 32 is also removed. The second stacked structure 32 is flipped, and the second chip 14a of wafer a in the second stacked structure 32 is bonded to the second chip 14a of wafer a in the first stacked structure 31 to form a semiconductor structure 10.

[0096] This completes the fabrication of semiconductor structure 10.

[0097] In this embodiment, vertical and horizontal optical waveguides are embedded in a three-dimensionally stacked chip. These waveguides form a crisscrossing, three-dimensional optical communication network, enabling signal paths between chips. This allows for increased integration density of the semiconductor structure while achieving efficient information transmission and reducing energy loss during data interaction within the computing system through the optical communication network formed by the vertical and horizontal waveguides.

[0098] Furthermore, inter-chip horizontal optical waveguides can realize optical communication between integrated systems (i.e., semiconductor structures), enabling optical communication to widely replace electrical transmission in large computing systems and supporting photoelectric conversion for communication between semiconductor structures.

[0099] Furthermore, back-to-back 3D integration between chips greatly increases the 3D integration density of semiconductor structures and reduces data interaction latency.

[0100] This application provides a semiconductor structure fabricated using the semiconductor structure fabrication method described above. The semiconductor structure includes: a first stacked structure, a second stacked structure, a vertical optical waveguide, and an inter-chip horizontal optical waveguide. The first stacked structure and the second stacked structure are stacked in a first direction. The first stacked structure includes a first wafer and a second wafer stacked in the first direction. The second stacked structure includes a first wafer and a second wafer stacked in the first direction. The first wafer in the first stacked structure and the first wafer in the second stacked structure are bonded together. The vertical optical waveguide is located inside the first stacked structure and the second stacked structure. The vertical optical waveguide penetrates the first stacked structure and the second stacked structure in the first direction. The inter-chip horizontal optical waveguide is located on the surface of the first stacked structure away from the second stacked structure and the surface of the second stacked structure away from the first stacked structure. The inter-chip horizontal optical waveguide and the vertical optical waveguide intersect.

[0101] See Figure 10 As shown, a first stacked structure 31 and a second stacked structure 32 are stacked together, and the first stacked structure 31 and the second stacked structure 32 have the same structure. In the first stacked structure 31, wafers a and b are stacked together, wherein the first chip 13a, the second chip 14a and the second substrate 12a belong to the structure in wafer a; the second chip 14b and the first chip 13b belong to the structure in wafer b.

[0102] See Figure 10 As shown, the vertical optical waveguide 22 penetrates the first stacked structure 31 and the second stacked structure 32, and the inter-chip horizontal optical waveguide 23 is distributed on the surface of the first stacked structure 31 away from the second stacked structure 32 and on the surface of the second stacked structure 32 away from the first stacked structure. In the semiconductor structure 10, the inter-chip horizontal optical waveguide 23 intersects with the vertical optical waveguide 22 to simultaneously realize intra-chip optical communication and inter-chip optical communication of the semiconductor structure.

[0103] See Figure 10 As shown in (a), the inter-chip horizontal optical waveguide 23 is linear and connects the four optical communication transceiver modules. The inter-chip horizontal optical waveguide 23 extends to the edge of the second substrate 12b of wafer b to realize inter-chip optical communication.

[0104] In some embodiments, the stacking order of the chips can be adjusted during the wafer fabrication process. Figure 11 This is a schematic diagram of a first type of stacked structure in an embodiment of this application. See also: Figure 11 Wafer b is stacked on wafer a; from top to bottom, wafer b consists of: second substrate 12b, first chip 13b, and second chip 14b; from top to bottom, wafer a consists of: first chip 13a, second chip 14a, and second substrate 12a.

[0105] In some embodiments, a first stacked structure of on-chip horizontal optical waveguides is formed between the first wafer and the second wafer, such as... Figure 12 As shown, Figure 12 This is a schematic diagram of a second structure of the first stacking structure in an embodiment of this application. See also... Figure 12 As shown, in the first stacked structure 31, an on-chip horizontal optical waveguide 24 is provided between wafer b and wafer a; the on-chip horizontal optical waveguide 24 is linear and connects multiple second optical communication transceiver modules in the second chip 14b of wafer b together.

[0106] In some embodiments, an on-chip horizontal optical waveguide is provided in the semiconductor structure, such as Figure 13 As shown, Figure 13 This is a schematic diagram of a second semiconductor structure in an embodiment of this application. See also... Figure 13 As shown, the second stacked structure 32 is stacked on the first stacked structure 31. An on-chip horizontal optical waveguide 24 is disposed between the first stacked structure 31 and the second stacked structure 32. An on-chip horizontal optical waveguide 24 is disposed between wafer a and wafer b of the first stacked structure 31, and an on-chip horizontal optical waveguide 24 is disposed between wafer a and wafer b of the second stacked structure 32. The orthographic projection of the on-chip horizontal optical waveguide 24 in the first direction falls inside the orthographic projection of wafer a in the first direction.

[0107] In some embodiments, the on-chip horizontal optical waveguide can be disposed in both the first stacked structure and the second stacked structure, or it can be disposed only in the first stacked structure or the second stacked structure. This application embodiment does not specifically limit this.

[0108] In some embodiments, the chip layer in the semiconductor structure is a transistor layer, which can be a transistor structure adapted to flip-chip three-dimensional integration, such as a fin field-effect transistor (FinFET), a nanosheet field-effect transistor (NSFET), a complementary field-effect transistor (CFET), and a flip field-effect transistor (FFET).

[0109] In some embodiments, when the first chip or the second chip is a computing chip, the computing chip can be distributed on the outer side of the semiconductor structure, that is, the computing chip is disposed on two surfaces of the semiconductor structure in the vertical direction (e.g., Figure 13 This can alleviate the problem of excessive heat generation in computing chips.

[0110] The semiconductor structure provided in this application embodiment can be inspected using analytical instruments such as scanning electron microscopes (SEM), transmission electron microscopes (TEM), and scanning transmission electron microscopy (STEM). For example, taking TEM as an example, it can be observed in TEM slices that in the flip-chip three-dimensional integrated semiconductor structure, there are vertical optical waveguides penetrating different chip layers, intra-chip horizontal optical waveguides exist between chip layers, and inter-chip horizontal optical waveguides are distributed on the two surfaces of the semiconductor structure in the vertical direction.

[0111] This application provides an electronic device, including: a system motherboard and a semiconductor structure as described above, wherein the semiconductor structure is mounted on the system motherboard and electrically connected to the system motherboard.

[0112] In some embodiments, an electronic device refers to a device composed of a variety of electronic components capable of performing a specific function. Once semiconductor devices are mounted on the system motherboard, they can be used as main memory or cache, and can support high-speed data read / write and complex computational tasks.

[0113] In some embodiments, the electronic device may include, but is not limited to: mobile communication devices, such as mobile phones, tablets, 5G / 6G base stations; computing devices, such as personal computers, laptops, servers, data center computing units; consumer electronics products, such as smart wearable devices, digital cameras, game consoles; Internet of Things devices or automotive electronic systems.

[0114] The above are merely preferred embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A method for fabricating a semiconductor structure, characterized in that, include: A first wafer and a second wafer are formed; the first wafer and the second wafer have the same structure; the first wafer includes a first substrate, a first chip, a second chip, and a second substrate stacked sequentially in a first direction, wherein the first chip includes a plurality of first optical communication transceiver modules, and the second chip includes a plurality of second optical communication transceiver modules; the orthographic projections of the plurality of first optical communication modules in the first direction and the orthographic projections of the plurality of second optical communication modules in the first direction coincide; waveguide reserved areas are provided in the first chip and the second chip; the orthographic projections of the waveguide reserved areas in the first direction and the orthographic projections of the first optical communication transceiver modules in the first direction are adjacent; The second wafer is flipped, and the first wafer and the second wafer are bonded together; Thin the second substrate in the second wafer; Through-holes are etched in the reserved area of ​​the waveguide; Waveguide material is filled into the through-hole to form a vertical optical waveguide; Waveguide material is deposited on the second substrate of the thinned second wafer to form an inter-chip horizontal optical waveguide; the inter-chip horizontal optical waveguide connects the plurality of second optical communication transceiver modules and extends to the edge of the second substrate of the thinned second wafer; the first wafer and the second wafer after being filled with the waveguide material form a first stacked structure; The second stacked structure is flipped and the first stacked structure and the second stacked structure are bonded to form the semiconductor structure; the inter-chip horizontal optical waveguides are distributed on two surfaces of the semiconductor structure in the first direction; the vertical optical waveguides penetrate the semiconductor structure; the fabrication method of the second stacked structure is the same as the fabrication method of the first stacked structure.

2. The method according to claim 1, characterized in that, The formation of the first wafer and the second wafer includes: The first chip is formed on the first substrate; The first optical communication transceiver module is fabricated in the first chip, and the waveguide reserved area is formed at a position adjacent to the first optical communication transceiver module; The second chip is formed on the second substrate; The second optical communication transceiver module is fabricated in the second chip, and a waveguide reserved area is formed at a position adjacent to the second optical communication transceiver module; The first substrate is flipped over, and the first chip and the second chip are bonded together to form the first wafer; The second wafer is formed; the preparation method of the second wafer is the same as that of the first wafer.

3. The method according to claim 1, characterized in that, The step of flipping the second wafer and bonding the first wafer and the second wafer includes: Remove the first substrate from the second wafer and the first substrate from the first wafer; Flip the second wafer; Bonding the first chip in the first wafer and the first chip in the second wafer.

4. The method according to claim 1, characterized in that, The process of flipping the second stacked structure and bonding the first stacked structure and the second stacked structure to form the semiconductor structure includes: Remove the unthinned portion of the second substrate in the first stacked structure to expose the first surface of the first stacked structure; Remove the unthinned portion of the second substrate in the second stacked structure to expose the second surface of the second stacked structure; The second stacked structure is flipped, and the first surface and the second surface are bonded to form the semiconductor structure.

5. The method according to claim 1, characterized in that, The method further includes: An on-chip horizontal optical waveguide is formed between the first wafer and the second wafer; the orthographic projection of the on-chip horizontal optical waveguide in the first direction falls inside the orthographic projection of the first wafer in the first direction; the on-chip horizontal optical waveguide connects to a plurality of first optical communication transceiver modules or a plurality of second optical communication transceiver modules of the second wafer.

6. The method according to claim 5, characterized in that, In the case of forming an on-chip horizontal optical waveguide between the first wafer and the second wafer, the method for forming the first stacked structure includes: Thin the first substrate of the first wafer; The waveguide material is deposited on the thinned first substrate to form the on-chip horizontal optical waveguide; Remove the first substrate from the second wafer and flip the second wafer; The first chip of the second wafer and the on-chip horizontal optical waveguide are bonded together.

7. The method according to claim 1, characterized in that, The first chip and the second chip are different chips; the first chip and the second chip are either: computing chips or high-bandwidth storage chips.

8. A semiconductor structure, characterized in that, The semiconductor structure is fabricated using the method described in any one of claims 1 to 6, and comprises: a first stacked structure, a second stacked structure, a vertical optical waveguide, and an inter-chip horizontal optical waveguide; the first stacked structure and the second stacked structure are stacked in a first direction. The first stacked structure includes a first wafer and a second wafer stacked in the first direction; The second stacked structure includes a first wafer and a second wafer stacked in the first direction; wherein the first wafer in the first stacked structure and the first wafer in the second stacked structure are bonded together; The vertical optical waveguide is located inside the first stacked structure and the second stacked structure; the vertical optical waveguide penetrates the first stacked structure and the second stacked structure in the first direction; The inter-chip horizontal waveguide is located on the surface of the first stacked structure away from the second stacked structure and on the surface of the second stacked structure away from the first stacked structure; the inter-chip horizontal waveguide and the vertical waveguide intersect.

9. The semiconductor structure according to claim 8, characterized in that, For the first stacked structure and / or the second stacked structure, an on-chip horizontal optical waveguide is provided between the first wafer and the second wafer; the orthographic projection of the on-chip horizontal optical waveguide in the first direction falls inside the orthographic projection of the first wafer in the first direction; the on-chip horizontal optical waveguide connects multiple first optical communication transceiver modules or multiple second optical communication transceiver modules of the second wafer.

10. An electronic device, characterized in that, include: System motherboard; At least one semiconductor structure as described in claim 8 or 9; The semiconductor structure is mounted on the system motherboard and electrically connected to the system motherboard.

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