Semiconductor structure and method of manufacturing the same

By introducing doped regions and conductive layers into the semiconductor structure to form two variable resistors, the problem of low RRAM storage density is solved, the storage density is improved and the fabrication process is simplified, and the balance between data write and read rates is improved.

CN116437670BActive Publication Date: 2026-07-03CHANGXIN MEMORY TECH INC

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHANGXIN MEMORY TECH INC
Filing Date
2021-12-29
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

Existing RRAM memory has a low storage density, which cannot meet the storage capacity and size requirements of integrated circuit technology.

Method used

Introducing first and second doped regions into the semiconductor structure, using a conductive layer and a resistive switching dielectric layer to form two variable resistors that share the same conductive layer, and forming two semiconductor units with the selection transistor, simplifies the fabrication process and reduces the structural size.

Benefits of technology

It increases the storage density of the memory, simplifies the manufacturing process, improves the balance between data write and read rates, and enhances the performance of the memory.

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Abstract

The embodiment of the present disclosure relates to a semiconductor structure and a preparation method thereof, the semiconductor structure comprising: a substrate, a first doped region and a second doped region in the substrate, a first selection transistor and a second selection transistor, a conductive layer between the first doped region and the second doped region, a resistive switching dielectric layer, the conductive layer, the first doped region and the resistive switching dielectric layer opposite to the first doped region form a first variable resistor, the conductive layer, the second doped region and the resistive switching dielectric layer opposite to the second doped region form a second variable resistor, and an isolation dielectric layer between the conductive layer and the substrate. The embodiment of the present disclosure is beneficial to improve the storage density of RRAM memory.
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