Mass transfer method of light emitting diode, light emitting device and display panel

Abstract

This disclosure provides a mass transfer method for light-emitting diodes (LEDs), an LED device, and a display panel, belonging to the field of optoelectronic manufacturing technology. The mass transfer method includes: preparing a first temporary substrate, the first temporary substrate including a first substrate and a plurality of pixel chips spaced apart on the first substrate, wherein the surface of the pixel chips away from the first substrate has residual structures protruding from the surface of the pixel chips away from the first substrate; etching each pixel chip using oxygen plasma; attaching an adhesive film to the surface of the pixel chips away from the first substrate to allow the residual structures to adhere to the adhesive film; and removing the adhesive film to detach the residual structures from the pixel chips. This disclosure can improve the problem of residual debris falling into the chip channels and improve the transfer accuracy of the pixel chips.

Description

Technical Field

[0001] This disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a mass transfer method for light-emitting diodes, a light-emitting device, and a display panel. Background Technology

[0002] Mini / Micro LED is widely recognized as the next-generation display technology, while MIP (Micro LED in Package) is a technology for packaging microchips. Before chip packaging, FCOC (Flip Chip On Carrier) is typically used for the mass transfer of pixel chips.

[0003] In related technologies, the mass transfer process includes: first, bonding the pixel chip on the wafer to a first substrate that has been coated with adhesive; then, using a laser to dissociate the wafer substrate, leaving the pixel chip electrodes facing the adhesive surface on the first substrate to form a first temporary substrate; subsequently, bonding the first temporary substrate to the coated surface of a second substrate, and using a laser to dissociate the first substrate, leaving the pixel chip epitaxial surface facing the adhesive surface on the second substrate to obtain a second temporary substrate. Finally, using selective laser dissociation, pixel chips of different emission colors are transferred to a circuit board, thus completing the three-color wafer arrangement.

[0004] During wafer fabrication, a DBR layer is typically deposited on the surface of each pixel chip to reflect light. To ensure the DBR layer covers the sidewalls of the pixel chip, it extends at least 2 to 3 μm into the wafer substrate. However, after forming the first temporary substrate, some DBR layer remains on the bottom surface of the pixel chip. During bonding to the second substrate, these residual layers are broken by the bonding force, and debris falls into the chip channels, affecting the appearance yield. Furthermore, during subsequent laser transfer to the circuit board, the falling DBR debris can cause pixel chip misalignment, reducing transfer yield. Summary of the Invention

[0005] This disclosure provides a mass transfer method for light-emitting diodes (LEDs), a light-emitting device, and a display panel, which can improve the problem of residual debris falling into the chip channel and enhance the transfer accuracy of pixel chips. The technical solution is as follows: This disclosure provides a mass transfer method for a light-emitting device. The mass transfer method includes: preparing a first temporary substrate, the first temporary substrate including a first substrate and a plurality of pixel chips spaced apart on the first substrate, wherein the surface of the pixel chips away from the first substrate has a residual structure protruding from the surface of the pixel chips away from the first substrate; etching each of the pixel chips using oxygen plasma; attaching an adhesive film to the surface of the pixel chips away from the first substrate so that the residual structure adheres to the adhesive film; and removing the adhesive film to detach the residual structure from the pixel chips.

[0006] In another implementation of the present disclosure, the oxygen plasma etching of each pixel chip includes: controlling the vacuum level in the reaction chamber to be 500 mTorr to 1000 mTorr, controlling the oxygen flow rate to be 800 sccm to 1200 sccm, controlling the radio frequency power of the oxygen plasma etching to be 600 W to 800 W, and controlling the oxygen plasma etching time to be 150 s to 210 s.

[0007] In another implementation of the present disclosure, before etching each pixel chip with oxygen plasma, the method further includes: etching the adhesive layer between adjacent pixel chips with inductively coupled plasma to form a plurality of independently spaced pixel chips.

[0008] In another implementation of the present disclosure, the etching of each pixel chip using oxygen plasma further includes: injecting nitrogen gas into the reaction chamber and controlling the nitrogen gas flow rate to be 200 sccm to 400 sccm.

[0009] In another implementation of the present disclosure, attaching the adhesive film to the surface of the pixel chip away from the first substrate includes: attaching the adhesive film to the pixel chip at a temperature of 40°C to 60°C and a controlled pressure of 0.3 MPa to 0.5 MPa.

[0010] In another implementation of the present disclosure, the adhesive film includes at least one of a blue film and adhesive tape.

[0011] In another implementation of the present disclosure, the preparation of the first temporary substrate includes: coating a photosensitive adhesive on the surface of a first substrate; bonding a pixel chip of a wafer to the photosensitive adhesive on the first substrate; and laser-dissociating the substrate of the wafer so that the electrodes of each pixel chip face the photosensitive adhesive and remain on the first substrate, thereby forming the first temporary substrate.

[0012] In another implementation of this disclosure, after removing the adhesive film to detach the residual structure from the pixel chip, the method further includes: coating the surface of the second substrate with photosensitive adhesive; bonding the first temporary substrate to the photosensitive adhesive on the second substrate; laser-dissociating the first substrate so that the epitaxial surface of each pixel chip faces the photosensitive adhesive and remains on the second substrate to form a second temporary substrate; and laser-dissociating the second temporary substrates of pixel chips with different emission colors to transfer the pixel chips with different emission colors to the circuit board.

[0013] This disclosure provides a light-emitting device, which includes: a circuit substrate, a plurality of pixel chips, and an encapsulating adhesive layer. The plurality of pixel chips are transferred onto the circuit substrate using the mass transfer method described above. The encapsulating adhesive layer is located on the surface of the circuit substrate and encapsulates each pixel chip.

[0014] This disclosure provides a display panel, which includes a plurality of light-emitting devices, a driving integrated circuit, and a circuit board as described above, wherein the plurality of light-emitting devices and the driving integrated circuit are all located on the circuit board.

[0015] The beneficial effects of the technical solutions provided in this disclosure include at least the following: The mass transfer method provided in this disclosure first prepares a first temporary substrate containing a pixel chip with residual structures, i.e., debris protruding from the surface of the pixel chip. Next, oxygen plasma etching is used. Utilizing the non-directional nature of plasma, the residual structures are isotropically etched, leaving the remaining structures suspended except for a very small portion connected to the pixel chip, forming easily separable fragile structures. Then, an adhesive film is introduced to assist in peeling. The adhesive film is attached to the pixel chip surface, and by uniformly applying pressure, the residual structures fracture due to stress concentration in the suspended portions. The fractured debris is firmly adhered to the adhesive film. Subsequently, the adhesive film is peeled off, and the residual structures detach from the chip surface along with the film, achieving complete removal.

[0016] In this embodiment, the etched suspended structure significantly reduces the adhesion between the residual structure and the pixel chip, while the mechanical peeling of the adhesive film avoids the risk of breaking debris during traditional bonding. This process eliminates debris residue within the chip channels, removing potential appearance defects and preventing pixel shifting due to debris interference during transfer, ultimately improving the transfer yield and product reliability of the three-color wafer stack. The entire process is compatible with existing mass transfer workflows and offers strong operational controllability. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of a wafer structure provided by related technologies; Figure 2 This is a process diagram of preparing a first temporary substrate provided by related technologies; Figure 3 This is a top view of a second temporary substrate provided by related technologies; Figure 4 This is a flowchart of a mass transfer method for a light-emitting diode provided in this embodiment of the disclosure; Figure 5 This disclosure provides a flowchart of another method for mass transfer of light-emitting diodes; Figure 6 This is a process diagram illustrating the fabrication of a first temporary substrate according to an embodiment of this disclosure; Figure 7 This is a diagram illustrating a residual structure removal process provided in an embodiment of this disclosure; Figure 8 This is a process diagram of a mass transfer provided in an embodiment of this disclosure; Figure 9 This is a top view of a light-emitting device provided in an embodiment of this disclosure; Figure 10 This is a top view of a light-emitting device provided in an embodiment of this disclosure.

[0019] The markings in the diagram are explained as follows: 11. First temporary substrate; 110. First substrate; 12. Second temporary substrate; 120. Second substrate; 13. Adhesive film; 14. Circuit board; 15. Wafer; 16. DBR layer; 20. Pixel chip; 21. First pixel chip; 22. Second pixel chip; 23. Third pixel chip; 200. Residual structure; 31. First pad; 32. Second pad; 33. Third pad; 34. Fourth pad; 41. First electrode; 42. Second electrode; 50. Encapsulating adhesive layer. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0021] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” “top,” and “bottom,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0022] Figure 1 This is a schematic diagram of a wafer 15 structure provided by related technologies. For example... Figure 1 As shown, during the fabrication of wafer 15, especially when fabricating the wafer 15 for the red pixel chip 20, a DBR layer 16 is typically deposited on the surface of each pixel chip 20 to reflect light. To ensure that the DBR layer 16 covers the sidewalls of the pixel chip 20, the DBR layer 16 extends at least 2 μm to 3 μm into the substrate of wafer 15.

[0023] Figure 2 This is a process diagram of fabricating a first temporary substrate 11 provided by related technologies. For example... Figure 2 As shown, the pixel chip 20 on wafer 15 is bonded to the first substrate 110, which has been coated with adhesive. Then, the substrate 110 is disengaged by laser, leaving the pixel chip 20 electrodes facing the adhesive surface on the first substrate 110, forming a first temporary substrate 11. Figure 2 As shown, after the first temporary substrate 11 is formed, a portion of the DBR layer (residual structure 200) remains on the bottom surface of the pixel chip 20.

[0024] Figure 3 This is a top view of a second temporary substrate 12 provided by related technologies. For example... Figure 2 , 3As shown, after the first temporary substrate 11 is bonded to the second substrate 120, these residual structures 200 are broken by the bonding force, and debris falls into the chip channel, affecting the appearance yield. In addition, during the subsequent laser transfer to the circuit board, the falling DBR debris can also cause the pixel chip 20 to shift, reducing the transfer yield.

[0025] Therefore, embodiments of this disclosure provide a mass transfer method for light-emitting diodes. Figure 4 This is a flowchart illustrating a mass transfer method for a light-emitting diode (LED) according to an embodiment of this disclosure. Figure 4 As shown, this mass transfer method includes: Step 101: Prepare the first temporary substrate.

[0026] The first temporary substrate 11 includes a first substrate 110 and a plurality of pixel chips 20 spaced apart on the first substrate 110. The surface of the pixel chips 20 away from the first substrate 110 has a residual structure 200 that protrudes from the surface of the pixel chips 20 away from the first substrate 110.

[0027] Step 102: Use oxygen plasma to etch each pixel chip.

[0028] Step 103: Attach the adhesive film 13 to the surface of the pixel chip 20 away from the first substrate 110 so that the residual structure 200 adheres to the adhesive film 13.

[0029] Step 104: Remove the adhesive film 13 to detach the residual structure 200 from the pixel chip 20.

[0030] The mass transfer method provided in this embodiment first prepares a first temporary substrate 11 containing residual structures 200, i.e., debris protruding from the surface of the pixel chip 20. Next, oxygen plasma etching is used. Utilizing the non-directional nature of plasma, the residual structures 200 are isotropically etched, leaving the remaining area of ​​the residual structures 200 suspended except for a very small portion connected to the pixel chip 20, forming a fragile structure that is easily separable. Then, an adhesive film 13 is introduced to assist in peeling. The adhesive film 13 is attached to the surface of the pixel chip 20, and by uniformly applying pressure, the residual structures 200 fracture due to stress concentration in the suspended portions. The fractured debris is firmly adhered to the adhesive film 13. Subsequently, the adhesive film 13 is removed, and the residual structures 200 detach from the chip surface along with the film, achieving complete removal.

[0031] In this embodiment, the etched suspended structure significantly reduces the bonding force between the residual structure 200 and the pixel chip 20, while the mechanical peeling of the adhesive film 13 avoids the risk of crushing debris during traditional bonding. This treatment eliminates debris residue within the chip channels, removing potential appearance defects and preventing pixel shifting due to debris interference during transfer, ultimately improving the transfer yield and product reliability of the three-color chip arrangement. The entire process is compatible with existing mass transfer workflows and offers strong operational controllability.

[0032] Figure 5 This disclosure provides a flowchart of another method for mass transfer of light-emitting diodes. (See flowchart for example.) Figure 5 As shown, this mass transfer method includes: Step 201: Prepare the first temporary substrate 11.

[0033] Figure 6 This is a process diagram illustrating the fabrication of a first temporary substrate 11 provided in an embodiment of this disclosure. Figure 6 As shown, the fabrication of the first temporary substrate 11 includes the following steps: The first step is to coat the surface of the first substrate 110 with photosensitive adhesive.

[0034] Specifically, this includes: selecting a glass or silicon-based first substrate 110, uniformly coating a 1μm to 3μm thick UV-curable photosensitive adhesive using a spin coating method to ensure a smooth surface without bubbles, providing temporary adhesion for subsequent pixel chip 20 bonding.

[0035] The second step is to bond the pixel chip 20 of wafer 15 to the photosensitive adhesive of the first substrate 110.

[0036] Specifically, this includes aligning the wafer 15 containing the pixel chip 20 with the first substrate 110, and using vacuum hot pressing (80°C to 100°C) to bond the photosensitive adhesive with the electrodes of the pixel chip 20 facing downwards, ensuring that the array position is accurate and without offset.

[0037] The third step involves using laser to dissociate the substrate of the wafer 15, so that the electrodes of each pixel chip 20 face the photosensitive adhesive and remain on the first substrate 110, forming the first temporary substrate 11.

[0038] Specifically, this includes scanning the back side of the wafer 15 substrate with a 248nm or 266nm laser, selectively ablating the interface between the wafer and the pixel chip 20, and then leaving the pixel chip 20 (electrodes facing the adhesive surface) on the photosensitive adhesive of the first substrate 110 to form a first temporary substrate 11 containing the array chip.

[0039] like Figure 6 As shown, after laser dissociation of the substrate of the wafer 15, the surface of the pixel chip 20 away from the first substrate 110 has a residual structure 200, and the residual structure 200 protrudes from the surface of the pixel chip 20 away from the first substrate 110.

[0040] For example, the residual structure 200 is a portion of the DBR layer covering the sidewall of the pixel chip 20.

[0041] Step 202: Inductively coupled plasma etching is used to etch the adhesive layer between adjacent pixel chips 20 to form multiple independently spaced pixel chips 20.

[0042] like Figure 6 As shown, before oxygen plasma etching, inductively coupled plasma (ICP) is used to perform dry etching on the adhesive layer under each pixel chip 20. By utilizing its vertical downward directionality, the adhesive layer between each pixel chip 20 is precisely removed, thereby obtaining multiple independent pixel chips 20.

[0043] The core advantage of ICP etching lies in its strong directionality, enabling near-vertical etching profiles. For the adhesive layer between pixel chips 20, vertical ICP etching removes this portion of the adhesive layer, exposing the residual structure 200. This creates a suspended initial structure for subsequent oxygen etching, improving the peeling efficiency of the adhesive film 13.

[0044] Step 203: Use oxygen plasma to etch each pixel chip 20.

[0045] Specifically, this may include: controlling the vacuum level in the reaction chamber to be 500 mTorr to 1000 mTorr, controlling the oxygen flow rate to be 800 sccm to 1200 sccm, controlling the radio frequency power of oxygen plasma etching to be 600 W to 800 W, and controlling the oxygen plasma etching time to be 150 s to 210 s.

[0046] Maintaining a vacuum level of 500 mTorr to 1000 mTorr within the reaction chamber is fundamental to maintaining a stable plasma. Within this range, the mean free path of electrons is moderate, ensuring sufficient ionization efficiency to generate high-density reactive particles (such as oxygen atoms and oxygen ions) while also providing enough energy for ions to perform directional bombardment. This helps balance chemical reactions and physical bombardment, enabling anisotropic etching.

[0047] Controlling the oxygen flow rate to 800 sccm to 1200 sccm ensures a sufficient concentration of reactive gases within the reaction chamber. This effectively increases the density of reactive oxygen particles in the plasma, thereby accelerating the oxidation reaction rate with organic materials such as photoresist and improving overall etching efficiency. Simultaneously, the sufficient flow rate helps to promptly remove reaction byproducts, keeping the etched surface clean and reducing the impact of residues on etching uniformity and pattern accuracy.

[0048] Controlling the radio frequency (RF) power to 600W to 800W directly increases the energy and density of the plasma. Increased source power ionizes more gas molecules, generating a higher concentration of active particles and enhancing chemical etching. Simultaneously, the enhanced bias power (or self-bias effect) accelerates the vertical bombardment of the sample surface by ions. This not only significantly improves the vertical etching rate but also effectively suppresses lateral etching, making it a core parameter for obtaining high-verticality sidewall morphology.

[0049] Controlling the etching time to 150s to 210s aims to precisely remove material of the target thickness while avoiding over-etching that could damage the underlying functional material.

[0050] For example, during the etching process, the vacuum level in the reaction chamber is 700 mTorr, the oxygen flow rate is 1000 sccm, the radio frequency power of the oxygen plasma etching is 800 W, and the oxygen plasma etching time is controlled to be 180 s.

[0051] In other implementations, besides injecting oxygen into the reaction chamber, nitrogen can also be injected, with a flow rate ranging from 200 sccm to 400 sccm. Injecting nitrogen into oxygen plasma etching, using nitrogen as an inert gas, effectively dilutes and stabilizes the plasma, preventing over-reaction and thus improving the uniformity and controllability of the etching process. Simultaneously, the combined use of nitrogen and oxygen helps adjust the selectivity of the underlying material, optimizing the etching profile.

[0052] For example, the flow rate of nitrogen can be 300 sccm.

[0053] Figure 7 This is a diagram illustrating the removal process of a residual structure 200 provided in an embodiment of this disclosure. For example... Figure 7 As shown, the pixel chip 20 has debris protruding from its surface. Oxygen plasma etching is used to etch the residual structure 200 isotropically, taking advantage of the non-directional nature of plasma. This results in the residual structure 200 being etched into a suspended state, except for a very small portion connected to the pixel chip 20, forming a fragile structure that is easily separable.

[0054] Before step 204, the process further includes: treating the surface of the adhesive film with plasma to roughen the surface of the adhesive film.

[0055] Before attaching the adhesive film, plasma treatment is used to roughen its surface, which improves adhesion performance. On one hand, high-energy particles in the plasma bombard the film surface, forming a microscopic uneven structure, i.e., a roughened surface. This increases the effective contact area with the residual structure of the pixel chip, enhancing mechanical adhesion. On the other hand, the high-energy particles in the plasma act on the adhesive film surface, breaking surface chemical bonds and forming unsaturated "dangling bonds" or free radical sites. These active sites react chemically with active substances in the plasma environment (such as oxygen atoms from oxygen or air, and free radicals), grafting new polar functional groups (such as hydroxyl -OH, carboxyl -COOH, carbonyl C=O, etc.) onto the material surface, increasing its surface energy and hydrophilicity, thereby enhancing the chemical adsorption force on the residual structure.

[0056] Step 204: Attach the adhesive film 13 to the surface of the pixel chip 20 away from the first substrate 110 so that the residual structure 200 adheres to the adhesive film 13.

[0057] Specifically, this includes attaching the adhesive film 13 to the pixel chip 20 at a temperature of 40°C to 60°C and a pressure of 0.3 MPa to 0.5 MPa.

[0058] like Figure 7 As shown, the adhesive film 13 is attached to the surface of the pixel chip 20. By applying pressure evenly, the residual structure 200 breaks due to stress concentration in the suspended part, and the broken fragments are firmly adhered to the adhesive film 13.

[0059] By controlling the operating temperature between 40°C and 60°C, moderate heating can reduce the initial adhesion threshold of the adhesive film 13, allowing it to fully wet and contact the tiny residual structure 200 (suspended DBR debris that is only partially connected to the chip after etching) under mild conditions, thus avoiding incomplete peeling due to insufficient adhesion at low temperatures; at the same time, it avoids the risk of softening and deformation of the adhesive film 13 or thermal damage to the chip that may be caused by high temperatures (>60°C).

[0060] By controlling the downward pressure of the adhesive film 13 between 0.3 MPa and 0.5 MPa, the adhesive film 13 can be tightly adhered to the chip surface through uniform pressure, ensuring that the suspended residual structure 200 will break due to stress concentration. At the same time, it can prevent high pressure (>0.5 MPa) from damaging the chip or embedding it into the substrate photosensitive adhesive layer. Under this pressure, the broken DBR debris can be firmly captured by the adhesive film 13 and detached intact with the film when it is removed, avoiding secondary contamination.

[0061] For example, the adhesive film 13 includes at least one of blue film and adhesive tape.

[0062] When using blue film as the adhesive film 13, the blue film has moderate adhesion, making it easy to peel off debris and suitable for the fine surface of the chip.

[0063] When using adhesive tape as the adhesive film 13, it is suitable for batch removal of residues because the tape is inexpensive, readily available, and has adjustable viscosity.

[0064] Step 205: Remove the adhesive film 13 to detach the residual structure 200 from the pixel chip 20.

[0065] Specifically, this may include: slowly and uniformly peeling off the adhesive film 13, using its adhesion force to the residual structure 200 (greater than the bonding force between the residual structure 200 and the chip) to completely remove the residual structure 200 from the surface of the pixel chip 20 without any residue adhesion.

[0066] Step 206: Prepare multiple second temporary substrates 12 and transfer the pixel chips 20 of different second temporary substrates 12 to the circuit board 14.

[0067] For example, the pixel chips 20 on different second temporary substrates 12 emit different colors.

[0068] Figure 8 This is a process diagram of a mass transfer provided in an embodiment of this disclosure. For example... Figure 8 As shown, step 206 may include the following steps: The first step is to coat the surface of the second substrate 120 with photosensitive adhesive.

[0069] Specifically, this includes: selecting a silicon or glass second substrate 120, uniformly coating a 1μm to 2μm thick UV photosensitive adhesive using a spin coating method to ensure a smooth surface without bubbles, providing a temporary bonding and laser dissociation interface for subsequent chip bonding.

[0070] The second step, as Figure 8 As shown, the first temporary substrate 11 is bonded to the photosensitive adhesive of the second substrate 120.

[0071] Specifically, this includes aligning the first temporary substrate 11, which contains residual structure 200, with the second substrate 120 photosensitive adhesive, and bonding them under vacuum hot pressing (e.g., at a temperature of 85°C and a pressure of 0.2 MPa) to ensure that the array position is accurate and without offset.

[0072] The third step, as Figure 8 As shown, the laser dissociates the first substrate 110, so that the epitaxial surface of each pixel chip 20 faces the photosensitive adhesive and remains on the second substrate 120, forming the second temporary substrate 12.

[0073] Specifically, this includes scanning the back side of the first substrate 110 with a 248nm or 266nm laser, selectively ablating the interface between the substrate and the pixel chip 20, and then leaving the pixel chip 20 (with its epitaxial surface facing the adhesive) on the second substrate 120 to form a second temporary substrate 12.

[0074] Step four, as Figure 8As shown, the laser dissociates the second temporary substrate 12 of the pixel chips 20 with different emission colors, so that the pixel chips 20 with different emission colors are transferred to the circuit board 14.

[0075] Specifically, this includes: selectively disassembling the second temporary substrate 12 using a laser according to a preset pattern, so that the red / green / blue pixel chips 20 are precisely detached and sequentially transferred to the corresponding pads on the circuit board 14 to complete the three-color chip arrangement.

[0076] In this embodiment of the disclosure, step 206 can prepare three types of second temporary substrates 12, and pixel chips 20 of different colors are arranged on the second substrates 120 of the three types of second temporary substrates 12.

[0077] Optionally, the pixel chips 20 of different colors include red-emitting pixel chips 20, green-emitting pixel chips 20, and blue-emitting pixel chips 20.

[0078] In this embodiment, each pixel chip 20 includes an epitaxial layer, a passivation layer, and an electrode. The epitaxial layer is located on the surface of the substrate and includes a p-type layer, a light-emitting layer, and an n-type layer stacked sequentially. The n-type layer has a groove exposing the p-type layer. The passivation layer is located on the surface of the n-type layer and in the groove, and the passivation layer has a through-hole exposing the n-type layer and the groove.

[0079] The passivation layer has a first electrode 41 and a second electrode 42 on its surface. The first electrode 41 and the second electrode 42 are connected to the n-type layer and the p-type layer through two through holes, respectively.

[0080] For the red-emitting pixel chip 20, the epitaxial layer is a red-light epitaxial layer. For the green-emitting pixel chip 20, the epitaxial layer is a green-light epitaxial layer. For the blue-emitting pixel chip 20, the epitaxial layer is a blue-light epitaxial layer.

[0081] The red epitaxial layer comprises a first p-type layer, a first luminescent layer, and a first n-type layer stacked sequentially.

[0082] In the red-light epitaxial layer, the first p-type layer includes a p-type AlInP layer.

[0083] The first luminescent layer comprises alternating layers of AlGaInP quantum wells and AlGaInP quantum barriers, wherein the Al content in the AlGaInP quantum well layers and AlGaInP quantum barrier layers differs. The first luminescent layer may comprise 3 to 8 alternating stacked cycles of AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0084] The first n-type layer includes an n-type AlGaInP current-spreading layer.

[0085] In this embodiment of the disclosure, the green epitaxial layer includes a second p-type layer, a second luminescent layer, and a second n-type layer stacked sequentially.

[0086] In the green epitaxial layer, the second p-type layer includes a p-type GaN layer.

[0087] The second light-emitting layer comprises alternating InGaN quantum well layers and GaN quantum barrier layers. The second light-emitting layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0088] The second n-type layer includes an n-type GaN layer.

[0089] In this embodiment of the disclosure, the blue light epitaxial layer includes a third p-type layer, a third light-emitting layer, and a third n-type layer stacked sequentially.

[0090] In the blue light epitaxial layer, the third p-type layer includes a p-type GaN layer.

[0091] The third light-emitting layer may include alternating InGaN quantum well layers and GaN quantum barrier layers. The third light-emitting layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0092] The third n-type layer includes an n-type GaN layer.

[0093] Optionally, the thickness of the pixel chip 20 is 2 μm to 10 μm.

[0094] For example, the thickness of the red epitaxial layer is 5 μm, the thickness of the green epitaxial layer is 8 μm, and the thickness of the blue epitaxial layer is 6 μm.

[0095] After step 206, the process may further include: forming an encapsulating adhesive on the surface of the circuit board 14 to form an encapsulating adhesive layer 50 that fills and encapsulates each pixel chip 20.

[0096] Specifically, this may include: coating the surface of the circuit board 14 with encapsulating adhesive, and after the encapsulating adhesive fills the gaps between each pixel chip 20, curing the encapsulating adhesive to obtain an encapsulating adhesive layer 50.

[0097] Optionally, the light absorption rate of the encapsulating adhesive layer 50 is greater than or equal to 0.8. Encapsulating the pixel chip 20 with an encapsulating adhesive layer 50 having a light absorption rate greater than or equal to 0.8 can block the lateral light emission of the pixel chip 20 and improve the front light emission effect of the light-emitting device.

[0098] For example, the encapsulating adhesive layer 50 can be black, as black absorbs light more easily, thus preventing excessive light from escaping from the sides of the pixel chip 20. Furthermore, the black encapsulating adhesive is easier to observe during the encapsulation process, allowing technicians to accurately determine whether the encapsulating adhesive completely covers each pixel chip 20.

[0099] Alternatively, the curing of the encapsulating adhesive to obtain the encapsulating adhesive layer 50 can also include two implementation methods.

[0100] The first curing method is heat curing. Specifically, it may include: controlling the temperature to rise above 50°C and heating the encapsulating adhesive to cure it; controlling the temperature to rise above 150°C and baking the encapsulating adhesive for 1 to 2 hours to obtain the encapsulating adhesive layer 50.

[0101] First, the temperature is controlled to rise above 50℃ to accelerate the curing speed and achieve rapid curing of the encapsulating adhesive; then, the temperature is controlled to rise above 150℃ to bake the encapsulating adhesive, so that the encapsulating adhesive can be fully cured.

[0102] The second curing method is ultraviolet light curing. Specifically, it may involve irradiating the encapsulating adhesive with ultraviolet light for 1 to 10 minutes to obtain an encapsulating adhesive layer of 50.

[0103] Using ultraviolet light to cure the encapsulating adhesive is faster and can improve the preparation efficiency of the encapsulating adhesive layer by 50%.

[0104] Finally, ISO etching is performed to etch out the external dimensions of the light-emitting devices, and multiple light-emitting devices are obtained by laser scribing.

[0105] This disclosure provides a light-emitting device, which includes a circuit board 14, a plurality of pixel chips 20, and an encapsulating adhesive layer 50. The plurality of pixel chips 20 are transferred onto the circuit board 14 using the mass transfer method for light-emitting devices as described above. Figure 9 This is a top view of a light-emitting device provided in an embodiment of this disclosure. Figure 9 This diagram illustrates the state of the circuit board 14 before the encapsulating adhesive layer 50 is formed. Figure 10 This is a top view of a light-emitting device provided in an embodiment of this disclosure. Figure 10 This diagram illustrates the state after the encapsulating adhesive layer 50 has been formed on the circuit board 14.

[0106] like Figure 9 , 10 As shown, the light-emitting device includes: a circuit board 14, a plurality of pixel chips 20 and an encapsulating adhesive layer 50; the plurality of pixel chips 20 are all located on the surface of the circuit board 14, the encapsulating adhesive layer 50 is located on the surface of the circuit board 14 and wraps around each pixel chip 20, and the surface of the encapsulating adhesive layer 50 away from the circuit board 14 is flush with the surface of the pixel chip 20 away from the circuit board 14.

[0107] Optionally, such as Figure 9 , 10 As shown, the multiple pixel chips 20 include a first pixel chip 21 that emits red light, a second pixel chip 22 that emits green light, and a third pixel chip 23 that emits blue light.

[0108] Optionally, such as Figure 9 As shown, the light-emitting device also includes a first pad 31, a second pad 32, a third pad 33, and a fourth pad 34. The first pad 31, the second pad 32, the third pad 33, and the fourth pad 34 are all located on the surface of the circuit board 14 and are connected to the solder joints of the circuit board 14.

[0109] like Figure 9 As shown, the first electrode 41 of the first pixel chip 21, the first electrode 41 of the second pixel chip 22, and the first electrode 41 of the third pixel chip 23 are all connected to the first pad 31.

[0110] In this way, the first pad 31 is connected to the first electrode 41 of each pixel chip 20, so that the first pad 31 can be used as a common pad, thereby avoiding the need to set more pads on the planarization layer to reduce the size of the light-emitting device.

[0111] like Figure 9 As shown, the second electrode 42 of the first pixel chip 21 is connected to the second pad 32, the second electrode 42 of the second pixel chip 22 is connected to the third pad 33, and the second electrode 42 of the third pad 33 is connected to the fourth pad 34.

[0112] In this embodiment of the disclosure, each pixel chip 20 is provided with a separate pad. The ability to control whether the pixel chip 20 emits light can be controlled by energizing the pad corresponding to the pixel chip 20.

[0113] The difference between the first pixel chip 21, the second pixel chip 22, and the third pixel chip 23 lies in the different light-emitting colors of the epitaxial layer.

[0114] For the first pixel chip 21, the epitaxial layer is a red epitaxial layer. For the second pixel chip 22, the epitaxial layer is a green epitaxial layer. For the third pixel chip 23, the epitaxial layer is a blue epitaxial layer.

[0115] The red epitaxial layer comprises a first p-type layer, a first luminescent layer, and a first n-type layer stacked sequentially.

[0116] In the red-light epitaxial layer, the first p-type layer includes a p-type AlInP layer.

[0117] The first luminescent layer comprises alternating layers of AlGaInP quantum wells and AlGaInP quantum barriers, wherein the Al content in the AlGaInP quantum well layers and AlGaInP quantum barrier layers differs. The first luminescent layer may comprise 3 to 8 alternating stacked cycles of AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0118] The first n-type layer includes an n-type AlGaInP current-spreading layer.

[0119] In this embodiment of the disclosure, the green epitaxial layer includes a second p-type layer, a second luminescent layer, and a second n-type layer stacked sequentially.

[0120] In the green epitaxial layer, the second p-type layer includes a p-type GaN layer.

[0121] The second light-emitting layer comprises alternating InGaN quantum well layers and GaN quantum barrier layers. The second light-emitting layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0122] The second n-type layer includes an n-type GaN layer.

[0123] In this embodiment of the disclosure, the blue light epitaxial layer includes a third p-type layer, a third light-emitting layer, and a third n-type layer stacked sequentially.

[0124] In the blue light epitaxial layer, the third p-type layer includes a p-type GaN layer.

[0125] The third light-emitting layer may include alternating InGaN quantum well layers and GaN quantum barrier layers. The third light-emitting layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0126] The third n-type layer includes an n-type GaN layer.

[0127] Optionally, the thickness of the pixel chip 20 is 2 μm to 10 μm.

[0128] For example, the thickness of the red epitaxial layer is 5 μm, the thickness of the green epitaxial layer is 8 μm, and the thickness of the blue epitaxial layer is 6 μm.

[0129] For example, the substrate may be a sapphire substrate or a glass substrate.

[0130] Optionally, the passivation layer can be a silicon oxide layer. The thickness of the silicon oxide layer can be from 3 μm to 30 μm.

[0131] For example, the thickness of the passivation layer can be 10 μm.

[0132] Optionally, the passivation layer can be a distributed Bragg reflection (DBR) layer, which consists of multiple periodically alternating layers of SiO2 and TiO2. The number of periods in the DBR layer can be between 20 and 50. For example, the number of periods in a DBR layer is 32.

[0133] The thickness of the SiO2 layer in the DBR layer can be from 800 angstroms to 1200 angstroms, and the thickness of the TiO2 layer can be from 500 angstroms to 900 angstroms.

[0134] In this embodiment, the first electrode 41 of each pixel chip 20 is connected to the n-type layer, and the second electrode 42 of each pixel chip 20 is connected to the p-type layer. The first electrode 41 is connected to the first pad 31, so the first pad 31 is a negative pad. Correspondingly, the second pad 32, the third pad 33, and the fourth pad 34 are all positive pads.

[0135] This disclosure provides a display panel that includes a plurality of light-emitting devices, a driver integrated circuit (IC), and a circuit board as described above, wherein the plurality of light-emitting devices and the driver IC are all located on the circuit board.

[0136] For example, multiple light-emitting device arrays are arranged on a circuit board.

[0137] The driver IC is located on the circuit board and electrically connected via drive traces on the circuit board. The solder pads of multiple light-emitting devices are also electrically connected to the drive traces on the circuit board. In this way, the driver IC can control each light-emitting device through the drive traces.

[0138] The above is not intended to limit this disclosure in any way. Although this disclosure has been disclosed above through embodiments, it is not intended to limit this disclosure. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this disclosure. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this disclosure without departing from the content of the technical solution of this disclosure shall still fall within the scope of the technical solution of this disclosure.

Claims

1. A mass transfer method for a light-emitting device, characterized in that, The mass transfer method includes: A first temporary substrate (11) is prepared, the first temporary substrate (11) includes a first substrate (110) and a plurality of pixel chips (20) spaced apart on the first substrate (110), the surface of the pixel chip (20) away from the first substrate (110) has a residual structure (200), the residual structure (200) protruding from the surface of the pixel chip (20) away from the first substrate (110); Each pixel chip (20) was etched using oxygen plasma. An adhesive film (13) is attached to the surface of the pixel chip (20) away from the first substrate (110) so that the residual structure (200) adheres to the adhesive film (13). Remove the adhesive film (13) to detach the residual structure (200) from the pixel chip (20).

2. The mass transfer method according to claim 1, characterized in that, The method of etching each pixel chip (20) using oxygen plasma includes: The vacuum level in the reaction chamber is controlled to be 500 mTorr to 1000 mTorr, the oxygen flow rate is controlled to be 800 sccm to 1200 sccm, the radio frequency power of oxygen plasma etching is controlled to be 600 W to 800 W, and the oxygen plasma etching time is controlled to be 150 s to 210 s.

3. The mass transfer method according to claim 1, characterized in that, Before etching each of the pixel chips (20) using oxygen plasma, the process further includes: The adhesive layer between adjacent pixel chips (20) is etched by inductively coupled plasma etching to form multiple independently spaced pixel chips (20).

4. The mass transfer method according to claim 2, characterized in that, The method of etching each pixel chip (20) using oxygen plasma also includes: Nitrogen gas is injected into the reaction chamber, and the nitrogen flow rate is controlled to be 200 sccm to 400 sccm.

5. The mass transfer method according to any one of claims 1 to 4, characterized in that, Attaching the adhesive film (13) to the surface of the pixel chip (20) away from the first substrate (110) includes: At a temperature of 40°C to 60°C, the adhesive film (13) is attached to the pixel chip (20) under a controlled pressure of 0.3 MPa to 0.5 MPa.

6. The mass transfer method according to any one of claims 1 to 4, characterized in that, The adhesive film (13) includes at least one of blue film and adhesive tape.

7. The mass transfer method according to any one of claims 1 to 4, characterized in that, The fabrication of the first temporary substrate (11) includes: Photosensitive adhesive is coated on the surface of the first substrate (110); The pixel chip (20) of the wafer (15) is bonded to the photosensitive adhesive of the first substrate (110); Laser dissociation of the substrate of the wafer (15) so that the electrodes of each pixel chip (20) are oriented toward the photosensitive adhesive and remain on the first substrate (110) to form the first temporary substrate (11).

8. The mass transfer method according to claim 7, characterized in that, After removing the adhesive film (13) to detach the residual structure (200) from the pixel chip (20), the process further includes: Photosensitive adhesive is coated on the surface of the second substrate (120); The first temporary substrate (11) is bonded to the photosensitive adhesive of the second substrate (120); Laser dissociation of the first substrate (110) so that the epitaxial surface of each pixel chip (20) faces the photosensitive adhesive and remains on the second substrate (120) to form a second temporary substrate (12). The second temporary substrate (12) is laser-dissociated from the pixel chips (20) with different emission colors, so that the pixel chips (20) with different emission colors are transferred to the circuit board (14).

9. A light-emitting device, characterized in that, The light-emitting device includes: a circuit board (14), a plurality of pixel chips (20) and an encapsulating adhesive layer (50), wherein the plurality of pixel chips (20) are transferred onto the circuit board (14) using the mass transfer method as described in any one of claims 1 to 8, and the encapsulating adhesive layer (50) is located on the surface of the circuit board (14) and encapsulates each of the pixel chips (20).

10. A display panel, characterized in that, The display panel includes a plurality of light-emitting devices, a driving integrated circuit, and a circuit board as described in claim 9, wherein the plurality of light-emitting devices and the driving integrated circuit are all located on the circuit board.

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