Systems and methods for implementing atomic layer etching and radical enhanced deposition in a single chamber

Abstract

This invention discloses a system and method for achieving atomic layer etching (ALE) and radical-enhanced deposition (REED) in a single chamber. The system features a switchable DC blocking capacitor for grounding an electrostatic chuck (ESC) to eliminate the plasma sheath, and employs high-power short-pulse RF to suppress ion bombardment during ALE surface modification and REED deposition steps, thereby achieving efficient processing and making it suitable for applications such as the fabrication of high aspect ratio structures.

Description

[0001] Cross-references to related applications

[0002] This invention claims priority to U.S. Patent Application No. 19 / 015,664, filed on January 10, 2025. Technical Field

[0003] This invention relates to the field of semiconductor manufacturing, specifically focusing on systems and methods for optimizing atomic layer etching (ALE) and radical-enhanced deposition processes within a single chamber. Background Technology

[0004] Reactive ion etching (RIE) is a key technology in semiconductor manufacturing. In RIE, various substances, including free radicals and ions, jointly influence the etching process. A key characteristic of RIE is the synergistic effect between ion flux and free radical flux, which significantly enhances the etching rate. Coburn and Winters first described this synergistic effect in their 1979 article, "Ion- and electron-assisted gas-surface chemistry- an important effect in plasma etching," published in *J. Appl. Phys.*, Vol. 50, pp. 3189-3196. They reported that when using argon ion beams, The etching rate of silicon increases with the presence of neutral beams and the combination of both. For efficient RIE, the coexistence of ion flux and radical flux is necessary to leverage the synergistic effect discovered by Coburn and Winters. However, achieving a balance between these two in modern etching equipment has become increasingly complex, especially as etching dimensions tend towards nanoscale high aspect ratio (HAR) structures. Achieving uniform etching on 300mm wafers and ensuring consistent repeatability in mass production also presents additional challenges.

[0005] To overcome the limitations of RIE, ALE technology was developed. The ALE process system evolved from the RIE process system, but it has lower requirements for achieving uniformity on 300mm wafers. However, due to the characteristics of its process steps, ALE has its own unique requirements. Karanik et al. introduced ALE technology in "Overview of atomic layer etching in the semiconductor industry" (J. Vac. Sci. Technol. A33, pp. 020802 1-14, 2015), and Lill further explored this technology in her book "Atomic Layer Processing: Semiconductor Dry Etching Technology" (Wiley-VCH GmbH, 2021). Anisotropic ALE enables the removal of material layers with atomic precision and is an etching technique utilizing continuous self-limiting reactions. The basic ALE process consists of two steps: a surface modification step and a sputtering step for removing the modified layer. The surface modification step is used to form a thin reactive layer of defined thickness, which is easier to remove than the unmodified material. This reactive layer is then removed by sputtering, while the underlying substrate is retained, thus resetting the surface for the next cycle. Material removal can be achieved using thermal energy obtained from heating the wafer or kinetic energy provided by ions from an inert gas. Isotropic processes use thermal energy to remove the modified layer, as described in U.S. Patent No. 10,208,383 (George et al.); while when using high-energy ions, the removal process is performed by sputtering. Tan et al. described an anisotropic ALE process in U.S. Patent No. 10,727,073, demonstrating the versatility of this technology.

[0006] The different chemical reactions, particle morphologies, and plasma energy composition involved in surface modification and sputtering steps facilitate more precise control of the flux of ions, electrons, and neutral particles, thereby expanding the process window. This step separation mechanism contributes to the realization of self-limiting reactions, which is crucial for maintaining an ideal etching process, namely ensuring uniformity, smoothness, and selectivity. Karanik et al., in "Predicting synergy in atomic layer etching" (J. Vac. Sci. Technol. A35, pp. 05C302 1-7, 2017), defined the ALE synergy factor as follows:

[0007]

[0008] Here, EPC (Etch Per Cycle) represents the total thickness of material removed in one cycle (usually the average of multiple cycles); "and" The values ​​of are the (non-ideal) contributions from the surface modification step and the sputtering step, respectively. Ideally, these two steps would not etch independently, but when combined, the synergy factor would be close to 100%. However, in reality, due to the presence of ions in the plasma, neutral particles are generated to modify the surface, making the RIE effect in the surface modification step unavoidable; similarly, physical sputtering of the underlying unmodified layer in the sputtering step is also unavoidable.

[0009] In the surface modification step of ALE (Alternating Electrode Process), it is desirable to avoid ion bombardment by the plasma. However, the unintended introduction of RIE (Residual Injection Effusion) in this step presents a challenge. Since ion bombardment of the substrate surface is difficult to completely avoid, conventional ALE struggles to maintain ideal etching characteristics. Traditional ALE methods are ineffective at eliminating these RIEs, resulting in suboptimal etching performance, especially as device structures become increasingly complex and their dimensions shrink. RIEs in the ALE process cause non-uniform layer removal and undesirable etching profiles, which is particularly severe in advanced device manufacturing; even small deviations can significantly impact device performance and yield.

[0010] To address this issue, U.S. Patent No. 9,362,131 (Agarwal et al.) proposed a solution: using an electron beam source, in the passivation step (i.e., the surface modification step), a remote plasma source is used to supply passivating material to the main chamber, and the ion energy is controlled below the etching threshold; while in the etching step, the material flow from the remote plasma source is stopped and the ion energy is increased above the etching threshold. This solution requires the introduction of an additional remote source, increasing system complexity and cost.

[0011] Another solution, proposed by Singh in U.S. Patent No. 10,014,192, employs a partition structure to divide the chamber into a plasma generation region and a substrate processing region. This partition structure can block ions from reaching the substrate while using low-energy metastable materials to etch the substrate. However, since there are no high-energy ions in the processing region, this method is not suitable for etching high aspect ratio (HAR) structures. In such structures, it is essential for high-energy ions to reach the bottom of deeper or narrower structures; without sufficient ion energy, the etching process cannot achieve effective directional control, making it difficult to etch HAR structures.

[0012] In high aspect ratio (HAR) structures, ion avoidance during deposition is crucial to prevent anisotropic deposition, physical sputtering, charge buildup, and structural damage. Ions struggle to reach deep grooves, leading to uneven coverage. In contrast, radical-enhanced deposition processes utilize isotropically diffused radicals to ensure uniform deposition along all surfaces. In atomic layer deposition (ALD), these reactions are self-limiting, allowing for precise control of layer thickness and conformality, making it particularly suitable for HAR applications. However, conventional ALD may still face uniformity issues in HAR structures due to plasma ion energy and angular distribution effects.

[0013] Currently, plasma-enhanced atomic layer etching (PEALE) and radical-enhanced deposition processes are typically performed in different chambers. PEALE removes material anisotropically, while radical-enhanced deposition processes such as radical-enhanced atomic layer deposition (REALD) or radical-enhanced chemical vapor deposition (RECVD) deposit material isotropically. For HAR applications (such as depositing liners to maintain vertical profiles), these processes often need to be performed consecutively. Transferring the substrate between chambers increases complexity, contamination risk, and process time.

[0014] Although the existing methods disclosed by Karanik et al. in U.S. Patent No. 9,805,941 place ALE and ALD in the same chamber, they do not solve challenges such as non-ionic surface modification during ALE or achieving conformal ALD in HAR structures. Summary of the Invention

[0015] This invention overcomes the above-mentioned defects by introducing a unified system and method to enhance ALE and radical-enhanced deposition processes, ensure better layer uniformity, reduce contamination risk, and improve semiconductor manufacturing efficiency.

[0016] This invention addresses the limitations of PEALE by introducing a system and method for eliminating reactive ion etching (RIE) during the surface modification step. In this invention, the terms ALE and PEALE are used interchangeably. This objective is achieved by minimizing ion generation or removal of the plasma sheath, aligning with radical-enhanced deposition processes such as REALD and RECVD.

[0017] In some embodiments, the present invention provides a system and method for performing PEALE and REALD / RECVD in situ within a single chamber. This setup significantly simplifies the process flow, shortens the process cycle, reduces process costs, and adapts to the time-sensitive requirements critical in advanced semiconductor manufacturing when etching and deposition steps need to be performed consecutively.

[0018] In some embodiments, the system leverages the shared requirement of minimizing ionic effects in both the ALE surface modification step (Step A) and the radical-enhanced deposition step. The ALE surface modification step is a process that modifies the substrate surface using active radicals without material removal, requiring a low-ion or ion-free environment. Similarly, the radical-enhanced deposition step requires a radical-only process to achieve high conformality when depositing along the HAR structure surface. In some embodiments, the system achieves this by suppressing plasmonic sheath formation or reducing ion generation during these steps, thereby improving process ideality.

[0019] In some embodiments, two techniques are introduced to reduce ion effects. The first technique employs a switchable DC blocking capacitor, which can be activated or deactivated based on process steps. In some embodiments, the DC blocking capacitor is deactivated during the ALE surface modification step or the radical-enhanced deposition step, thereby effectively preventing ion bombardment while utilizing the generated radicals. The second technique is to apply short-pulse radio frequency (RF) power to the plasma source, wherein the RF signal is modulated by a square wave with a duty cycle of less than 10% to limit ion generation. In some embodiments, this short-pulse RF technique enables radical-based processes to be performed during ion-sensitive steps.

[0020] Therefore, the system and method provided by this invention not only optimize ALE and radical-enhanced deposition processes, but also improve manufacturing efficiency, reduce costs, and ensure compatibility with advanced semiconductor manufacturing requirements. Attached Figure Description

[0021] Figure 1A An exemplary plasma chamber in the first embodiment is shown, which is configured with a switchable DC blocking capacitor and a short pulse RF for a plasma source.

[0022] Figure 1B An exemplary plasma chamber in the second embodiment is shown, which is configured with a custom waveform generator for selectively providing bias voltage to the chuck via a bidirectional switch.

[0023] Figure 2 : A schematic diagram illustrating an exemplary process combining ALE and free radical enhanced deposition steps.

[0024] Figure 3 This shows a flowchart of the combined ALE and radical-enhanced deposition steps.

[0025] Figure 4 : Depicts exemplary operating modes of plasma chambers for ALE and radical-enhanced deposition processes. Detailed Implementation

[0026] To facilitate a full understanding of the invention, specific embodiments thereof will be described in detail below. While specific details are provided for ease of explanation, any modifications and variations consistent with the technical principles of the invention are considered appropriate. Certain well-known procedures and components are described selectively only to highlight the unique features of the invention.

[0027] The terminology is defined as follows:

[0028] Plasma chamber: A vacuum chamber designed with integrated atomic layer etching and free radical enhanced deposition processes.

[0029] Chamber structure: The cavity structure of a plasma chamber generally includes plasma-resistant materials.

[0030] Dielectric window: A dielectric barrier layer used to maintain vacuum sealing to assist in plasma generation.

[0031] Plasma source: A component used to generate plasma (typically including inductively coupled plasma (ICP) and capacitively coupled plasma (CCP)).

[0032] Gas / precursor distribution unit: A system for delivering process gases or precursors, including injectors or spray heads.

[0033] Controller: A computer that manages process parameters, equipment operation, and switching between various process steps.

[0034] DC blocking capacitor: A device that prevents electrons generated in plasma from diffusing to the ground terminal and enables the formation of a plasma sheath.

[0035] Custom waveform generator: A custom waveform generator used to generate chuck bias voltage, which typically enables a narrower ion energy distribution.

[0036] RF power generator: A radio frequency power supply and modulation system used for plasma generation and control.

[0037] Surface modification step (Step A): A step in ALE in which free radicals chemically modify the substrate surface without material removal.

[0038] Sputtering step (Step B): A step in ALE in which inert gas ions remove the modified surface layer by ion bombardment.

[0039] Feeding step (step C): A step in REALD in which the precursor forms a monolayer on the substrate surface.

[0040] Free radical activation step (step D): a step in REALD in which free radicals react with a precursor monolayer to complete material deposition.

[0041] Free radical reaction chamber: a chamber mode that can generate free radicals while minimizing ion bombardment.

[0042] Atomic Layer Etching (ALE): A cyclic process that alternates between surface modification and sputtering steps to achieve atomic-scale material removal.

[0043] Radical Enhanced Atomic Layer Deposition (REALD): A radical enhanced atomic layer deposition process used for conformal layer formation.

[0044] Radical-enhanced chemical vapor deposition (RECVD): A radical-enhanced chemical vapor deposition process used to eliminate ion effects.

[0045] High aspect ratio (HAR) structures: These are structural features with a large aspect ratio. These structures require high-precision etching and deposition techniques to prepare.

[0046] Conformal layer: A uniformly deposited layer of material that is crucial for achieving the desired profile in HAR applications.

[0047] Figure 1A An embodiment of a process system 100 is shown, which includes a plasma chamber 102 and is monitored by a controller 134. The chamber 102 is surrounded by a chamber structure 104 that provides a vacuum environment suitable for plasma processing. The chamber structure 104 may be made of a material such as aluminum or quartz, and the inner aluminum surface may optionally be treated with anodizing or yttrium oxide coating to enhance resistance to plasma exposure.

[0048] A sealed dielectric window 106 is located at the top of the chamber structure 104. In some embodiments, the dielectric window is made of quartz or other anti-plasma material, and its inner surface is optionally coated with an anti-plasma material (such as yttrium oxide). Above the dielectric window 106, a plasma source 108 is disposed. The plasma source comprises a three-turn coil, but the number of turns, shape (e.g., cylindrical or conical), or configuration may be varied and adjusted according to operational requirements.

[0049] Plasma source 108 is connected to RF power generator 110 via resonator 112 to ensure impedance matching with the plasma load in chamber 102. RF power generator 110 can operate at one or more frequencies, including but not limited to 100kHz, 200kHz, 400kHz, 2MHz, 13.56MHz, 27MHz, 40MHz, and 60MHz. In some embodiments, RF power is delivered in the form of RF pulses 111 and modulated by a square wave with a specified duty cycle. This duty cycle is expressed as a percentage and is determined by a high-level DC voltage (…). ) and low-level DC voltage ( ) is defined, where It can be ground voltage or non-zero voltage.

[0050] In inductively coupled plasma (ICP) chambers or transformer-coupled plasma (TCP) chambers, plasma ignition involves a transition from electrostatic mode (E-mode) to helicon or high-density mode (H-mode). E-mode relies on capacitive coupling with low plasma density, while H-mode utilizes inductive coupling to achieve high plasma density and ionization efficiency. During the RF pulse, if the duty cycle is too low or... If the duration of the E-mode is too short, the plasma may not be able to achieve H-mode. Repeated transitions between E-mode and H-mode increase energy consumption and lead to process inefficiency. Maintaining a minimum sustaining power that allows the plasma to remain in H-mode reduces the time and energy required to re-establish H-mode and maintains the consistency of plasma properties.

[0051] To minimize ion generation while maintaining a high radical concentration, the short-pulse RF 111 is designed to sustain the plasma at minimal RF power. This configuration allows the RF power to rapidly reach the desired high power state without repeated EH mode switching. Combining this technology with a switchable DC blocking capacitor ensures ion-free or low-ion plasma conditions for applications such as ALE surface modification steps and radical-enhanced deposition processes, where high radical concentration and minimal ion energy are critical.

[0052] The gas / precursor distribution unit 114 is connected to the gas / precursor source 116 through a hole in the dielectric window 106, ensuring a seal. The gas / precursor source 116 can supply various process gases, and the distribution unit 114 may include an injector or a spray head. In some configurations, the dielectric window 106 is integrated with the gas / precursor distribution unit 114 as a spray head.

[0053] Within chamber 102, a suction cup 120 supports substrate 122. The suction cup 120 can be an electrostatic chuck (ESC) or a vacuum chuck. Chamber 102 is connected to pump 124 and valve 126 to extract unused gases and reaction byproducts, wherein the extraction rate is controlled by the capacity of valve 126 and pump 124.

[0054] A DC blocking capacitor 130 is used to block DC signals and stabilize the plasma sheath layer above the substrate 122. This capacitor prevents electrons from moving to the ground terminal, thus preventing the accumulation of negative potential. A switch 132 connected in parallel with the DC blocking capacitor 130 enables dynamic control. When the switch 132 is closed, the DC blocking capacitor 130 is short-circuited and deactivated, and the chuck 120 is grounded through the bias unit 128. When the switch 132 is open, the DC blocking capacitor 130 operates normally. In other configurations, a bidirectional or series switch can ground or connect the chuck 120 to the bias unit 128.

[0055] During the ALE surface modification step, the DC blocking capacitor 130 is bypassed and short-circuited by the switch 132 to prevent sheath formation and eliminate RIE. During the sputtering step, the switch 132 is turned off, activating the DC blocking capacitor 130 to establish a bias voltage for ion acceleration. The controller 134 manages the switch operation via an electrical signal, and the switch 132 may include a transistor or relay (e.g., a power MOSFET) or other known mechanisms.

[0056] Figure 1B An embodiment of process system 101 is shown, in which a custom waveform generator 136 provides bias to the chuck 120. The custom waveform generator 136 facilitates a narrower ion energy distribution, which is crucial for advanced etching processes, particularly for the formation of HAR structures. The operating frequency of the custom waveform generator 136 is typically significantly lower than that of the RF power generator used for the plasma source. Unlike other configurations, the operation of the custom waveform generator 136 may not require a DC blocking capacitor.

[0057] In this embodiment, a bidirectional switch 138 is used to deactivate the custom waveform generator 136 by grounding the chuck 120 during the surface modification step. During the sputtering step, switch 138 activates the custom waveform generator 136, thereby enabling precise control of ion acceleration.

[0058] Figure 2 Four exemplary steps of the process system 100 are shown. The first mode is a pure ALE operation mode 202. ALE is a cyclic process that includes multiple cycles, each cycle involving a surface modification step (step A) and a sputtering step (step B). The second mode is a pure REALD process 204, which is also a cyclic process, including a feeding step (step C) and a radical activation step (step D).

[0059] In many semiconductor manufacturing applications, ALE and ALD processes can be used in tandem to optimize performance. For example, in advanced processes, after layer etching using the ALE process, the ALD process can be used to deposit a thin conformal layer to adjust the critical dimensions of openings (such as trenches or vias). In another case, particularly in the formation of high aspect ratio structures, the ALD process can be used to deposit a sidewall protection layer after the ALE etching step. Furthermore, ALE can enhance the gap-filling capability of ALD in high aspect ratio opening structures.

[0060] Figure 2 The third mode of the ALE and ALD combined process 206 is shown, which can perform net deposition or net etching depending on the application. Therefore, this combined process can begin or end with either the ALE or ALD process. The ALE and ALD processes in process 206 are referred to as process stages, and the number of cycles for the ALE and ALD process stages can be adjusted according to specific application requirements.

[0061] During the sputtering step (step B) of the ALE process, bias unit 128 or custom waveform generator 136 provides bias to chuck 120. An inert gas such as argon is injected into plasma chamber 102, generating argon plasma 118. Positively charged argon ions are accelerated under the bias, move toward substrate 122, and remove the modified surface layer.

[0062] In the REALD process, steps C and D are performed consecutively, similar to ALE. During the feeding step (step C), the precursor is introduced into chamber 102, where it adsorbs onto the substrate surface to form a monolayer. This step can be followed by gas purging to remove excess precursor. During the subsequent radical activation step (step D), the substrate is exposed to radicals, which react with the precursor monolayer to form the desired thin film on the substrate.

[0063] Figure 1A and Figure 1B The process system shown can efficiently execute ALE and REALD processes.

[0064] In another exemplary step 208, the REALD process can be replaced by the RECVD process, referred to as step E. RECVD can be used in some applications (such as depositing linings on the top surface and sidewalls of high aspect ratio structures).

[0065] Figure 3 The flowchart of the in-situ atomic layer etching and free radical enhanced deposition process 300 is shown.

[0066] The process begins in step 301, where the chuck 120 is set to a first temperature suitable for the ALE process. This first temperature is typically in the range of -30°C to 150°C. In step 302, the ALE surface modification step (step A) is performed within the plasma chamber 102, at which point the chamber operates as a free radical reaction chamber 402, generating free radicals 406, such as... Figure 4 As shown. A first process gas is introduced into chamber 102 via gas / precursor distribution unit 114. During step A, ions and radicals are generated while minimizing ionic effects. In one embodiment, DC blocking capacitor 132 is deactivated. In another embodiment, an RF power pulse 111 with an extremely low duty cycle (e.g., less than 10%) is applied. In some cases, the duty cycle may be less than 1%. These methods can also be combined for optimal performance. During step A, the substrate surface undergoes chemical modification without material removal. For example, in the ALE process of silicon, chlorine gas introduced into the chamber generates a chlorine plasma containing radicals. These radicals react with the substrate surface to form silicon-chlorine bonds, thereby weakening the underlying silicon-silicon bonds and preparing for material removal in step B.

[0067] In step 304, the first process gas may optionally be purged from the chamber using a purge gas such as nitrogen. In step 306, the plasma chamber 102 is used as the sputtering reaction chamber 404 (e.g., Figure 4 The process (shown) operates, generating plasma 408 and performing a sputtering step (step B). In one embodiment, a DC blocking capacitor 132 is activated to establish a bias voltage for ion acceleration. In another embodiment, a custom waveform generator 136 is used to accelerate the ions, ensuring a narrower ion energy distribution. A second process gas, typically an inert gas such as argon, is introduced during step B. In step 308, the second process gas may optionally be purged with a gas such as nitrogen. In step 310, the controller 134 monitors whether the ALE process is complete. If not, steps 302 through 308 are repeated until the required number of cycles is completed. Upon completion, the controller switches to execute step 311.

[0068] In step 311, the controller sets the suction cup 120 to a second temperature, which is typically higher than the first temperature. For radical-enhanced deposition processes, this temperature can range from room temperature to several hundred degrees Celsius, and in some cases, even be low. In step 312, step E or multiple cycles of steps C and D are performed to deposit a layer of material (such as oxides, nitrides, or carbon). During this step, the plasma chamber 102 operates as a radical reaction chamber 402, as... Figure 4 As shown. In step 314, additional ALE sequences can be performed by repeating steps 301 to 308 if necessary.

Claims

1. A plasma chamber for in-situ execution of atomic layer etching and free radical enhanced deposition processes, characterized in that, include: A plasma source, which is connected to a radio frequency power generator and configured to generate plasma within the plasma chamber; Suction cups are used to support the substrate; A bias unit, operably connected to the chuck, is configured to generate a bias voltage for accelerating ions during the sputtering step of the atomic layer etching process. Gas / precursor distribution unit, configured to deliver process gas and / or precursor; and The controller is configured as follows: In the surface modification step of the atomic layer etching process, the plasma chamber is ignited by the plasma source and operates in a mode that suppresses ion bombardment. In the sputtering step of the atomic layer etching process, the plasma chamber operates in a mode that accelerates ions through the bias unit to remove the modified layer; as well as In the radical-enhanced deposition process, the plasma chamber operates in a mode that suppresses ion bombardment.

2. The plasma chamber according to claim 1, characterized in that, The radical-enhanced deposition process includes a radical-enhanced atomic layer deposition step and / or a radical-enhanced chemical vapor deposition step.

3. The plasma chamber according to claim 1, characterized in that, The ion bombardment is suppressed by employing a switchable DC blocking capacitor, wherein the DC blocking capacitor is deactivated during the surface modification step and the radical-enhanced deposition process.

4. The plasma chamber according to claim 1, characterized in that, The ion bombardment is suppressed by applying pulsed radio frequency power to the plasma source.

5. The plasma chamber according to claim 4, characterized in that, The pulsed radio frequency power switches between a high radio frequency power state and a low radio frequency power state.

6. The plasma chamber according to claim 5, characterized in that, The low RF power state corresponds to zero RF power.

7. The plasma chamber according to claim 5, characterized in that, The low radio frequency power state corresponds to the non-zero low radio frequency power used to maintain the plasma.

8. The plasma chamber according to claim 4, characterized in that, The duty cycle of the pulsed radio frequency power is less than 10%.

9. The plasma chamber according to claim 1, characterized in that, The atomic layer etching process is performed in a cyclic manner, and the free radical enhanced deposition process is inserted into the atomic layer etching cycle sequence.

10. The plasma chamber according to claim 1, characterized in that, The free radical enhanced deposition process is used to perform liner deposition between two atomic layer etching steps to etch high aspect ratio structures.

11. The plasma chamber according to claim 1, characterized in that, The controller is configured to perform a purging step between gas or precursor switching steps.

12. A method for performing atomic layer etching and radical-enhanced deposition processes in a single chamber, characterized in that, include: a) Provide a process system, wherein the process system includes a plasma chamber, a plasma source coupled to a radio frequency power generator, a gas / precursor source, a gas / precursor distribution unit, a chuck, a bias unit, and a controller; b) Set the suction cup to the first temperature via the controller; c) A surface modification step of an atomic layer etching cycle is performed by a controller, wherein the plasma chamber operates in a free radical reaction chamber mode to suppress ion bombardment; d) The sputtering step of the atomic layer etching cycle is executed by a controller, wherein the plasma chamber operates in sputtering reaction chamber mode; e) Repeat steps c) and d) until the first atomic layer etching sequence is completed; f) Set the suction cup to the second temperature via the controller; g) Executing a radical-enhanced deposition process via a controller; and h) Repeat steps c) and d) until the second atomic layer etching sequence is completed.

13. The method according to claim 12, characterized in that, The free radical enhanced deposition process includes a free radical enhanced atomic layer deposition step, and the free radical enhanced atomic layer deposition step includes a feeding step and a free radical activation step.

14. The method according to claim 12, characterized in that, The free radical enhanced deposition process includes a free radical enhanced chemical vapor deposition step.

15. The method according to claim 12, characterized in that, By employing a first and / or a second technique, the plasma chamber is modulated into a radical reaction chamber mode to suppress ion bombardment during the surface modification step and the radical-enhanced deposition process.

16. The method according to claim 15, characterized in that, The first technique includes disabling the DC blocking capacitor when the plasma chamber is operating in free radical reaction chamber mode.

17. The method according to claim 15, characterized in that, The second technique includes applying pulsed radio frequency power, which switches between a high radio frequency power state and a low radio frequency power state.

18. The method according to claim 17, characterized in that, The low RF power state corresponds to zero RF power.

19. The method according to claim 17, characterized in that, The low radio frequency power state corresponds to the non-zero low radio frequency power used to maintain the plasma.

20. The method according to claim 17, characterized in that, The duty cycle of the pulsed radio frequency power is less than 10%.

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