A whole machine cable connection diagram paper rapid generation method, system, device and medium

CN122735618APending Publication Date: 2026-09-11SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP
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Patent Information

Application Number
CN202610724504.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-05-25
Publication Date
2026-09-11

AI Technical Summary

Technical Problem

[0005]本发明的目的在于:针对目前复杂电子信息设备整机设计研发中,手工定义硬件连接表格并绘图导致的出图效率低、缺乏可复用结构化数字模型以及易产生人为错连漏连等问题,本发明提供了一种整机线缆连接图图纸快速生成方法、系统、设备及介质,基于MBSE(基于模型的系统设计)思想,构建可复用的结构化数字模型,并在图形化的逻辑视图中实例化连接器,同时引入基于针脚网络名、差分信号及接地的多维自动匹配规则与状态可视化联动机制,实现了复杂电子信息设备整机图形化建模后硬件连接关系的快速定义、针脚连线状态的实时校验以及线缆连接图图纸的联动自动生成

Benefits of technology

1、实现了基于模型系统工程的结构化数字模型复用。本发明打破了传统二维软件单纯绘制线条的束缚,以图形化方式构建包含功能、性能、通用质量特性、连接器信息和设计参数等要素的基本图块。通过将这些模型和要素模板进行XML结构化存储,设计师可在不同项目中直接复用底层系统架构,极大降低了重复建模的时间成本。

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Abstract

The application discloses a kind of whole machine cable connection diagram drawing quick generation method, system, equipment and medium, it is related to electronic information equipment drawing field.The method includes: reusable structured digital model is constructed with extension or module as basic block;In logical view, the logical connection between extension or module is established through port, and instance connector is configured to define pin network name;According to the matching rule of the preset pin network name, differential signal and ground, and in combination with connector and pin state visual switching rule, pin connection relationship is refined;Finally, hardware connection information is generated, and drawing software interface is automatically called to generate drawing.The application breaks the defect that traditional manual drawing lacks structured digital model and is extremely easy to produce artificial wrong connection, realizes model efficient reuse, line state automatic verification and drawing generation, significantly improves design quality, and greatly shortens drawing iteration cycle.
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Description

Technical Field

[0001] This invention relates to the field of drawing production for electronic information equipment, specifically to a method, system, device, and medium for rapidly generating complete machine cable connection diagrams. Background Technology

[0002] The statements in this section are provided only as background information in connection with this disclosure and may not constitute prior art.

[0003] As the complexity of electronic information equipment continues to increase, the number of hardware entities and cable connections involved in the overall research and development process is becoming increasingly large. In the traditional design and development of complex electronic information equipment, designers usually need to manually define complex hardware connection tables first, and then manually draw lines and adjust graphics in 2D drafting software such as AutoCAD to finally meet the conditions for generating and archiving drawings.

[0004] However, the aforementioned methods in the existing technology have obvious drawbacks: First, traditional manual two-dimensional drawing fails to construct a reusable structured digital model with electrical attributes and port constraints, resulting in the inability to effectively preserve and reuse historical design schemes; second, since the total number of cables in the whole machine is often in the hundreds or thousands, it is highly dependent on the designer's manual verification and input, which is prone to input errors such as incorrect or missing connections of pins with the same name; finally, once the underlying hardware design changes, the designer must manually modify the lines one by one in the drawing software, which makes it easy to have repeated iterative modifications during the drawing process, greatly reducing the drawing efficiency of cable connection diagrams and the overall design quality. Summary of the Invention

[0005] The purpose of this invention is to address the problems of low drawing efficiency, lack of reusable structured digital models, and susceptibility to human error and omissions caused by manually defining hardware connection tables and drawing diagrams in the current design and development of complex electronic information equipment. This invention provides a method, system, device, and medium for rapidly generating cable connection diagrams for the entire device. Based on the MBSE (Model-Based System Design) concept, a reusable structured digital model is constructed, and connectors are instantiated in a graphical logical view. At the same time, a multi-dimensional automatic matching rule and status visualization linkage mechanism based on pin network names, differential signals, and grounding are introduced. This enables the rapid definition of hardware connection relationships after graphical modeling of complex electronic information equipment, real-time verification of pin connection status, and automatic generation of cable connection diagrams.

[0006] The technical solution of the present invention is as follows: A method for quickly generating complete machine cable connection diagrams includes the following steps: Step S1: Construct a reusable structured digital model of complex electronic information equipment. The structured digital model uses the sub-units or modules that make up the whole machine as basic blocks. Each basic block has a built-in element template containing connector information. Step S2: Define the logical connection between the extension units or modules in the logical view; specifically, this includes: establishing logical connections between each extension unit or module in the logical view through ports, configuring connectors on the ports, instantiating the connectors to define the pin network names of the connectors, thereby defining the system composition and hardware connection relationships of the entire machine; Step S3: According to the preset pin matching rules, refine the pin connection relationship between each of the sub-units or modules; wherein, the pin matching rules include: automatic matching rules based on the pin network name, used to find pins with the same network name in connectors with logical connection relationships to automatically establish connection relationships; the pin matching rules also include matching rules for ground pins and differential signal pins; Step S4: After completing the overall digital design, generate hardware connection information and automatically call the preset drafting software interface to generate the cable connection diagram of the whole machine.

[0007] Furthermore, the elements included in the basic block include: function, performance, general quality characteristics, connector information, and design parameters; Step S1 further includes: storing the element template and the structured digital model in XML format for reuse.

[0008] Further, configuring a connector on the port and instantiating the connector includes: Target connectors are selected from a pre-established connector library according to radio frequency, low frequency, or optical type and configured on the port; wherein, the connector library contains structured records of the connector's model, characteristics, pin name, and pin ID information; When the target connector is instantiated, the tag number of the target connector is further defined.

[0009] Furthermore, when refining the pin connection relationships between each of the sub-units or modules according to the preset pin matching rules, connector state switching rules are used to visually present the design status; the connector state switching rules include: The connector is in its initial state by default, and its font color is displayed in black. When the connector is selected, its font color changes to gray. When the pin network name of the connector is edited, or when an initial pin network name already exists, it switches to the edited state and its font color changes to blue; Check the pin connection status and set the connector with incompletely connected pins to a warning status, with the text color turning red.

[0010] Furthermore, when refining the pin connection relationships between each of the sub-units or modules according to the preset pin matching rules, pin state switching rules are also adopted; the pin state switching rules include: The initial state is the default pin state, and the pin fill color is gray. When the pin network name is not empty, it switches to edited state, and its font color changes to white; The system checks the pin connection status and network name editing status. If the pin network name is empty, it switches to a warning status and the font color turns yellow. If the pin network name is not empty but no connection relationship has been established, it switches to an error status and the font color turns red. When a pin has been connected, the pin switches to the connected state, and its font color changes to green.

[0011] Furthermore, the automatic matching rules based on the pin network name specifically include: In the connectors of the current extension or module, traverse its pin network name information table, filter and exclude pins with the same network name; search for pins with the same network name in the connectors that have a logical connection relationship with the current extension or module, so as to automatically match and establish a connection relationship; perform manual connection for pins with the same network name in the connectors of the current extension or module. The pin matching rules also include manual many-to-many connection rules: when manually establishing pin connections, if multiple pins are selected in the pin lists on both sides for matching at the same time, the matching will be performed automatically in the order of the selected pins.

[0012] Furthermore, the matching rules for the ground pin and the differential signal pin include: Automatic grounding pin matching rules: Grounding pins with the network name GND are connected together by default and are mutually connected, and a preset number of pins are selected from the other pins with the network name GND as the destination; Differential signal matching rules: Differential signal pins are identified using pin net names that include positive and negative polarity indicators. When performing automatic pin matching or manual connection, positive differential signal pins are matched with negative differential signal pins.

[0013] This invention also proposes a virtual whole-machine cable connection diagram rapid generation system for implementing the above method, including: The model building module is used to build a reusable structured digital model of complex electronic information equipment. The structured digital model uses the sub-units or modules that make up the whole machine as basic blocks. Each basic block has a built-in element template containing connector information. The logical connection definition module is used to define the logical connections between the extensions or modules in the logical view; specifically, it includes: establishing logical connections between each extension or module in the logical view through ports, configuring connectors on the ports, instantiating the connectors to define the pin network names of the connectors, thereby defining the system composition and hardware connection relationships of the whole machine; The pin connection refinement module is used to refine the pin connection relationship between each of the sub-units or modules according to preset pin matching rules; wherein, the pin matching rules include: automatic matching rules based on the pin network name, used to find pins with the same network name in connectors with logical connection relationships to automatically establish connection relationships; the pin matching rules also include matching rules for ground pins and differential signal pins; The drawing generation module is used to generate hardware connection information after the digital design of the whole machine is completed. It automatically calls the preset drawing software interface to generate the cable connection diagram of the whole machine.

[0014] The present invention also proposes an electronic device, comprising: At least one processor; and a memory communicatively connected to said at least one processor; The memory stores instructions that can be executed by the at least one processor, and the at least one processor executes the instructions stored in the memory to perform the method described above.

[0015] The present invention also proposes a computer-readable storage medium for storing instructions that, when executed, cause the method described above to be implemented.

[0016] Compared with existing technologies, the advantages of this invention are: 1. This invention enables the reuse of structured digital models based on model-based systems engineering. It breaks free from the limitations of traditional 2D software that simply draws lines, instead constructing basic blocks in a graphical manner that include elements such as functionality, performance, general quality characteristics, connector information, and design parameters. By storing these models and element templates in an XML structure, designers can directly reuse the underlying system architecture across different projects, significantly reducing the time cost of repetitive modeling.

[0017] 2. A smart matching and visual verification linkage mechanism for complex electronic device pins is defined. This invention innovatively proposes multi-dimensional rules for automatic matching and deduplication of network names, manual many-to-many sequential matching, automatic interconnection of ground pins (GND), and automatic pairing matching of differential signals (positive and negative polarities), addressing the characteristics of complex hardware connections. More importantly, this invention strictly links the connection and editing status of connectors and pins with specific UI colors for visual linkage, thereby achieving real-time data verification during the design process and eliminating the potential for omissions and errors caused by manual input.

[0018] 3. This invention enables synchronized updates to the drafting software based on model modifications, significantly shortening the iteration cycle. The drawing generation of this invention no longer relies on purely manual drawing. Instead, it automatically calls the interface of drafting software (such as AutoCAD) to generate standard drawings based on the hardware connection information generated from the overall digital design. When hardware connections change, designers only need to adjust the logical relationships in the graphical model to synchronize updates and output drawings, eliminating the tedious work of manually adjusting CAD lines in the traditional model and greatly improving design efficiency and drawing quality. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments recorded in the embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings.

[0020] Figure 1 This is a schematic diagram of the hardware connection pin matching process for the overall digital design of a complex electronic device, provided by an embodiment of the present invention. Figure 2 This is a schematic diagram of a structured digital model of an antenna reusable according to an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the logical connection relationship between sub-units or modules of a complete machine, provided by an embodiment of the present invention. Figure 4 This is a schematic diagram of an interface operation for establishing pin connection relationships provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of a generated cable wiring diagram provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0021] It should be noted that relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0022] The features and performance of the present invention will be further described in detail below with reference to embodiments.

[0023] Example 1 This invention, based on the MBSE (Model-Based Systems Design) concept, provides a method for rapidly generating cable connection diagrams for complex electronic information equipment based on graphical model design. It is particularly suitable for the R&D of complex electronic information equipment. By constructing a reusable structured digital model and rapidly defining the hardware connection relationships between sub-units and modules based on certain rules, the method automatically generates cable connection diagrams after graphical modeling of complex electronic information equipment, significantly improving drawing efficiency and quality while reducing iterative modification cycles.

[0024] Combination Figures 1 to 5 As shown, this embodiment of the invention provides a method for quickly generating a complete machine cable connection diagram, including the following steps: Step S1: Construct a reusable structured digital model of complex electronic information equipment. The structured digital model uses the sub-units or modules that make up the whole machine as basic blocks. Each basic block has a built-in element template containing connector information. In this embodiment, the hardware connection design can be carried out graphically using VISIO-like software for complex electronic information equipment. A model library of complex electronic information equipment sub-units / modules is constructed graphically; for example, the equipment may consist of various antennas, switches, receivers, amplifiers, integrated processing modules, etc.

[0025] Furthermore, the basic block includes the following elements: function, performance, general quality characteristics, connector information, and design parameters; step S1 also includes: storing the element template and the structured digital model in XML format for reuse.

[0026] Specifically, taking a certain type of antenna as an example, designers can construct a structured digital model from dimensions such as basic attributes, connectors, electrical attributes, and port settings. For example, this can include the input of the alignment number, equipment type, and electrical / design parameters such as installation azimuth and elevation angles. The six characteristics (general quality characteristics) and specific technical specifications of the equipment can be configured in the model attribute panel. Each block contains built-in element templates. For this type of antenna, commonly used connector templates are constructed and saved as CBBs (Common Building Blocks). By storing the digital model and its templates in a structured format using standard formats such as XML, the limitation of unstructured line drawings in traditional AutoCAD, which cannot be reused, is overcome. Designers can also save custom templates at any time during use, greatly improving the efficiency of model reuse in system engineering design.

[0027] Step S2: Define the logical connection between the extension units or modules in the logical view; specifically, this includes: establishing logical connections between each extension unit or module in the logical view through ports, configuring connectors on the ports, instantiating the connectors to define the pin network names of the connectors, thereby defining the system composition and hardware connection relationships of the entire machine; Specifically, in the system's logical view, each sub-unit / module is rationally laid out according to the actual composition of the entire machine. By dragging and dropping blocks into the logical view, ports are added to the sub-units / modules, and the product models and port information of the sub-units / modules are further defined. Logical connections are then used to connect the ports of each sub-unit / module, clarifying the data flow between the sub-units / modules.

[0028] Based on this, a connector is configured on the port, and the connector is instantiated, including: selecting target connectors from a pre-established connector library according to radio frequency, low frequency, or optical type, and configuring them on the port; wherein, the connector library contains structured records of the connector's model, characteristics, pin name, and pin ID information; when the target connector is instantiated, the target connector's tag number is further defined.

[0029] In this embodiment, it should be noted that "instantiation" refers to the process of assigning specific physical engineering meaning to the general model in the connector library. After configuring the connector, model information is further entered, defining specific tag numbers and pin network names. This step transforms the abstract system-level data flow into specific hardware engineering connections, providing a structured data foundation for subsequent pin-level matching.

[0030] Step S3: According to the preset pin matching rules, refine the pin connection relationship between each of the sub-units or modules; wherein, the pin matching rules include: automatic matching rules based on the pin network name, used to find pins with the same network name in connectors with logical connection relationships to automatically establish connection relationships; the pin matching rules also include matching rules for ground pins and differential signal pins; To facilitate designers' checks on the completeness and correctness of their designs, this invention innovatively introduces a state linkage mechanism. When refining the pin connection relationships between various sub-units or modules according to preset pin matching rules, connector state switching rules are used to visually present the design status. These connector state switching rules include: the connector is in an initial state by default, with its font color displayed in black; when the connector is selected, it switches to a selected state, with its font color changing to gray; when the connector's pin network name is edited, or when an initial pin network name already exists, it switches to an edited state, with its font color changing to blue; and the pin connection status is checked, and connectors with incompletely connected pins are placed in a warning state, with their font color changing to red.

[0031] Simultaneously, a pin state switching rule is adopted; the pin state switching rule includes: the initial state is the pin default state, and its pin fill color is gray; when the pin network name is not empty, it switches to the edited state, and its font color changes to white; the pin connection status and network name editing status are checked, and if the pin network name is empty, it switches to the warning state, and its font color changes to yellow; if the pin network name is not empty but no connection relationship is established, it switches to the error state, and its font color changes to red; when the pin has established a connection relationship, the pin switches to the connected state, and its font color changes to green.

[0032] In this embodiment, it should be noted that the aforementioned color switching is not only a visual change in the UI interface, but also a visual mapping of the underlying hardware connection data validation status. The system backend performs real-time statistics on information such as the number of connectors, the number of incomplete connections, the total number of pins, and the number of disconnected pins. Once an anomaly is detected, such as "network name is empty" or "network name exists but not connected," an alarm is immediately triggered in yellow or red. This fundamentally overcomes the technical problem that designers are prone to overlooking or misconnecting cables when complex electronic devices have hundreds or thousands of cables, facilitating the rapid identification of design defects.

[0033] Regarding the specific pin matching process, after the designer selects a specific extension / module, the system filters the objects on both sides of the pin connection according to logical connections. The system interface provides designers with interactive operation options such as automatic connection (all), automatic connection (current), manual connection, check, and delete all connections. The automatic matching rules based on the pin network name specifically include: traversing the pin network name information table in the connectors of the current extension or module, filtering and excluding pins with the same network name; searching for pins with the same network name in connectors that have a logical connection relationship with the current extension or module to automatically match and establish a connection relationship; and manually connecting the pins with the same network name in the connectors of the current extension or module.

[0034] The pin matching rules also include manual many-to-many connection rules: when manually establishing pin connections, if multiple pins are selected for matching simultaneously in both pin lists, the system will automatically match them in the order of selection. For example, if pins 1, 3, and 5 are selected simultaneously in the left pin list, and pins 4, 7, and 8 are selected simultaneously in the right pin list, the system will automatically establish matching relationships 1-4, 3-7, and 5-8 in that order, greatly improving the efficiency of batch manual wiring.

[0035] For special signals, the matching rules for ground pins and differential signal pins include: Automatic ground pin matching rule: Ground pins with the net name GND are connected together by default and are mutually connected, and a preset number of pins are selected from the remaining pins with the net name GND as the destination; Differential signal matching rule: Differential signal pins are identified using pin net names containing positive and negative polarity indicators. During automatic or manual pin matching, positive differential signal pins are matched with negative differential signal pins. For example, differential signal pin net names are generally identified by "+" and "-" (such as "R+" and "R-"). During matching, R+ and R- are automatically paired as a group. Furthermore, the pin connection rules can be further improved and expanded to adapt to increasingly complex electronic device designs.

[0036] Step S4: After completing the overall digital design, generate hardware connection information and automatically call the preset drafting software interface to generate the cable connection diagram of the whole machine.

[0037] After completing the digital design of the overall hardware connection according to the above steps, the system background extracts and generates relevant hardware connection information. This information includes, but is not limited to, system composition, sub-unit / module model, connector information, pin names (which can also be represented as terminals in the generated drawings), network names (i.e., characteristics), wire numbers, and destinations. The obtained information is saved to an intermediate table or computer memory, and then the system automatically calls the interface of a preset drafting software (such as AutoCAD) to generate cable connection diagrams that conform to standardized specifications and can be used for the next step of process design, hardware assembly, or archiving.

[0038] In this embodiment, it should be noted that, unlike traditional manual drafting, this invention operates through a "modify model -> refresh drawing" mechanism. When hardware connections change or the generated drawings fail to meet standards, designers do not need to spend time and effort adjusting the lines in AutoCAD. They only need to modify parameters or connection logic in the graphical model design tool of this application to automatically update the cable connection diagram, significantly shortening the design update cycle and improving design efficiency and quality.

[0039] Example 2 Based on the same inventive concept as Embodiment 1 above, this embodiment of the invention also provides a system for rapidly generating virtual whole-machine cable connection diagrams. Since the principle by which this system solves the problem is similar to that of the method embodiment described above, the implementation of this system can refer to the implementation of the method, and repeated details will not be elaborated further.

[0040] This invention provides a virtual whole-machine cable connection diagram rapid generation system for implementing the method described in Embodiment 1. The system includes: The model building module is used to build a reusable structured digital model of complex electronic information equipment. The structured digital model uses the sub-units or modules that make up the whole machine as basic blocks. Each basic block has a built-in element template containing connector information. The logical connection definition module is used to define the logical connections between the extensions or modules in the logical view; specifically, it includes: establishing logical connections between each extension or module in the logical view through ports, configuring connectors on the ports, instantiating the connectors to define the pin network names of the connectors, thereby defining the system composition and hardware connection relationships of the whole machine; The pin connection refinement module is used to refine the pin connection relationship between each of the sub-units or modules according to preset pin matching rules; wherein, the pin matching rules include: automatic matching rules based on the pin network name, used to find pins with the same network name in connectors with logical connection relationships to automatically establish connection relationships; the pin matching rules also include matching rules for ground pins and differential signal pins; The drawing generation module is used to generate hardware connection information after the digital design of the whole machine is completed. It automatically calls the preset drawing software interface to generate the cable connection diagram of the whole machine.

[0041] It should be noted that the specific implementation principles, working processes, and technical effects of each module in the above virtual system correspond one-to-one with steps S1 to S4 in Embodiment 1. For the sake of brevity, these will not be repeated here.

[0042] Based on the same technical concept, embodiments of the present invention also provide an electronic device that can implement the method for rapidly generating whole-machine cable connection diagrams provided in the above embodiments of the present invention. In one embodiment, the electronic device can be a server, a terminal device, or other electronic devices. Figure 6 As shown, the electronic device may include: At least one processor and a memory connected to the at least one processor. In this embodiment of the invention, the specific connection medium between the processor and the memory is not limited. Figure 6 The example used is the connection between the processor and memory via a bus. The bus... Figure 6 The connections between other components are indicated by thick lines and are for illustrative purposes only, not as limiting information. Buses can be divided into address buses, data buses, control buses, etc., but for ease of representation, [the specific bus type is not shown here]. Figure 6 The processor is represented by a single thick line, but this does not imply that there is only one bus or one type of bus. Alternatively, a processor can also be called a controller; there are no restrictions on the name.

[0043] In this embodiment of the invention, the memory stores instructions executable by at least one processor. By executing the instructions stored in the memory, the at least one processor can perform the aforementioned method for rapidly generating a complete machine cable connection diagram. The processor can implement... Figure 6 The functions of each module in the device shown.

[0044] The processor is the control center of the device. It can connect to various parts of the control device through various interfaces and lines. By running or executing instructions stored in memory and calling data stored in memory, it can monitor the device's various functions and process data, thereby enabling overall monitoring of the device.

[0045] In an alternative design, the processor may include one or more processing units. The processor may integrate an application processor and a modem processor, wherein the application processor primarily handles the operating system, user interface, and applications, while the modem processor primarily handles wireless communication. It is understood that the modem processor may also not be integrated into the processor. In some embodiments, the processor and memory may be implemented on the same chip; in some embodiments, they may also be implemented separately on separate chips.

[0046] The processor can be a general-purpose processor, such as a CPU, digital signal processor, application-specific integrated circuit, field-programmable gate array or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method for rapidly generating complete machine cable connection diagrams disclosed in the embodiments of this invention can be directly manifested as execution by a hardware processor, or execution by a combination of hardware and software modules within the processor.

[0047] Memory, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules. Memory can include at least one type of storage medium, such as flash memory, hard disk, multimedia cards, card-type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), and electrically erasable programmable read-only memory (EPROM). Only memory (EEPROM), magnetic storage, magnetic disks, optical disks, etc. A memory is any other medium capable of carrying or storing desired program code in the form of instructions or data structures, and accessible by a computer, but is not limited thereto. The memory in embodiments of this invention can also be a circuit or any other device capable of performing storage functions for storing program instructions and / or data.

[0048] By designing and programming the processor, the code corresponding to the method for rapidly generating complete machine cable connection diagrams described in the foregoing embodiments can be embedded into the chip, enabling the chip to execute the steps of the methods described in the foregoing embodiments during operation. How to design and program the processor is a technique well-known to those skilled in the art and will not be elaborated upon here.

[0049] Based on the same inventive concept, embodiments of the present invention also provide a storage medium storing computer instructions, which, when executed on a computer, cause the computer to perform a method for rapidly generating a complete machine cable connection diagram as described above.

[0050] In some alternative embodiments, the present invention also provides a method for rapidly generating complete machine cable connection diagrams, which can also be implemented as a program product including program code. When the program product is run on a device, the program code is used to cause the control device to perform the steps in the method for rapidly generating complete machine cable connection diagrams according to various exemplary embodiments of the present invention as described above.

[0051] It should be noted that although several units or sub-units of the apparatus have been mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to embodiments of the invention, the features and functions of two or more units described above can be embodied in one unit. Conversely, the features and functions of one unit described above can be further divided and embodied by multiple units. Furthermore, although the operation of the method of the invention is described in a specific order in the drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0052] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can be implemented in one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs) containing computer-usable program code. The form of a computer program product implemented on ROM, optical memory, etc.

[0053] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a server, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0054] Program code for performing the operations of this invention can be written using any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0055] In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0056] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0057] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0058] The embodiments described above merely illustrate specific implementation methods of this application, and while the descriptions are detailed and specific, they should not be construed as limiting the scope of protection of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the technical solution of this application, and these modifications and improvements all fall within the scope of protection of this application.

[0059] This background section is provided to generally present the context of the invention. The work of the currently named inventors, the work to the extent described in this background section, and aspects of this section that did not constitute prior art at the time of application are neither expressly nor impliedly acknowledged as prior art to the invention.

Claims

1. A method for quickly generating a whole-machine cable connection diagram drawing, characterized in that, Includes the following steps: Step S1: Construct a reusable structured digital model of complex electronic information equipment. The structured digital model uses the sub-units or modules that make up the whole machine as basic blocks. Each basic block has a built-in element template containing connector information. Step S2: Define the logical connection between the extension units or modules in the logical view; specifically, this includes: establishing logical connections between each extension unit or module in the logical view through ports, configuring connectors on the ports, instantiating the connectors to define the pin network names of the connectors, thereby defining the system composition and hardware connection relationships of the entire machine; Step S3: According to the preset pin matching rules, refine the pin connection relationship between each of the sub-units or modules; wherein, the pin matching rules include: automatic matching rules based on the pin network name, used to find pins with the same network name in connectors with logical connection relationships to automatically establish connection relationships; the pin matching rules also include matching rules for ground pins and differential signal pins; Step S4: After completing the overall digital design, generate hardware connection information and automatically call the preset drafting software interface to generate the cable connection diagram of the whole machine.

2. The method of claim 1, wherein, The basic block includes the following elements: function, performance, general quality characteristics, connector information, and design parameters; Step S1 further includes: storing the element template and the structured digital model in XML format for reuse.

3. The method of claim 1, wherein, Configuring a connector on the port and instantiating the connector include: Target connectors are selected from a pre-established connector library according to radio frequency, low frequency, or optical type and configured on the port; wherein, the connector library contains structured records of the connector's model, characteristics, pin name, and pin ID information; When the target connector is instantiated, the tag number of the target connector is further defined.

4. The method of claim 1, wherein, When refining the pin connection relationship between each of the sub-units or modules according to the preset pin matching rules, the connector state switching rules are used to visually present the design state. The connector state switching rules include: The connector is in its initial state by default, and its font color is displayed in black. When the connector is selected, its font color changes to gray. When the pin network name of the connector is edited, or when an initial pin network name already exists, it switches to the edited state and its font color changes to blue; Check the pin connection status and set the connector with incompletely connected pins to a warning status, with the text color turning red.

5. The method of claim 4, wherein, When refining the pin connection relationships between each of the sub-units or modules according to the preset pin matching rules, pin state switching rules are also adopted; the pin state switching rules include: The initial state is the default pin state, and the pin fill color is gray. When the pin network name is not empty, it switches to edited state, and its font color changes to white; The system checks the pin connection status and network name editing status. If the pin network name is empty, it switches to a warning status and the font color turns yellow. If the pin network name is not empty but no connection relationship has been established, it switches to an error status and the font color turns red. When a pin has been connected, the pin switches to the connected state, and its font color changes to green.

6. The method of claim 1, wherein, The automatic matching rules based on the pin network name specifically include: In the connectors of the current extension or module, traverse its pin network name information table, filter and exclude pins with the same network name; search for pins with the same network name in the connectors that have a logical connection relationship with the current extension or module, so as to automatically match and establish a connection relationship; perform manual connection for pins with the same network name in the connectors of the current extension or module. The pin matching rules also include manual many-to-many connection rules: when manually establishing pin connections, if multiple pins are selected in the pin lists on both sides for matching at the same time, the matching will be performed automatically in the order of the selected pins.

7. The method of claim 1 or 6, wherein, Matching rules for ground pins and differential signal pins include: Automatic grounding pin matching rules: Grounding pins with the network name GND are connected together by default and are mutually connected, and a preset number of pins are selected from the other pins with the network name GND as the destination; Differential signal matching rules: Differential signal pins are identified using pin net names that include positive and negative polarity indicators. When performing automatic pin matching or manual connection, positive differential signal pins are matched with negative differential signal pins.

8. A system for rapidly generating virtual complete machine cable connection diagrams, characterized in that, To implement the method according to any one of claims 1-7, comprising: The model building module is used to build a reusable structured digital model of complex electronic information equipment. The structured digital model uses the sub-units or modules that make up the whole machine as basic blocks. Each basic block has a built-in element template containing connector information. The logical connection definition module is used to define the logical connections between the extensions or modules in the logical view; specifically, it includes: establishing logical connections between each extension or module in the logical view through ports, configuring connectors on the ports, instantiating the connectors to define the pin network names of the connectors, thereby defining the system composition and hardware connection relationships of the whole machine; The pin connection refinement module is used to refine the pin connection relationship between each of the sub-units or modules according to preset pin matching rules; wherein, the pin matching rules include: automatic matching rules based on the pin network name, used to find pins with the same network name in connectors with logical connection relationships to automatically establish connection relationships; the pin matching rules also include matching rules for ground pins and differential signal pins; The drawing generation module is used to generate hardware connection information after the digital design of the whole machine is completed. It automatically calls the preset drawing software interface to generate the cable connection diagram of the whole machine.

9. An electronic device, characterized in that, include: At least one processor; and a memory communicatively connected to the at least one processor; The memory stores instructions executable by the at least one processor, which executes the instructions stored in the memory to perform the method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store instructions that, when executed, cause the method as described in any one of claims 1-7 to be implemented.