Quantum chip, layout structure and quantum computer

Abstract

The utility model discloses a quantum chip, layout structure and quantum computer, the quantum chip includes at least one quantum processor, each quantum processor includes the quantum bit and resonant cavity that are coupled in order on the signal transmission line, the resonant cavity includes the first port that is coupled with the external circuit, and the second port is coupled with the external circuit. And a quantum processor for inputting a first signal to the quantum processor and receiving an output signal of the quantum processor, the first signal including a driving signal for driving the quantum bit and a read input signal for measuring the quantum bit. The utility model has the advantage that the layout of the quantum chip can be optimized.

Description

Technical Field

[0001] The utility model relates to the technical field of quantum computers, in particular to a quantum chip, a layout structure and a quantum computer. Background Art

[0002] As an important component in quantum computers, quantum chips will inevitably need to increase the number of quantum bits integrated in quantum chips with the development of quantum computers. In the existing technology, each quantum bit has a corresponding control signal line, and also includes a read signal line for reading quantum signals. As the number of quantum bits increases, the size of the quantum chip will also increase greatly. Since the quantum chip needs to be encapsulated in a closed metal cavity structure, different cavity modes correspond to different sizes of the metal cavity structure, and the cavity mode can produce spatial crosstalk with the quantum bit, which will have a huge impact on the precise operation of the quantum bit. In addition, the larger the cavity, the larger the lowest-order cavity mode, that is, the greater the impact on the quantum bit. In order to reduce the size of the metal cavity structure, reducing the size of the quantum chip is one of the important ways. Therefore, the current development of the number of quantum bits is greatly limited. Utility Model Content

[0003] The purpose of the utility model is to increase the number of quantum bits in a quantum chip. In order to achieve the above purpose, the utility model provides the following technical solutions:

[0004] On one hand, the utility model provides a quantum chip, including at least one quantum processor, each of which includes a quantum bit and a resonant cavity coupled in sequence on a signal transmission line, the resonant cavity including a first port coupled to an external circuit, for inputting a first signal to the quantum processor and receiving an output signal of the quantum processor, the first signal including a driving signal for driving the quantum bit and a read input signal for measuring the quantum bit.

[0005] In the quantum chip as described above, further, the component for realizing the coupling is a coupling capacitor or a coupling inductor, and the components for realizing the coupling at different positions in the quantum processor are different or the same.

[0006] The quantum chip as described above, further, includes a Z control line, and an input end of the Z control line is used to input a signal for adjusting the frequency of the corresponding quantum bit into the corresponding quantum processor.

[0007] In the quantum chip as described above, further, the quantum bit frequency is a constant value.

[0008] On the other hand, the utility model provides a layout structure, including any one of the quantum chips described above.

[0009] On another aspect, the present invention provides a quantum computer, comprising any one of the quantum chips described above.

[0010] The quantum computer as described above, further, the external circuit in the quantum computer includes a circulator, the first port of each of the circulators is coupled to the resonant cavity in the corresponding quantum processor, the second port of the circulator outputs the received output signal of the quantum processor, and the third port of the circulator is used to receive the first signal.

[0011] As described above, the quantum computer further comprises an external circuit in the quantum computer which further comprises a signal synthesizer, wherein the signal synthesizer is used to synthesize the driving signal for driving the quantum bit and the read input signal for measuring the quantum bit into a first signal.

[0012] In the quantum computer as described above, further, the quantum chip is arranged in a packaging box that matches the size of the quantum chip, and the outer edge of the quantum chip is in contact with the inner wall of the packaging box.

[0013] The quantum computer as described above further comprises a dilution refrigerator, wherein the quantum chip and the circulator are arranged in the lowest temperature chamber of the dilution refrigerator.

[0014] The beneficial effects of the utility model are:

[0015] (1) In the present application, the resonant cavity includes a first port coupled to an external circuit, and does not require a read signal line. This design is conducive to the layout of the quantum processor in the chip, thereby reducing the size of the chip or increasing the number of quantum processors. When the size of the quantum chip is reduced, the size of the packaging box that encapsulates the quantum chip can be reduced. The smaller packaging box can reduce the spatial crosstalk caused by the cavity mode on the quantum bit, which can improve the operation accuracy of the quantum bit. When the number of quantum processors is increased, the development of quantum computers can be accelerated.

[0016] (2) The present application connects a circulator through each first port, thereby realizing a mode of canceling the read signal line as a bus. This mode can reduce the crosstalk between quantum bits, thereby reducing the crosstalk between quantum bits. In this way, two bits of the same frequency can be set to work together.

[0017] (3) In the present application, the driving signal and the reading signal are formed into one signal through the signal synthesizer and injected into the circulator. The circulator is used to transmit high-frequency signal energy in one direction, so that the links of the quantum processor controlling the quantum processor are independent and isolated from each other.

[0018] (4) Each quantum bit only needs one first port on the chip as an external port. Compared with conventional structures, large-scale expansion can reduce the number of ports to a certain extent and reduce the difficulty of chip layout.

[0019] The layout structure provided by the present invention therefore has the same beneficial effects and will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A schematic diagram of the structure of a quantum chip and some external circuits in a quantum computer is provided for the embodiment of the utility model;

[0021] Figure 2 This is a schematic diagram of signal transmission on a quantum chip according to an embodiment of the utility model;

[0022] Figure 3 This is a signal transmission curve simulation diagram of an embodiment of the utility model. DETAILED DESCRIPTION

[0023] In order to enable those skilled in the art to better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this application. The embodiments described below with reference to the drawings are exemplary and are only used to explain the present application, and cannot be interpreted as limitations on the present application.

[0024] In the description of the present invention, it should be understood that the terms "center", "up", "down", "left", "right", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present invention.

[0025] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0026] The conventional design of existing quantum chips is that a quantum processor sequentially couples the quantum bit, the resonant cavity and the read signal line on the signal transmission line. A quantum processor is equipped with an XY control line, a Z control line and a read signal line. The quantum bit is coupled with the XY control line to drive the quantum bit to work. The signal output by the Z control line is used to control the frequency of the quantum bit. The read signal line transmits the read input signal for measuring the quantum bit from one end to the quantum processor. The signal carrying the quantum bit information returns to the read signal line through the resonant cavity and is collected and acquired through the other end of the read signal line. In simple terms, the resonant cavity signal is characterized by the read signal line. After the resonant cavity is determined, the coupling between the resonant cavity and the quantum bit is used to disperse the read state of the quantum bit and indirectly obtain the quantum bit frequency.

[0027] The basic information of quantum bits needs to be processed in order to obtain the data of the read signal line. As the number of quantum bits in the quantum chip increases, each quantum bit is connected to the read signal line. Under the condition of a planar structure, when the number of quantum bits is large, the control lines of some of the quantum bits need to pass through the read signal line. The existing technology generally uses an air bridge to pass through the read signal line, and the process of preparing the air bridge is complicated, usually based on two photolithography. This production method leads to a longer production cycle of the quantum chip, and the part that needs to be removed during the preparation process is difficult to peel off, which easily causes contaminants to remain on the surface of the chip; and the consistency and quality of the air bridge are difficult to control. When the quality of the air bridge is unqualified, it is easy to cause the signal to not be transmitted well, thereby making the entire quantum chip scrapped. Due to the uniformity deviation of the metal film layer and the photoresist layer used to prepare the quantum chip, it is easy for a single bridge to collapse or break, making the entire chip unusable.

[0028] In addition, in the prior art, each quantum bit is equipped with an XY control line, a Z control line, and a read signal line. As the number of quantum bits increases, in order to complete the chip circuit layout, the size of the quantum chip will also increase. Since the packaging box is generally made of metal, the packaging box can be equivalent to a microwave resonant cavity that affects the quantum bits in the quantum chip. Specifically, it is the internal cavity structure of the packaging box that affects the quantum bit. The internal cavity structure has a certain resonant frequency, that is, the resonant cavity mode. When it resonates with the quantum bit frequency or the detuning amount is small, the energy of the quantum bit will be dissipated through the path formed by the resonance with the packaging box, resulting in a decrease in the coherence time of the quantum bit, which has a greater impact on the quantum bit.

[0029] In order to reduce the size of quantum chips or increase the number of quantum bits in quantum chips, such as Figure 1As shown, the present application discloses a quantum chip, including at least one quantum processor, each of which includes a quantum bit and a resonant cavity coupled in sequence on a signal transmission line, the resonant cavity includes a first port coupled to an external circuit, used to input a first signal to the quantum processor and receive an output signal of the quantum processor, the first signal includes a driving signal for driving the quantum bit and a read input signal for measuring the quantum bit. Q1 and Qn are quantum bits, and R1 and Rn are resonant cavities.

[0030] The present application uses the first port to input the first signal to the quantum processor and receive the output signal of the quantum processor, which greatly reduces the number of external connection lines of the quantum chip and removes the read signal line. Due to the reduction of lines in the quantum chip, the layout of the quantum chip can be optimized, thereby reducing the size of the quantum chip, and the inner size of the packaging box suitable for the chip is also reduced, thereby reducing the spatial crosstalk generated by the cavity mode of the packaging box using metal materials on the quantum bit, and improving the operation accuracy of the quantum bit. In addition, removing the bus mode using the read signal line can reduce the crosstalk between quantum bits, thereby reducing the crosstalk between quantum bits. In this way, two bits of the same frequency can be set to work together. And the reduction of connecting lines and the removal of the read signal line can avoid the use of air bridge structure, thereby reducing the difficulty of producing quantum chips and improving the success rate of quantum chips.

[0031] In the prior art, a quantum bit needs to be configured with an XY control line, a Z control line, and a read signal line, so each quantum bit in the quantum chip needs to be connected to the outside by at least three lines. The present application inputs a first signal through a first port, and the first signal includes a drive signal for driving the quantum bit and a read input signal for measuring the quantum bit, thereby reducing the connection time of the line. In addition, there is no need to simultaneously adjust the waveform of the read input signal and the waveform of the drive signal, which also reduces the debugging time during detection. Therefore, the quantum bit test circuit can improve the efficiency of detecting chip-related parameters.

[0032] In one embodiment, the component for implementing the coupling is a coupling capacitor or a coupling inductor, and the components for implementing the coupling at different locations in the quantum processor are different or the same. Figure 1 The quantum bit is connected to the resonant cavity via a first coupling capacitor, and the resonant cavity is coupled to an external circuit via a second coupling capacitor. Figure 1The first quantum processor includes two coupling capacitors, one coupling capacitor is arranged between the quantum bit Q1 and the resonant cavity R1, and the other coupling capacitor is arranged between the resonant cavity R1 and the first port. The nth quantum processor includes two coupling capacitors, one coupling capacitor is arranged between the quantum bit Qn and the resonant cavity Rn, and the other coupling capacitor is arranged between the resonant cavity Rn and the first port of the nth quantum processor. The first coupling capacitor and / or the second coupling capacitor can be replaced by a coupling inductor, and both belong to the protection scope of this application and are not repeated here.

[0033] In one embodiment, the quantum chip further includes a Z control line, and the input end of the Z control line is used to input a signal for adjusting the frequency of the corresponding quantum bit into the corresponding quantum processor. In this embodiment, the frequency of the quantum bit can be adjusted by setting the Z control line. Specifically, a Z control line is provided on one side of the quantum bit, one end of the Z control line is grounded, and the other end inputs a processed flux offset signal and a flux pulse signal, wherein the flux offset signal is used to adjust the frequency of the quantum bit to the idle frequency position to complete the initial state preparation of the quantum bit, and the flux pulse signal is used to quickly adjust the frequency of the quantum bit from the idle frequency position to a specific position for characterization. The idle frequency position refers to the initial frequency of the quantum bit.

[0034] Optionally, in order to achieve a constant value of the quantum bit frequency, the quantum chip further includes a Z control line, the input end of the Z control line is used to input a signal for adjusting the corresponding quantum bit frequency into the corresponding quantum processor, and the input end of the Z control line is grounded or suspended. In the scheme, the input port of the Z control line is grounded or suspended, which can reduce the connection time between the quantum chip and the external circuit and also reduce the workload of the installer.

[0035] Preferably, the quantum chip is not provided with a Z control line, and the quantum bit frequency remains constant. In this embodiment, the quantum chip does not need to be provided with a Z control line, and the corresponding quantum processor in each quantum chip only needs one port to input the first signal and receive the output signal of the quantum processor to complete the port connection of the entire quantum processor. Based on this embodiment, for quantum chips of the same size, the number of quantum bits can be arranged to the maximum extent, thereby reducing one of the limiting factors for the development of the number of quantum bits. When the number of quantum bits is certain, the layout of the quantum chip is optimized to reduce the size of the quantum chip, thereby reducing the size of the packaging box to reduce the crosstalk of the packaging box to the quantum chip, thereby improving the signal fidelity of the quantum chip, and also reducing the connection time between the quantum chip and the external circuit.

[0036] The present application also discloses a layout structure, including the quantum chip as described above.

[0037] The present application also discloses a quantum computer, comprising the quantum chip as described above.

[0038] In one embodiment, if Figure 1 As shown, the external circuit in the quantum computer includes a circulator, a first port of each circulator is coupled to the resonant cavity in the corresponding quantum processor, a second port of the circulator outputs the received output signal of the quantum processor, and a third port of the circulator is used to receive the first signal. Figure 1 The circulator is represented by a graphic with an arrow in a box, wherein the first port of the first quantum processor is IN1, the third port is OUT1, the first port of the nth quantum processor is INn, and the third port is OUTn. As a passive microwave device, the circulator can limit the propagation of electromagnetic waves in a specific direction. In this application, the drive signal and the read signal are formed into a signal through a signal synthesizer, which is injected into the circulator, and the high-frequency signal energy is transmitted unidirectionally by the circulator, so that the links of the quantum processor controlling the quantum processor are independent and isolated from each other, thereby protecting the quantum processor. In addition, the circulator also reduces the loss and reflection of the signal, thereby improving the performance and reliability of the external circuit.

[0039] In one embodiment, the external circuit in the quantum computer also includes a signal synthesizer (not shown in the figure), which is used to synthesize the driving signal for driving the quantum bit and the read input signal for measuring the quantum bit into a first signal. The use of the signal synthesizer can reduce the input interference signal. Since the quantum bit is very fragile and easily interfered by the outside world, the driving signal for driving the quantum bit and the read input signal for measuring the quantum bit are synthesized into a first signal to reduce the interference between the signals and improve the stability and reliability of the quantum bit. In addition, the synthesized first signal can complete the driving and reading operations at the same time, avoiding the time and resource overhead required for performing these two operations separately, thereby improving the efficiency of quantum computing, and can more accurately control the state of the quantum bit to achieve more complex quantum operations. Furthermore, noise is an important issue in quantum computing. The synthesized signal can reduce the impact of noise on the quantum bit, thereby improving the accuracy of quantum computing, and the synthesis of the driving and reading signals can simplify the circuit design of the quantum computer and reduce the required hardware resources. The synthesized signal enables the driving and reading operations to work better together, ensuring that the quantum bit is in the correct state at the right time, thereby achieving efficient quantum computing.

[0040] In one embodiment, the quantum chip is arranged in a packaging box that matches the size of the quantum chip, the outer edge of the quantum chip is in contact with the inner wall of the packaging box, and a groove and / or a metal column that vertically passes through the quantum chip is arranged on the surface parallel to the quantum chip in the inner cavity of the packaging box. In this embodiment, the outer edge of the quantum chip is in contact with the inner wall of the packaging box, so that the crosstalk of the original packaging box to the quantum chip is minimized. Since the packaging box constitutes a resonant cavity described by an eigencircuit model, and the eigencircuit model is defined by a first inductor and a first capacitor connected in parallel, the resonant frequency of the eigencircuit model satisfies The lowest submode frequency of the spatial resonance corresponding to the packaging box corresponds to a resonance frequency, and the lowest submode frequency of the spatial resonance corresponding to the packaging box is equal to the resonance frequency. The groove arranged on the surface parallel to the quantum chip in the inner cavity of the packaging box is equivalent to the equivalent capacitor and the second capacitor C equivalent to the groove. 1 In series, Similarly, a metal column perpendicularly passing through the quantum chip is provided on the surface of the inner cavity of the packaging box parallel to the quantum chip, which is equivalent to the first inductor and the second inductor L equivalent to the metal column. 1 In parallel, the overall resonant frequency of the package box is increased, making In this embodiment, the size of the packaging box is kept at the minimum state that meets the conditions, and can also effectively prevent the resonance signal of the packaging box from crosstalking with the quantum bit signal.

[0041] In one embodiment, the quantum computer further includes a dilution refrigerator, and the quantum chip and the circulator are arranged in the lowest temperature chamber of the dilution refrigerator. The quantum chip is arranged in a packaging box. Since the size of the packaging box in this solution has been controlled to the lowest state, the space of the lowest temperature chamber of the dilution refrigerator can be saved. In addition, the circulator is arranged in the lowest temperature chamber of the dilution refrigerator, which can reduce the input thermal noise into the quantum chip. Since quantum computing is very sensitive to temperature, even a small temperature fluctuation may cause the state of the quantum bit to change, thereby affecting the accuracy of the calculation result. The present application places the circulator in the lowest temperature chamber, and utilizes the anti-interference effect of the circulator to minimize the noise input into the quantum chip. In the existing dilution refrigerator, the lowest temperature chamber is a mixing chamber. The present application is not limited to the existing dilution refrigerator, and it is sufficient to enable the normal operation of the quantum computer and to achieve a high degree of data accuracy.

[0042] The characterization of the state of the quantum bit is achieved through dispersion reading. Fixed-frequency quantum bits do not need the Z control line signal to adjust the bit frequency. The drive signal and the read signal pass through the signal synthesizer to form a signal, which is injected into the input port of the circulator. This signal is coupled with the resonant cavity signal. Part of the drive signal can be transmitted to the quantum bit through the resonant cavity, thereby exciting the quantum state. The read signal is reflected by the resonant cavity-quantum bit signal and transmitted to the output end of the circulator, so that the information of the quantum state can be read. This design does not have a bus structure in the traditional sense. In order to ensure that the X signal on one line does not affect other bits with similar bit frequencies, each bit has a read line. Even so, the number of ports on the quantum chip can be saved. At present, each quantum bit on the quantum chip only requires one external port. For example Figure 2 As shown in the figure, according to the input-output theory, the transmission relationship curve dB(a 0 / b i ), the reading cavity frequency can be clearly distinguished. Figure 3 A simulated diagram of a read cavity signal transmission curve near 7.3 GHz is shown, which is a transmission curve of the signal from port 1 to port 2.

[0043] In the description of this specification, the description with reference to the terms "some embodiments" or "examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the utility model. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0044] The above are only preferred embodiments of the present invention and do not limit the present invention in any way. Any technician in the relevant technical field, without departing from the scope of the technical solution of the present invention, may make any equivalent replacement or modification to the technical solution and technical content disclosed in the present invention, which shall be deemed as the content of the technical solution of the present invention and still fall within the protection scope of the present invention.

Claims

1. Quantum chip, characterized in that: The invention comprises at least one quantum processor, each of which comprises a quantum bit and a resonant cavity which are sequentially coupled on a signal transmission line, wherein the resonant cavity comprises a first port coupled to an external circuit and used for inputting a first signal to the quantum processor and receiving an output signal of the quantum processor, wherein the first signal comprises a driving signal for driving the quantum bit and a reading input signal for measuring the quantum bit.

2. The quantum chip according to claim 1, characterized in that: The component for realizing the coupling is a coupling capacitor or a coupling inductor, and the components for realizing the coupling at different positions in the quantum processor are different or the same.

3. The quantum chip according to claim 1, characterized in that: The quantum chip also includes a Z control line, and an input end of the Z control line is used to input a signal for adjusting the frequency of the corresponding quantum bit into the corresponding quantum processor.

4. The quantum chip according to claim 1, characterized in that: The quantum bit frequency is a constant value.

5. A layout structure, characterized in that: Comprising a quantum chip as described in any one of claims 1 to 4.

6. A quantum computer, characterized in that Comprising a quantum chip as described in any one of claims 1 to 4.

7. The quantum computer according to claim 6, characterized in that The external circuit in the quantum computer includes a circulator, wherein the first port of each circulator is coupled to the resonant cavity in the corresponding quantum processor, the second port of the circulator outputs the received output signal of the quantum processor, and the third port of the circulator is used to receive the first signal.

8. The quantum computer according to claim 6 or 7, characterized in that: The external circuit in the quantum computer also includes a signal synthesizer, which is used to synthesize the driving signal for driving the quantum bit and the read input signal for measuring the quantum bit into a first signal.

9. The quantum computer according to claim 6 or 7, characterized in that: The quantum chip is arranged in a packaging box that matches the size of the quantum chip, and the outer edge of the quantum chip is in contact with the inner wall of the packaging box.

10. The quantum computer according to claim 6 or 7, characterized in that: It also includes a dilution refrigerator, wherein the quantum chip and the circulator are arranged in the lowest temperature chamber of the dilution refrigerator.

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