Performance testing device and system
By designing a performance test device including a central processor, PCIe RC controller, PCIe slot and memory, the problem that the existing technology cannot perform performance testing on external devices of multiple types of PCIe interfaces is solved, and automated testing of different types of devices is realized, which improves testing efficiency and reduces costs.
Patent Information
- Application Number
- CN202420930224.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-29
- Publication Date
- 2025-03-21
- Estimated Expiration
- 2034-04-29
AI Technical Summary
The existing performance testing platform cannot perform performance testing on multiple types of PCIe interface external devices, resulting in large test workloads and time-consuming and labor-intensive testing.
A performance testing device is designed, including a central processor, a PCIe RC controller, a PCIe slot and memory. Through the communication between the central processor and the PCIe RC controller, the type of external device is identified, and the test script for the corresponding device type in the memory is called for testing.
Automatic testing of external devices of many different types of PCIe interfaces is realized, which improves testing efficiency and reduces testing costs.
Smart Images
Figure CN222653393U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of computers, in particular to a performance testing device and system. Background Art
[0002] With the continuous development of network technology, storage performance requirements are getting higher and higher, and the size requirements for servers and hosts are getting higher and higher, and the scalability requirements for servers are getting higher and higher. Therefore, it is often seen that some manufacturers reserve some PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) interfaces. Due to the increasingly stringent requirements on space, these reserved interfaces will vary, and there are many types of PCIe external devices, such as SSD (Solid State Disk), Ethernet and WiFi external devices. The performance test methods and requirements for each external device may be different.
[0003] The current performance testing platform is a testing platform for the interface functions and performance of specific chips. It can only perform performance testing on a single type of external device, but cannot perform performance testing on multiple types of external devices. This results in a large workload for testing different external devices, which is time-consuming and labor-intensive. Utility Model Content
[0004] The following is an overview of the topics described in detail in this article.
[0005] The utility model aims to solve at least one of the technical problems existing in the prior art, and provides a performance testing device and system to implement testing of external devices with multiple different types of PCIe interfaces.
[0006] In a first aspect, the utility model provides a performance testing device, comprising:
[0007] It includes a central processing unit, a PCIe RC controller, a PCIe slot and a memory, wherein the central processing unit is connected to the PCIe RC controller via a communication bus, the PCIe RC controller is connected to the pin of the PCIe slot via a serial communication line, and the memory stores a plurality of test scripts corresponding to different device types;
[0008] The PCIe RC controller is used to identify the device type of the external device when an external device with a PCIe interface is inserted into the PCIe slot;
[0009] The central processing unit is used to obtain the device type of the external device from the PCIe RC controller through the communication bus, so as to call the test script corresponding to the device type of the external device in the memory to test the external device.
[0010] In some embodiments, the central processor is further configured to output a test report of the test results of the external device.
[0011] In some embodiments, a serial port debugging module is further included, and the serial port debugging module is communicatively connected to the central processing unit to receive the test result and record the test result.
[0012] In some embodiments, the serial port debugging module is also used to monitor the operating status of the external device.
[0013] In some embodiments, the memory is also used to store the test results and the test report output by the central processing unit.
[0014] In some embodiments, a power management module is also included, and the power management module is connected to the central processing unit and the serial port debugging module respectively, and the power management module is used to supply power to the central processing unit and the serial port debugging module.
[0015] In some embodiments, the power management module is connected to the memory, and the power management module is used to provide power to the memory.
[0016] In some embodiments, the external device includes at least one of the following:
[0017] Solid-state drive;
[0018] Ethernet network card;
[0019] Wireless network card.
[0020] In some embodiments, the test report includes at least one of the following:
[0021] Sequential read and write speed information;
[0022] IOPS information;
[0023] Throughput information;
[0024] Network latency indicator.
[0025] In a second aspect, the utility model provides a performance testing system, comprising the performance testing device as described in the first aspect and a display, wherein the display is communicatively connected to the performance testing device.
[0026] The embodiments of the utility model have at least the following beneficial effects: the performance testing device includes a central processing unit, a PCI eRC controller, a PCIe slot and a memory; the central processing unit is connected to the PCIe RC controller via a communication bus to realize data transmission; the memory stores a plurality of test scripts corresponding to different device types, so that the performance testing device can test a plurality of different types of external devices; the PCIe RC controller is used to identify the device type of the external device when an external device with a PCIe interface is inserted into the PCIe slot; the central processing unit obtains the device type of the external device from the PCIe RC controller to call the test script corresponding to the device type of the external device in the memory to test the external device; the embodiment can automatically execute the test script corresponding to the device type, thereby realizing the testing of external devices with different types of PCIe interfaces.
[0027] Other features and advantages of the utility model will be described in the following description, and partly become apparent from the description, or understood by implementing the utility model. The purpose and other advantages of the utility model can be realized and obtained through the structures particularly pointed out in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The accompanying drawings are used to provide a further understanding of the technical solution of the present invention and constitute a part of the specification. Together with the examples of the present invention, they are used to explain the technical solution of the present invention and do not constitute a limitation on the technical solution of the present invention.
[0029] Figure 1 A schematic diagram of the structure of a performance testing device provided in one embodiment of the utility model;
[0030] Figure 2 A schematic diagram of the structure of a performance testing system provided in one embodiment of the utility model. DETAILED DESCRIPTION
[0031] In order to make the purpose, technical solution and advantages of the utility model more clear, the utility model is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the utility model and are not used to limit the utility model.
[0032] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described herein can, for example, be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0033] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.
[0034] It should be understood that in the description of the embodiments of the present application, the meaning of multiple (or multiple items) is more than two, greater than, less than, exceed, etc. are understood to not include the number, and above, below, within, etc. are understood to include the number.
[0035] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.
[0036] With the continuous development of network technology, storage performance requirements are getting higher and higher, and the size requirements for servers and hosts are getting higher and higher, and the scalability requirements for servers are getting higher and higher. Therefore, it is often seen that some manufacturers reserve some PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) interfaces. Due to the increasingly stringent requirements on space, these reserved interfaces will vary, and there are many types of PCIe external devices, such as SSD (Solid State Disk), Ethernet and WiFi external devices. The performance test methods and requirements for each external device may be different.
[0037] The current performance testing platform is a testing platform for the interface functions and performance of specific chips. It can only perform performance testing on a single type of external device, but cannot perform performance testing on multiple types of external devices. This results in a large workload for testing different external devices, which is time-consuming and labor-intensive.
[0038] In order to solve the above problems, this embodiment provides a performance testing device, including a central processing unit, a PCIe RC (Root Comp lex) controller, a PCIe slot and a memory. The central processing unit is connected to the PCIe RC controller through a communication bus to realize data transmission. The memory stores multiple test scripts corresponding to different device types, which is convenient for the performance testing device to test multiple different types of external devices. The PCIe RC controller is used to identify the device type of the external device when an external device with a PCIe interface is inserted into the PCIe slot. The central processing unit obtains the device type of the external device from the PCIe RC controller to call the test script corresponding to the device type of the external device in the memory to test the external device. This embodiment can automatically execute the test script corresponding to the device type, thereby realizing the testing of external devices with different types of PCIe interfaces.
[0039] The following is a further description of the embodiments of the present invention in conjunction with the accompanying drawings.
[0040] refer to Figure 1 , Figure 1 A schematic structural diagram of a performance testing device provided in one embodiment of the utility model.
[0041] In some embodiments, the performance testing device 1000 includes a central processing unit 100, a PCIe RC controller 200, a PCIe slot 300 and a memory 400. The central processing unit 100 is connected to the PCIe RC controller 200 via a communication bus, the PCIe RC controller 200 is connected to the pins of the PCIe slot 300 via a serial communication line, and the memory 400 stores multiple test scripts corresponding to different device types.
[0042] It should be noted that the PCIe RC controller 200 is responsible for managing various devices on the PCIe bus and allocating resources, such as allocating bandwidth, processing interrupt requests, etc. The PCIe RC controller 200 is also used to coordinate data transmission and communication protocols to ensure effective communication between various devices.
[0043] It is worth noting that the memory 400 stores multiple test scripts corresponding to different device types, so that when external devices with different types of PCIe interfaces are inserted into the PCIe slot 300, the central processing unit 100 can call different test scripts for testing, wherein the test scripts include but are not limited to unit test scripts, integration test scripts, performance test scripts, security test scripts, etc., and this embodiment does not make specific restrictions.
[0044] In some embodiments, the PCIe RC controller 200 is used to identify the device type of the external device when an external device with a PCIe interface is inserted into the PCIe slot 300. Specifically, the PCIe RC controller 200 will configure the BAR (Base Address Register) of the inserted external device to facilitate addressing of the external device. When the external device is inserted into the PCIe slot 300, the PCIe RC controller 200 will enumerate the external device and detect the newly inserted external device through the initialization and configuration process on the PCIe bus. After that, the PCIe RC controller 200 will read the field information of the external device, for example, the Class Code and Subclass Code fields, to determine the type of the device. Finally, the PCIe RC controller 200 determines the device type of the external device based on the read field information, thereby achieving accurate identification of the device type of the external device.
[0045] It should be noted that each external device has a unique manufacturer identifier and device identifier. The PCIe RC controller 200 can determine the manufacturer and device model of the device by reading these identification information, and each external device is provided with device type information and subcategory information, for example, Class Code and Subclass Code fields, wherein the Class Code field is used to describe the general category of the external device, which indicates the main function or application field of the device; the Subclass Code field is used to further subdivide the device category represented by the Class Code, which provides more specific device type information, for example, the Class Code field can be used to characterize storage devices, network devices, display devices, etc., and the Subclass Code field can be used to characterize whether the device is a hard disk drive, a solid-state drive, or an optical disk drive, etc.
[0046] In some embodiments, the central processor 100 is used to obtain the device type of the external device from the PCIe RC controller 200 through the communication bus to call the test script corresponding to the device type of the external device in the memory 400 to test the external device, thereby realizing the testing of external devices with different types of PCIe interfaces.
[0047] It should be noted that, since there are many types of external devices with PCIe interface, and the performance indicators and test focus of each external device are different, the performance test of solid-state hard disk mainly focuses on its storage performance, including read and write speed, IOPS (Input / Output Operations Per Second, input and output per second) and other indicators, and the test method generally uses hard disk test tools, such as Crystal Disk Mark, ATTO Disk Benchmark, fio, etc. The performance test of Ethernet network card and wireless network card mainly focuses on its network performance, including throughput, delay and other indicators, and the test method generally uses network test tools, such as iPerf, Ping, etc. Therefore, the central processing unit 100 in this embodiment can call the test script corresponding to the device type from the memory 400, so as to realize the test of multiple different types of external devices, thereby improving the production test efficiency and reducing the test cost.
[0048] In some embodiments, the external device includes at least one of the following: a solid state drive; an Ethernet network card; a wireless network card, wherein the Ethernet network card includes but is not limited to a multi-port Ethernet network card, a Gigabit Ethernet network card, etc., and the wireless network card includes but is not limited to a WiFi network card, a Bluetooth network card, etc., and this embodiment does not make specific restrictions.
[0049] In some embodiments, the test report includes at least one of the following: sequential read and write speed information; IOPS information; throughput information; network latency indicator.
[0050] It should be noted that when the external device is a solid-state drive, the test report includes sequential read and write speed information and IOPS information; when the external device is an Ethernet network card and / or a wireless network card, the test report includes throughput information and network latency indicators. Among them, sequential read and write speed refers to the speed at which the solid-state drive reads and writes data in a fixed order, which is used to measure the performance of the solid-state drive; IOPS information indicates the number of input and output operations that the storage device can handle within one second; throughput information refers to the amount of data that passes through the system per unit time of the Ethernet network card and / or the wireless network card; network latency indicators refer to the time required for a network data packet to travel from the sender to the receiver, among which network latency indicators include delay time, jitter, and packet loss rate.
[0051] In some embodiments, the central processing unit 100 is also used to output a test report of the test results of the external device. Specifically, during the process of the central processing unit 100 performing a performance test on the external device, the central processing unit 100 will record the test data, including various performance parameters, error logs, abnormal conditions, etc., and then output a test report of the test results, so as to intuitively display the test status of the performance test on the external device.
[0052] In some embodiments, a serial port debugging module 500 is also included. The serial port debugging module 500 is connected to the central processor 100 to receive test results and record the test results stored in the memory 400 to improve test efficiency and reliability and avoid data loss.
[0053] It should be noted that the serial port debugging module 500 in this embodiment can be a serial port debugging tool, a serial port oscilloscope or a logic analyzer, etc., and this embodiment does not make any specific limitation.
[0054] In some embodiments, the serial port debugging module 500 is also used to monitor the operating status of external devices to improve the security of the performance testing device 1000 .
[0055] It is understandable that the serial port debugging module 500 can monitor the data transmission process of the serial port communication in real time and help to troubleshoot communication problems, such as data loss, error checking, etc.
[0056] It should be noted that the serial port debugging module 500 can connect the serial port debugging module 500 and the serial port of the central processing unit 100 through serial port debugging tool software, such as Tera Term, Putty, etc., to monitor the operating status of external devices in real time; log output function code can also be added to the serial port debugging module 500 to output system status, debugging information and error information through the serial port debugging module 500 to monitor the operating status of external devices; or an oscilloscope and logic analyzer can be used to monitor and analyze serial port signals, etc., which are not specifically limited in this embodiment.
[0057] In some embodiments, the memory 400 is also used to store the test results and test reports output by the central processor 100 to ensure data reliability and efficiency during the test process.
[0058] It should be noted that the memory 400 is also used to store intermediate data in the process of testing the external device in real time, and this embodiment does not impose any specific limitation.
[0059] In some embodiments, a power management module 600 is also included. The power management module 600 is connected to the central processing unit 100, the serial port debugging module 500 and the memory 400 respectively. The power management module 600 is used to supply power to the central processing unit 100, the serial port debugging module 500 and the memory 400, thereby ensuring the stability of the test process.
[0060] refer to Figure 2 , Figure 2 A schematic diagram of the structure of a performance testing system provided by an embodiment of the utility model;
[0061] In some embodiments, the performance testing system includes: Figure 1 The performance testing device 1000 and the display 2000 shown in the figure, the central processor 100 of the performance testing device 1000 is used to output a test report of the test results of the external device, and the display 2000 is communicated with the performance testing device 1000 to display the test report, which is convenient for the user to view the test report and can more intuitively display the test results of the performance detection of the external device.
[0062] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.
[0063] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the above-mentioned implementation mode. Technical personnel familiar with the field can also make various equivalent deformations or substitutions without violating the spirit of the present application. These equivalent deformations or substitutions are all included in the scope defined by the claims of the present application.
Claims
1. A performance testing device, characterized in that: It includes a central processing unit, a PCIe RC controller, a PCIe slot and a memory, wherein the central processing unit is connected to the PCIe RC controller via a communication bus, the PCIe RC controller is connected to the pin of the PCIe slot via a serial communication line, and the memory stores a plurality of test scripts corresponding to different device types; The PCIe RC controller is used to identify the device type of the external device when an external device with a PCIe interface is inserted into the PCIe slot; The central processing unit is used to obtain the device type of the external device from the PCIe RC controller through the communication bus, so as to call the test script corresponding to the device type of the external device in the memory to test the external device.
2. The performance testing device according to claim 1, characterized in that: The central processing unit is also used to output a test report of the test result of the external device.
3. The performance testing device according to claim 2, characterized in that: It also includes a serial port debugging module, which is communicatively connected with the central processing unit to receive the test result and record the test result.
4. The performance testing device according to claim 3, characterized in that: The serial port debugging module is also used to monitor the operating status of the external device.
5. The performance testing device according to claim 2, characterized in that: The memory is also used to store the test results and the test report output by the central processing unit.
6. The performance testing device according to claim 3, characterized in that: It also includes a power management module, which is connected to the central processing unit and the serial port debugging module respectively, and is used to supply power to the central processing unit and the serial port debugging module.
7. The performance testing device according to claim 6, characterized in that: The power management module is connected to the memory, and the power management module is used to supply power to the memory.
8. The performance testing device according to claim 1, characterized in that: The external device includes at least one of the following: Solid-state drive; Ethernet network card; Wireless network card.
9. The performance testing device according to claim 3, characterized in that: The test report includes at least one of the following: Sequential read and write speed information; IOPS information; Throughput information; Network latency indicator.
10. A performance testing system, characterized in that: It comprises a performance testing device and a display as described in any one of claims 1 to 9, wherein the central processing unit of the performance testing device is used to output a test report of the test results of the external device, and the display is communicatively connected with the performance testing device to display the test report.