Light emitting diode

Abstract

The utility model provides a light emitting diode, comprising a substrate, an epitaxial layer, a first electrode and a second electrode, the epitaxial layer is located on a first surface of the substrate and comprises a first semiconductor layer, a light emitting layer and a second semiconductor layer which are sequentially arranged from top to bottom, the first electrode is electrically connected with the second semiconductor layer, and the second electrode is electrically connected with the light emitting layer. The second electrode is electrically connected with the first semiconductor layer. In the utility model, the epitaxial layer comprises the first part and the at least one second part, and the second part is arranged at the periphery of the first part, so that the area of the epitaxial layer can be increased on the basis of ensuring that enough electrodes can be arranged in other areas except the epitaxial layer; the brightness of the light-emitting diode is increased, the current density of the light-emitting diode can be reduced so as to relieve the problem that the light-emitting efficiency is reduced, and the working performance of the light-emitting diode under the condition of ultra-large current density is remarkably improved.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, in particular to a light emitting diode. Background Art

[0002] Vertical structure light-emitting diodes have significant advantages over upright and inverted structure light-emitting diodes in ultra-high current density applications such as stage lights, projectors and car headlights.

[0003] The overall shape of a vertical structure light emitting diode is usually rectangular. In some special application scenarios, the appearance design of the epitaxial layer adopts a circular shape. In this way, the light emitting area of ​​the vertical structure light emitting diode is also circular, so that a symmetrical light shape can be ensured on the basis of achieving a lightweight package. Its front electrode is arranged in a non-light emitting area outside the epitaxial layer. In order to achieve ultra-large current applications, vertical structure light emitting diodes require multiple gold wire welding solutions on the front electrode to achieve large current shunt injection and conduction, so the total area required for the front electrode must be large enough. In order to accommodate a larger front electrode, the diameter of the epitaxial layer can only be reduced to increase the area of ​​the non-light emitting area, resulting in the area of ​​the epitaxial layer of the light emitting diode being limited, affecting the performance of the vertical structure light emitting diode under ultra-large current density. Utility Model Content

[0004] The utility model aims to provide a light emitting diode to solve the problem that the existing light emitting diode has limited performance under ultra-large current density.

[0005] In order to achieve the above object, the utility model provides a light emitting diode, comprising:

[0006] substrate;

[0007] An epitaxial layer, located on the first surface of the substrate, includes a first semiconductor layer, a light emitting layer and a second semiconductor layer arranged in sequence from top to bottom, the epitaxial layer includes a first portion and at least one second portion, and the second portion is arranged at the periphery of the first portion;

[0008] A first electrode electrically connected to the second semiconductor layer; and

[0009] The second electrode is electrically connected to the first semiconductor layer.

[0010] Optionally, the first part has a circular shape.

[0011] Optionally, the second part is evenly distributed around the periphery of the first part.

[0012] Optionally, each of the second parts includes at least two sub-parts arranged along the circumference of the first part, and two adjacent sub-parts are separated from each other.

[0013] Optionally, the first part and the second part are an integral structure.

[0014] Optionally, the first part and the second part are separated from each other.

[0015] Optionally, the first portion and the second portion both include the first semiconductor layer, the light-emitting layer and the second semiconductor layer, so that the first portion and the second portion can both emit light.

[0016] Optionally, the first part includes the first semiconductor layer, the light-emitting layer and the second semiconductor layer, so that the first part can emit light, and the second part does not include the light-emitting layer and the second semiconductor layer, so that the second part does not emit light.

[0017] Optionally, the operating current of the light emitting diode is greater than 10A.

[0018] Optionally, the light emitting diode further includes:

[0019] a first through hole, penetrating the second semiconductor layer and the light emitting layer and exposing the first semiconductor layer;

[0020] A first reflector layer is attached to a portion of the surface of the second semiconductor layer close to the substrate;

[0021] a first current spreading layer, attached to at least a portion of the surface of the first reflector layer close to the substrate and electrically connected to the second semiconductor layer;

[0022] a dielectric layer, attached to a surface of the first current spreading layer close to the substrate and extending to cover the second semiconductor layer and a side wall of the first through hole;

[0023] a second current spreading layer, attached to a surface of the dielectric layer close to the substrate and filling the first through hole to be electrically connected to the first semiconductor layer; and

[0024] A bonding layer is located between the first surface of the substrate and the second current spreading layer.

[0025] Optionally, the first reflector layer is a metal reflective layer.

[0026] Optionally, the light emitting diode further includes:

[0027] A second reflector layer is attached to a surface of the second semiconductor layer close to the substrate and extends to cover an inner wall of the first through hole;

[0028] an adhesive layer attached to a surface of the second reflector layer close to the substrate; and

[0029] The second through hole penetrates the adhesion layer and the second reflector layer and exposes the second semiconductor layer. The first reflector layer is attached to the surface of the adhesion layer close to the substrate and at least covers the inner wall of the second through hole to be electrically connected to the second semiconductor layer.

[0030] Optionally, the second reflector layer is a single-layer dielectric reflective layer or a DBR reflective layer.

[0031] Optionally, the first reflector layer is a single-layer dielectric reflective layer or a DBR reflective layer.

[0032] Optionally, a maximum lateral distance between an outer side wall of the second current spreading layer in the first through hole and the second semiconductor layer is 200 nm to 950 nm.

[0033] Optionally, the light emitting diode further includes:

[0034] The first step is located at the edge of the epitaxial layer and exposes the first current spreading layer. The first electrode is located at the lower step surface of the first step and is electrically connected to the first current spreading layer. The second electrode is located at the second surface of the substrate.

[0035] Optionally, the light emitting diode further includes:

[0036] a first step located at an edge of the epitaxial layer and exposing the first current spreading layer, the first electrode located at a lower step surface of the first step and electrically connected to the first current spreading layer; and

[0037] The second step is located at the edge of the epitaxial layer and exposes the second current spreading layer. The second electrode is located at the lower step surface of the second step and is electrically connected to the second current spreading layer.

[0038] Optionally, the light emitting diode further includes:

[0039] The metal welding layer is located on the second surface of the substrate.

[0040] Optionally, the light emitting diode further includes:

[0041] An isolation trench penetrates the epitaxial layer and divides the epitaxial layer into the first portion and the second portion, wherein the first portion and the second portion are separated from each other by the isolation trench.

[0042] Optionally, the first reflector layer has a third through hole extending therethrough, the first current spreading layer is also filled in the third through hole, and the isolation groove penetrates the epitaxial layer and exposes the first current spreading layer filled in the third through hole.

[0043] The utility model provides a light emitting diode, comprising a substrate, an epitaxial layer, a first electrode and a second electrode, wherein the epitaxial layer is located on the first surface of the substrate and comprises a first semiconductor layer, a light emitting layer and a second semiconductor layer arranged in sequence from top to bottom, wherein the first electrode is electrically connected to the second semiconductor layer, and the second electrode is electrically connected to the first semiconductor layer. In the utility model, the epitaxial layer comprises a first part and at least one second part, wherein the second part is arranged at the periphery of the first part, so that the area of ​​the epitaxial layer can be increased on the basis of ensuring that other areas outside the epitaxial layer can be provided with electrodes of sufficient size, which not only increases the brightness of the light emitting diode, but also reduces the current density of the light emitting diode to alleviate the problem of reduced light emitting efficiency, and significantly improves the working performance of the light emitting diode under ultra-large current density conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figures 1 to 12 The schematic diagram of the structure corresponding to the corresponding steps of the method for preparing a light emitting diode provided in the first embodiment of the present invention, wherein: Fig.11 and Fig.12 A schematic diagram of the structure of a light emitting diode provided in Embodiment 1 of the present invention, Fig.11 for Fig.12 A schematic cross-sectional view of the light emitting diode along the AA direction;

[0045] Fig.13 A schematic diagram of the structure of a light emitting diode provided in the second embodiment of the present invention;

[0046] Figures 14 to 18 This is a schematic structural diagram corresponding to the corresponding steps of the method for preparing a light emitting diode provided in the third embodiment of the present invention, wherein: Fig.17 and Fig.18 This is a schematic diagram of the structure of a light emitting diode provided in Embodiment 3 of the present invention. Fig.17 for Fig.18 A schematic cross-sectional view of the light emitting diode along the AA direction;

[0047] Figure 19 to Figure 30 The schematic diagram of the structure corresponding to the corresponding steps of the method for preparing a light emitting diode provided in the fourth embodiment of the present invention, wherein: Fig.29 and Fig.30 A schematic diagram of the structure of a light emitting diode provided in the fourth embodiment of the present invention, Fig.29 for Fig.30 A schematic cross-sectional view of the light emitting diode along the AA direction;

[0048] Wherein, the accompanying drawings are marked as follows:

[0049] 101-substrate; 100-epitaxial substrate; 200-epitaxial layer; 210-first part; 220-second part; 201-buffer layer; 202-defect density reducing layer; 203-stress adjustment layer; 204-first semiconductor layer; 204a-sub-region; 205-light-emitting layer; 206-second semiconductor layer; 200a-first through hole; 400a-second through hole; 200b-first step; 200c-second step; 200d-isolation groove; 301-first ohmic contact layer; 401-first reflector layer; 401a-third through hole; 402-second reflector layer; 403-adhesion layer; 501-first current spreading layer; 502-second current spreading layer; 601-dielectric layer; 700-bonding layer; 801-first electrode; 802-second electrode; 900-metal welding layer. DETAILED DESCRIPTION

[0050] The following will describe the specific implementation of the utility model in more detail with reference to the schematic diagram. The advantages and features of the utility model will become clearer according to the following description. It should be noted that the drawings are all in a very simplified form and are not in exact proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the utility model.

[0051] Embodiment 1

[0052] Fig.11 and Fig.12 The schematic diagram of the structure of the light emitting diode provided in this embodiment, wherein: Fig.11 for Fig.12 The cross-sectional diagram of the light-emitting diode along the AA direction is shown in FIG. Fig.11 and Fig.12 As shown, the light emitting diode includes a substrate 101 , an epitaxial layer 200 , a functional stack, a first electrode 801 and a second electrode 802 .

[0053] Specifically, the substrate 101 has a first surface and a second surface. Fig.11 In the embodiment, the first surface of the substrate 101 is its upper surface, and the second surface of the substrate 101 is its lower surface.

[0054] In this embodiment, the material of the substrate 101 is a conductive material. The material of the substrate 101 may be, for example, CuW, CuMo, Mo, Cu, Ge, AlSi, Si, SiC, etc., and the thickness may be 50 um to 1 mm.

[0055] The epitaxial layer 200 is disposed on the first surface of the substrate 101, and includes a first semiconductor layer 204, a light-emitting layer 205, and a second semiconductor layer 206 stacked on the first surface of the substrate 101 from top to bottom. In this embodiment, the second semiconductor layer 206 is a P-type semiconductor layer, and the first semiconductor layer 204 is an N-type semiconductor layer. The second semiconductor layer 206 may be a p-GaN layer, the first semiconductor layer 204 may be an n-GaN layer, and the light-emitting layer 205 may be a multi-quantum well layer (MQW), and the multi-quantum well layer may be GaN, InGaN, AlGaN, etc. The corresponding wavelength range is 360nm to 560nm, but is not limited thereto.

[0056] Furthermore, in this embodiment, the epitaxial layer 200 further includes a defect density reduction layer 202 and a stress adjustment layer 203, wherein the stress adjustment layer 203 is located on the first semiconductor layer 204, and the defect density reduction layer 202 is located on the stress adjustment layer 203. The defect density reduction layer 202 may be a relatively thick unintentionally doped GaN layer (when the main body of the epitaxial layer 200 is AlGaN, the defect density reduction layer 202 may be a relatively thick unintentionally doped AlN layer, for example, UV-LED is an AlGaN layer grown on an AlN layer), and the stress adjustment layer 203 may be an AlGaN superlattice structure, specifically: an AlGaN superlattice structure with a gradient Al component (gradually decreasing) is prepared from the defect density reduction layer 202 to the first semiconductor layer 204. x Ga 1-x N / A y Ga 1-y N superlattice structure, where 0<y<x<1.

[0057] It should be understood that other film layers may be formed in the epitaxial layer 200, for example, an electron blocking layer (EBL) may be formed between the light emitting layer 205 and the second semiconductor layer 206, which will not be explained one by one here. The thickness of the epitaxial layer 200 may be 5um to 10um, but it should not be limited thereto.

[0058] Please continue reading Fig.11 and Fig.12, the epitaxial layer 200 includes a first part 210 and a second part 220, and the second part 220 is arranged at the periphery of the first part 210. The first part 210 and the second part 220 both include the complete epitaxial layer 200 (i.e., the first semiconductor layer 204, the light-emitting layer 205 and the second semiconductor layer 206), so the first part 210 and the second part 220 can both emit light, and the two together constitute the light-emitting area of ​​the light-emitting diode, while the area outside the epitaxial layer 200 is a non-light-emitting area and cannot emit light. In this way, on the basis of ensuring that a sufficiently large electrode can be set in the non-light-emitting area outside the epitaxial layer 200, the area of ​​the epitaxial layer 200 can be increased, the brightness is increased, and the current density of the light-emitting diode can be reduced to alleviate the problem of reduced luminous efficiency, and significantly improve the working performance of the light-emitting diode under ultra-large current density conditions. In this embodiment, the shape of the first part 210 is circular, but it should not be limited to this. The shape of the first part 210 can also be a polygon, such as a triangle, a quadrilateral, a pentagon or a hexagon. Preferably, in order to ensure a regular light pattern, the shape of the first part 210 is preferably a regular polygon, which will not be explained one by one here.

[0059] In this embodiment, the epitaxial layer 200 includes four second parts 220, and the four second parts 220 are evenly arranged around the first part 210, so that the shape of the epitaxial layer 200 has a symmetrical feature and the light shape of the light emitting diode is more regular.

[0060] It should be understood that the second parts 220 are not limited to 4, but can be 1, 2, 3, 5 or 6, etc. The second parts 220 are not limited to being evenly distributed along the periphery of the first part 210, but can be unevenly distributed, and the shape of the second part 220 is not limited to being Fig.12 The shape shown may also be other possible shapes, such as polygon, fan ring, arch, etc. Alternatively, it can also be understood that after the position and area of ​​the first part 210 and the first electrode 801 on the substrate 101 are determined, the number, shape, area and position of the second part 220 can be flexibly designed and arranged according to the remaining area on the substrate 101, thereby increasing the area of ​​the epitaxial layer 200.

[0061] Furthermore, the first part 210 and the second part 220 are an integral structure, that is, the first part 210 and each of the second parts 220 are connected together.

[0062] It should be noted that, in some embodiments, the first part 210 may include the complete epitaxial layer 200 (i.e., the first semiconductor layer 204, the light-emitting layer 205, and the second semiconductor layer 206), while the second part 220 does not include the complete epitaxial layer 200 (specifically, does not include the light-emitting layer 205 and the second semiconductor layer 206), and only the first part 210 can emit light, while the second part 220 does not emit light. In this way, the area of ​​the epitaxial layer 200 can be guaranteed, and the current density of the light-emitting diode can be reduced to alleviate the problem of reduced light-emitting efficiency, significantly improving the working performance of the light-emitting diode under ultra-large current density conditions. At the same time, the second part 220 does not emit light, and will not have a negative impact on the optical properties of the light-emitting diode, such as the light shape.

[0063] Of course, from Fig.11 As can be seen in the figure, the defect density reducing layer 202 and the stress adjustment layer 203 are also located in the first portion 210 and the second portion 220, but this does not affect the implementation of the present invention.

[0064] Please continue reading Fig.11 and Fig.12 , the epitaxial layer 200 has a plurality of first through holes 200a. The first through holes 200a penetrate the second semiconductor layer 206 and the light emitting layer 205 and expose the first semiconductor layer 204. The first through holes 200a are arranged in an array, for example, in a rectangular, hexagonal, triangular or diamond array, the center distance between adjacent first through holes 200a can be 100um to 200um, and the lateral width of the first through holes 200a is about 60um, but is not limited thereto.

[0065] Furthermore, the functional stack includes a first ohmic contact layer 301 , a first reflector layer 401 , a first current spreading layer 501 , a dielectric layer 601 and a second current spreading layer 502 .

[0066] Specifically, the first ohmic contact layer 301 is attached to the surface of the second semiconductor layer 206 close to the substrate 101, and the first ohmic contact layer 301 is only attached to a portion of the surface of the second semiconductor layer 206. The first ohmic contact layer 301 is in direct ohmic contact with the second semiconductor layer 206 to achieve excellent electrical connection.

[0067] As an optional embodiment, the first ohmic contact layer 301 is a transparent conductive film layer, and its material can be any one of ITO (indium tin oxide), IZO (indium zinc oxide), AZO (aluminum zinc oxide), GZO (gallium zinc oxide), and GTO (gallium tin oxide), and its thickness can be 5nm to 300nm, but it should not be limited to this. In some embodiments, the first ohmic contact layer 301 can be omitted, that is, the first reflector layer 401 can be used to directly form an ohmic contact with the second semiconductor layer 206.

[0068] The first reflector layer 401 is attached to the surface of the first ohmic contact layer 301 close to the substrate 101. In this embodiment, the first reflector layer 401 is a metal reflective layer, and the first reflector layer 401 is electrically connected to the second semiconductor layer 206 through the first ohmic contact layer 301.

[0069] As an optional embodiment, the material of the first reflector layer 401 can be at least one of Ag, Al, Mg, Au and their alloys (the proportion of Cu, Pd and Zr metals in the alloy can be in the range of 2% to 5%); and an inert film layer can be provided on the first reflector layer 401 to prevent the metal of the first reflector layer 401 from electromigration and electrochemical migration. The material of the inert film layer can be a metal material and / or a dielectric material, such as Pt, Ni, Ti, Ta, W, TiN, TaN, TiW, SiO2, SiN x , SiON, Al2O3, AlN, and BN.

[0070] In some embodiments, the first reflector layer 401 may also be a single-layer dielectric reflective layer or a DBR reflective layer.

[0071] The first current spreading layer 501 is attached to the surface of the first reflector layer 401 close to the substrate 101, and the first current spreading layer 501 can also extend laterally to cover a portion of the surface of the second semiconductor layer 206, so that the first current spreading layer 501 can be electrically connected to the second semiconductor layer 206 through the first reflector layer 401 and the first ohmic contact layer 301.

[0072] As an optional embodiment, the first current spreading layer 501 can be a single metal layer or a stack of multiple metal layers, and its material can be metals such as Ti, Au, Pt, Cr, Al, etc. For example, the bottom layer and the top layer of the first current spreading layer 501 are high-adhesion metal layers such as those containing Ti, Ni, Cr, etc., and the middle layer is a low-resistivity metal layer such as those containing Al, Ag, Cu, Au, Pt, etc. The bottom layer, the top layer and the middle layer can also be a single layer or a multi-layer structure.

[0073] In this embodiment, the first ohmic contact layer 301 , the first reflector layer 401 , and the first current spreading layer 501 are all patterned film layers.

[0074] The dielectric layer 601 is attached to the surface of the first current spreading layer 501 close to the substrate 101 and extends into the first through hole 200a to cover the sidewall of the first through hole 200a, and can be used for isolation and height compensation.

[0075] As an optional embodiment, the dielectric layer 601 may be a single layer or a multi-layer structure, and its material may be SiO2, SiON, SiN x , Al2O3, AlN, BN and other materials, with a total thickness of about 600nm, but not limited thereto.

[0076] The second current spreading layer 502 is attached to the surface of the dielectric layer 601 close to the substrate 101 and enters into the first through hole 200 a to fill the first through hole 200 a , so that the second current spreading layer 502 can contact and be electrically connected to the first semiconductor layer 204 .

[0077] As an optional embodiment, the second current spreading layer 502 can be a single metal layer or a stack of multiple metal layers, and its material can be metals such as Ti, Au, Pt, Cr, Al, etc. For example, the bottom layer and the top layer of the second current spreading layer 502 are high-adhesion metal layers such as those containing Ti, Ni, Cr, etc., and the middle layer is a low-resistivity metal layer such as those containing Al, Ag, Cu, Au, Pt, etc. The bottom layer, the top layer and the middle layer can also be a single layer or a multi-layer structure.

[0078] In this embodiment, the maximum lateral distance L between the outer wall of the second current spreading layer 502 in the first through hole 200a and the second semiconductor layer 206 is 200nm to 950nm. By reducing the lateral distance L, the bottom of the first through hole 200a can have a larger lateral width, thereby obtaining a larger electrical contact area (the electrical contact area between the second current spreading layer 502 and the first semiconductor layer 204), which is beneficial to reducing the voltage of the light-emitting diode and the pressure increase of large current.

[0079] In some embodiments, a second ohmic contact layer may be further disposed in each of the first through holes 200a, and the second ohmic contact layer may be in ohmic contact with the first semiconductor layer 204, thereby achieving excellent electrical connection, and the second current spreading layer 502 may be in ohmic contact with the first semiconductor layer 204 through the second ohmic contact layer.

[0080] As an optional embodiment, the second ohmic contact layer may be a transparent conductive material and / or a highly reflective metal material. The transparent conductive material may be any one of ITO, IZO, AZO, GZO, and GTO, and may have a thickness of 5 nm to 300 nm. The highly reflective metal material may be any one of Ag, Al, and Mg, and may have a thickness of 60 nm to 200 nm. However, it should not be limited to this.

[0081] Please continue reading Fig.11 A bonding layer 700 may be provided between the first surface of the substrate 101 and the second current spreading layer 502, and the bonding layer 700 is used to achieve bonding between the substrate 101 and the functional stack. The material of the bonding layer 700 may be a metal alloy, such as a binary eutectic metal system composed of a high melting point metal such as Au, Ni, Cu, Ag and a low melting point metal such as Sn, In.

[0082] Furthermore, the light emitting diode further includes a first step 200 b , which is located at the edge of the epitaxial layer 200 and exposes the first current spreading layer 501 , and the first step 200 b has only one sidewall (the sidewall close to the center of the substrate 101 ).

[0083] The first electrode 801 is disposed on the lower step surface of the first step 200c, that is, the first electrode 801 is disposed on the first current spreading layer 501, and is electrically connected to the second semiconductor layer 206 through the first current spreading layer 501, the first reflector layer 401 and the first ohmic contact layer 301, serving as a P electrode.

[0084] like Fig.12 As shown, in this embodiment, the number of the first electrodes 801 is 4, and the four first electrodes 801 are all arranged in the non-luminous area outside the epitaxial layer 200, and the four first electrodes 801 are respectively arranged on the four vertex corners of the light-emitting diode. At this time, the area of ​​the first electrode 801 can be designed to be larger, but it should not be limited to this. As an embodiment, the first electrode 801 can be located at any position in the non-luminous area, and the first electrode 801 can also be other numbers, which will not be given examples one by one here.

[0085] Furthermore, the second electrode 802 is located on the second surface of the substrate 101, and is electrically connected to the first semiconductor layer 204 through the substrate 101, the bonding layer 700 and the second current spreading layer 502, serving as an N-electrode. At the same time, the second electrode 802 also serves as a metal welding layer for die bonding of the light-emitting diode, and the second electrode 802 may have a high thermal conductivity to improve the heat dissipation effect of the light-emitting diode.

[0086] As an optional embodiment, the material of the first electrode 801 may be one or more of Ti, Ni, Cr, Pt, and Au, and the material of the second electrode 802 may be TiAu, TiPtAu, TiNiAu, or TiAuSn, but should not be limited thereto.

[0087] In this embodiment, the light emitting diode further includes a passivation layer ( Fig.11 The passivation layer conformally covers the surface of the defect density reducing layer 202 away from the substrate 101, and extends to cover the sidewall and lower step surface of the first step 200b, that is, the passivation layer covers the entire surface of the light-emitting diode, thereby protecting the internal structure of the light-emitting diode. It should be noted that at least part of the surface of the first electrode 801 needs to expose the passivation layer, so as to facilitate conductive connection with an external circuit.

[0088] As an optional embodiment, the passivation layer can be a single layer or at least two layers of SiO2 and / or Al2O3, for example, it can be a three-layer film composed of SiO2-Al2O3-SiO2, so as to prevent the entry of external water vapor, improve the moisture resistance of the light-emitting diode and have an anti-reflection function, but it should not be limited to this.

[0089] Furthermore, the operating current of the light emitting diode is greater than 10A, but it should not be limited thereto. The operating current of the light emitting diode may also be less than or equal to 10A.

[0090] Based on this, the utility model also provides a method for preparing the light emitting diode. Figures 1 to 12 The following is a schematic diagram of the structure corresponding to the corresponding steps of the method for preparing a light emitting diode provided in this embodiment. Figures 1 to 12 The method for preparing the light emitting diode provided in this embodiment is described in detail.

[0091] like Figure 1As shown, the epitaxial substrate 100 is provided. The epitaxial substrate 100 is one of the heterogeneous substrates, and its material can be any one of Ga2O3, sapphire, Si, AlN, and SiC. The epitaxial substrate 100 can also be an insulating or conductive transparent substrate of a wide bandgap material. The surface of the epitaxial substrate 100 can be prepared with micro-nano patterns, thereby improving the light extraction efficiency. The micro-nano patterns can be prepared directly on the surface of the epitaxial substrate 100, or a film layer such as AlN film, BAlN film, BN film, graphene film, etc. can be pre-deposited on the epitaxial substrate 100 in advance. The micro-nano patterns are prepared on the pre-deposited film layer. The characteristic size range of the micro-nano patterns can be from hundreds of nanometers to several microns, and the pattern array mode can be any one of parallel straight lines, curved lines, squares, and hexagonal arrangements. The surface of the epitaxial substrate 100 can also be a mirror surface.

[0092] At this time, the epitaxial substrate 100 may be a 1-inch to 8-inch wafer, and may have a thickness of 300 μm to 2 mm, but is not limited thereto.

[0093] A buffer layer 201 is formed on the epitaxial substrate 100. The buffer layer 201 may be an AlN film grown at a low temperature, or may be an AlN film prepared by sputtering. The buffer layer 201 serves as a buffer structure between the epitaxial substrate 100 and the subsequently formed epitaxial layer 200, which is beneficial for improving the crystal quality of the subsequently formed epitaxial layer 200 through the buffer layer 201 in the subsequent process.

[0094] Next, the epitaxial layer 200 is formed on the epitaxial substrate 100. Specifically, a defect density reduction layer 202, a stress adjustment layer 203, a first semiconductor layer 204, a light emitting layer 205, and a second semiconductor layer 206 are sequentially formed on the epitaxial substrate 100. Specifically, the defect density reduction layer 202, the stress adjustment layer 203, the first semiconductor layer 204, the light emitting layer 205, and the second semiconductor layer 206 can be prepared by a metal chemical vapor deposition process, a plasma-assisted molecular beam epitaxy process, a laser sputtering process, or a hydride vapor phase epitaxy process.

[0095] See also Figure 2 , etching the second semiconductor layer 206 and the light emitting layer 205 until the first semiconductor layer 204 is exposed, so as to form a plurality of first through holes 200a distributed in an array. The step of forming the first through holes 200a includes: processing the first through holes 200a in the second semiconductor layer 206 and the light emitting layer 205 by photolithography and dry etching processes, and the depth of the first through holes 200a needs to exceed the light emitting layer 205 and expose the first semiconductor layer 204.

[0096] See also Figure 3, forming a first ohmic contact layer 301 on a portion of the second semiconductor layer 206. The first ohmic contact layer 301 may be formed by: depositing an ohmic contact material on the second semiconductor layer 206 by electron beam evaporation, sputtering, atomic layer deposition, ion beam assisted electron beam deposition or chemical vapor deposition, performing rapid annealing, and then performing photolithography and etching to form the first ohmic contact layer 301.

[0097] Please continue reading Figure 3 , a first reflector layer 401 is formed on the first ohmic contact layer 301, and the first reflector layer 401 covers at least a portion of the surface of the first ohmic contact layer 301. The first reflector layer 401 may be formed by: forming a reflective material on the first ohmic contact layer 301 by an electron beam evaporation process, a sputtering process, an atomic layer deposition process, or an ion beam assisted electron beam deposition process to form the first reflector layer 401.

[0098] See also Figure 4 , a first current spreading layer 501 is formed on the first reflector layer 401, the first current spreading layer 501 covers the first reflector layer 401 and the exposed first ohmic contact layer 301, and in the edge region of the epitaxial layer 200, the first current spreading layer 501 may also cover the exposed second semiconductor layer 206 (i.e., the reserved electrode region). The first current spreading layer 501 may be formed by: forming a current spreading material on the first reflector layer 401 and the exposed first ohmic contact layer 301 and a portion of the second semiconductor layer 206 by an electron beam evaporation process, a sputtering process, an atomic layer deposition process, or an ion beam assisted electron beam deposition process to form the first current spreading layer 501.

[0099] See also Figure 5 , a dielectric layer 601 is formed on the first current spreading layer 501 and the second semiconductor layer 206, the dielectric layer 601 covers the first current spreading layer 501 and the second semiconductor layer 206, and enters the first through hole 200a to cover the side wall of the first through hole 200a. The dielectric layer 601 can be formed by: using an electron beam evaporation process, a sputtering process, an atomic layer deposition process, an ion beam assisted electron beam deposition process or a plasma assisted chemical vapor deposition process to fully deposit an isolation dielectric material, and then etching away the isolation dielectric material at the bottom of the first through hole 200a to form the dielectric layer 601.

[0100] Please continue reading Figure 6, a second current spreading layer 502 is formed on the dielectric layer 601, the second current spreading layer 502 covers the dielectric layer 601, and extends to fill the first through hole 200a to contact and electrically connect with the first semiconductor layer 204. The second current spreading layer 502 can be formed by: using an electron beam evaporation process, a sputtering process, an atomic layer deposition process, or an ion beam assisted electron beam deposition process to fully deposit a current spreading material to form the second current spreading layer 502.

[0101] As an optional embodiment, before forming the second current spreading layer 502, a second ohmic contact layer may be formed in the first through hole 200a, and the second ohmic contact layer at least covers a portion of the surface of the first semiconductor layer 204. The second ohmic contact layer may be formed by: forming an ohmic contact material on the first semiconductor layer 204 in the first through hole 200a by electron beam evaporation, sputtering, atomic layer deposition, ion beam assisted electron beam deposition or chemical vapor deposition, performing rapid annealing, and then photolithography and etching to form the second ohmic contact layer.

[0102] See also Figure 7 , providing a substrate 101, and bonding the first surface of the substrate 101 to the second current spreading layer 502. The process of bonding the substrate 101 may be: forming a first bonding material layer on the second current spreading layer 502, forming a second bonding material layer on the first surface of the substrate 101, and then laminating the first bonding material layer and the second bonding material layer together, and then fusing the first bonding material layer and the second bonding material layer by a liquid phase transient bonding process at a certain temperature and pressure to form a bonding layer 700, thereby achieving permanent bonding between the substrate 101 and the second current spreading layer 502.

[0103] The materials of the first bonding material layer and the second bonding material layer can be the same, for example, both are binary bonding layers composed of an alloy of a high melting point metal and a low melting point metal; of course, the materials of the first bonding material layer and the second bonding material layer can also be different, for example, one is a high melting point metal layer and the other is a low melting point metal layer.

[0104] See also Figure 8 , separating the epitaxial substrate 100. In this embodiment, an ultraviolet laser with a certain wavelength (for example, 248nmKrF or 193nmArF) is used to irradiate the buffer layer 201 on the epitaxial substrate 100 with a small spot of a certain size (for example, 200μm). Under the irradiation of the ultraviolet laser, the buffer layer 201 is decomposed into Al and N2, and then the epitaxial substrate 100 and the epitaxial layer 200 are separated by heating.

[0105] It should be understood that since the buffer layer 201 in this embodiment is made of AlN material, ultraviolet laser irradiation is used to separate the epitaxial substrate 100. When the material of the epitaxial substrate 100 changes, other methods such as etching can also be used to separate the epitaxial substrate 100.

[0106] Next, the defect density reduction layer 202 may be etched with a hot KOH solution (eg, 50° C. to 70° C.) of a certain concentration (eg, 2 mol / L to 6 mol / L) to roughen the surface of the defect density reduction layer 202 , thereby improving luminous efficiency.

[0107] See also Fig. 9 , etching the edge of the epitaxial layer 200 , thereby forming a first step 200 b exposing the first current spreading layer 501 and the dielectric layer 601 . The first step 200 b is located at the edge region of the epitaxial layer 200 .

[0108] See also Fig.10 A first electrode 801 is formed on the lower step surface of the first step 200b, and the first electrode 801 contacts and is electrically connected to the first current spreading layer 501. The steps of forming the first electrode 801 include: forming a photoresist mask to cover the area where the electrode is not required to be formed, then forming a conductive material by an electron beam evaporation process, and then removing the photoresist mask and the conductive material on the photoresist mask by a lift-off process, and the conductive material in the area not covered by the photoresist mask is retained, thereby forming the first electrode 801.

[0109] Next, a passivation material may be deposited on the entire surface to form a passivation layer, and the passivation layer may cover the entire exposed surface of the epitaxial layer 200 and cover the sidewall and lower step surface of the first step 200b to protect the entire light-emitting diode. It should be understood that at least a portion of the top surface of the first electrode 801 needs to expose the passivation layer so as to be used as a lead-out terminal for subsequent packaging processes. Therefore, after the passivation layer is formed, an etching process may be performed to remove part of the passivation layer so that at least a portion of the top surface of the first electrode 801 is exposed.

[0110] As an optional embodiment, the passivation layer may also be formed before forming the first electrode 801 . In this way, before forming the first electrode 801 , the passivation layer needs to be etched to form an opening for accommodating the first electrode 801 .

[0111] like Fig.11 and Fig.12As shown, the substrate 101 is thinned (to about 110um), and then a second electrode 802 is formed on the second surface of the substrate 101. The second electrode 802 is electrically connected to the first semiconductor layer 204 through the substrate 101, the bonding layer 700 and the second current spreading layer 502. At the same time, the second electrode 802 also serves as a metal welding layer for die-bonding of the light-emitting diode.

[0112] Afterwards, ultraviolet laser metal grooving and diamond knife cutting processing methods can be used to complete grain splitting, and finally the light emitting diode is obtained.

[0113] Embodiment 2

[0114] Fig.13 This is a schematic diagram of the structure of the light emitting diode provided in this embodiment. Fig.13 As shown, the difference from the first embodiment is that, in this embodiment, each of the second parts 220 includes at least two sub-parts arranged along the circumference of the first part 210, and two adjacent sub-parts are separated from each other.

[0115] Fig.13 In the embodiment, each of the second parts 220 includes two sub-parts, and the two sub-parts are separated from each other. In some embodiments, each of the second parts 220 may also include more than three sub-parts separated from each other.

[0116] Embodiment 3

[0117] Fig.17 and Fig.18 The schematic diagram of the structure of the light emitting diode provided in this embodiment, wherein: Fig.17 for Fig.18 The cross-sectional diagram of the light-emitting diode along the AA direction is shown in FIG. Fig.17 and Fig.18 As shown, the difference from the first embodiment is that in this embodiment, the first part 210 and the second part 220 are separated from each other.

[0118] Specifically, the epitaxial layer 200 has an isolation trench 200 d therein. The isolation trench 200 d at least penetrates the epitaxial layer 200 , thereby separating the epitaxial layer 200 into the first portion 210 and the second portion 220 . The second portion 220 is disposed at the periphery of the first portion 210 .

[0119] Please continue reading Fig.17In this embodiment, the first reflector layer 401 has a third through hole 401a that penetrates through the first reflector layer 401 and exposes the first ohmic contact layer 301. The first current spreading layer 501 is attached to the surface of the first reflector layer 401 close to the substrate 101 and extends to the third through hole 401a to fill the third through hole 401a. After the isolation groove 200d penetrates the epitaxial layer 200 and the first ohmic contact layer 301, the first current spreading layer 501 is exposed. In this way, the first reflector layer 401 and the first ohmic contact layer 301 will not be exposed after the isolation groove 200d is formed, thereby preventing the first reflector layer 401 or the first ohmic contact layer 301 from being damaged by the outside or metal migration.

[0120] Of course, in some embodiments, if the process allows, the first reflector layer 401 may not have the third through hole 401 a . In this case, the isolation groove 200 d may expose the first ohmic contact layer 301 or the first reflector layer 401 .

[0121] In addition, it should be noted that the passivation layer also needs to cover the inner wall of the isolation trench 200 d , so as to prevent the semiconductor film layer in the epitaxial layer 200 from being exposed.

[0122] The light emitting diode in this embodiment is similar in manufacturing process to that in the first embodiment. On the basis of forming the first reflector layer 401 in the first embodiment, Fig.14 As shown, the first reflector layer 401 is etched to form the third through hole 401a penetrating the first reflector layer 401 and exposing the first ohmic contact layer 301. Fig.15 As shown, after the first current spreading layer 501 is formed, the first current spreading layer 501 covers the first reflector layer 401 and a portion of the surface of the second semiconductor layer 206, and extends into the third through hole 401a to fill the third through hole 401a. Then, the corresponding steps of the first embodiment are performed, such as Fig.16 As shown, when forming the first step 200b, the epitaxial layer 200 and the first ohmic contact layer 301 are also etched to form the isolation groove 200d exposing the first current spreading layer 501. Then, the corresponding steps of the first embodiment are continued to be performed, and finally Fig.17 and Fig.18 The light emitting diode shown.

[0123] Please continue reading Fig.18It should be noted that, since the first portion 210 and the second portion 220 are separated from each other, at least one first through hole 200a needs to be provided in each of the second portions 220, so that voltage can be applied to the first semiconductor layer 204 and the second semiconductor layer 205 in the second portion 220 through the first electrode 801 and the second electrode 802, so that the second portion 220 can emit light. When the second portion 220 further includes sub-portions separated from each other, for the same reason, at least one first through hole 200a also needs to be provided in each of the sub-portions, so that each of the sub-portions can emit light.

[0124] Embodiment 4

[0125] Fig.29 and Fig.30 The schematic diagram of the structure of the light emitting diode provided in this embodiment, wherein: Fig.29 for Fig.30 A schematic cross-sectional view of a light emitting diode along the AA direction (the structure of the dotted line portion in the cross-sectional line is not shown). Fig.29 and Fig.30 As shown, the difference from the first embodiment is that, in this embodiment, the light emitting diode further includes a second reflector layer 402 and an adhesion layer 403 .

[0126] Specifically, the second reflector layer 402 is attached to the first ohmic contact layer 301 and the second semiconductor layer 206, and extends to cover the inner wall of the first through hole 200a, and the adhesive layer 403 is attached to the surface of the second reflector layer 402 close to the substrate 101. The second reflector layer 402 and the adhesive layer 403 have a second through hole 400a, and the second through hole 400a penetrates the second reflector layer 402 and the adhesive layer 403 and exposes the first ohmic contact layer 301. The first reflector layer 401 is attached to the surface of the adhesive layer 403 close to the substrate 101, and at least covers the inner wall of the second through hole 400a, so as to be electrically connected to the second semiconductor layer 206. The first current spreading layer 501 is attached to the surface of the first reflector layer 401 close to the substrate 101 and a part of the surface of the adhesive layer 403 close to the substrate 101.

[0127] The adhesion layer 403 can increase the adhesion between the second reflector layer 402, the first reflector layer 401 and the first current spreading layer 501. As an optional embodiment, the adhesion layer 403 can be a single layer or a multi-layer structure, and its material can be at least one of Ti, ZnO, ITO, and Al2O3, with a thickness of about 2 to 20 nm, but is not limited thereto.

[0128] In this embodiment, the first reflector layer 401 directly fills the second through hole 400a. In some embodiments, the first reflector layer 401 may only cover the inner wall of the second through hole 400a. In this case, the first current spreading layer 501 will enter the second through hole 400a to fill the second through hole 400a.

[0129] Optionally, the lateral width of the second through hole 400a may be 1 um to 3 um, but should not be limited thereto.

[0130] Furthermore, the second reflector layer 402 is a single-layer dielectric reflector layer or a DBR (distributed Bragg reflector) reflector layer, so that the second reflector layer 402 and the first reflector layer 401 constitute an ODR reflector, thereby improving the reflection effect and further improving the luminous efficiency of the light-emitting diode.

[0131] As an optional embodiment, the material of the second reflector layer 402 may be any one of MgF2, CaF2, SiO2, and Al2O3; the thickness of the second reflector layer 402 may be K*λ / 4n, wherein λ is the light emitting wavelength of the light emitting layer 205, n is the refractive index of the second reflector layer 402, and K is an integer greater than or equal to 4, such as a wavelength of 460 nm corresponds to a refractive index of approximately 1.47, and K=4 corresponds to a film thickness of approximately 313 nm.

[0132] Please continue reading Fig.29 The difference from the first embodiment is that in this embodiment, the substrate 101 may be an insulating substrate, such as SiNx, AlN, BN, diamond substrate, etc. The first electrode 801 and the second electrode 802 are both located on the first surface of the substrate 101 .

[0133] Specifically, there are two first electrodes 801 and two second electrodes 802, respectively. The two first electrodes 801 are located at two corners on the lower side of the light-emitting diode, and the two second electrodes 802 are located at two corners on the upper side of the light-emitting diode. The four electrodes are centrally symmetrical.

[0134] It should be understood that, as an embodiment, the first electrode 801 and the second electrode 801 may be located at any position outside the epitaxial layer 200 , and will not be described one by one herein.

[0135] certainly, Fig.30 The number, shape and position distribution of the first electrodes 801 and the second electrodes 802 are only examples and should not be limited thereto.

[0136] Please continue reading Fig.29The light emitting diode further includes a first step 200b and a second step 200c. The first step 200b exposes the first current spreading layer 501 and the dielectric layer 601, and the second step 200c exposes the second current spreading layer 502. The first step 200b and the second step 200c are both located at the edge of the light emitting diode, and thus have only one sidewall (the sidewall close to the center of the substrate 101).

[0137] The first electrode 801 is disposed on the lower step surface of the first step 200b, that is, the first electrode 801 is located on the first current spreading layer 501, and is electrically connected to the second semiconductor layer 206 through the first current spreading layer 501, the first reflector layer 401 and the first ohmic contact layer 301, as a P electrode. The second electrode 802 is disposed on the lower step surface of the second step 200c, that is, the second electrode 802 is located on the second current spreading layer 502, and is electrically connected to the first semiconductor layer 204 through the second current spreading layer 502, as an N electrode.

[0138] As an optional embodiment, the material of the first electrode 801 and the second electrode 802 may be one or more of Ti, Ni, Cr, Pt, and Au, but should not be limited thereto.

[0139] In this embodiment, the passivation layer conformally covers the surface of the defect density reducing layer 202 away from the substrate 101, and extends to cover the sidewalls and lower step surfaces of the first step 200b and the second step 200c, that is, the passivation layer covers the entire surface of the light-emitting diode, thereby protecting the internal structure of the light-emitting diode. It should be noted that at least part of the surface of the first electrode 801 and the second electrode 802 needs to expose the passivation layer, so as to facilitate conductive connection with an external circuit.

[0140] As an optional embodiment, the passivation layer can be a single layer or at least two layers of SiO2 and / or Al2O3, for example, it can be a three-layer film composed of SiO2-Al2O3-SiO2, so as to prevent the entry of external water vapor, improve the moisture resistance of the light-emitting diode and have an anti-reflection function, but it should not be limited to this.

[0141] Furthermore, a metal welding layer 900 is also provided on the second surface of the substrate 101 for die bonding of the light emitting diode, and the metal welding layer 900 may have a high thermal conductivity to improve the heat dissipation effect of the light emitting diode. In some embodiments, the metal welding layer 900 may be omitted.

[0142] Optionally, the material of the metal welding layer 900 may be TiPtAu, TiNiAu or TiAuSn, but should not be limited thereto.

[0143] Based on this, this embodiment also provides a method for preparing the light emitting diode. Figure 19 to Figure 30 The following is a schematic diagram of the structure corresponding to the corresponding steps of the method for preparing a light emitting diode provided in this embodiment. Figure 19 to Figure 30 The method for preparing the light emitting diode provided in this embodiment is described in detail.

[0144] On the basis of forming the first through hole 200a in the first embodiment, Fig.19 As shown, a first ohmic contact layer 301 is formed on a portion of the surface of the second semiconductor layer 206. The first ohmic contact layer 301 may be formed by: forming an ohmic contact material on the second semiconductor layer 206 by electron beam evaporation, sputtering, atomic layer deposition, ion beam assisted electron beam deposition or chemical vapor deposition, performing rapid annealing, and then photolithography and etching to form the first ohmic contact layer 301.

[0145] See also Fig. 20 , a second reflector layer 402 is formed on the first ohmic contact layer 301, the second reflector layer 402 covers the surface of the first ohmic contact layer 301, and extends into the first through hole 200a to cover the inner wall of the first through hole 200a. The second reflector layer 402 can be formed by: using an electron beam evaporation process, a sputtering process, an atomic layer deposition process, an ion beam assisted electron beam deposition process, or a plasma assisted chemical vapor deposition process to fully deposit a reflective material to form the second reflector layer 402.

[0146] Please continue reading Fig. 20 , forming an adhesion layer 403 on the second reflector layer 402 , wherein the adhesion layer 403 conformally covers the surface of the second reflector layer 402 .

[0147] See also Fig.21 , the adhesion layer 403 and the second reflector layer 402 are etched to form a second through hole 400 a penetrating the adhesion layer 403 and the second reflector layer 402 , wherein the second through hole 400 a exposes the first ohmic contact layer 301 .

[0148] See also Fig. 22, a first reflector layer 401 is formed on a portion of the surface of the adhesion layer 403, the first reflector layer 401 covers a portion of the surface of the adhesion layer 403, and enters the second through hole 400a, at least covering the inner wall of the second through hole 400a. In this embodiment, the first reflector layer 401 directly fills the second through hole 400a. The formation process of the first reflector layer 401 can be: using an electron beam evaporation process, a sputtering process, an atomic layer deposition process, or an ion beam assisted electron beam deposition process to form a reflective material on the adhesion layer 403 to form the first reflector layer 401.

[0149] Please continue reading Fig. 22 , a first current spreading layer 501 is formed on the first reflector layer 401, the first current spreading layer 501 covers the first reflector layer 401, and the first current spreading layer 501 may also extend to a portion of the surface of the adhesion layer 403. The first current spreading layer 501 may be formed by: forming a current spreading material on the first reflector layer 401 and a portion of the surface of the adhesion layer 403 by an electron beam evaporation process, a sputtering process, an atomic layer deposition process, or an ion beam assisted electron beam deposition process to form the first current spreading layer 501.

[0150] It should be noted that, when the first reflector layer 401 only covers the inner wall of the second through hole 400 a , the first current spreading layer 501 will also enter the second through hole 400 a to fill the second through hole 400 a .

[0151] See also Fig.23 , a dielectric layer 601 is formed on the first current spreading layer 601 and the adhesion layer 403, the dielectric layer 601 covers the first current spreading layer 501 and the adhesion layer 403, and enters the first through hole 200a to cover the inner wall of the first through hole 200a. The dielectric layer 601 can be formed by: using an electron beam evaporation process, a sputtering process, an atomic layer deposition process, an ion beam assisted electron beam deposition process or a plasma assisted chemical vapor deposition process to fully deposit an isolation dielectric material to form the dielectric layer 601.

[0152] Please continue reading Fig.23 , the dielectric layer 601, the adhesion layer and the second reflector layer 402 are etched downward from the bottom wall of the first through hole 200a, so that the first through hole 200a exposes the first semiconductor layer 204 again.

[0153] See also Fig.24, a second current spreading layer 502 is formed on the dielectric layer 601, the second current spreading layer 502 covers the dielectric layer 601, and extends to fill the first through hole 200a to contact and electrically connect with the first semiconductor layer 204. The second current spreading layer 502 can be formed by: using an electron beam evaporation process, a sputtering process, an atomic layer deposition process, or an ion beam assisted electron beam deposition process to fully deposit a current spreading material to form the second current spreading layer 502.

[0154] As an optional embodiment, before forming the second current spreading layer 502, a second ohmic contact layer may be formed in the first through hole 200a, and the second ohmic contact layer at least covers a portion of the surface of the first semiconductor layer 204. The second ohmic contact layer may be formed by: forming an ohmic contact material on the first semiconductor layer 204 in the first through hole 200a by electron beam evaporation, sputtering, atomic layer deposition, ion beam assisted electron beam deposition or chemical vapor deposition, performing rapid annealing, and then photolithography and etching to form the second ohmic contact layer.

[0155] See also Fig.25 , providing a substrate 101, providing a substrate 101, and bonding the first surface of the substrate 101 to the second current spreading layer 502. Specifically, the process of bonding the substrate 101 may be: forming a first bonding material layer on the second current spreading layer 502, forming a second bonding material layer on the first surface of the substrate 101, and then laminating the first bonding material layer and the second bonding material layer together, and then fusing the first bonding material layer and the second bonding material layer by a liquid phase transient bonding process at a certain temperature and pressure to form a bonding layer 700, thereby achieving permanent bonding between the substrate 101 and the second current spreading layer 502.

[0156] The materials of the first bonding material layer and the second bonding material layer can be the same, for example, both are binary bonding layers composed of an alloy of a high melting point metal and a low melting point metal; of course, the materials of the first bonding material layer and the second bonding material layer can also be different, for example, one is a high melting point metal layer and the other is a low melting point metal layer.

[0157] See also Fig.26 , separating the epitaxial substrate 100. In this embodiment, an ultraviolet laser with a certain wavelength (for example, 248nmKrF or 193nmArF) is used to irradiate the buffer layer 201 on the epitaxial substrate 100 with a small spot of a certain size (for example, 200μm). Under the irradiation of the ultraviolet laser, the buffer layer 201 is decomposed into Al and N2, and then the epitaxial substrate 100 and the epitaxial layer 200 are separated by heating.

[0158] It should be understood that since the buffer layer 201 in this embodiment is made of AlN material, ultraviolet laser irradiation is used to separate the epitaxial substrate 100. When the material of the epitaxial substrate 100 changes, other methods such as etching can also be used to separate the epitaxial substrate 100.

[0159] Next, the defect density reduction layer 202 may be etched with a hot KOH solution (eg, 50° C. to 70° C.) of a certain concentration (eg, 2 mol / L to 6 mol / L) to roughen the surface of the defect density reduction layer 202 , thereby improving luminous efficiency.

[0160] See also Fig. 27 , the edge of the epitaxial layer 200 is etched to form a first step 200b exposing the first current spreading layer 501 and the dielectric layer 601. The first step 200b is located on the edge region of the epitaxial layer 200. The dielectric layer 601 is etched downward along the lower step surface of the first step 200b to form a second step 200c exposing the second current spreading layer 502.

[0161] See also Fig.28 , a first electrode 801 and a second electrode 802 are formed on the lower step surface of the first step 200b and the lower step surface of the second step 200c, respectively. The first electrode 801 contacts the first current spreading layer 501, thereby being electrically connected to the second semiconductor layer 206 through the first current spreading layer 501, the first reflector layer 401 and the first ohmic contact layer 301. The second electrode 802 contacts and is electrically connected to the second current spreading layer 502, thereby being electrically connected to the first semiconductor layer 204 through the second current spreading layer 502. The steps of forming the first electrode 801 and the second electrode 802 include: forming a photoresist mask to cover the area where the electrode is not required to be formed, then forming a conductive material by an electron beam evaporation process, and then removing the photoresist mask and the conductive material on the photoresist mask by a stripping process, and the conductive material in the area not covered by the photoresist mask is retained, thereby forming the first electrode 801 and the second electrode 802.

[0162] Next, a passivation material may be deposited on the entire surface to form a passivation layer, and the passivation layer may cover the entire exposed surface of the epitaxial layer 200, and cover the sidewalls and lower step surfaces of the first step 200b and the second step 200c, so as to protect the entire light-emitting diode. It should be understood that at least a portion of the top surface of the first electrode 801 and the second electrode 802 needs to be exposed from the passivation layer so as to be used as a lead-out terminal for subsequent packaging processes. Therefore, after the passivation layer is formed, an etching process may be performed to remove a portion of the passivation layer so as to expose at least a portion of the top surface of the first electrode 801 and the second electrode 802.

[0163] As an optional embodiment, the passivation layer can also be formed before forming the first electrode 801 and the second electrode 802. In this way, before forming the first electrode 801 and the second electrode 802, the passivation layer needs to be etched to form openings to accommodate the first electrode 801 and the second electrode 802.

[0164] See also Fig.29 and Fig.30 , thinning the substrate 101 (to about 160 um), and then forming a metal welding layer 900 on the second surface of the substrate 101. Afterwards, ultraviolet laser metal grooving and diamond knife cutting processing methods can be used to complete grain splitting, and finally the light-emitting diode is obtained.

[0165] In summary, the light-emitting diode provided in the embodiment of the utility model includes a substrate, an epitaxial layer, a first electrode and a second electrode, wherein the epitaxial layer is located on the first surface of the substrate and includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer arranged in sequence from top to bottom, wherein the first electrode is electrically connected to the second semiconductor layer, and the second electrode is electrically connected to the first semiconductor layer. In the utility model, the epitaxial layer includes a first part and at least one second part, wherein the second part is arranged at the periphery of the first part, so that the area of ​​the epitaxial layer can be increased on the basis of ensuring that other areas outside the epitaxial layer can be provided with sufficiently large electrodes, which not only increases the brightness of the light-emitting diode, but also reduces the current density of the light-emitting diode to alleviate the problem of reduced luminous efficiency, and significantly improves the working performance of the light-emitting diode under ultra-large current density conditions.

[0166] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referred to each other. For the system disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0167] It should also be noted that, although the present invention has been disclosed as a preferred embodiment, the above embodiment is not intended to limit the present invention. For any technician familiar with the art, without departing from the scope of the technical solution of the present invention, the above disclosed technical content can be used to make many possible changes and modifications to the technical solution of the present invention, or modified into equivalent embodiments of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiment based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

[0168] It should also be understood that, unless otherwise specified or indicated, the terms "first", "second", "third", etc. in the specification are merely used to distinguish between the various components, elements, steps, etc. in the specification, and are not used to indicate the logical relationship or sequential relationship between the various components, elements, steps, etc.

[0169] It should also be recognized that the terms described herein are only used to describe specific embodiments and are not used to limit the scope of the utility model. It must be noted that the singular forms "one" and "a kind" used herein and in the appended claims include plural references unless the context clearly indicates the opposite meaning. For example, a reference to "a step" or "a device" means a reference to one or more steps or devices, and may include secondary steps and secondary devices. All conjunctions used should be understood in the broadest sense. And, the word "or" should be understood to have a logical "or" definition, rather than a logical "exclusive or" definition, unless the context clearly indicates the opposite meaning. In addition, the implementation of the method and / or device in the embodiment of the utility model may include performing the selected task manually, automatically, or in combination.

Claims

1. A light emitting diode, characterized in that: include: substrate; an epitaxial layer, located on the first surface of the substrate, comprising a first semiconductor layer, a light-emitting layer and a second semiconductor layer arranged in sequence from top to bottom, wherein the epitaxial layer comprises a first portion and at least one second portion, wherein the second portion is arranged at the periphery of the first portion, and both the first portion and the second portion comprise the first semiconductor layer, the light-emitting layer and the second semiconductor layer; a first electrode electrically connected to the second semiconductor layer; as well as, The second electrode is electrically connected to the first semiconductor layer.

2. The light emitting diode according to claim 1, characterized in that The first part has a circular shape.

3. The light emitting diode according to claim 2, characterized in that The second portion is evenly distributed along the periphery of the first portion.

4. The light emitting diode according to claim 2, characterized in that: Each of the second parts includes at least two sub-parts arranged along the circumference of the first part, and two adjacent sub-parts are separated from each other.

5. The light emitting diode according to any one of claims 1 to 4, characterized in that The first part and the second part are an integral structure.

6. The light emitting diode according to any one of claims 1 to 4, characterized in that The first portion and the second portion are separated from each other.

7. The light emitting diode according to any one of claims 1 to 4, characterized in that The first portion and the second portion are both capable of emitting light.

8. The light emitting diode according to any one of claims 1 to 4, characterized in that The operating current of the light emitting diode is greater than 10A.

9. The light emitting diode according to any one of claims 1 to 4, characterized in that The light emitting diode further comprises: a first through hole, penetrating the second semiconductor layer and the light emitting layer and exposing the first semiconductor layer; A first reflector layer is attached to a portion of the surface of the second semiconductor layer close to the substrate; a first current spreading layer, attached to at least a portion of the surface of the first reflector layer close to the substrate and electrically connected to the second semiconductor layer; a dielectric layer, attached to a surface of the first current spreading layer close to the substrate and extending to cover the second semiconductor layer and a side wall of the first through hole; a second current spreading layer, attached to a surface of the dielectric layer close to the substrate and filling the first through hole to be electrically connected to the first semiconductor layer; and A bonding layer is located between the first surface of the substrate and the second current spreading layer.

10. The light emitting diode according to claim 9, characterized in that The first reflector layer is a metal reflective layer.

11. The light emitting diode according to claim 10, characterized in that The light emitting diode further comprises: A second reflector layer is attached to a surface of the second semiconductor layer close to the substrate and extends to cover an inner wall of the first through hole; an adhesive layer attached to a surface of the second reflector layer close to the substrate; and The second through hole penetrates the adhesion layer and the second reflector layer and exposes the second semiconductor layer. The first reflector layer is attached to the surface of the adhesion layer close to the substrate and at least covers the inner wall of the second through hole to be electrically connected to the second semiconductor layer.

12. The light emitting diode according to claim 11, characterized in that The second reflector layer is a single-layer dielectric reflective layer or a DBR reflective layer.

13. The light emitting diode according to claim 9, characterized in that: The first reflector layer is a single-layer dielectric reflective layer or a DBR reflective layer.

14. The light emitting diode according to claim 9, characterized in that: The maximum lateral distance between the outer sidewall of the second current spreading layer in the first through hole and the second semiconductor layer is 200 nm to 950 nm.

15. The light emitting diode according to claim 9, characterized in that: The light emitting diode further comprises: The first step is located at the edge of the epitaxial layer and exposes the first current spreading layer. The first electrode is located at the lower step surface of the first step and is electrically connected to the first current spreading layer. The second electrode is located at the second surface of the substrate.

16. The light emitting diode according to claim 9, characterized in that: The light emitting diode further comprises: a first step located at an edge of the epitaxial layer and exposing the first current spreading layer, the first electrode located at a lower step surface of the first step and electrically connected to the first current spreading layer; and The second step is located at the edge of the epitaxial layer and exposes the second current spreading layer. The second electrode is located at the lower step surface of the second step and is electrically connected to the second current spreading layer.

17. The light emitting diode according to claim 16, characterized in that The light emitting diode further comprises: The metal welding layer is located on the second surface of the substrate.

18. The light emitting diode according to claim 9, characterized in that The light emitting diode further comprises: An isolation trench penetrates the epitaxial layer and divides the epitaxial layer into the first portion and the second portion, wherein the first portion and the second portion are separated from each other by the isolation trench.

19. The light emitting diode according to claim 18, characterized in that The first reflector layer has a third through hole extending therethrough, the first current spreading layer is also filled in the third through hole, and the isolation groove penetrates the epitaxial layer and exposes the first current spreading layer filled in the third through hole.

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