Chip contact testing device

The test probe composed of a probe clamp and a memory metal piece can realize chip testing without damaging the solder cap, solving the problem of solder end damage in the existing technology and improving the performance and yield of the chip.

CN223400999UActive Publication Date: 2025-09-30KINGTIGER TESTING TECH (SZ) LTD
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Patent Information

Application Number
CN202422462564.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-10-12
Publication Date
2025-09-30
Estimated Expiration
2034-10-12

AI Technical Summary

Technical Problem

Existing chip testing solutions can easily cause damage to the solder ends when contacting metal bumps, affecting chip performance and yield.

Method used

The test probe adopts a combination of probe clamps and memory metal parts. The probe clamps open or contract under the action of the memory metal parts, and the signal is transmitted through the support column to avoid direct contact with the solder cap and protect the integrity of the solder end.

Benefits of technology

Effectively protect the integrity of the solder cap, avoid damage to subsequent processes and performance, and improve chip yield.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a chip contact test device. The chip contact test device comprises a probe support and a test probe arranged on the probe support. Wherein the metal bump of the to-be-detected chip comprises a supporting column and a solder cap located at the end part of the supporting column; the test probe comprises at least two probe clamping jaws and memory metal pieces arranged on the probe clamping jaws; moreover, in an initial state, the probe clamping jaw is in an open state, and the size of the open end clamped by the probe is larger than the size of the solder cap. Under a preset condition, the memory metal piece contracts and drives the probe clamping jaw to be in contact conduction with the supporting column, and signal transmission between the to-be-detected chip and the test probe is achieved through the supporting column. According to the utility model, the related test of the chip can be completed under the condition that the solder cap is not damaged.
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Description

Technical Field

[0001] The utility model relates to the technical field of chip detection, and more specifically, to a chip contact testing device. Background Art

[0002] In the field of semiconductor chip stacking technology, performance testing is required before chips are formed or shipped, enabling quality inspection, grading, and defective product screening. Currently, various chip stacking methods exist, such as HBM, Wide-IO, and HMC. Testing these chips requires external probes to contact the metal bumps on the chip to transmit test signals and test results.

[0003] However, since the metal bumps on the chip are small and fragile, using existing probes to directly contact the metal bumps will damage the solder ends of the metal bumps, thereby affecting the subsequent bonding process and chip performance, and affecting product yield.

[0004] Therefore, there is an urgent need for a chip testing solution that can prevent the solder ends of the metal bumps from being damaged and affecting the chip performance while ensuring that the chip is connected to the test signal. Utility Model Content

[0005] In view of the above problems, the purpose of the present invention is to provide a chip contact testing device to solve the problem that the existing chip testing scheme may cause damage to the solder end of the chip, thereby affecting the chip performance.

[0006] The chip contact testing device provided by the utility model comprises: a probe holder and a test probe arranged on the probe holder; wherein the metal bump of the chip to be tested comprises a support column and a solder cap located at the end of the support column; the test probe comprises at least two probe jaws and a memory metal piece arranged on the probe jaws; and, in an initial state, the probe jaws are in an open state, and the size of the open end clamped by the probe is larger than the size of the solder cap; under preset conditions, the memory metal piece contracts and drives the probe jaws to contact and conduct with the support column, and the chip to be tested and the test probe realize signal transmission through the support column.

[0007] In addition, an optional technical solution is that the probe clamps are provided with two, and the memory metal piece is a ring structure sleeved on the outside of the two probe clamps; wherein the inner wall side of the memory metal strip is glued or welded to the outer wall of the probe clamp.

[0008] In addition, an optional technical solution is that the cross-section of the memory metal piece is rectangular, hexagonal or circular.

[0009] In addition, an optional technical solution is that the probe clamps are provided with two, and the memory metal piece is a strip structure connected between the two probe clamps; wherein, the two ends of the memory metal piece are respectively fixedly connected to the inner side walls of the two probe clamps.

[0010] In addition, an optional technical solution is to provide a contoured contact portion at the end of the probe clamping jaw; the contoured contact portion is adapted to the outer shape of the support column.

[0011] In addition, an optional technical solution is that an isolation limiting column located between two adjacent test probes is further provided on the probe holder.

[0012] In addition, an optional technical solution is that there are three probe clamps; the memory metal part is a ring structure sleeved on the outside of the three probe clamps; or, the memory metal part is a "Y"-shaped structure connected to the inside of the three probe clamps.

[0013] In addition, an optional technical solution is that the cross section of the test probe is a rectangular or circular structure.

[0014] In addition, an optional technical solution is that the probe clamps are symmetrically or evenly distributed on the test probe.

[0015] Using the above-mentioned chip contact test device, the test probe is set to include at least two probe jaws and a memory metal part arranged on the probe jaws, so that the probe jaws can open or shrink under the action of the memory metal part, thereby contacting and conducting with the support column when the probe jaws meet the preset conditions, and achieving conduction between the test probe and the metal bump through the support column, thereby avoiding direct contact between the test probe and the solder cap, ensuring the integrity of the solder cap's appearance, and avoiding the impact of subsequent processes and performance due to damage to the solder cap.

[0016] To achieve the above and related purposes, one or more aspects of the present invention include features described in detail below. The following description and accompanying drawings detail certain exemplary aspects of the present invention. However, these aspects are merely indicative of some of the various ways in which the principles of the present invention may be employed. Furthermore, the present invention is intended to include all such aspects and their equivalents. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] By referring to the following description in conjunction with the accompanying drawings, and with a more comprehensive understanding of the present invention, other objects and results of the present invention will become more clear and easy to understand. In the accompanying drawings:

[0018] Figure 1 This is a schematic structural diagram of a chip contact testing device in a first state according to an embodiment of the present invention;

[0019] Figure 2 This is a schematic structural diagram of a chip contact testing device in a second state according to an embodiment of the present invention;

[0020] Figure 3 The cross section of the test probe according to the embodiment of the present invention is Figure 1 ;

[0021] Figure 4 The cross section of the test probe according to the embodiment of the present invention is Figure 2 ;

[0022] Figure 5 This is a structural diagram of a chip contact testing device in a first state according to another embodiment of the present invention;

[0023] Figure 6 This is a structural diagram of a chip contact testing device in a second state according to another embodiment of the present invention;

[0024] Figure 7 This is a three-dimensional diagram of the array distribution of a chip contact test device according to an embodiment of the present invention;

[0025] Figure 8 is a cross-sectional view of an array distribution of a chip contact testing device according to an embodiment of the present invention;

[0026] Figure 9 This is a three-dimensional diagram of an array distribution of a chip contact testing device according to another embodiment of the present invention;

[0027] Figure 10 1 is a cross-sectional view of an array distribution of a chip contact testing device according to another embodiment of the present invention.

[0028] The reference numerals include: a test probe 1 , a probe clamp 11 , a contoured contact portion 12 , a solder cap 21 , a support column 22 , an isolation and limiting column 3 , and a memory metal part 4 .

[0029] The same reference numerals throughout the drawings indicate similar or corresponding features or functions. DETAILED DESCRIPTION

[0030] In the following description, for illustrative purposes, numerous specific details are set forth to provide a comprehensive understanding of one or more embodiments. However, it will be apparent that the embodiments may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form to facilitate description of one or more embodiments.

[0031] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like to indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation to the present invention.

[0032] Those skilled in the art will understand that, unless otherwise stated, the singular forms "a," "an," "said," and "the" used herein may also include plural forms. It should be further understood that the term "comprising" used in the specification of the present utility model refers to the presence of the stated features, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It should be understood that the term "and / or" used herein includes any and all combinations of one or more associated listed items.

[0033] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as generally understood by those skilled in the art in the field to which the present invention belongs. It should also be understood that terms such as those defined in common dictionaries should be understood to have meanings consistent with those in the context of the prior art, and will not be interpreted in an idealized or overly formal sense unless defined as such herein.

[0034] In order to describe the chip contact testing device of the present invention in detail, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0035] Figures 1 to 6 The overall or partial schematic structures of the chip contact testing device according to the embodiment of the present invention are shown from different angles.

[0036] like Figures 1 to 6As shown together, the chip contact test device of the embodiment of the present invention includes a probe holder and a test probe 1 arranged on the probe holder; wherein the metal bump of the chip to be tested includes a support column 22 arranged on the chip protection layer and a solder cap 21 located at the end of the support column 22. Generally, the material of the support column 22 is slightly harder than that of the solder cap 21. For example, the support column 22 can be made of copper, which is less susceptible to damage than the solder cap 21. In order to avoid direct contact between the traditional test probe 1 and the solder cap 21, the test probe 1 in the embodiment of the present invention includes at least two probe clamps 11 And a memory metal piece 4 is arranged on the probe clamp 11; and, in the initial state, the memory metal piece 4 does not apply external force to the probe clamp 11, the probe clamp 11 is in an open state in a natural state, and the size of the open end clamped by the probe is larger than the size of the solder cap 21; under preset conditions, the memory metal piece 4 contracts and drives the probe clamp 11 to contact and conduct with the support column 22, so that the metal bump to be detected and the test probe 1 can realize signal transmission through the support column 22, that is, the test signal is partially transmitted through the support column 22, ensuring the integrity of the solder cap 21 at its end.

[0037] Specifically, the probe clamp 11 can be set as two or more, one end of the probe clamp 11 is connected by a connecting portion, and the other end is a free end. The entire probe clamp 11 is an integrally formed structure, and the cross-section of the connecting portion of the test probe 1 can be a rectangular or circular structure, etc. The memory metal piece 4 is an annular structure sleeved on the outside of the two probe clamps 11; wherein the inner wall side of the memory metal strip is fixed to the outer wall of the probe clamp 11 by pasting, welding or various forms such as a card slot, and the cross-section of the memory metal piece 4 can be a hexagon (such as Figure 3 As shown), similar rectangles (such as Figure 4 The probe clamps 11 may be in various shapes such as round or circular, and the number of the probe clamps 11 may be set to three or more. The probe clamps 11 are symmetrically or evenly distributed on the test probe 1 to ensure that the force applied to the probe clamps 11 when clamping the support column 22 is uniform.

[0038] It can be seen that the memory metal piece 4 can be set as a ring structure outside the probe clamp 11, or it can be directly set between the probe clamps 11, such as Figure 5 and Figure 6As described above, when two probe jaws 11 are provided, the memory metal member 4 can be a strip-shaped structure connected between the two probe jaws 11; wherein, the two ends of the memory metal member 4 are respectively fixedly connected to the inner side walls of the two probe jaws 11, and the fixing method can also be various methods such as gluing, slotting, or welding. When the strip-shaped memory metal member 4 contracts under preset conditions, it will drive the two probe jaws 11 to clamp the support column 22. Similarly, when three probe jaws 11 are provided, the strip-shaped memory metal member 4 can be a "Y"-shaped structure; when four probe jaws 11 are provided, the strip-shaped memory metal member 4 can be a "cross"-shaped structure, etc.

[0039] In a specific embodiment of the present invention, in order to prevent the probe clamp 11 from colliding with the solder cap 21 when contacting the support column 22, a horizontally extending contoured contact portion 12 can be provided at the end of each probe clamp 11. The shape of the contoured contact portion 12 can be adapted according to the outer shape of the support column 22. During the test, the support column 22 is clamped by the contoured contact portion 12, while avoiding the solder cap 21 on the support column 22, thereby ensuring the appearance integrity of the solder cap 21.

[0040] Furthermore, since the probe clamp 11 has two different states of open or clamped, in order to prevent collision or interference between adjacent probe clamps 11, isolation limit columns 3 can be set on both sides of the test probe 1 or between two adjacent test probes 1. The distance between the isolation limit columns 3 is not less than the maximum distance between the probe clamps 11 in the open state, thereby isolating and limiting each test probe 1.

[0041] In the chip contact test device of the present invention, the preset conditions can be set as temperature conditions, so that the memory metal is in different shapes at different temperatures, thereby completing the connection or disconnection of the test probe 1 and the metal bump; wherein, within the first preset temperature range, the memory metal part 4 does not apply external force to the probe clamp 11, and the probe clamp 11 is open at this time. At this time, the test probe 1 or the chip to be tested can be driven to move by the driving device until the probe clamp 11 moves to the outside of the support column 22, so that the entire metal bump is located between the probe clamp 11; the external ambient temperature is changed so that within the second preset temperature range, the memory metal part 4 drives the probe clamp 11 to retract and clamp the support column 22, and the solder cap 21 at this time avoids the inside of the test probe 1, thereby effectively protecting the solder cap 21 structure when the metal bump is in contact and conductive with the test probe 1.

[0042] The temperature range and shape types of memory metals can be diversified through material design and processing technology. The types of memory metal materials may include:

[0043] 1. Low-temperature range materials: able to operate in a temperature range as low as -100°C. For example, copper-based alloys (such as Cu-Zn-Al) can exhibit good shape memory effects in low-temperature environments;

[0044] 2. Materials in the normal temperature range: For example, nickel-titanium alloy (Nitinol) usually exhibits the best shape memory effect between -50°C and 100°C;

[0045] 3. High temperature range: NiTi alloys with the addition of hafnium (Hf) or aluminum (Al) can increase the phase transition temperature to 200°C or even higher. For example, the phase transition temperature of Ni-Ti-Hf alloy can reach 200°C to 400°C;

[0046] 4. Ultra-high temperature range: Iron-based alloys (such as Fe-Mn-Si) also exhibit shape memory effect in the temperature range of 200°C to 400°C. Such materials can be used in extremely high temperature environments.

[0047] In a specific embodiment of the present invention, the memory metal part adopts a metal material within the normal temperature range (for example, nickel-titanium alloy), and the first preset temperature can be set to 0-70°C; the range of the second preset temperature is greater than 70°C, and the first preset temperature can also be preferably set to normal temperature, for example, 0-40°C, which can ensure that the probe clamp 11 is in an open state under normal temperature, and the size of the open end after opening is larger than the maximum size of the metal bump, so that the metal bump can penetrate into the interior of the test probe 1. During the test, the memory metal part 4 is heated or the ambient temperature is changed so that the ambient temperature reaches the second preset temperature range required for the deformation of the memory metal part 4. At this time, the memory metal part 4 drives the probe clamp 11 to shrink inward and deform until it fits with the support column 22.

[0048] In addition, the test probe 1 can be connected to the external test system through the PCB, and the chip to be tested can be tested through the test system. In other words, the test probe 1 can be fixed on the PCB through the probe bracket. During the test process, the external test system is connected to the test probe 1 through the PCB. Under special needs, an adapter board can also be set, that is, the test probe is connected to the PCB through the adapter board, and the PCB is connected to the external test system, thereby realizing the transmission of the test signal.

[0049] In another specific embodiment of the present invention, in order to ensure the position accuracy between the test probe 1 and the metal bump, a first positioning mechanism can be set on the chip protection layer, and a second positioning mechanism can be set on the test probe 1 or the probe bracket. During the test process, the test probe 1 and the metal bump are positioned by the cooperation of the first positioning mechanism and the second positioning mechanism, and the support column 22 is kept as close to the center of the probe clamp 11 as possible. When the probe clamp 11 is affected by the memory metal part 4 and deformed inward and contacts the support column 22, the solder cap 21 is kept between the probe clamps 11.

[0050] In another specific embodiment of the present invention, the test probes 1 are arranged in an array according to the location of the metal bumps to be tested, and the adjacent horizontal test probes 1 are arranged in a staggered manner, such as Figures 7 to 10 As shown, independent detection of multiple metal bumps can be achieved at one time, and the detection results of each test probe 1 can be recorded separately by serial number, etc. The consistency and integrity of the test probe 1 array are stronger, the manufacturing process difficulty is reduced, and it can be applied to scenarios where there are a large number of test points in the chip to be detected.

[0051] The testing process of the chip contact testing device using the embodiment of the utility model includes: first, after moving the test probe to the top of the chip to be tested, controlling the test probe to descend or the chip to be tested to rise until the end of the probe clamp is located on the outside of the support column; second, controlling the probe clamp to contact and conduct with the support column when preset conditions are met, and sending a test signal to the chip to be tested through the probe clamp, so as to test the chip to be tested through the test signal.

[0052] Specifically, when using the chip contact test device to test the chip to be tested, the test probe is first moved by the driving device to the top of the metal bump on the chip to be tested, and the end of the probe clamp of the test probe is controlled to drop to the outside of the support column; then, when the probe clamp is in the open state, the test probe is controlled to move downward until the end of the probe clamp is located outside the support column; then, the test probe is controlled to be within a second preset temperature range. Due to the characteristics of the memory metal part, the open end of the probe clamp will be forced to shrink inward and contact and conduct with the support column. Finally, the external test system completes the relevant performance testing of the chip through the test probe.

[0053] According to the chip contact testing device of the utility model described above, the test probe is set to at least two probe clamps and a memory metal part arranged on the probe clamps, so that the probe clamps can open or contract under the action of the memory metal part, so that the probe clamps can contact and conduct with the support column when the preset conditions are met, thereby realizing signal transmission between the test probe and the chip to be tested through the support column, which can effectively ensure the integrity of the solder cap and avoid affecting the chip performance and service life due to damage to the solder cap.

[0054] The chip contact test device according to the present invention has been described above by way of example with reference to the accompanying drawings. However, those skilled in the art will appreciate that various improvements may be made to the chip contact test device proposed above without departing from the scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the contents of the appended claims.

Claims

1. A chip contact testing device, characterized in that: include: A probe holder and a test probe arranged on the probe holder; wherein, The metal bumps of the chip to be tested include support pillars and solder caps located at the ends of the support pillars; The test probe includes at least two probe clamps and a memory metal piece arranged on the probe clamps; and, In an initial state, the probe clamp is in an open state, and the size of the opening clamped by the probe is larger than the size of the solder cap; Under preset conditions, the memory metal piece contracts and drives the probe clamp to contact and conduct with the support column, and the chip to be tested and the test probe realize signal transmission through the support column.

2. The chip contact testing device according to claim 1, characterized in that: The probe clamps are provided with two pieces, and the memory metal piece is a ring-shaped structure sleeved on the outside of the two probe clamps; wherein, The inner wall side of the memory metal piece is fixed to the outer wall of the probe clamping claw by pasting or welding.

3. The chip contact testing device according to claim 1 or 2, characterized in that: The cross section of the memory metal piece is rectangular, hexagonal or circular.

4. The chip contact testing device according to claim 1, wherein: The probe clamps are provided with two, and the memory metal piece is a strip structure connected between the two probe clamps; wherein, The two ends of the memory metal piece are respectively fixedly connected to the inner side walls of the two probe clamping claws.

5. The chip contact testing device according to claim 1, characterized in that: A contoured contact portion is provided at the end of the probe clamping jaw; The contoured contact portion is adapted to the outer shape of the support column.

6. The chip contact testing device according to claim 1, characterized in that: The probe bracket is also provided with an isolation limiting column located between two adjacent test probes.

7. The chip contact testing device according to claim 1, characterized in that: The probe clamp is provided with three jaws; The memory metal piece is a ring-shaped structure sleeved on the outside of the three probe clamps; or, the memory metal piece is a "Y"-shaped structure connected to the inside of the three probe clamps.

8. The chip contact testing device according to claim 1, characterized in that: The cross section of the test probe is a rectangular or circular structure.

9. The chip contact testing device according to claim 1, characterized in that: The probe clamping jaws are symmetrically or evenly distributed on the test probe.