Microporous irregular fluctuating semiconductor substrate

Abstract

The utility model discloses a microporous irregular fluctuating semiconductor substrate, which comprises a substrate body, the substrate body comprises a top surface, a bottom surface and side surfaces, the top surface and the bottom surface are irregular fluctuating surfaces, and the substrate body is provided with a plurality of micropores communicated with the top surface and the bottom surface. Particularly, the fluctuating root mean square value of the irregular fluctuating surface is not less than 10 nanometers, the equivalent diameter of the micropores is between 1 micrometer and 100 micrometers, and the hole pitch of the micropores is between 1 micrometer and 100 micrometers. According to the utility model, the maximum utilization of the active surface area can be realized, the mass transfer effect is effectively promoted, the reaction activity of the surface in the semiconductor deposition process is improved, and the resistance of a semiconductor device to oxidation erosion is improved.

Description

TECHNICAL FIELD

[0001] The utility model belongs to the technical field of semiconductor processing, especially relates to the multiple micropore irregular undulation semiconductor substrate. BACKGROUND

[0002] A semiconductor substrate is a substrate used to support and carry semiconductor materials. It provides structural support and stable physical properties for the manufacture and application of semiconductor devices. In the preparation process of semiconductors, the substrate plays a crucial role, and it is the basis of the entire semiconductor device, on which epitaxial growth, doping, etching and other processes will be carried out to manufacture semiconductor elements such as transistors and diodes. Because of its good stability, it is used to carry and support semiconductor materials, and provides the required structural support and physical properties for semiconductor devices. The substrate is usually designed to have a highly complete and smooth surface plane structure.

[0003] The Chinese utility model patent with publication number CN214625048U discloses a semiconductor substrate, which has a surface with a groove containing an inner bottom surface and an inner wall surface. The inner wall surface has a recess with a depth from the direction of the surface along the inner wall surface to the width direction of the groove. The semiconductor substrate is exposed at the inner wall surface. In addition, the inner wall surface of the semiconductor substrate of the embodiment has a plurality of recesses, which are arranged at intervals along the depth direction of the groove or the inner circumference of the groove. In addition, the semiconductor substrate of the embodiment also has a semiconductor layer, which is arranged on a part of the surface and extends along the inner wall surface. In addition, the semiconductor substrate of the embodiment also has a second surface, which is arranged on the opposite side of the surface and has at least one second groove containing a second inner wall surface. In addition, the semiconductor substrate of the embodiment is a silicon wafer, a silicon carbide wafer, a glass wafer, a quartz wafer, a sapphire wafer or a compound semiconductor wafer.

[0004] However, the plane structure with high integrity and smooth surface, as well as the groove design of the above-mentioned scheme, has become an obstacle to limiting the efficiency of the mass transfer process, which further affects the overall performance of the semiconductor reaction. More disadvantageously, it can also cause the semiconductor to be easily oxidized, making it difficult to store for a long time in a natural environment, increasing the challenge in actual application. UTILITY MODEL CONTENTS

[0005] The utility model provides multiple micropore irregular undulation semiconductor substrate, aims at solving the problem of substrate affecting semiconductor reaction efficiency and semiconductor being easily oxidized in the prior art.

[0006] To solve the above technical problems, the utility model discloses a substrate includes substrate body, the substrate body includes top surface, bottom surface and side, the top surface and bottom surface are irregular undulating surface, be provided with a plurality of intercommunication top surface and the micro -hole of bottom surface on the substrate body.

[0007] Preferably, the shape of the top surface is one of a circle, a square and a rectangle, and the bottom surface has the same shape as the top surface.

[0008] Preferably, the substrate body is sintered from ceramic powder, and the ceramic powder has a specification of 200 mesh or 3000 mesh.

[0009] Preferably, the substrate body is sintered from 200 mesh nickel powder.

[0010] Preferably, the irregular undulating surface has a root mean square value of undulation of no less than 10 nanometers.

[0011] Preferably, the micro-holes have an equivalent diameter of between 1 micrometer and 100 micrometers.

[0012] Preferably, the micro-holes have a hole spacing of between 1 micrometer and 100 micrometers.

[0013] Preferably, the micro-holes have an opening rate of between 10% and 90%.

[0014] Preferably, the micro-holes are arranged in a row-column, network or honeycomb structure.

[0015] Compared with the prior art, the utility model has the following technical effects:

[0016] 1. The micro-hole structure design of the substrate enables the water solution to effectively penetrate, and this process ensures that the water solution can fully contact the interface between the semiconductor material deposited on the substrate and the substrate. Through this penetration, the semiconductor active surface area accessible to the water solution is greatly promoted, thereby achieving maximum utilization of the active surface area and effectively promoting mass transfer.

[0017] 2. Due to the existence of the micro-hole structure and the undulating characteristics of the substrate surface itself, in the process of depositing the semiconductor material on the top surface of the substrate, the small geometry causes the deposited film to exhibit a discontinuous phenomenon. This discontinuity not only exists in the physical structure of the film, but also deeply affects its chemical and physical properties. Specifically, the discontinuous part of the film becomes a large number of active sites, which greatly improves the surface reactivity. Therefore, the combined action of the micro-holes and the surface undulation not only enriches the microstructure of the film, but also promotes the formation of a surface with high reactivity.

[0018] 3.The substrate has micropores and irregular undulations on the surface of the substrate, which jointly act on the deposition process of the semiconductor material, resulting in a unique discontinuous structure of the semiconductor film deposited thereon.The structure is characterized by being covered with small and complex geometric shapes, especially sharp point regions.In a natural environment, due to the exposure of these sharp points to the air, they will be oxidized to a certain extent, and then a layer of pre-oxidation film will be spontaneously formed in these key areas.The existence of this pre-oxidation film, like a protective barrier, significantly improves the resistance of the semiconductor device to oxidation erosion, effectively prolonging its service life.This natural oxidation process further enhances the stability and reliability of the semiconductor device while retaining its original performance. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 is a structural schematic view of the substrate body of the utility model;

[0020] Figure 2 is an enlarged structural schematic view of the top surface or bottom surface of the utility model.

[0021] Reference signs: 1, top surface; 2, side surface; 3, micropore; 4, undulating structure. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical scheme and advantages of the utility model clearer, the technical scheme of the utility model will be described clearly and completely in combination with specific embodiments of the present application and with reference to the drawings.

[0023] The embodiment is a multi-micropore irregular undulation semiconductor substrate, which comprises a substrate body, as shown in Figure 1 The substrate body comprises a top surface 1, a bottom surface and a side surface 2, the top surface 1 and the bottom surface are irregular undulating surfaces, and the substrate body is provided with a plurality of micropores 3 communicating the top surface 1 and the bottom surface.

[0024] The shape of the top surface 1 is one of a circle, a square and a rectangle, and the shape of the bottom surface is the same as that of the top surface 1. Figure 1 This is an example of a circular top surface 1 of the embodiment, and the top surface 1 and the bottom surface are circular, and together with the side surface 2, they constitute a cylindrical substrate shape.Those skilled in the art can understand that the top surface 1 and the bottom surface are only representations of the opposite two surfaces of the substrate, and are not specific position limitations.

[0025] The substrate body is sintered from ceramic powder (the composition is alumina) or metal powder.Further, the ceramic powder specification is 200-mesh powder or 3000-mesh yarn, and the metal powder is preferably 200-mesh nickel powder.

[0026] The irregular undulating surface is as shown in Figure 2As shown, the irregular surface is provided with micro-holes 3 and undulating structures 4, wherein the root mean square of the undulating structures 4 on the irregular surface is not less than 10 nanometers.

[0027] The micro-holes 3 are arranged in a row-column, net or honeycomb structure, as shown in the figure. Figure 2 As shown, the equivalent diameter of the micro-holes 3 is between 1 micrometer and 100 micrometers, the hole spacing is between 1 micrometer and 100 micrometers, and the opening rate is between 10% and 90%.

[0028] The micro-holes 3 are arranged in a row-column, net or honeycomb structure, as shown in the figure. Figure 2 As shown, the micro-holes 3 are arranged in a row-column structure.

[0029] The micro-hole structure of the substrate enables the aqueous solution to effectively penetrate, which ensures that the aqueous solution can fully contact the interface between the semiconductor material deposited on the substrate and the substrate. Through the penetration, the semiconductor active surface area accessible to the aqueous solution is greatly promoted, thereby achieving the maximum utilization of the active surface area and effectively promoting the mass transfer.

[0030] In addition, due to the existence of the micro-hole structure and the undulating characteristics of the substrate surface itself, the small geometry during the deposition of the semiconductor material on the top surface of the substrate causes the deposited thin film to exhibit a discontinuous phenomenon. This discontinuity not only exists in the physical structure of the thin film, but also deeply affects its chemical and physical properties. Specifically, the discontinuous part of the thin film becomes a large number of active sites, which greatly improves the surface reactivity. Therefore, the combination of the micro-holes and the surface undulation not only enriches the microstructure of the thin film, but also promotes the formation of a surface with high reactivity.

[0031] The micro-holes and the irregular micro-undulations of the substrate surface jointly act on the deposition process of the semiconductor material, causing the semiconductor thin film deposited thereon to exhibit a unique discontinuous structure. The structure is characterized by a surface covered with small and complex geometries, especially sharp point regions. In a natural environment, due to the exposure of these sharp points to the air, they will be oxidized to a certain extent, and a pre-oxidation film will spontaneously form at these critical regions. The existence of this pre-oxidation film, like a protective barrier, significantly improves the resistance of the semiconductor device to oxidation corrosion, effectively prolonging its service life. This natural oxidation process not only preserves the original performance of the semiconductor device, but also further enhances its stability and reliability.

[0032] The above is only a preferred embodiment of the present application, and it should be pointed out that for ordinary skilled persons in the art, without departing from the creative concept of the present application, a number of modifications and improvements can be made, which are all within the protection scope of the present application.

Claims

1. A microporous irregularly contoured semiconductor substrate comprising a substrate body, said substrate body comprising a top surface, a bottom surface and side surfaces, characterized by, The top surface and the bottom surface are irregular surfaces, and the substrate body is provided with a plurality of micro-holes communicating with the top surface and the bottom surface.

2. The microporous irregularly corrugated semiconductor substrate of claim 1, wherein, The top surface is in one of a circular shape, a square shape and a rectangular shape, and the bottom surface has the same shape as the top surface.

3. The microporous irregularly corrugated semiconductor substrate of claim 1, wherein, The substrate body is sintered from ceramic powder, and the ceramic powder has a specification of 200 mesh or 3000 mesh.

4. The microporous irregularly corrugated semiconductor substrate of claim 1, wherein The substrate body is sintered from 200 mesh nickel powder.

5. The microporous irregularly corrugated semiconductor substrate of claim 1, wherein, The irregular surface has a root mean square value of fluctuation of not less than 10 nanometers.

6. The microporous irregularly corrugated semiconductor substrate of claim 1, wherein, The micro-holes have an equivalent diameter of between 1 micrometer and 100 micrometers.

7. The microporous irregularly corrugated semiconductor substrate of claim 1 or 6, wherein, The micro-holes have a hole spacing of between 1 micrometer and 100 micrometers.

8. The microporous irregularly corrugated semiconductor substrate of claim 7, wherein, The micro-holes have an opening rate of between 10% and 90%.

9. The microporous irregularly corrugated semiconductor substrate of claim 6, wherein, The micro-holes are arranged in a row-column, mesh or honeycomb structure.

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