WAVE SUSPENSION IN SWITCHING VOLTAGE CONVERTERS

Abstract

A voltage converter circuit comprises a switching voltage converter and a ripple suppression circuit. The switching voltage converter includes a first switching device with a first terminal coupled to a first power supply terminal, and a second switching device with a first terminal coupled to a second terminal of the first switching device, and a second terminal coupled to a second power supply terminal.The ripple suppression circuit includes an operational amplifier with a non-inverting input coupled to a load terminal; a first resistor coupled between the output of the operational amplifier and an inverting input of the operational amplifier; a second resistor coupled between the second terminal of the first switching device and the inverting input of the operational amplifier; a first capacitor coupled in parallel with the first resistor; and a third resistor coupled between the output of the operational amplifier and the load terminal.

Description

BACKGROUND

[0001] This document concerns voltage converter circuits and in particular switching DC-DC "buck" or step-down converter circuits.

[0002] A voltage converter is an electrical power converter that changes an input voltage from an electrical power source to a different voltage level. Types of direct current (DC) voltage converters include linear power amplifiers and switched-mode voltage converters.

[0003] Linear power amplifiers are capable of generating stable and precise output voltages even at relatively high output current levels. These capabilities favor their use in precision electronic equipment. However, this precision and high output power come at the cost of high power dissipation, necessitating significant heat dissipation or cooling capabilities in some system applications. For example, excessive power dissipation is a particularly pressing concern in automated test equipment (ATE), which may require multiple voltage converters on the same circuit board to supply different voltages and currents to individual pins of the device under test.

[0004] Switching voltage converters, such as buck converters, are significantly more power-efficient than linear amplifiers. A buck converter is a class of switching power supply that periodically switches a current applied to a storage element, such as an inductor or capacitor, producing an output voltage that is stepped down from the input voltage. However, the periodic switching of current to the storage element causes ripple in the output voltage. Significant ripple can preclude the use of switching converters in systems requiring precise output voltages, especially at high output currents. SUMMARY

[0005] According to an example, a circuit includes the following: a first switching device with a first terminal coupled to a first power supply terminal and a control terminal; a second switching device with a first terminal coupled to a second terminal of the first switching device and a second terminal coupled to a second power supply terminal; a first operational amplifier with a non-inverting input coupled to a load terminal; a first resistor with a first terminal coupled to an output of the first operational amplifier and a second terminal coupled to an inverting input of the first operational amplifier;a second resistor with a first terminal coupled to the second terminal of the first switching device and a second terminal coupled to the inverting input of the first operational amplifier; a first capacitor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the inverting input of the first operational amplifier; and a third resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the load terminal.

[0006] According to another example, a voltage converter circuit includes a switching voltage converter that can switch a current at an output terminal in response to a voltage at a load terminal, and a ripple suppression circuit with inputs coupled to the output terminal and the load terminal, and an output coupled to the output terminal. The ripple suppression circuit outputs a suppression current equal to the integration of the difference between the voltage at the load terminal and a voltage at the output terminal.

[0007] According to another example, a circuit includes a linear power amplifier, a voltage converter, and a control loop circuit. The voltage converter includes the following: a first operational amplifier with a non-inverting input coupled to a load terminal; a first resistor with a first terminal coupled to an output of the first operational amplifier and a second terminal coupled to an inverting input of the first operational amplifier; a second resistor with a first terminal coupled to the voltage converter output and a second terminal coupled to the inverting input of the first operational amplifier; a first capacitor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the inverting input of the first operational amplifier;and a third resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the load terminal.

[0008] Exemplary technical advantages enabled by one or more of these examples include a significant reduction in the output ripple of switching voltage converters without requiring increases in the size of a power inductor or filter capacitor, or an increase in the switching frequency. The described examples can also be implemented on a single chip using the voltage converter circuit arrangement.

[0009] Other exemplary technical advantages made possible by this description are apparent to a person of average skill by reference to the following description together with its drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a circuit diagram, in block form and schematic form, of an exemplary switching DC-DC voltage converter. Fig. 2A is a circuit diagram, in schematic form, illustrating a ripple current in a switching DC-DC voltage converter. Fig. 2B is a circuit diagram, in schematic form, showing the suppression of a ripple current in the exemplary switching DC-DC voltage converter. Fig. 1 illustrates. Fig. Figure 3 is a schematic circuit diagram of an exemplary ripple suppression circuit in which the voltage converter consists of Fig. 1. Fig. Figure 4 is a schematic circuit diagram of an exemplary operational amplifier (Op.-Verst.) in the ripple suppression circuit consisting of Fig. 3. Fig. Figure 5 is a schematic circuit diagram of another exemplary ripple suppression circuit in which the voltage converter is made of Fig. 1. Fig. Figure 6 is a schematic circuit diagram of another exemplary ripple suppression circuit in the voltage converter made of Fig. 1. Fig. Figure 7 is a waveform diagram that shows an example of the operation of the voltage converter. Fig. 1 including the ripple suppression circuit Fig. 6 illustrates. Fig. Figure 8 is a schematic diagram of an exemplary multi-phase switching DC-DC voltage converter including an exemplary ripple suppression circuit. Fig. Figure 9 is a circuit diagram, in block form, of an exemplary device power supply including the voltage converter. Fig. 1. Fig. Figure 10 is a flowchart illustrating an exemplary procedure for suppressing ripple in a switching DC-DC voltage converter.

[0010] The same reference numerals or other reference symbols are used in the drawings to illustrate the same or similar features (with regard to function and / or structure). DETAILED DESCRIPTION

[0011] Fig. Figure 1 illustrates an exemplary switching DC-DC voltage converter 100. The voltage converter 100 includes switching devices 102, 104, a control circuit arrangement 110, and a ripple suppression circuit 120. The control circuit arrangement 110 includes a gate driver 112, a control logic 114, a pulse width modulation (PWM) circuit 115, an error amplifier 116, and a loop filter 118. In the example from Fig. 1 is the voltage converter 100 implemented in combination with an inductor 130, a filter capacitor 134 and a load 135.

[0012] In the example from Fig. In Figure 1, switching device 102 is implemented as a p-channel metal-oxide-semiconductor (PMOS) transistor with one terminal (e.g., its source) coupled to a power supply terminal PVIN and another terminal (e.g., its drain) coupled to a terminal SW of voltage converter 100. Switching device 104 is implemented as an n-channel metal-oxide-semiconductor (NMOS) transistor with one terminal (e.g., its source) coupled to a power supply terminal PGND and another terminal (e.g., its drain) coupled to switching device 102 (e.g., its drain) at a voltage converter terminal SW. In unipolar implementations, the voltage converter 100 can be powered from a positive supply voltage at the power supply terminal PVIN with a common potential (e.g. system or circuit ground) at the power supply terminal PGND.In bipolar implementations, the voltage converter 100 can be powered by a positive supply voltage at the power supply terminal PVIN and a negative voltage (e.g., relative to system or circuit ground) at the power supply terminal PGND. The switching devices 102 and 104 each have a control terminal (e.g., a gate) that is coupled to corresponding outputs of the gate drivers 112.

[0013] As an alternative to implementing the switching devices 102 and 104 as a PMOS transistor and an NMOS transistor, as in Fig. As shown in Figure 1, one of the switching devices 102 and 104 is implemented as a diode. For example, switching device 104 is replaced by a diode with its cathode at the SW terminal and its anode at the power supply terminal PGND. In such an implementation, only switching device 102 will have a control terminal (e.g., gate) that is coupled to an output of the gate driver 112.

[0014] The gate drivers 112 control the control terminals of the switching devices 102 and 104 in this example in response to control signals received by the control logic 114. The control logic 114 in this example has one input coupled to a pulse-width modulated (PWM) circuit 115. In this example, the PWM circuit 115 generates a periodic signal, such as a sawtooth or ramp signal, at a selected switching frequency. The control logic 114 has another input coupled to the output of the error amplifier 116. The error amplifier 116 has one input coupled to a voltage converter terminal VSET. The loop filter 118 has one input coupled to a feedback terminal FB and one output coupled to a second input of the error amplifier 116.

[0015] In this example, the feedback terminal FB is coupled to the terminal LAST at load 135. The terminal VSET receives a signal corresponding to a selected output voltage (e.g., setpoint voltage) at load 135. Alternatively, the setpoint voltage is loaded from a data interface, stored in a memory location, or in a register within the voltage converter 100. In either case, the error amplifier 116 generates an output signal corresponding to the difference between the voltage at the terminal LAST, as filtered by the loop filter 118, and the setpoint voltage (e.g., at the terminal VSET). The output signal from the error amplifier 116 determines the duty cycle at which the switching devices 102 and 104 are turned on within each cycle of the periodic sawtooth waveform from the PWM circuit 115.

[0016] Alternatively or additionally (e.g. in response to a mode selection input), the control logic 114 controls the gate drivers 112 to switch the switching devices 102 and 104 on and off according to a pulse frequency modulation (PFM), wherein the on and off pulses have a constant width but vary in frequency in response to the output of the error amplifier 116.

[0017] As in Fig. As shown in Figure 1, the inductor 130 has one terminal coupled to terminal SW and another terminal coupled to a terminal of the filter capacitor 134 at terminal LAST. The filter capacitor 134 has a second terminal coupled to a common terminal (e.g., circuit or system ground). When used in system mode, the load 135 is coupled to terminal LAST, which has an impedance Z. L presented.

[0018] Fig. Figure 2A illustrates the general operation of a switching buck converter 100. In this generalized illustration, the switching device 102 and 104 receive power supply voltages V CC or V EE In this example, the power supply voltage is V CC higher (e.g. above a ground level) than the power supply voltage V EE (e.g. below a mass level).

[0019] In a first phase within each of a sequence of clock cycles, the switching device 102 is closed while the switching device 104 is opened, applying a voltage V CC A current is applied to the inductor 130 at terminal SW. The inductor 130 conducts an increasing current I. L in the direction from connection SW to load 135. The rate of change of current I Ldepends on the inductance value of inductor 130 and the voltage difference between terminals SW and LAST. In a second step, switching device 104 is closed while switching device 102 is opened, applying a negative voltage V. EE a current I is applied to the inductance 130 at terminal SW. This causes a current I to flow. L The voltage across inductance 130 decreases at a rate of change that depends on the inductance value of inductance 130 and the voltage difference between terminals SW and LAST. This two-phase operation continues at the switching frequency of the voltage converter. The resulting voltage across load 135 (e.g., at terminal LAST) depends on the relative duty cycles of switching devices 102 and 104.

[0020] In the alternative case, where, for example, the switching device 104 is implemented as a diode, the switching device 104 is reverse-biased when the switching device 102 is open, because the inductance current I L cannot change instantly, which forces a negative voltage at the SW connector.

[0021] In a steady state, the switching operation of the switching devices 102 and 104 causes the inductance current I to L within each cycle it increases and decreases, resulting in a "ripple" around the average load current I Last around, which is delivered to load 135, as in Fig. 1A is shown. The magnitude of this ripple current depends on the input voltages (e.g., V). CC and V EE), the output voltage VBUCK at terminal LAST, the magnitude of the inductance 130, the relative duty cycles of the switching devices 102 and 104, and the switching frequency. For example, the peak-to-peak amplitude ΔI L of the ripple current expressed as: ΔIL=VCC−VBUCKL⋅D⋅T=VEE−VBUCKL⋅(1−D)⋅T where D is the duty cycle of the switching device 102 and T is the switching period. The ripple current is integrated into the capacitor 134 and results in a ripple in the output voltage at the LAST terminal. ΔVBUCK=T⋅ΔIL8⋅C134 where C 134 The capacitance of the filter capacitor 134 is assumed to be zero, as is its effective series resistance (ESR). A non-zero ESR of the filter capacitor 134 further worsens the output voltage ripple.

[0022] Switching voltage converters consume significantly less power than alternative power converter topologies, such as linear power amplifiers. Therefore, switching converters are attractive for use in system applications where power consumption or heat dissipation is critical. One example of such an application is modern automated test equipment, where there is a power converter for each of an ever-increasing number of channels. However, such equipment also requires the power converter to provide high currents (e.g., on the order of amperes) at precise DC voltages. The inherent ripple of switching power converters, as previously discussed in relation to... Fig. As described in section 2A, the use of linear power amplifiers in such precision applications has previously been favored despite the high power consumption.

[0023] The ripple at the output of the switching voltage converter from Fig. The 2A current can be reduced by increasing the inductance value of inductor 130 and the capacitance of filter capacitor 134, at the cost of higher component costs, increased PCB space, and poorer load transient performance. Ripple can also be reduced by increasing the switching frequency of the switching voltage converter, but at the cost of higher switching losses. Higher switching frequencies also reduce the maximum duty cycle due to the fraction of each cycle consumed by rise and fall times, thus limiting the achievable output dynamic range.

[0024] Another approach to reducing output ripple is to use a multiphase converter, where a load current is driven through several 130 Ω inductors coupled in parallel and operated in a time-entangled manner. The parallel inductors effectively appear to the load as a small overall inductance value, reducing load transients. However, multiphase converters require a significantly larger PCB area and also necessitate a separate external connection (e.g., a pin) for each phase.

[0025] The examples described arise within this context.

[0026] Fig. Section 2B illustrates the theory of operating the exemplary voltage converters described in this document. The in Fig. The switching step-down voltage converter shown in 2B corresponds to the one from Fig. 2A, with an additional ripple suppression current source 120, which provides a current I WelligkeitThe LAST connection delivers a current. In this architecture, the ripple suppression current I is located. Welligkeit in opposite phase to the ripple in the inductance current I L , with the same peak-to-peak amplitude. Ideally, the ripple suppression current I exhibits Welligkeit an average (e.g., DC) value of ~0A to avoid additional DC power consumption. Because the inductance current I L and the ripple suppression current I Welligkeit When summed at the LAST terminal, the resulting ripple in the output voltage is greatly reduced at load 135.

[0027] With reference to Fig. 1 The ripple suppression circuit 120 is provided in the exemplary voltage transformer 100 to provide such a ripple suppression current I Welligkeitto provide. In this example, the ripple suppression circuit 120 has one input coupled to the feedback terminal FB and one input coupled to the SW terminal. The ripple suppression circuit 120 has one output coupled to the feedback terminal FB, which in this example is connected to the load 35 at the LAST terminal.

[0028] Fig. Figure 3 illustrates a ripple suppression circuit 320 as an example of the ripple suppression circuit 120 from Fig. 1 in combination with the switching devices 102, 104, the control circuit arrangement 110, the inductor 130 (with an effective series resistance 132), the filter capacitor 134 and the load 135. The ripple suppression circuit 320 in this example includes an operational amplifier (op-amplifier) ​​330, resistors 332, 336, 338 and a capacitor 334.

[0029] The switching devices 102, 104, the control circuit arrangement 110, the inductor 130 (with effective series resistance 132), the filter capacitor 134 and the load 135 are connected within the voltage transformer 100 to the previously described components. Fig. connected in the manner described above. Fig. Figure 3 illustrates the parasitic resistance or effective series resistance (ESR) of the inductor 130 in the form of the resistor 132, which is connected in series with the inductor 130 between terminal SW and terminal LAST.

[0030] In the exemplary ripple suppression circuit 320 from Fig. In diagram 3, resistor 338 has one terminal connected to terminal SW and a second terminal connected to the inverting input of operational amplifier 330. The non-inverting input of operational amplifier 330 is connected to terminal LAST at load 135. In the implementation from Fig. 1. The non-inverting input of operational amplifier 330 can be coupled to the feedback terminal FB, which in turn is coupled to the terminal LAST. The voltage VBUCK is accordingly received at the non-inverting input of operational amplifier 330. Resistor 336 has one terminal coupled to the inverting input of operational amplifier 330 and another terminal coupled to the output of operational amplifier 330. Similarly, capacitor 334 has one terminal coupled to the inverting input of operational amplifier 330 and another terminal coupled to the output of operational amplifier 330, in parallel with resistor 336. In this example, resistors 336 and 338 have the same resistance value R. Therefore, operational amplifier 330 is implemented as a unit gain integrator.The resistor 332 has one terminal coupled to the output of the operational amplifier 330 and another terminal coupled to the LAST terminal.

[0031] Fig. Figure 4 illustrates an example of the operational amplifier 330 in more detail. In this example, the operational amplifier 330 includes a differential input stage 410, a current mirror stage 420, and an output stage 440. The differential input stage 410 includes PMOS transistors 401, 402, 403, 411, 412, and 413, NMOS transistors 404 and 414, and resistors 405 and 415. The current mirror stage 420 includes PMOS transistors 422, 423, 432, 433, and 438, and NMOS transistors 424, 425, 434, and 435. The output stage includes PMOS transistors 444 and 442.

[0032] In high-voltage implementations of the voltage converter 100, for example with input voltages up to the order of + / - 10 V, some of the transistors of the operational amplifier 330 are designed according to high-voltage technologies. For example, with reference to Fig. 4. The PMOS transistors 401, 403, 411, 413, 423, 424, 433, 434, and 444 may be designed as drain-extended (DE) MOS transistors, and the NMOS transistors 436 and 442 may be designed as lightly-doped-drain (LD) MOS transistors. The other transistors are designed as "low-voltage" transistors, for example, with a similar design to logic circuit transistors in the same integrated circuit as the voltage converter 100.

[0033] In the operational amplifier 330 according to the example from Fig. 4 has the differential input stage 410 inputs VIP, VIM, which correspond to the non-inverting and inverting inputs of the operational amplifier 330 in the arrangement of Fig. 3. The differential input stage 410 has outputs VOP1 and VOM, which present a differential output voltage at corresponding inputs of the current mirror stage 420. The current mirror stage 420 has two outputs: one coupled to the gate of the NMOS transistor 442 of the output stage 440, and the other coupled to the gate of the PMOS transistor 444 of the output stage 440. In this example, the output stage 440 has an unbalanced output at which the voltage VAMP appears during operation.

[0034] In operation of the ripple suppression circuit 320 in Fig. 3. The operational amplifier 330 receives a voltage VBUCK from the LAST terminal at its non-inverting input and a voltage VSW from the SW terminal at its inverting input. Considering the operational amplifier 330 as a unit gain integrator, the voltage VAMP at the output of the operational amplifier 330 can be expressed as: VAMP=−(VSW−VBUCK)(1+RCs)+VBUCK where R is the resistance value of resistors 336 and 338, C is the capacitance of capacitor 334, and s is the Laplace operator. The operational amplifier 330 outputs a current I. Welligkeit from, which can be expressed as: Iripple=VAMP−VBUCKR332=−(VSW−VBUCK)1+RCs⋅1R332 where R 332 The resistance value of resistor 332 is given. The voltage difference -(VSW-VBUCK) is also the voltage across inductance 130. Accordingly, the current I can be calculated. Welligkeit can also be expressed as: Iripple=−IL(s)⋅(Ls+ESR123)1+RCs⋅1R332 where ESR 132 The parasitic series resistance of the inductor 130 is, which is in Fig. 3 is illustrated as resistance 132.

[0035] The high-frequency AC component of the current I Welligkeit can be estimated as: Iripple(ac)≅−IL(ac)RC⋅LR332 Ideally, this AC current component current I Welligkeit (ac), which is provided by the operational amplifier 330, is equal to the negative of the AC inductance current component I L (ac). An exemplary approach to optimizing this ripple suppression current is to choose an inductance value L for the inductance 130 that corresponds to the product R·C·R 332 agrees with equation (5).

[0036] In the ripple suppression circuit 320 from Fig. 3 results in a larger resistance value R 332This results in a larger peak-to-peak amplitude of the voltage VAMP, which increases the slew rate requirement of the operational amplifier 330. On the other hand, this larger resistance value R serves to 332 This also serves to better isolate the operational amplifier 330 from the effects of the filter capacitor 334, thus easing the stability requirements of the operational amplifier 330. In practice, for example, a resistance value R was used. 332 from 1 to 3 Ω for the resistor 332, wherein the capacitance C of the capacitor 334 and the resistance value R of each of the resistors 336 and 338 are chosen according to equation (5) to match the inductance value L of the inductor 130 for the specific application of the voltage converter 100.

[0037] Accordingly, the ripple suppression circuit 320 delivers a ripple suppression current I Welligkeit to the LAST connection, which has an opposite phase to the ripple current I L(ac) exhibits, which is generated by switching current through the inductor 130. A match of the peak-to-peak amplitude of the ripple suppression current I Welligkeit with the ripple current I L (ac) can be achieved by choosing component sizes (e.g. resistance and capacitance values) in the ripple suppression circuit 320 or the inductor 130.

[0038] In some implementations, the ripple suppression current I includes Welligkeit a DC component not equal to zero: Iripple(dc)=−(IL(dc)⋅ESR132)R332=−(ILad⋅ESR132)R332 where I Last the average load current that passes through the load 135 (e.g. the DC inductance current component I) L (dc)) is conducted. The DC ripple current component I WelligkeitNon-zero DC (dc) output by operational amplifier 330 and passed through resistor 332 causes power dissipation in ripple suppression circuit 320 and may be significant in some implementations.

[0039] Fig. Figure 5 illustrates a ripple suppression circuit 520 as another example of the ripple suppression circuit 120 from Fig. 1 in combination with the switching devices 102, 104, the control circuit arrangement 110, the inductor 130 (with ESR 132), the filter capacitor 134 and the load 135. Similar to the ripple suppression circuit 320. Fig. In this example, the ripple suppression circuit 520 includes the operational amplifier 330, resistors 332, 336, 338 and capacitor 334. The ripple suppression circuit 520 in this example also includes an operational amplifier 530, a capacitor 534 and a resistor 532.

[0040] The operational amplifier 330, the resistors 336 and 338, and the capacitor 334 are considered a unit gain integrator in the same way as before with respect to Fig. As described in section 3, the resistor 332 is arranged. It also has one terminal coupled to the output of operational amplifier 330 and a second terminal coupled to the LAST terminal. The inverting input of operational amplifier 330 is coupled to the SW terminal via resistor 338, similar to the ripple suppression circuit 320. In this example, the non-inverting input of operational amplifier 330 is not directly coupled to the LAST terminal but is instead coupled to the output of operational amplifier 530.

[0041] In one example, the operational amplifier 530 in the ripple suppression circuit 520 is constructed similarly to the operational amplifier 330, which was previously described in relation to Fig. As described in section 4. The operational amplifier 530 has a non-inverting input that is coupled to the LAST terminal. The capacitor 534 has one terminal that is coupled to the output of the operational amplifier 530 and a second terminal that is coupled to the inverting input of the operational amplifier 530. The resistor 532 has one terminal that is coupled to the non-inverting input of the operational amplifier 530 and a second terminal that is coupled to the output of the operational amplifier 530.

[0042] The operational amplifier 530 and its associated components form a feedback loop to reduce the DC component I Welligkeit(dc) of the ripple suppression current provided by the ripple suppression circuit 520. In operation, the operational amplifier 530 effectively integrates a difference between the voltage VAMP at the output of the operational amplifier 330 and the voltage VBUCK at the LAST terminal. The operational amplifier 530 outputs a voltage VINT corresponding to this integration: VINT=VBUCK⋅(1+1s⋅R532⋅C534)−VAMP⋅(1s⋅R532⋅C534) where R 532 The resistance value of resistor 532 is and C 534 The capacitance of capacitor 534 is given by: Rearranging equation (8a) leads to this expression for the voltage VINT: VINT=(VBUCK−VAMP)⋅(1+1s⋅R532⋅C534)+VBUCK

[0043] According to equation (7b), for DC (s=0), the integration provided by the operational amplifier 530 allows VAMP = VBUCK, which results in no DC ripple suppression current (e.g., I). Welligkeit(dc) = 0). The feedback loop, including the operational amplifier 530, achieves this condition by controlling the voltage VINT at the non-inverting input of the operational amplifier 330 to cause its output voltage VAMP to match the voltage VBUCK at the LAST terminal.

[0044] Fig. Figure 6 illustrates a ripple suppression circuit 620 as another example of the ripple suppression circuit 120 from Fig. 1 in combination with the switching devices 102, 104, the control circuit arrangement 110, the inductor 130 (with ESR 132), the filter capacitor 134 and the load 135. Similar to the ripple suppression circuits 320 and 520 from Fig. The ripple suppression circuit 620, as described in sections 3 and 5, again includes the operational amplifier 330, resistors 332, 336, 338, and capacitor 334. The ripple suppression circuit 620 also includes an operational amplifier 630, capacitors 634 and 640, and resistors 632, 636, and 638.

[0045] The operational amplifier 330, the resistors 336 and 338, and the capacitor 334 are again considered a unity gain integrator in the same way as before with respect to Fig. As described in section 3, the resistor 332 is arranged. It also has one terminal coupled to the output of operational amplifier 330 and a second terminal coupled to the LAST terminal. The inverting input of operational amplifier 330 is coupled to the SW terminal via resistor 338, similar to the ripple suppression circuit 320. In this example, the non-inverting input of operational amplifier 330 is not directly coupled to the LAST terminal but is instead coupled to the output of operational amplifier 630.

[0046] In one example, the operational amplifier 630 in the ripple suppression circuit 620 is constructed similarly to the operational amplifier 330, which was previously described in relation to Fig. As described in section 4, the operational amplifier 630 has a non-inverting input coupled to the LAST terminal. Resistor 632 has one terminal coupled to the inverting input of operational amplifier 630 and another terminal coupled to a terminal of capacitor 634. Capacitor 634 has another terminal coupled to the output of operational amplifier 630. Therefore, resistor 632 and capacitor 634 are connected in series to provide a feedback network between the output of operational amplifier 630 and its inverting input.

[0047] Resistor 636 has one terminal coupled to the inverting input of operational amplifier 630, and another terminal coupled to a terminal of resistor 638 and a terminal of capacitor 640. Resistor 638 has another terminal coupled to the output of operational amplifier 330, and capacitor 640 has another terminal coupled to a power supply or a common terminal.

[0048] Similar to the example from Fig. 5. The operational amplifier 630 and its associated components form a feedback loop to reduce the DC ripple suppression current component I. Welligkeit(dc) ready. The stability of this feedback loop is improved in the ripple suppression circuit 620 according to this example. In particular, the insertion of resistor 632 in series with capacitor 634 in the feedback path of operational amplifier 630 adds a low-frequency zero to the transfer characteristic of the ripple suppression circuit 620, which helps to stabilize the loop.

[0049] However, this series resistor 632 can also increase the gain factor at the ripple frequency, which distorts the voltage waveform at the output of the operational amplifier 330 and accordingly the ripple suppression current I. WelligkeitResistors 636 and 638 and capacitor 640 filter the voltage VAMP as it is fed back from the output of operational amplifier 330 to the inverting input of operational amplifier 630. In operation, the filter of resistors 636 and 638 and capacitor 640 reduces ripple in the voltage VINT output by operational amplifier 630, thereby improving ripple suppression at the LAST terminal. The component values ​​of resistors 636 and 638 and capacitor 640 can be chosen such that the cutoff frequency (e.g., -3 dB frequency) is kept outside the loop bandwidth, so that the phase margin of this feedback loop is not degraded.

[0050] Fig. Figure 7 illustrates the results of a simulation of an example for the voltage converter 100 including the ripple suppression circuit 630. In this example, an output voltage VBUCK = 1V at an output current of up to 2.5 A is supplied to the load 135 from a power supply voltage V CC = 5V and a power supply voltage V EE A voltage of -5V (e.g., an input voltage of 10V) is generated using a switching frequency of 2MHz. Inductor 130 has an inductance value L = 5.6 µH, and filter capacitor 134 has a capacitance C of 10 µF. These parameters illustrate... Fig. 7. A voltage VBUCK is applied to the LAST terminal of the voltage converter 100, which ramps up and down the switching frequency in response to the switching devices 102 and 104 being turned on and off. For example, when switching device 102 is turned on (and switching device 104 is turned off), the voltage VSW is close to a power supply voltage V. CC , during this time the voltage VBUCK and the inductance current I L increase. Conversely, when switching device 104 is switched on (and switching device 102 is switched off), the voltage VSW is close to the negative power supply voltage V. EE , during this time the voltage VBUCK and the inductance current I L decrease. The peak-to-peak ripple in the inductance current I L In this example, it is approximately 200 mA with an average current of approximately 2.5 A.

[0051] In this simulated example of the ripple suppression circuit 630, resistors 336 and 338 each have a resistance value of 225 kΩ, and capacitor 334 has a capacitance of 25 pF, resulting in the operational amplifier 330's integrator having a pole at approximately 28 kHz. Resistors 636 and 638 each have a resistance value of 250 kΩ, resistor 632 has a resistance value of 500 kΩ, and capacitor 634 has a capacitance of 25 pF. Consequently, the operational amplifier 630's control circuit exhibits a unity gain frequency of approximately 45 kHz with a zero in its transfer function at approximately 30 kHz and a phase margin of approximately 75°. In the simulation, this design of the ripple suppression circuit 630 exhibited a ripple suppression current I Welligkeit with an amplitude that is well suited to the inductance current I Lagrees, but with an opposite phase. Qualitatively, according to the in Fig. The simulation results shown in 7 show a steady current I Last approximately 2.5 A is supplied to the load 135 with a ripple current amplitude within 10 mA (peak-to-peak), resulting in a ripple in the output voltage of less than 100 µV.

[0052] The described examples therefore enable a significant reduction (e.g., on the order of 10x) of output ripple in switching buck converters. This ripple reduction can be achieved using a relatively small power inductor, which in turn allows for a higher maximum output current, improved load transient performance, and improved efficiency due to the lower inductance ESR. The exemplary voltage converters can achieve this performance even at lower switching frequencies, such as 2 MHz, thus avoiding the increased switching losses and limited maximum duty cycle at higher switching frequencies. The ripple suppression circuits according to these examples are implemented on-chip with a unipolar or bipolar voltage converter circuit arrangement to provide closed-loop control of the DC-DC conversion.

[0053] Furthermore, the described examples enable this reduction of output ripple in single-phase voltage converter circuits, with some implementations avoiding the need for multi-phase voltage conversion. However, ripple suppression according to the described examples can also be applied in a multi-phase context to achieve, for example, ultra-low output ripple.

[0054] Fig. Figure 8 illustrates an exemplary multiphase voltage converter 800, as implemented with the load 135 and the filter capacitor 134. The voltage converter 800 includes the control circuit arrangement 100, switching stages 801 and 811, and a ripple suppression circuit 820 (which refers to parts 820A and 820B in common). Switching stage 801 includes switching devices 802, 804 and an inductor 806. Switching stage 811 includes switching devices 812, 814 and an inductor 816. Ripple suppression circuit section 820A includes an operational amplifier 830, resistors 832, 836, 838 and 839 and a capacitor 834. Ripple suppression circuit section 820B includes an operational amplifier 850, resistors 852, 856 and 858 and capacitors 854 and 860.

[0055] The switching devices 802 and 804 in switching stage 801 correspond to transistors 102 and 104 respectively. Fig. 1 and the same applies to the switching devices 812 and 814 in switching stage 802. In switching stage 801, the switching devices 802 and 804 have connections that are coupled to each other and to a connection of the inductor 806 at terminal SW1. The inductor 806 has another connection that is coupled to the load 135 and the filter capacitor 134 at terminal LAST. Similarly, in switching stage 811, the switching devices 812 and 814 have connections that are coupled to each other and to a connection of the inductor 816 at terminal SW2. The inductor 816 also has another connection that is coupled to the load 135 and the filter capacitor 134 at terminal LAST.

[0056] In the ripple suppression circuit section 820A according to this example, resistor 838 has one terminal coupled to terminal SW1 and a second terminal coupled to the inverting input of operational amplifier 830. Resistor 839 has one terminal coupled to terminal SW2 and a second terminal also coupled to the inverting input of operational amplifier 830. Resistor 836 has one terminal coupled to the inverting input of operational amplifier 830 and another terminal coupled to the output of operational amplifier 830. Capacitor 834 has one terminal coupled to the inverting input of operational amplifier 830 and another terminal coupled to the output of operational amplifier 830, in parallel with resistor 836.In this example, resistors 836, 838, and 839 each have the same resistance value, with operational amplifier 830 configured as a unity gain integrator. Resistor 832 has one terminal coupled to the output of operational amplifier 830 and another terminal coupled to the LAST terminal.

[0057] The ripple suppression circuit section 820B provides a feedback loop to the operational amplifier 850. This is similar to the previous configuration with the ripple suppression circuit 620. Fig. As described in Figure 6, the operational amplifier 850 has a non-inverting input coupled to the LAST terminal. Resistor 852 has one terminal coupled to the inverting input of the operational amplifier 850 and another terminal coupled to a terminal of capacitor 854. Capacitor 854 has another terminal coupled to the output of the operational amplifier 850, with resistor 852 and capacitor 854 being connected in series between the output of the operational amplifier 850 and its inverting input. Resistor 856 has one terminal coupled to the inverting input of the operational amplifier 850 and another terminal coupled to a terminal of resistor 858 and a terminal of capacitor 860.Capacitor 860 has a separate terminal that is coupled to a power supply or a common terminal. Resistor 858 has a separate terminal that is coupled to the output of operational amplifier 830 in the ripple suppression circuit section 820A. As previously described, resistors 856 and 858, together with capacitor 860, filter the voltage VAMP as it is fed back from the output of operational amplifier 850 to the inverting input of operational amplifier 850. The filter reduces ripple in the voltage output by operational amplifier 830, which consequently improves the ripple suppression at terminal LAST.

[0058] In this multiphase voltage control 800, the control circuit arrangement 810 controls switching devices 802 and 804 in switching stage 801 and switching devices 812 and 814 in switching stage 802 in separate, non-overlapping phases. For example, within a first phase, the control circuit arrangement 810 controls switching devices 802 and 804 to apply a power supply voltage V. CC or a power supply voltage V EE to the inductor 806 at terminal SW1. During this first phase, the control circuit arrangement 810 switches off the switching devices 812 and 814 in switching stage 802. Conversely, in a second phase, the control circuit arrangement 810 controls the switching devices 812 and 814 to apply a power supply voltage V. CC or a power supply voltage V EEto the inductor 816 at terminal SW2, while the switching devices 802 and 804 in switching stage 802 are switched off.

[0059] The combination of this multi-phase operation of the voltage control 800 with the ripple suppression circuit 820 can provide a further reduction of the ripple at the load 135, which may be of interest in certain system implementations. Furthermore, the number of switching stages, and consequently the number of phases, beyond the second stages 801, 802 of the voltage control 800 can be increased to further reduce the output ripple.

[0060] The advantages provided by the described examples can enable the use of switching voltage converters in certain demanding system applications. One example of a demanding application for voltage converters is a device power supply (DPS) in automated test equipment (ATE), such as that used in integrated circuit testing.

[0061] Fig. Figure 9 illustrates an exemplary device power supply (DPS) 950 for supplying a DC voltage and DC current to a load 935. The DPS 950 includes a switching voltage converter 900, an inductor 930 (with an ESR represented by a resistor 932), a filter capacitor 934, switches 940 and 944, a linear power amplifier 945, a digital control loop circuit 960, and a digital mode control circuit 970. The digital control loop circuit 960 includes an anti-aliasing filter 962, an analog-to-digital converter (ADC) 964, a proportional-integral differential (PID) controller 965, and a digital-to-analog converter (DAC) 966.

[0062] As previously noted, in this example, the DPS 950 includes both a switching voltage converter 900 and a linear power amplifier 945. The voltage converter 900 has an output at terminal SW, which is coupled to a terminal of the power inductor 930 (with its ESR 932), which in turn has another terminal coupled to a terminal of the switch 940. The switch 940 has another terminal coupled to the load 935 at terminal LAST. The linear power amplifier 945 has an output coupled to a terminal of the switch 944, which in turn has another terminal coupled to the load 935 at terminal LAST. The switch 944 also has a control terminal coupled to an output of the digital mode control circuit 970.

[0063] In the context of the DPS 950, which is implemented in an ATE, the load 935 corresponds to a device under test (DUT). In this example, the digital mode control circuit 970 controls switches 940 and 944 to select either the switching voltage converter 900 or the linear power amplifier 945 to drive the load 935. This selection by the digital mode control circuit 970 can occur in response to user input or under program control. For example, the digital mode control circuit 970 selects the linear power amplifier 945 to drive the load 935 at low current levels (e.g., from 1 µA to 100 mA) and selects the switching voltage converter 900 to drive the load 935 at higher current levels (e.g., from 100 mA to 2.5 A).

[0064] The switching voltage converter 900 in this example corresponds to the voltage converter 100, which was previously described according to Fig. 1 was described. Therefore, the voltage converter 900 includes a ripple suppression circuit 120, which is designed, for example, as one of the previously described ripple suppression circuits 320, 520, 620 or as the ripple suppression circuit 820 in a multiphase implementation.

[0065] In this example, the DPS 950 incorporates the digital control loop circuit 960 for added precision and accuracy of the DC voltage and current, which are driven to the load 935 via the voltage converter 900. In this example, the anti-aliasing filter 962 has an input coupled to the LAST terminal and an output coupled to an input of the DAC 964. The DAC 964 converts the analog output of the anti-aliasing filter 962 into a digital value, which it outputs to an input of the PID controller 965. The PID controller 965 conditions this digital signal and outputs the result to the DAC 966, which, with signal conditioning from the PID controller 965, converts the output back into an analog signal. The output of the DAC 966 is coupled to the feedback terminal FB of the voltage converter 900.

[0066] Fig. Figure 10 illustrates an example of a generalized method for operating a voltage converter including a ripple suppression circuit according to the examples described previously. In process block 1010 of this exemplary method, a switching voltage converter is operated, for example, by switching the switching devices 102 and 104 on and off in the voltage converter 100. Fig. 1, to control a switched voltage to a terminal of the inductor 130 at terminal SW.

[0067] As in Fig. As shown in Figure 1, the ripple suppression circuit 120 of the voltage converter 100 has one input coupled to terminal SW and another input coupled to the load 135 at terminal LAST on a second terminal of the inductor 130. In process block 1020, the ripple suppression circuit 120 integrates a voltage difference between the output voltage at terminal SW and the load voltage at load 135 (terminal LAST). As previously described, this integration can be performed by a unity gain integrator operational amplifier circuit. Fig. Figure 3 illustrates an example of this unit gain integrator in its arrangement of operational amplifier 330, resistors 336 and 338, and capacitor 334. As previously described in conjunction with Fig. 5 and Fig.As described in Figure 6, the ripple suppression circuit 120 can include a feedback loop that adjusts the load voltage applied to the unit gain integrator.

[0068] In process block 1030, the ripple suppression circuit 120 applies a ripple suppression current to the inductor, for example at the LAST terminal, in response to the integrated voltage difference. This ripple suppression current is phase-inverse to the ripple in the output current from the voltage transformer 100 and therefore serves to reduce the overall ripple at the load 135. Selecting appropriate component values ​​(capacitances and resistances) in the ripple suppression circuit 120 and the inductor 130 can provide an amplitude for this ripple suppression current that closely matches the ripple in the output current. Incorporating a feedback loop in the ripple suppression circuit 120, as previously described, can reduce the DC level of the ripple suppression current applied to process block 1030.

[0069] As previously noted, examples in this document are described as being implemented in switching step-down voltage converters, as such implementations can be advantageous in this context. An example of a DPS incorporating such a voltage converter, for example, in addition to or as a replacement for a linear power amplifier, is also described. However, aspects of the described example voltage converters can be advantageously applied in alternative applications and concepts. Accordingly, the preceding description is provided only as an example and does not limit the true scope of protection claimed.

[0070] As used here, the terms "terminal," "node," "intermediate connection," and "pin" are used interchangeably. Unless specifically stated otherwise, these terms are generally used to mean an intermediate connection between an endpoint of a device element, a circuit element, an integrated circuit, a device, or another electronic or semiconductor component.

[0071] Unless otherwise stated, "approximately", "about", or "essentially" before a value means + / - 10 percent of the stated value. Modifications to the described examples are possible, and other examples are possible within the scope of the claims.

[0072] A device that is "configured to" perform a task or function can be configured (e.g., programmed and / or hardwired) by a manufacturer to perform that function at the time of manufacture, and / or it can be configured (or reconfigured) by a user after manufacture to perform that function and / or additional alternative functions. Configuration can be achieved through firmware and / or software programming of the device, through the design and / or layout of hardware components and interconnections of the device, or a combination thereof.

[0073] A circuit or device described herein as containing certain components may instead be configured to be coupled with these components to form the described circuit arrangement device. For example, a structure described as containing one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and / or inductors), and / or one or more sources (such as voltage and / or current sources) may instead contain only the semiconductor elements within a single physical device (e.g., a transistor, transistor, or other component).a semiconductor die and / or an integrated circuit (IC) package) and can be configured to be coupled to at least some of the passive elements and / or sources to form the described structure either at the time of manufacture or after a period of time, for example, by an end user and / or a third party. While in some examples certain elements are contained within an integrated circuit and other elements are external to the integrated circuit, in other examples additional or fewer features may be included in the integrated circuit. Furthermore, some or all of the features illustrated as external to the integrated circuit may be contained within the integrated circuit, and / or some features illustrated as internal to the integrated circuit may be included outside the integrated circuit.As used here, the term “integrated circuit” means one or more circuits that are: (i) embedded in / over a semiconductor substrate; (ii) embedded in a single semiconductor package; (iii) embedded in the same module; and / or (iv) embedded in / on the same printed circuit board.

[0074] The circuits described here are reconfigurable to include the replacement components to provide functionality at least partially similar to that available before the component replacement. Unless otherwise specified, components shown as resistors generally represent one or more arbitrary elements coupled in series and / or parallel to provide an impedance quantity represented by the resistor shown. For example, a resistor or capacitor shown and described here as a single component could instead be multiple resistors or capacitors coupled in parallel between the same nodes.These are capacitors coupled in series between the same two nodes as the single resistor or capacitor.

[0075] Uses of the term "ground" in the preceding description include a chassis ground, an earth ground, a floating ground, a virtual ground, a digital ground, a common ground and / or any other form of ground connection applicable to or suitable for the teachings of this description.

[0076] Modifications are possible in the examples described, and other examples are possible within the scope of protection of the claims.

Claims

[1] Circuit comprising the following: a first switching device with a first connection coupled to a first power supply connection, a second connection and a control connection; a second switching device with a first terminal coupled to the second terminal of the first switching device, and a second terminal coupled to a second power supply terminal; a first operational amplifier with an inverting input, a non-inverting input coupled to a load terminal, and an output; a first resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the inverting input of the first operational amplifier; a second resistor with a first terminal coupled to the second terminal of the first switching device, and a second terminal coupled to the inverting input of the first operational amplifier; a first capacitor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the inverting input of the first operational amplifier; and a third resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the load terminal. [2] Circuit according to claim 1, further comprising: an inductor with a first terminal coupled to the second terminal of the first switching device, and a second terminal coupled to the load terminal; and a second capacitor with a first terminal coupled to a load terminal and a second terminal coupled to a ground terminal. [3] Circuit according to claim 1, further comprising: a second operational amplifier with an inverting input, a non-inverting input coupled to the load input, and an output coupled to the non-inverting input of the first operational amplifier; a fourth resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the inverting input of the second operational amplifier; and a second capacitor with a first terminal coupled to the output of the second operational amplifier and a second terminal coupled to the inverting input of the second operational amplifier. [4] Circuit according to claim 1, further comprising: a second operational amplifier with an inverting input, a non-inverting input coupled to the load input, and an output coupled to the non-inverting input of the first operational amplifier; a second capacitor with a first terminal coupled to the output of the second operational amplifier and a second terminal coupled to the inverting input of the second operational amplifier; a fourth resistor with a first terminal coupled to the output of the second operational amplifier and a second terminal coupled to the inverting input of the second operational amplifier, wherein the second capacitor and the fourth resistor are coupled in series; a fifth resistor with a first terminal coupled to the inverting input of the second operational amplifier, and a second terminal; a sixth resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the second terminal of the fifth resistor; and a third capacitor with a first terminal coupled to the second terminals of the fifth and sixth resistors, and a second terminal coupled to the ground terminal. [5] Circuit according to claim 1, further comprising: a third switching device with a first terminal coupled to the first power supply terminal, a second terminal and a control terminal; and a fourth switching device with a first terminal coupled to the second terminal of the third switching device and a second terminal coupled to the second power supply terminal; a fourth resistor with a first terminal coupled to the second terminal of the third switching device, and a second terminal coupled to the inverting input of the first operational amplifier; a first inductor with a first terminal coupled to the second terminal of the first switching device, and a second terminal coupled to the load terminal; a second inductor with a first terminal coupled to the second terminal of the third switching device, and a second terminal coupled to the load terminal; a second capacitor with a first terminal coupled to the load terminal and a second terminal coupled to a ground terminal; and a control circuit arrangement with an input coupled to the load terminal, a first output coupled to the control terminal of the first switching device, and a second output coupled to the control terminal of the third switching device. [6] Circuit according to claim 5, wherein the control circuit arrangement is configured to switch on the first and third switching device in separate phases of each of several cycles. [7] Circuit according to claim 6, further comprising: a second operational amplifier with an inverting input, a non-inverting input coupled to the load input, and an output coupled to the non-inverting input of the first operational amplifier; a second capacitor with a first terminal coupled to the output of the second operational amplifier and a second terminal coupled to the inverting input of the second operational amplifier; a fifth resistor with a first terminal coupled to the output of the second operational amplifier and a second terminal coupled to the inverting input of the second operational amplifier, wherein the second capacitor and the fifth resistor are coupled in series; a sixth resistor with a first terminal coupled to the inverting input of the second operational amplifier, and a second terminal; a seventh resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the second terminal of the sixth resistor; and a third capacitor with a first terminal coupled to the second terminals of the sixth and seventh resistors, and a second terminal coupled to the ground terminal. [8] Circuit according to claim 1, further comprising: a control circuit arrangement with an input coupled to the load terminal and an output coupled to the control terminal of the first switching device. [9] Circuit according to claim 1, wherein the first switching device is a transistor and the second switching device is a diode. [10] Circuit according to claim 1, wherein the first switching device is a transistor; and wherein the second switching device is a transistor, the transistor further comprising a control terminal coupled to an output of the control circuit arrangement. [11] Voltage converter circuit comprising: a switching voltage converter configured to switch a current at an output terminal in response to a voltage at a load terminal; and a ripple suppression circuit with inputs coupled to the output terminal and the load terminal, and an output coupled to the output terminal, wherein the ripple suppression circuit is configured to output a suppression current corresponding to an integration of a difference between the voltage at the load terminal and a voltage at the output terminal. [12] Circuit according to claim 11, wherein the ripple suppression circuit comprises: a first operational amplifier with a non-inverting input that receives the voltage at the load terminal, and with an inverting input and an output; a first integrating feedback network coupled between the output of the first operational amplifier and the inverting input of the first operational amplifier; a first resistor coupled between the load terminal and the output of the first operational amplifier; and a second resistor that is coupled between the switching terminal and the inverting input of the first operational amplifier. [13] Circuit according to claim 12, wherein the ripple suppression circuit further comprises: a second operational amplifier with a non-inverting input coupled to the load terminal, an inverting input and an output coupled to the non-inverting input of the first operational amplifier; a third resistor coupled between the inverting input of the second operational amplifier and the output of the first operational amplifier; and a second integrating feedback network coupled between the inverting input and the output of the second operational amplifier. [14] Circuit according to claim 13, further comprising: a fourth resistor, which is coupled in series with the third resistor between the inverting input of the second operational amplifier and the output of the first operational amplifier; and a capacitor coupled at a node between the third and fourth resistors. [15] Circuit according to claim 11, further comprising: an inductor with a first terminal coupled to the output terminal and a second terminal coupled to the load terminal; a second capacitor with a first terminal coupled to the load terminal and a second terminal receiving a common potential. [16] Circuit comprising the following: a linear power amplifier with one output coupled to a load terminal of the circuit; a voltage converter with one output coupled to the load terminal and with a feedback input; and a control loop circuit with an input coupled to the load terminal and an output coupled to the feedback input of the voltage converter; the voltage converter includes the following: a first operational amplifier with an inverting input, a non-inverting input coupled to the load terminal, and an output; a first resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the inverting input of the operational amplifier; a second resistor with a first terminal coupled to the voltage converter output and a second terminal coupled to the inverting input of the first operational amplifier; a first capacitor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the inverting input of the first operational amplifier; and a third resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the load terminal. [17] Circuit according to claim 16, further comprising: an inductor with a first terminal coupled to the voltage converter output and a second terminal; a second capacitor with a first terminal coupled to the second terminal of the inductor, and a second terminal receiving a common potential; a first switch with a first terminal coupled to the second terminal of the inductor, a second terminal coupled to the load terminal, and a control terminal; a second switch with a first terminal coupled to the linear power amplifier output, a second terminal coupled to the load terminal, and a control terminal; and a mode control circuit arrangement with one output coupled to the control terminals of the first and second switches. [18] Circuit according to claim 16, wherein the voltage converter further comprises: a first switching device with a first terminal coupled to a first power supply terminal, a second terminal coupled to the voltage converter output, and a control terminal; and a second switching device with a first terminal coupled to the second terminal of the first switching device, and a second terminal coupled to a second power supply terminal. [19] Circuit according to claim 18, wherein the voltage converter further comprises: a second operational amplifier with an inverting input, a non-inverting input coupled to the load input, and an output coupled to the non-inverting input of the first operational amplifier; a fourth resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the inverting input of the second operational amplifier; and a second capacitor with a first terminal coupled to the output of the second operational amplifier and a second terminal coupled to the inverting input of the second operational amplifier. [20] Circuit according to claim 18, wherein the voltage converter further comprises: a second operational amplifier with an inverting input, a non-inverting input coupled to the load input, and an output coupled to the non-inverting input of the first operational amplifier; a second capacitor with a first terminal coupled to the output of the second operational amplifier and a second terminal coupled to the inverting input of the second operational amplifier; a fourth resistor with a first terminal coupled to the output of the second operational amplifier and a second terminal coupled to the inverting input of the second operational amplifier, wherein the second capacitor and the fourth resistor are coupled in series; a fifth resistor with a first terminal coupled to the inverting input of the second operational amplifier, and a second terminal; a sixth resistor with a first terminal coupled to the output of the first operational amplifier and a second terminal coupled to the second terminal of the fifth resistor; and a third capacitor with a first terminal coupled to the second terminals of the fifth and sixth resistors, and a second terminal coupled to the ground terminal.

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