Electro-optical device and electronic apparatus
By using a combination of films with different reflectance properties and a connection member in the electro-optical device, the issue of temperature rise due to low reflectivity in existing devices is addressed, enhancing the device's performance through effective light reflection.
Patent Information
- Application Number
- JP2023179356
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-10-18
- Publication Date
- 2025-05-01
AI Technical Summary
The existing electro-optical devices, such as liquid crystal panels, face a temperature rise issue due to the low reflectivity of titanium nitride used in capacitance electrodes, leading to absorption of light rather than reflection.
The electro-optical device incorporates a transistor, a pixel electrode, a first film with lower light reflectance, and a second film with higher light reflectance than the first film, electrically connected via a contact hole and a connection member, to effectively reflect light and reduce temperature rise.
This configuration significantly reduces the temperature rise of the liquid crystal device by reflecting approximately 90% of the incident light, thereby improving the device's performance and reliability.
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Figure 2025069561000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to an electro-optical device and an electronic device equipped with the electro-optical device. [Background technology]
[0002] 2. Description of the Related Art A conventional electro-optical device is disclosed in, for example, Patent Document 1. Patent Document 1 describes a liquid crystal panel that includes a storage capacitor that is connected directly below a pixel electrode via a pixel contact hole. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2019-78825 A Summary of the Invention [Problem to be solved by the invention]
[0004] In the electro-optical device described in Patent Document 1, the capacitance electrodes constituting the storage capacitance are made of titanium nitride. Because titanium nitride has low reflectance, most of the light that hits the capacitance electrodes is absorbed without being reflected, which causes the temperature of the liquid crystal panel to rise. [Means for solving the problem]
[0005] An electro-optical device according to one embodiment of the present application has a transistor, a pixel electrode corresponding to the transistor, a first film provided between the transistor and the pixel electrode, and a second film provided between the first film and the pixel electrode and having a higher light reflectance than the first film, and is equipped with a first conductive layer electrically connected to the pixel electrode via a contact hole that penetrates the second film and reaches the first film, and a connecting member provided in the contact hole.
[0006] An electronic device according to an aspect of the present application includes the electro-optical device described above. [Brief description of the drawings]
[0007] [Figure 1] FIG. 1 is a plan view of an electro-optical device according to a first embodiment. [Diagram 2] FIG. 2 is a cross-sectional view of the electro-optical device taken along line II-II in FIG. [Diagram 3] FIG. 2 is an equivalent circuit diagram showing an electrical configuration of an element substrate. [Figure 4] FIG. 2 is an explanatory diagram showing a cross-sectional structure of a display area of an element substrate. [Diagram 5] FIG. 2 is an explanatory diagram showing a planar structure of a display area of an element substrate. [Figure 6] FIG. 2 is an explanatory diagram showing a planar structure of a display area of an element substrate. [Figure 7] FIG. 2 is an explanatory diagram showing a planar structure of a display area of an element substrate. [Figure 8] FIG. 2 is an explanatory diagram showing a planar structure of a display area of an element substrate. [Figure 9] FIG. 2 is an explanatory diagram showing a planar structure of a display area of an element substrate. [Figure 10] FIG. 10 is a cross-sectional view taken along line XX in FIG. [Figure 11] 1 is a flowchart showing a manufacturing process of a contact hole. [Figure 12] 1A to 1C are cross-sectional views showing one embodiment of a manufacturing process. [Figure 13] 1A to 1C are cross-sectional views showing one embodiment of a manufacturing process. [Figure 14] 1A to 1C are cross-sectional views showing one embodiment of a manufacturing process. [Figure 15] 1A to 1C are cross-sectional views showing one embodiment of a manufacturing process. [Figure 16] 1A to 1C are cross-sectional views showing one embodiment of a manufacturing process. [Figure 17] FIG. 11 is a schematic diagram showing an example of an electronic device according to a second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0008] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the dimensions of the components may be shown on different scales in order to make the components easier to see. For ease of explanation, the following description will be made using the mutually orthogonal X-axis, Y-axis, and Z-axis as appropriate. A direction along the X-axis will be referred to as the X1 direction, and a direction opposite to the X1 direction will be referred to as the X2 direction. Similarly, a direction along the Y-axis will be referred to as the Y1 direction, and a direction opposite to the Y1 direction will be referred to as the Y2 direction. A direction along the Z-axis will be referred to as the Z1 direction, and a direction opposite to the Z1 direction will be referred to as the Z2 direction. In the following description, a view in the Z1 or Z2 direction will be referred to as a "planar view," and a view from a direction perpendicular to a cross section including the Z-axis will be referred to as a "cross-sectional view."
[0009] Furthermore, in the following description, for example, the term "on the substrate" refers to a substrate that is disposed on the substrate, a substrate that is disposed on the substrate via another structure, or a substrate that is partially disposed on the substrate and partially disposed on the substrate via another structure. For example, the term "upper surface of the substrate" refers to the surface of the substrate on the Z1 direction side, and the term "lower surface of the substrate" refers to the surface of the substrate on the Z2 direction side.
[0010] 1. Embodiment 1 In this embodiment, a liquid crystal device will be described as an example of the electro-optical device. The liquid crystal device is an active-drive transmissive liquid crystal device having a TFT (Thin Film Transistor) as a switching element for each pixel. This liquid crystal device is used as a light modulation device in a projection display device, which will be described later. In this embodiment, the projection display device is an example of an electronic device.
[0011] 1.1. Overview of the structure of liquid crystal devices The structure of a liquid crystal device 300 according to this embodiment will be described with reference to Figures 1 and 2. Figure 1 shows a plan view of the liquid crystal device 300. Figure 2 shows a schematic cross-sectional configuration of the liquid crystal device 300 taken along line II-II in Figure 1.
[0012] 1 and 2, a liquid crystal device 300 includes a light-transmitting element substrate 100, a light-transmitting counter substrate 200, a frame-shaped seal member 8, and a liquid crystal layer Lc. Note that "light-transmitting" refers to transparency to visible light, and preferably refers to a visible light transmittance of 50% or more.
[0013] The liquid crystal device 300 has a display area A1 for displaying an image, and a peripheral area A2 located on the outer periphery of the display area A1 in a plan view. The display area A1 is provided with a plurality of pixels P arranged in a matrix. Note that, although the liquid crystal device 300 and the display area A1 shown in Fig. 1 are rectangular in shape, they may be of another shape, for example, a circle.
[0014] As shown in FIG. 2, the element substrate 100 and the counter substrate 200 are disposed with a liquid crystal layer Lc therebetween. In this embodiment, the counter substrate 200 is disposed on the light incident side of the liquid crystal layer Lc, and the element substrate 100 is disposed on the light exit side of the liquid crystal layer Lc. Incident light IL incident on the counter substrate 200 is modulated by the liquid crystal layer Lc and is emitted from the element substrate 100 as modulated light ML.
[0015] The element substrate 100 includes a base 90 , a plurality of interlayer insulating layers including an interlayer insulating layer 82 , pixel electrodes 10 , and an alignment film 12 .
[0016] The substrate 90 is a flat plate having light transmitting and insulating properties. The substrate 90 is, for example, a glass substrate or a quartz substrate. A transistor, a relay layer, or a conductive layer, which will be described later, is disposed between the multiple interlayer insulating layers.
[0017] The pixel electrode 10 is transparent. The pixel electrode 10 is made of ITO (Indium Tin Oxide). The pixel electrode 10 may be made of a transparent conductive material such as IZO (Indium Zinc Oxide) and FTO (Fluorine-doped tin oxide). The thickness direction of the pixel electrode 10 coincides with the Z1 direction or the Z2 direction.
[0018] The alignment film 12 has light-transmitting and insulating properties. The alignment film 12 aligns the liquid crystal molecules of the liquid crystal layer Lc. Examples of materials for the alignment film 12 include silicon oxide (SiO2) and polyimide.
[0019] The counter substrate 200 includes a base 210 , an insulating layer 220 , a common electrode 230 , and an alignment film 240 . The substrate 210 is a flat plate having optical transparency and insulating properties, and is, for example, a glass substrate or a quartz substrate. The insulating layer 220 is transparent and insulating, and is made of an inorganic material such as silicon oxide.
[0020] The common electrode 230 is an electrode disposed opposite the pixel electrodes 10, and may be referred to as a counter electrode. The common electrode 230 is made of a transparent conductive material such as ITO, IZO, or FTO. The common electrode 230 and the pixel electrodes 10 apply an electric field to the liquid crystal layer Lc. The alignment film 240 is light-transmitting and insulating.
[0021] The seal member 8 is disposed between the element substrate 100 and the opposing substrate 200. The seal member 8 is formed using an adhesive containing various hardening resins such as epoxy resin. The seal member 8 may contain a gap material made of an inorganic material such as glass.
[0022] The liquid crystal layer Lc is disposed within an area surrounded by the element substrate 100, the counter substrate 200, and the seal member 8. The liquid crystal layer Lc is an electro-optical layer whose optical characteristics change in response to an electric field generated by the pixel electrodes 10 and the common electrode 230. The liquid crystal layer Lc contains liquid crystal molecules having positive or negative dielectric anisotropy. The orientation of the liquid crystal molecules changes in response to an electric field applied to the liquid crystal layer Lc. The liquid crystal layer Lc modulates the incident light IL in response to the applied electric field.
[0023] As shown in FIG. 1, in a peripheral region A2 of an element substrate 100, a plurality of scanning line driving circuits 6, a data line driving circuit 7, and external terminals 9 are arranged. The external terminal 9 is a mounting terminal on which an external connection line such as an FPC (Flexible Printed Circuit) (not shown) is mounted. Various signals such as an image signal, a synchronization signal, an inspection signal, a common potential, and a power supply potential are supplied to the external terminal 9 from the outside via the external connection line.
[0024] 1.2.Electrical configuration of the element substrate FIG. 3 is an equivalent circuit diagram showing the electrical configuration of the element substrate 100. As shown in FIG. 3, a display area A1 of the element substrate 100 is provided with a plurality of transistors 1, n scanning lines 3, m data lines 4, m capacitance lines 5, pixel electrodes 10, and capacitance elements 2. n and m are each an integer of 2 or more.
[0025] The transistors 1 are provided corresponding to each intersection of the n scanning lines 3 and the m data lines 4. The pixel electrodes 10 are electrically connected to the drain regions of the transistors 1. Each of the n scanning lines 3 extends in the X1 direction, and the n scanning lines 3 are arranged at equal intervals in the Y1 direction. Each of the n scanning lines 3 is electrically connected to the gate electrode of the corresponding transistor 1. The n scanning lines 3 are electrically connected to a scanning line driving circuit 6 shown in FIG. The scanning line driving circuit 6 supplies scanning signals G1, G2, . . . , and Gn to the 1 to n scanning lines 3 in a line-sequential manner.
[0026] Each of the m data lines 4 extends in the Y1 direction, and the m data lines 4 are arranged at equal intervals in the X1 direction. Each of the m data lines 4 is electrically connected to the source regions of the corresponding transistors 1. The m data lines 4 are electrically connected to the data line driving circuit 7 shown in FIG. The data line driving circuit 7 supplies image signals E1, E2, . . . , and Em to the data lines 4, which number is 1 to m.
[0027] The n scanning lines 3 and the m data lines 4 are electrically insulated from each other and arranged in a lattice pattern in a plan view. An area surrounded by two adjacent scanning lines 3 and two adjacent data lines 4 corresponds to a pixel P.
[0028] Each of the m capacitance lines 5 extends in the Y1 direction, and the m capacitance lines 5 are arranged at equal intervals in the X1 direction. The capacitance lines 5 are electrically insulated from the data lines 4 and the scanning lines 3 and are arranged at intervals from these. A fixed potential such as a common potential or a ground potential is supplied to the capacitance lines 5 via an external terminal 9.
[0029] One electrode of the capacitance element 2 is electrically connected to a capacitance line 5 . The other electrode of the capacitive element 2 is electrically connected to the pixel electrode 10 and holds the potential of an image signal supplied to the pixel electrode 10. As will be described later, in this embodiment, one electrode of the capacitive element 2 is a capacitive line 5, and the other electrode of the capacitive element 2 is a relay layer that electrically connects the pixel electrode 10 and the transistor 1.
[0030] 1.3. Cross-sectional and planar structures of the display area of the element substrate Fig. 4 is an explanatory diagram showing the cross-sectional structure of the display region A1 of the element substrate 100, and is a cross-sectional view showing the stacking relationship and electrical connection relationship of each layer. Fig. 5 to Fig. 9 are plan views showing the planar structure of the main layers. As shown in FIG. 4, in the display region A1, the element substrate 100 has a cross-sectional structure in which insulating or conductive functional layers or functional films are stacked on a base 90.
[0031] Fig. 5 is a plan view showing the planar structure from the base 90 to the interlayer insulating layer 76, and the light-shielding layer 80, the semiconductor layer 70, the gate electrode 74, and the contact holes 71, 73, 75, and 81 are shown with solid lines. Note that in Figs. 5 to 9, the position of the pixel electrode 10 is shown with a dashed line to show the positional relationship of each component in a plan view. The shape of the pixel electrode 10 is rectangular.
[0032] As shown in FIG. 4, a light-shielding layer 80 is disposed between the base 90 and the interlayer insulating layer 82 . 5, the light-shielding layer 80 is provided so as to overlap with the transistor 1 in a plan view. The transistor 1 is provided so as to extend in the Y1 direction and the Y2 direction between the four pixel electrodes 10. The light-shielding layer 80 has a portion extending in the Y1 direction, a portion extending in the Y2 direction, and protruding portions overlapping with the corners of each of the four pixel electrodes 10.
[0033] The light-shielding layer 80 is formed of a conductive material having light-shielding properties. Examples of the conductive material having light-shielding properties include metals such as tungsten (W), titanium (Ti), chromium (Cr), iron (Fe), and aluminum (Al), metal nitrides, and metal silicides. Hereinafter, the conductive material having light-shielding properties will be the same and function as a light-shielding layer. Note that "light-shielding properties" refers to light-shielding properties against visible light, and preferably refers to a visible light transmittance of less than 50%, and more preferably refers to a visible light transmittance of 10% or less.
[0034] The interlayer insulating layer 82 has light transmitting properties and insulating properties. The interlayer insulating layer 82 is formed of an inorganic material such as silicon oxide (SiO2). Hereinafter, the interlayer insulating layers are formed of the same material as the interlayer insulating layer 82.
[0035] As shown in FIG. 4, the transistor 1 is provided on the interlayer insulating layer 82. The transistor 1 includes a semiconductor layer 70 having an LDD (Lightly Doped Drain) structure, a gate electrode 74, and a gate insulating layer 72. The semiconductor layer 70 has a drain region 70d, an LDD region 70a, a channel region 70c, an LDD region 70b, and a source region 70s.
[0036] The channel region 70c is located in a central portion of the semiconductor layer 70. The LDD region 70b is located between the channel region 70c and the source region 70s. The LDD region 70a is located between the channel region 70c and the drain region 70d.
[0037] The semiconductor layer 70 is, for example, polysilicon, and regions other than the channel region 70c are doped with impurities to enhance conductivity. The impurity concentrations in the LDD region 70b and the LDD region 70a are lower than the impurity concentrations in the source region 70s and the drain region 70d.
[0038] A gate electrode 74 is provided on the semiconductor layer 70 with a gate insulating layer 72 interposed therebetween. The gate electrode 74 overlaps the channel region 70c of the semiconductor layer 70. The gate electrode 74 is formed using, for example, polysilicon doped with impurities that enhance electrical conductivity. The gate electrode 74 may also be formed using a material having electrical conductivity, such as a metal, a metal silicide, or a metal compound. The gate insulating layer 72 is made of silicon oxide formed by, for example, thermal oxidation or a CVD (Chemical Vapor Deposition) method.
[0039] An interlayer insulating layer 76 is provided on the transistor 1 . A conductive layer 61 is provided on the interlayer insulating layer 76. In this embodiment, the conductive layer 61 is the scanning line 3. The conductive layer 61 is made of a light-shielding conductive material.
[0040] FIG. 6 is a plan view showing the planar structure of the conductive layer 61 provided on the interlayer insulating layer 76, in which the conductive layer 61, the light blocking member 62, and the contact holes 71 and 73 are indicated by solid lines, and the contact holes 75 and 81 and the semiconductor layer 70 are indicated by dashed lines.
[0041] 4, the conductive layer 61 is electrically connected to the gate electrode 74 through a contact hole 75 provided in the interlayer insulating layer 76. The conductive layer 61 is also electrically connected to the light-shielding layer 80 through a contact hole 81 provided in the interlayer insulating layer 76 and the interlayer insulating layer 82. The light-shielding layer 80 receives a scanning signal from the conductive layer 61 and functions as a back gate.
[0042] As shown in FIG. 6, the contact holes 81 are provided along the side surfaces of the channel region 70c and the LDD region 70a in the X1 and X2 directions, and shield the channel region 70c and the LDD region 70b from light incident from the side surfaces.
[0043] The conductive layer 61 extends in the X1 and X2 directions so as to overlap between adjacent pixel electrodes 10 in the Y1 and Y2 directions. The conductive layer 61 also has protruding portions that overlap the corners of each of the four pixel electrodes 10.
[0044] 4, the light shielding member 62 is provided to overlap the LDD region 70a in a plan view. The light shielding member 62 is provided as the relay layer 54, and the potential of the drain region 70d is applied to the light shielding member 62 through the contact hole 71 and the relay layer 54.
[0045] FIG. 7 is a plan view showing the planar structure of relay layers 53 and 54, in which relay layers 53, 54 and contact holes 51, 52 are indicated by solid lines, and contact holes 71, 73, light blocking member 62, and semiconductor layer 70 are indicated by dashed lines.
[0046] The relay layer 53 and the relay layer 54 are provided so as to overlap between the pixel electrodes 10 adjacent to each other in the X1 direction and the X2 direction, respectively. The relay layer 54 is provided at a position overlapping the corners of the four pixel electrodes 10, and has protruding portions overlapping the corners of each pixel electrode 10.
[0047] As shown in FIG. 4, the relay layer 54 is electrically connected to a drain region 70d of the semiconductor layer 70 via a contact hole 71 provided in the interlayer insulating layer 60 and the interlayer insulating layer 76. The relay layer 53 is electrically connected to a source region 70 s of the semiconductor layer 70 via a contact hole 73 provided in the interlayer insulating layer 60 and the interlayer insulating layer 76 .
[0048] An interlayer insulating layer 50 is provided on the relay layers 53 and 54, and a relay layer 41 and a conductive layer 42 are provided on the interlayer insulating layer 50. In this embodiment, the conductive layer 42 is the data line 4. The relay layer 41 and the conductive layer 42 are provided in the same layer, and are each formed of a light-shielding conductive material.
[0049] FIG. 8 is a plan view showing the planar structure of relay layer 41 and conductive layer 42, in which relay layer 41, conductive layer 42, and contact hole 43 are indicated by solid lines, and contact holes 51, 52, and semiconductor layer 70 are indicated by dashed lines.
[0050] The relay layer 41 is provided so as to overlap between the pixel electrodes 10 adjacent to each other in the Y1 direction and the Y2 direction. The conductive layer 42 extends in the Y1 and Y2 directions so as to overlap between the pixel electrodes 10 adjacent to each other in the X1 and X2 directions, and is provided so as to overlap the semiconductor layer 70.
[0051] 4, relay layer 41 is electrically connected to relay layer 54 through contact hole 51. Conductive layer 42 is electrically connected to relay layer 53 through contact hole 52.
[0052] An interlayer insulating layer 40 is provided on the relay layer 41, the conductive layer 42, and the interlayer insulating layer 50. A conductive layer 44 and an interlayer insulating layer 30 are provided on the interlayer insulating layer 40. A capacitive insulating layer 32 and a relay layer 23 are provided on the conductive layer 44 and the interlayer insulating layer 30.
[0053] In this embodiment, the conductive layer 44 is the capacitance line 5. The conductive layer 44 is made of a light-shielding conductive material. The relay layer 23 is made of a light-shielding conductive material, and is a light-shielding layer located closest to the pixel electrode 10. In this embodiment, the relay layer 23 also functions as a light-reflecting layer.
[0054] The conductive layer 44, the relay layer 23, and the capacitive insulating layer 32 form the capacitive element 2. More specifically, the portion where the conductive layer 44 and the relay layer 23 face each other with only the capacitive insulating layer 32 interposed therebetween constitutes the capacitive element 2. In the capacitive element 2, the conductive layer 44 and the relay layer 23 each constitute a capacitive electrode.
[0055] The interlayer insulating layer 30 is provided so as to cover an end 44e of the conductive layer 44. In this embodiment, the end 44e includes a side surface of the conductive layer 44 and a part of the upper surface of the conductive layer 44 along a corner between the side surface and the upper surface of the conductive layer 44.
[0056] Therefore, a step is formed around the periphery of the capacitive element 2 by the interlayer insulating layer 30. By forming a step around the periphery of the capacitive element 2 by the interlayer insulating layer 30 in this manner, it is possible to configure the relay layer 23 and the conductive layer 44 to be less likely to short-circuit. In addition, since the step is provided along the end 44e of the conductive layer 44, it is possible to maximize the area of the capacitive element 2 and improve the capacitance of the capacitive element 2.
[0057] FIG. 9 is a plan view showing the planar structure of relay layer 23 and conductive layer 44, in which relay layer 23 and contact hole 21 are indicated by solid lines, and conductive layer 44, contact hole 43, and semiconductor layer 70 are indicated by dashed lines.
[0058] The relay layer 23 is formed in an inverted L-shape in a plan view, and has an extension portion 23a extending in the X2 direction so as to overlap between the pixel electrodes 10 adjacent in the Y1 and Y2 directions, an extension portion 23b extending in the Y2 direction so as to overlap between the pixel electrodes 10 adjacent in the X1 and X2 directions, and a protruding portion 23c overlapping with the corners of the four pixel electrodes. The protruding portion 23c1 is a portion of the protruding portion 23c that overlaps with the corner of the pixel electrode 10 at the corner between the extension portion 23a and the extension portion 23b. The corner between the extension portion 23a and the extension portion 23b may be rephrased as a corner defined by the extension portion 23a and the extension portion 23b.
[0059] In this embodiment, the relay layer 23 is an example of a first conductive layer, the extension portion 23a is an example of a first extension portion, the extension portion 23b is an example of a second extension portion, and the protruding portion 23c is an example of a protruding portion. The X2 direction is an example of a first direction, and the Y2 direction is an example of a second direction.
[0060] The conductive layer 44 has an extension portion 44b extending in the Y1 and Y2 directions between pixel electrodes 10 adjacent to each other in the X1 and X2 directions, an extension portion 44a overlapping with the extension portion 23a in a plan view, and an overhanging portion 44c overlapping with the overhanging portion 23c in a plan view. The overhanging portion 44c has an overhanging portion 44c1 overlapping with the overhanging portion 23c1 in a plan view.
[0061] 4, the capacitive insulating layer 32 is provided between the conductive layer 44 and the relay layer 23. Around the capacitive element 2, the capacitive insulating layer 32 is provided so as to cover the interlayer insulating layer 30. In this embodiment, the conductive layer 44 is an example of a second conductive layer, and the interlayer insulating layer 30 is an example of an insulating member.
[0062] The relay layer 23 is electrically connected to the relay layer 41 via a contact hole 43 provided in the interlayer insulating layer 30 and the interlayer insulating layer 40 .
[0063] By providing the capacitance line 5 between the relay layer 23 and the data line 4, the relay layer 23 and the data line 4 are shielded by the capacitance line 5, and electrical coupling between the relay layer 23 and the data line 4 is suppressed. Therefore, it is possible to suppress the image signals of other pixels P supplied to the data line 4 from being superimposed on the image signal as noise.
[0064] An interlayer insulating layer 20 and a protective layer 22 are provided on the relay layer 23, the capacitance insulating layer 32, and the interlayer insulating layer 30. The protective layer 22 is made of an inorganic material having translucency and hygroscopicity, such as BSG (Borosilicate Glass). The protective layer 22 may be omitted. On the protective layer 22, the pixel electrode 10 is provided.
[0065] The pixel electrode 10 is electrically connected to the relay layer 23 via a contact hole 21 provided in the interlayer insulating layer 20 and the protective layer 22. A contact plug 25 is provided in the contact hole 21. The contact hole 21 and the contact plug 25 form a pixel contact.
[0066] 9, the contact hole 21 is provided at a position overlapping the protruding portion 23c1 in a plan view. Also, as shown in FIG. 4, the contact hole 21 is provided at a position overlapping the relay layer 23, the capacitive insulating layer 32, and the conductive layer 44, but not overlapping the interlayer insulating layer 30.
[0067] 1.4. Light Reflecting Layer and Pixel Contact FIG. 10 is a cross-sectional view taken along the line XX in FIG. The relay layer 23 has a conductive film 231 and a reflective film 232 provided on the conductive film 231 . The conductive film 231 contains titanium nitride (TiN).
[0068] The reflective film 232 contains aluminum. Aluminum has a higher light reflectance than titanium nitride. Therefore, the reflective film 232 functions as a light reflecting layer. Specifically, the reflective film 232 reflects approximately 90% of the light irradiated to the relay layer 23. In other words, the reflective film 232 can reduce the amount of light absorbed by the relay layer 23 out of the irradiated light to approximately 10%.
[0069] Therefore, the liquid crystal device 300 of this embodiment can suppress an increase in temperature of the liquid crystal device 300. In this embodiment, the conductive film 231 is an example of a first film, and the reflective film 232 is an example of a second film.
[0070] The pixel contact electrically connects the pixel electrode 10 and the relay layer 23. In this embodiment, the pixel contact is composed of a contact hole 21 and a contact plug 25.
[0071] The contact hole 21 penetrates the reflective film 232 and reaches the conductive film 231. A contact plug 25 is provided in the contact hole 21. In this embodiment, the contact plug 25 contains tungsten. Tungsten is a material that has excellent heat resistance and is easy to fill contact holes with a high aspect ratio. Therefore, tungsten can be neatly filled into the elongated contact hole 21. This can improve the reliability of the contact plug 25 as a connecting member.
[0072] A barrier member 24 is provided between the contact plug 25 and the contact hole 21. The barrier member 24 is made of tungsten nitride (WN) or titanium nitride. Tungsten nitride or titanium nitride has excellent adhesion to the interlayer insulating layer 20. Therefore, the barrier member 24 can suppress peeling of the contact plug 25 compared to a case where the barrier member 24 is not provided. This can improve the reliability of the contact plug 25 as a connection member.
[0073] 1.5. Manufacturing method of pixel contact Next, a method for manufacturing the pixel contact will be described with reference to FIGS. Figure 11 is a flow chart showing a method for manufacturing a pixel contact. Figures 12 to 16 are cross-sectional views showing one embodiment of a manufacturing process for a pixel contact.
[0074] In step S1, the contact hole 21a is formed. 12, in this process, a photoresist 95 is used to form a contact hole 21a that penetrates the protective layer 22 and the interlayer insulating layer 20 and exposes the reflective film 232 at the bottom of the hole. Thereafter, the deposits remaining in the contact hole 21a, in other words, etching residues and by-products, are removed. Ozone water (O3) and a dilute hydrofluoric acid solution are used for the removal.
[0075] In step S2, the reflective film 232 made of aluminum is etched back (EB). 13, in this process, the reflective film 232 is etched using the protective layer 22 or the interlayer insulating layer 20 as a mask to form the contact hole 21 exposing the conductive film 231. A chlorine-based etching gas is used for etching the aluminum. Thereafter, the deposit remaining in the contact hole 21 is stripped off. A stripping solution containing nitric acid is used for the stripping.
[0076] In step S3, the barrier layer 24a is formed. As shown in FIG. 14, tungsten nitride or titanium nitride is deposited on the inner wall of the contact hole 21 and on the protective layer 22 to form a barrier layer 24a made of tungsten nitride or titanium nitride.
[0077] In step S4, tungsten is buried in the contact hole 21. 15, in this step, a tungsten layer 25a is formed on the barrier layer 24a by a CVD method. The tungsten layer 25a is neatly embedded in the contact hole 21.
[0078] In step S5, CMP (Chemical Mechanical Polishing) is performed. 16, in this step, the tungsten layer 25a and the barrier layer 24a on the protective layer 22 are removed by CMP. By this step, a contact plug 25 made of tungsten is formed in the contact hole 21, and a barrier member 24 is formed between the contact plug 25 and the contact hole 21.
[0079] In step S6, the pixel electrodes 10 are formed. 10, in this step, an ITO film is formed and patterned to form a pixel electrode 10. An alignment film 12 (not shown) is formed on the pixel electrode 10.
[0080] As described above, the liquid crystal device 300 serving as an electro-optical device according to this embodiment has the following advantages. The liquid crystal device 300 of this embodiment has a transistor 1, a pixel electrode 10 provided corresponding to the transistor 1, a conductive film 231 as a first film provided between the transistor 1 and the pixel electrode 10, and a reflective film 232 as a second film provided between the conductive film 231 and the pixel electrode 10 and having a higher light reflectance than the conductive film 231.The liquid crystal device 300 also has a relay layer 23 as a first conductive layer electrically connected to the pixel electrode 10 via a contact hole 21 that penetrates the reflective film 232 and reaches the conductive film 231, and a contact plug 25 as a connecting member provided in the contact hole 21.
[0081] The relay layer 23 connected to the pixel electrode 10 via the contact plug 25 in this manner has a reflective film 232. Therefore, most of the light irradiated to the relay layer 23 is reflected by the reflective film 232. This makes it possible to suppress an increase in temperature of the liquid crystal device 300.
[0082] In the liquid crystal device 300 of this embodiment, the conductive film 231 contains titanium nitride, and the reflective film 232 contains aluminum. By using aluminum, which has high reflectivity, for the reflective film 232, it is possible to reflect approximately 90% of the light irradiated to the relay layer 23. In other words, it is possible to reduce the amount of light absorbed by the relay layer 23 to approximately 10%. As a result, it is possible to reduce the temperature rise of the liquid crystal device 300.
[0083] In the liquid crystal device 300 of this embodiment, the contact plug 25 serving as a connection member contains tungsten. Tungsten is a material that has excellent heat resistance and is easy to fill contact holes with a high aspect ratio. Therefore, by including tungsten in the contact plug 25, which is a pixel contact, the reliability of the conduction between the pixel electrode 10 and the relay layer 23 can be improved.
[0084] The liquid crystal device 300 of this embodiment includes a barrier member 24 between a contact plug 25 serving as a connection member and a side surface of a contact hole 21 . In this way, by providing the barrier member 24, it is possible to impart a function according to the material of the barrier member 24, etc., and therefore it is possible to further improve the reliability of the conduction between the pixel electrode 10 and the relay layer 23.
[0085] In the liquid crystal device 300 of this embodiment, the barrier member 24 contains tungsten nitride or titanium nitride. Tungsten nitride or titanium nitride has excellent adhesion to the interlayer insulating layer 20. Therefore, peeling of the contact plug 25 can be suppressed, and the reliability of the conduction between the pixel electrode 10 and the relay layer 23 can be further improved.
[0086] In the liquid crystal device 300 of this embodiment, the relay layer 23 as a first conductive layer has an extension portion 23a as a first extension portion extending along the X2 direction as a first direction, an extension portion 23b as a second extension portion extending along the Y2 direction as a second direction intersecting the X2 direction, and a protrusion portion 23c1 provided in the corner between the extension portion 23a and the extension portion 23b and overlapping with the pixel electrode 10 in a planar view, and the contact hole 21 overlaps with the protrusion portion 23c1 in a planar view.
[0087] In this manner, the relay layer 23 has the extending portion 23a, the extending portion 23b, and the protruding portion 23c1. In other words, the relay layer 23 has a large area. Therefore, the relay layer 23 can reflect a large amount of light. Therefore, the temperature rise of the liquid crystal device 300 can be suppressed. Furthermore, the contact hole 21 overlaps with the protruding portion 23c1 in a plan view. Therefore, the pixel electrode 10 and the relay layer 23 can be satisfactorily electrically connected to each other.
[0088] The liquid crystal device 300 of this embodiment includes a conductive layer 44 as a second conductive layer arranged between the relay layer 23 as a first conductive layer and the transistor 1, facing the relay layer 23 via a capacitive insulation layer 32, and an interlayer insulation layer 30 as an insulating member arranged between the relay layer 23 and the conductive layer 44 so as to cover an end portion 44e of the conductive layer 44, and the contact hole 21 overlaps with the relay layer 23 and the conductive layer 44 in a planar view, but does not overlap with the interlayer insulation layer 30.
[0089] Thus, in a plan view, contact hole 21 overlaps relay layer 23 and conductive layer 44, but does not overlap interlayer insulating layer 30. Here, relay layer 23 and conductive layer 44 form capacitive element 2, and capacitive element 2 does not overlap interlayer insulating layer 30. Therefore, contact hole 21 is provided at a position overlapping capacitive element 2. In other words, the position overlapping contact hole 21 is capacitive element 2. Therefore, the capacitance of capacitive element 2 can be increased. Furthermore, since the interlayer insulating layer 30 covering the end portion 44e of the conductive layer 44 is provided, a short circuit between the relay layer 23 and the conductive layer 44 can be suppressed, and the reliability of the capacitive element 2 can be improved.
[0090] 2. Embodiment 2 FIG. 17 is a schematic diagram showing an example of an electronic device, and is a schematic diagram showing a schematic configuration of a projection type display device 1000 as the electronic device. The projection display device 1000 is, for example, a three-panel projector equipped with three of the above-mentioned liquid crystal devices 300. The liquid crystal device 300R corresponds to a red display color, the liquid crystal device 300G corresponds to a green display color, and the liquid crystal device 300B corresponds to a blue display color. The control unit 1005 includes, for example, a processor and a memory, and controls the operations of the liquid crystal devices 300R, 300G, and 300B.
[0091] The illumination optical system 1001 supplies red light RL, of the light emitted from the illumination device 1002, which is a light source, to the liquid crystal device 300R, supplies green light GL to the liquid crystal device 300G, and supplies blue light BL to the liquid crystal device 300B. Each of the liquid crystal devices 300R, 300G, and 300B functions as a light modulation device that modulates the respective color lights RL, GL, and BL supplied from the illumination optical system 1001 in accordance with a display image. The projection optical system 1003 combines the light emitted from the liquid crystal device 300R, the liquid crystal device 300G, and the liquid crystal device 300B, and projects the combined light onto the screen 1004.
[0092] As described above, the projection display device 1000 serving as the electronic device of this embodiment includes the liquid crystal device 300 described above. Therefore, by employing the liquid crystal device 300 in which the temperature rise is suppressed, the performance of the projection display device 1000 can be improved.
[0093] The electronic device is not limited to the exemplified three-panel projector. For example, it may be a single-panel, two-panel, or projector equipped with four or more liquid crystal devices 300. The electronic device may also be a smartphone, a PDA (Personal Digital Assistant), a camera, a television, a car navigation device, a personal computer, a display, electronic paper, a calculator, a videophone, a POS (Point of Sale), a printer, a scanner, a copier, a video player, or a device equipped with a touch panel.
[0094] Although the preferred embodiment has been described above, the present invention is not limited to the above embodiment. Furthermore, the configuration of each part of the present invention can be replaced with any configuration that exhibits the same function as the above embodiment, and any configuration can be added. [Explanation of symbols]
[0095] 1...transistor, 2...capacitive element, 3...scanning line, 4...data line, 5...capacitive line, 6...scanning line driving circuit, 7...data line driving circuit, 8...sealing member, 9...external terminal, 10...pixel electrode, 12...alignment film, 20...interlayer insulating layer, 21...contact hole, 21a...contact hole, 22...protective layer, 23...relay layer, 23a, 23b...extension, 23c, 23c1...extension, 231...conductive film, 232...reflective film, 24...barrier member, 24a...bar Rear layer, 25...contact plug, 25a...tungsten layer, 30...interlayer insulating layer, 32...capacitive insulating layer, 40...interlayer insulating layer, 41...relay layer, 42...conductive layer, 43...contact hole, 44...conductive layer, 44a, 44b...extension, 44c, 44c1...extension, 44e...end, 50...interlayer insulating layer, 51, 52...contact hole, 53, 54...relay layer, 60...interlayer insulating layer, 61...conductive layer, 62...light shielding member, 70...semiconductor layer, 70a, 70b...LDD region, 70c...channel region, 70d...drain region, 70s...source region, 71...contact hole, 72...gate insulating layer, 73...contact hole, 74...gate electrode, 75...contact hole, 76...interlayer insulating layer, 80...light shielding layer, 81...contact hole, 82...interlayer insulating layer, 90...base, 95...photoresist, 100...element substrate, 200...counter substrate, 210...base, 220...insulating layer, 230...common electrode Pole, 240... alignment film, 300... liquid crystal device, 300B... liquid crystal device, 300G... liquid crystal device, 300R... liquid crystal device, 1000... projection display device, 1001... illumination optical system, 1002... illumination device, 1003... projection optical system, 1004... screen, 1005... control unit, A1... display area, A2... peripheral area, E1... image signal, G1... scanning signal, RL... red light, GL... green light, BL... blue light, Lc... liquid crystal layer, IL... incident light, ML... modulated light, P... pixel
Claims
1. A transistor and a pixel electrode provided corresponding to the transistor; a first conductive layer including a first film provided between the transistor and the pixel electrode, and a second film provided between the first film and the pixel electrode and having a higher light reflectance than the first film, the first conductive layer penetrating the second film and electrically connected to the pixel electrode via a contact hole reaching the first film; a connection member provided in the contact hole, Electro-optical device.
2. the first film includes titanium nitride; The second film includes aluminum.
2. The electro-optical device according to claim 1.
3. The connecting member includes tungsten.
2. The electro-optical device according to claim 1.
4. a barrier member is provided between the connection member and a side surface of the contact hole; 4. The electro-optical device according to claim 3.
5. The barrier member comprises tungsten nitride or titanium nitride.
5. The electro-optical device according to claim 4.
6. the first conductive layer has a first extension portion extending along a first direction, a second extension portion extending along a second direction intersecting the first direction, and a protruding portion provided at a corner between the first extension portion and the second extension portion and overlapping with the pixel electrode in a plan view; the contact hole overlaps with the protruding portion in a plan view; 2. The electro-optical device according to claim 1.
7. a second conductive layer provided between the first conductive layer and the transistor, the second conductive layer being opposed to the first conductive layer via a capacitance insulating layer; an insulating member provided between the first conductive layer and the second conductive layer so as to cover an end of the second conductive layer; the contact hole overlaps with the first conductive layer and the second conductive layer in a plan view, but does not overlap with the insulating member; 2. The electro-optical device according to claim 1.
8. 8. An electronic device comprising the electro-optical device according to claim 1.
Citation Information
Patent Citations
Electro-optic device and electronic apparatus
JP2019078825A