Switching control circuit and power source circuit

Abstract

To provide a switching control circuit that reduces a loss of a PFC circuit by switching a plurality of operation modes.SOLUTION: A switching control circuit for generating an output voltage at a target level from an AC voltage, includes: an inductor to which a voltage according to the AC voltage is applied; a first transistor that controls an inductor current; and a second transistor that is connected to the inductor and the first transistor. The switching control circuit includes: a first driving circuit that turns on the first transistor after the inductor current becomes a first predetermined value and turns off the first transistor when an ON period according to the output voltage has passed; and a second driving circuit that is driven in a first mode of switching the first transistor with the second transistor kept off when the ON period of the first transistor is shorter than a first period, and is driven in a second mode of switching the second transistor complementarily with the first transistor when the ON period of the first transistor is longer than the first period.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a switching control circuit and a power supply circuit. [Background technology]

[0002] A typical power factor correction circuit (hereinafter referred to as a PFC (Power Factor Correction) circuit) that operates in critical mode improves the power factor by making the waveform of the peak value of the inductor current flowing through the inductor similar to the waveform of the rectified voltage obtained by rectifying an AC voltage (for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-052578 [Patent Document 2] International Publication No. 2023 / 048074 Summary of the Invention [Problem to be solved by the invention]

[0004] Incidentally, PFC circuits operate in either critical conduction mode or continuous conduction mode depending on the required output power. Critical conduction mode is used for relatively low-power devices, while continuous conduction mode is used for relatively high-power devices. This proposal is related to the critical conduction mode.

[0005] However, when the PFC circuit operates in the boundary mode, switching losses in the transistors and conduction losses in the diodes can become a problem.

[0006] The present invention has been made in consideration of the above-mentioned conventional problems, and has an object to provide a switching control circuit that can switch between multiple operation modes to reduce loss in a PFC circuit. [Means for solving the problem]

[0007] A first aspect of the present invention that solves the above-mentioned problems is a switching control circuit that controls switching of the first and second transistors of a power supply circuit that generates an output voltage of a target level from the AC voltage, the switching control circuit including: an inductor to which a voltage corresponding to an AC voltage is applied; a first transistor that controls an inductor current flowing through the inductor; and a second transistor connected to the inductor and the first transistor, the switching control circuit comprising: a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor when an on-period corresponding to the output voltage has elapsed; and a second drive circuit that drives the first transistor in a first mode in which the first transistor is switched while keeping the second transistor off when the on-period of the first transistor is shorter than the first period, and drives the second transistor in a second mode in which the second transistor is switched complementarily to the first transistor when the on-period of the first transistor is longer than the first period.

[0008] A second aspect of the present invention for solving the above-mentioned problem is a switching control circuit for controlling switching of the first and second transistors of a power supply circuit that generates an output voltage of a target level from the AC voltage, the power supply circuit including an inductor to which a voltage corresponding to an AC voltage is applied, a first transistor that controls an inductor current flowing through the inductor, and a second transistor connected to the inductor and the first transistor, the switching control circuit including a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor after an on-period corresponding to the output voltage has elapsed; and and a second drive circuit that drives the second transistor in a first synchronous rectification mode when the instantaneous value becomes lower than a predetermined level, and drives the second transistor in a second synchronous rectification mode when the instantaneous value becomes higher than the predetermined level, wherein the first synchronous rectification mode is a mode in which the second transistor is switched complementarily to the first transistor, and the second synchronous rectification mode is a mode in which the second transistor is turned on after the first transistor is turned off, and the second transistor is turned off when a predetermined period has elapsed since the inductor current flows in a second direction opposite to a first direction in which the inductor current flows when the first transistor is on.

[0009] A third aspect of the present invention that solves the above-described problems is a switching control circuit that controls switching of the first and second transistors of a power supply circuit that generates an output voltage of a target level from the AC voltage, the switching control circuit including: an inductor to which a voltage corresponding to an AC voltage is applied; a first transistor that controls an inductor current flowing in the inductor; and a second transistor connected to the inductor and the first transistor, the switching control circuit comprising: a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor when an on-period corresponding to the output voltage has elapsed; and a second drive circuit that turns on the second transistor after the first transistor has been turned off, and turns off the second transistor when a predetermined period has elapsed since the inductor current flows in a second direction opposite to a first direction in which the inductor current flows when the first transistor is on, the predetermined period being calculated based on the on-period and a period from when the first transistor is turned off until the inductor current reaches the first predetermined value.

[0010] Furthermore, a fourth aspect of the present invention that solves the above-mentioned problems is a power supply circuit that generates an output voltage of a target level from an AC voltage, the power supply circuit including: an inductor to which a voltage corresponding to the AC voltage is applied; a first transistor that controls an inductor current flowing through the inductor; a second transistor connected to the inductor and the first transistor; and a switching control circuit that controls switching of the first and second transistors, wherein the switching control circuit includes: a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor when an on-period corresponding to the output voltage has elapsed; and a second drive circuit that drives the first transistor in a first mode in which the first transistor is switched while keeping the second transistor off when the on-period of the first transistor is shorter than the first period, and drives the second transistor in a second mode in which the second transistor is switched complementarily to the first transistor when the on-period of the first transistor is longer than the first period.

[0011] A fifth aspect of the present invention for solving the above-mentioned problems is a power supply circuit for generating an output voltage of a target level from an AC voltage, the power supply circuit including: an inductor to which a voltage corresponding to the AC voltage is applied; a first transistor for controlling an inductor current flowing through the inductor; a second transistor connected to the inductor and the first transistor; and a switching control circuit for controlling switching of the first and second transistors, wherein the switching control circuit turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor after an on-period corresponding to the output voltage has elapsed; and a second drive circuit that drives the second transistor in a first synchronous rectification mode when the instantaneous value of the output voltage falls below a predetermined level corresponding to the output voltage, and drives the second transistor in a second synchronous rectification mode when the instantaneous value of the output voltage rises above the predetermined level, wherein the first synchronous rectification mode is a mode in which the second transistor is switched on complementarily to the first transistor, and the second synchronous rectification mode is a mode in which the second transistor is turned on after the first transistor is turned off, and the second transistor is turned off when a predetermined period has elapsed since the inductor current flows in a second direction opposite to a first direction in which the inductor current flows when the first transistor is on.

[0012] Further, a sixth aspect of the present invention that solves the above-mentioned problem is a power supply circuit that generates an output voltage of a target level from an AC voltage, the power supply circuit including: an inductor to which a voltage corresponding to the AC voltage is applied; a first transistor that controls an inductor current flowing in the inductor; a second transistor connected to the inductor and the first transistor; and a switching control circuit that controls switching of the first and second transistors, wherein the switching control circuit includes: a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor when an on-period corresponding to the output voltage has elapsed; and a second drive circuit that turns on the second transistor after the first transistor has been turned off, and turns off the second transistor when a predetermined period has elapsed since the inductor current flows in a second direction opposite to a first direction in which the inductor current flows when the first transistor is on, wherein the predetermined period is calculated based on the on-period and a period from when the first transistor is turned off until the inductor current reaches the first predetermined value. [Effects of the Invention]

[0013] According to the present invention, it is possible to provide a switching control circuit that can reduce loss in a PFC circuit by switching between a plurality of operation modes. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is a diagram illustrating an example of an AC-DC converter 10. FIG. [Figure 2] FIG. 2 is a diagram illustrating an example of a power factor correction IC 26. [Figure 3] FIG. 2 is a diagram illustrating an example of a switching control circuit 203. [Figure 4] FIG. 10 is a diagram illustrating an example of the operation of the switching control circuit 203 in mode A. [Figure 5] 2A to 2C are diagrams showing main waveforms of the AC-DC converter 10. [Figure 6]This is a diagram showing an example of the operation of the switching control circuit 203 in mode B. [Figure 7] This is a diagram showing an example of the operation of the switching control circuit 203 in mode C. [Figure 8] This is a diagram showing an example of the relationship between modes A - C and the phase angle of the AC voltage Vac. [Figure 9A] This is a diagram showing an example of the relationship between modes A - C and the on - time Ton. [Figure 9B] This is a diagram showing an example of the relationship between modes A - C and the output period Tout. [Figure 10] This is a diagram showing an example of the conditions when transitioning between modes A - C. [Figure 11A] This is a diagram showing the switching loss and conduction loss in a general power factor correction circuit. [Figure 11B] This is a diagram showing the switching loss and conduction loss when operating in modes A - C.

Embodiments for Carrying Out the Invention

[0015] From the description in this specification and the attached drawings, at least the following matters become clear. Hereinafter, the "circuit" in this embodiment includes not only analog circuits and wired - logic type logic circuits, but also functional blocks (or means) included in a DSP (Digital Signal Processor), a microcomputer, etc., which can execute digital arithmetic processing.

[0016] Hereinafter, preferred embodiments of the present invention will be described while referring to the drawings. The same or equivalent components, members, etc. shown in each drawing are denoted by the same reference numerals, and repeated explanations will be omitted as appropriate.

[0017] =====This Embodiment===== <<<Overview of the AC - DC Converter 10>>><001 is a diagram showing the configuration of an AC-DC converter 10 according to one embodiment of the present invention. The AC-DC converter 10 is a step-up PFC circuit that generates an output voltage Vout at a target level from an AC voltage Vac of a commercial power supply.

[0018] The AC-DC converter 10 includes a full-wave rectifier circuit 20, capacitors 21 and 24, a coil L, NMOS transistors 22 and 23, a resistor 25, a power factor correction IC 26, and resistors 27 and 28. The AC-DC converter 10 corresponds to a "power supply circuit."

[0019] The full-wave rectifier circuit 20 full-wave rectifies the input predetermined AC voltage Vac and outputs it as an input voltage Vrec to the capacitor 21 and the coil L. The AC voltage Vac has, for example, an effective value of 100 to 240 V and a frequency of 50 to 60 Hz. Hereinafter, in this embodiment, voltage basically means a potential difference with respect to a reference point (GND in the figure), but the AC voltage Vac refers to the voltage between terminals. The input voltage Vrec corresponds to a "full-wave rectified voltage."

[0020] Capacitor 21 smoothes the input voltage Vrec, and capacitor 24 is an element into which the output voltage of the boost chopper circuit is charged. Coil L and NMOS transistors 22 and 23, together with capacitor 24, form the boost chopper circuit. Therefore, the charging voltage of capacitor 24 becomes the DC output voltage Vout.

[0021] Furthermore, when the inductor current IL flows in the direction of the arrow (first direction) through the coil L, the direction of the inductor current IL is considered to be positive, and when the inductor current IL flows in the opposite direction to the arrow (second direction), the direction of the inductor current IL is considered to be negative. Note that the coil L corresponds to the "first inductor."

[0022] The resistor 25 is an element for detecting the current flowing through the NMOS transistor 22 and the current flowing through the load 11, and has one end connected to the source terminal of the NMOS transistor 22 and ground, and the other end connected to the full-wave rectifier circuit 20 and the terminal CS of the power factor correction IC 26.

[0023] The power factor correction IC 26 is an integrated circuit that controls the switching of the NMOS transistor 22 so that the level of the output voltage Vout becomes a target level (e.g., 400 V) while improving the input power factor of the AC-DC converter 10. Specifically, the power factor correction IC 26 drives the NMOS transistor 22 based on the inductor current IL flowing through the coil L and the output voltage Vout. The coil L corresponds to an "inductor."

[0024] The power factor correction IC 26 also controls the switching of the NMOS transistor 23, as will be described in detail later.

[0025] The NMOS transistor 22 is a power transistor for controlling the power to the load 11 of the AC-DC converter 10. In this embodiment, the NMOS transistor 22 is an N-type MOS (Metal Oxide Semiconductor) transistor, but is not limited to this and may be another switching element such as a bipolar transistor. A gate electrode of the NMOS transistor 22 is connected to the terminal OUT1. The NMOS transistor 22 has a parasitic capacitor Cp. The NMOS transistor 22 corresponds to a "first transistor."

[0026] The NMOS transistor 23 is a power transistor for controlling the power to the load 11 together with the NMOS transistor 22, and is switched complementarily with the NMOS transistor 22. The NMOS transistor 23 has a parasitic diode Dp with its source side serving as the anode and its drain side serving as the cathode. When the NMOS transistors 22 and 23 are off, the inductor current IL flowing from the coil L to the capacitor 24 flows via the parasitic diode Dp of the NMOS transistor 23. The gate electrode of the NMOS transistor 23 is connected to the terminal OUT2. The NMOS transistor 23 corresponds to a "second transistor."

[0027] The resistors 27 and 28 form a voltage divider circuit that divides the output voltage Vout and generates a feedback voltage Vfb that is used when switching the NMOS transistor 22. The feedback voltage Vfb generated at the node to which the resistors 27 and 28 are connected is applied to the terminal FB.

[0028] <<<About the Power Factor Correction IC26>>> ==Configuration of Power Factor Correction IC26== 2 is a diagram showing an example of the power factor correction IC 26. The power factor correction IC 26 includes a level shifter (LS) 200, a comparator 201, an AD converter (ADC: Analog-to-Digital Converter) 202, a switching control circuit 203, and buffer circuits 204 and 205. The switching control circuit 203 is formed by a digital circuit.

[0029] The level shifter 200 level-shifts the voltage Vcs, and the comparator 201 compares the level-shifted voltage Vcs with a reference voltage Vrefa and outputs a signal DET. Specifically, when the voltage value of the voltage Vcs corresponding to the inductor current IL reaches a predetermined value, the comparator 201 outputs an “H” level signal DET indicating that the inductor current IL has decreased to almost zero (hereinafter, for convenience, “almost zero” will be simply referred to as “zero”). The reference voltage Vrefa is the voltage of the level-shifted voltage Vcs when the inductor current IL becomes zero (i.e., when the voltage value of the voltage Vcs reaches a predetermined value), and the predetermined value corresponds to a “first predetermined value.” The voltage Vcs may also be a digital signal indicating whether the inductor current IL is flowing. The AD converter 202 converts the feedback voltage Vfb into a digital value.

[0030] The switching control circuit 203 is a circuit that outputs a drive signal Vq1 for driving the NMOS transistor 22 based on a voltage Vcs corresponding to the inductor current IL and a feedback voltage Vfb. The switching control circuit 203 is a digital circuit configured with a wired logic circuit that performs various calculations, and is configured to include, for example, logic gates, flip-flops, and memories. However, the switching control circuit 203 may also be a DSP (Digital Signal Processor) or a microcomputer. Details of the switching control circuit 203 will be described later.

[0031] Furthermore, the switching control circuit 203 outputs a drive signal Vq2 for driving the NMOS transistor 23, which will be described in detail later.

[0032] The buffer circuit 204 is a drive circuit that drives the NMOS transistor 22 based on the drive signal Vq1. Specifically, the buffer circuit 204 turns on the NMOS transistor 22 when the drive signal Vq1 goes high (hereinafter referred to as "H" level), and turns off the NMOS transistor 22 when the drive signal Vq1 goes low (hereinafter referred to as "L" level).

[0033] The buffer circuit 205 is a drive circuit that drives the NMOS transistor 23 based on the drive signal Vq2. Specifically, the buffer circuit 205 turns on the NMOS transistor 23 when the drive signal Vq2 goes high, and turns off the NMOS transistor 23 when the drive signal Vq2 goes low.

[0034] ==Configuration of Switching Control Circuit 203== 3 is a diagram illustrating an example of the switching control circuit 203. The switching control circuit 203 outputs a drive signal Vq1 that drives the NMOS transistor 22 based on the inductor current IL and the feedback voltage Vfb, and outputs a drive signal Vq2 that drives the NMOS transistor 23.

[0035] Specifically, when the load 11 is in a light load state, the switching control circuit 203 switches the NMOS transistor 22 in mode A. When the load 11 is in a heavy load state, the switching control circuit 203 switches the NMOS transistor 22 in mode B or mode C. Specifically, when the load 11 is in a heavy load state and the instantaneous value of the AC voltage Vac does not exceed half the output voltage Vout, the switching control circuit 203 switches the NMOS transistor 22 in mode B, and when it exceeds the instantaneous value, the switching control circuit 203 switches the NMOS transistor 22 in mode C.

[0036] Furthermore, as will be described in detail later, Mode A is a mode in which the switching control circuit 203 performs critical operation using the parasitic diode Dp of the NMOS transistor 23 as a diode. Mode B is a mode in which the switching control circuit 203 performs synchronous rectification by switching the NMOS transistor 23 complementarily to the NMOS transistor 22. Mode C is a mode in which the switching control circuit 203 performs synchronous rectification so as to switch the NMOS transistor 22 at zero volts. Mode A corresponds to the "first mode," Mode B corresponds to the "second mode" and the "first synchronous rectification mode," and Mode C corresponds to the "second synchronous rectification mode."

[0037] The load 11 is a light load when, for example, the current flowing through the load 11 is smaller than a predetermined value (for example, 0.1 A) and the on-period Ton, which will be described later, is shorter than the predetermined period Ton0. On the other hand, the load 11 is a heavy load when, for example, the current steadily flowing through the load 11 is larger than a predetermined value (for example, 0.1 A) and the on-period Ton is longer than the predetermined period Ton0. The predetermined period Ton0 corresponds to the "first period."

[0038] The switching control circuit 203 includes an on-period output circuit 300, a first drive circuit 301, a detection circuit 302, a second drive circuit 303, and an arithmetic circuit 304.

[0039] The on-period output circuit 300 is a circuit that outputs information indicating the on-period Ton of the NMOS transistor 22 (hereinafter simply referred to as the on-period Ton) based on the feedback voltage Vfb.

[0040] The on-period output circuit 300 includes an error amplifier circuit (ERR) 400 and a PI control circuit (PI) 401. The "on-period" is, for example, a digital value indicating a voltage.

[0041] The error amplifier circuit 400 calculates an error E1, which is the difference between a reference voltage Vref, which is the reference for a target level of the output voltage Vout (for example, 400 V), and the feedback voltage Vfb. The feedback voltage Vfb is a digital value converted from the feedback voltage Vfb by the AD converter 202.

[0042] The PI control circuit 401 calculates an integral value of the error E1 and a proportional value of the error E1, and outputs an on-period Ton for matching the level of the feedback voltage Vfb with the level of the reference voltage Vref based on the integral value and the proportional value.

[0043] ===First driving circuit 301=== The first drive circuit 301 drives the NMOS transistor 22 based on the drive signal Vq1 that corresponds to the input on-period Ton. Specifically, when the inductor current IL decreases and becomes zero and the comparator 201 outputs an "H" level signal DET, the first drive circuit 301 outputs the drive signal Vq1 that turns on the NMOS transistor 22 after a delay time Tdelay.

[0044] After that, when the on-period Ton has elapsed, the first drive circuit 301 outputs a drive signal Vq1 that turns off the NMOS transistor 22. The first drive circuit 301 also measures the period from when the NMOS transistor 22 is turned off until the comparator 201 outputs the "H" level signal DET, and outputs this as the output period Tout. The output period Tout refers to the period during which the power stored in the coil L is supplied to the capacitor 24.

[0045] The detection circuit 302 is a circuit that detects the phase angle of the AC voltage Vac based on the output period Tout. Specifically, as will be described in detail later, the detection circuit 302 detects the state of the load 11, the phase, instantaneous value, and peak of the AC voltage Vac based on the on-period Ton and the output period Tout, and outputs a signal mode that indicates one of modes A to C based on these. The detection circuit 302 also corresponds to a "detection circuit."

[0046] ===Second driving circuit 303=== The second drive circuit 303 outputs a drive signal Vq2 that turns on and off the NMOS transistor 23 based on the signal DET from the comparator 201, a reverse charging period Trev (described later), and a signal mode. Specifically, the second drive circuit 303 outputs a drive signal Vq2 that turns off the NMOS transistor 23 based on the signal mode indicating mode A, and outputs a drive signal Vq2 that turns on and off the NMOS transistor 23 complementary to the NMOS transistor 22 based on the signal mode indicating modes B and C.

[0047] The calculation circuit 304 is a circuit that calculates the reverse charging period Trev based on the on-period Ton and the output period Tout when the switching control circuit 203 operates in mode C. As will be described in detail later, the reverse charging period Trev is a period during which the NMOS transistor 23 continues to be on after the NMOS transistor 22 is turned off and the inductor current IL becomes zero.

[0048] ==Operation in Modes A to C== In the following, first, the operation of switching control circuit 203 in modes A to C will be described, and then it will be described under what conditions switching control circuit 203 operates in which of modes A to C.

[0049] === Mode A Operation === 4 is a diagram showing an example of the operation of the switching control circuit 203 in mode A. When the switching control circuit 203 operates in mode A, the second drive circuit 303 outputs a drive signal Vq2 that turns off the NMOS transistor 23. Therefore, the output voltage Vout of the AC-DC converter 10 is generated based on the inductor current IL that flows through the parasitic diode Dp of the NMOS transistor 23.

[0050] First, at time t0, the inductor current IL decreases and becomes zero, and the comparator 201 changes the signal DET to the “H” level. Then, at time t1, which is the delay time Tdelay after time t0, the first drive circuit 301 outputs the “H” level signal Vq1.

[0051] When the drive signal Vq1 goes to the "H" level, the NMOS transistor 22 turns on, and the inductor current IL increases.

[0052] At time t2, when the drive signal Vq1 goes high and the on-period Ton has elapsed, the first drive circuit 301 outputs the drive signal Vq1 at low level to turn off the NMOS transistor 22. As a result, the inductor current IL gradually decreases. At time t3, the inductor current IL decreases and becomes zero, and the operation at time t0 is repeated.

[0053] When the AC-DC converter 10 generates an output voltage Vout of a target level from a predetermined AC voltage Vac, the capacitance of the capacitor 24 is sufficiently large, and the feedback voltage Vfb remains substantially constant within a period of approximately one cycle of Vac. As a result, the on-period Ton output from the on-period output circuit 300 also remains substantially constant, and the period during which the NMOS transistor 22 is on (for example, the period from time t1 to t2) also remains substantially constant.

[0054] Furthermore, when the NMOS transistor 22 is turned on, if the level of the voltage Vrec obtained by rectifying the AC voltage Vac increases, the current value of the inductor current IL also increases. As a result, as shown in Figure 5, the waveform of the peak value of the inductor current IL becomes similar to the waveform of the voltage Vrec. This improves the power factor.

[0055] ===Operation in Mode B=== 6 is a diagram showing an example of the operation of the switching control circuit 203 in mode B. When the switching control circuit 203 operates in mode B, the second drive circuit 303 outputs a drive signal Vq2 that turns on and off the NMOS transistor 23 in a complementary manner to the NMOS transistor 22.

[0056] First, at time t10, the inductor current IL decreases and becomes zero, and the comparator 201 changes the signal DET to "H" level. Accordingly, the second drive circuit 303 outputs a "L" level signal Vq2 to turn off the NMOS transistor 23. Then, at time t11, which is the delay time Tdelay after time t10, the first drive circuit 301 outputs a "H" level signal Vq1.

[0057] When the drive signal Vq1 goes to the "H" level, the NMOS transistor 22 turns on, and the inductor current IL increases.

[0058] Furthermore, at time t12 when the drive signal Vq1 goes high and the on-period Ton has elapsed, the first drive circuit 301 outputs the drive signal Vq1 at low level to turn off the NMOS transistor 22. As a result, the inductor current IL gradually decreases.

[0059] At time t13, when the dead time Tdead has elapsed since time t12, the second drive circuit 303 outputs the drive signal Vq2 at the "H" level to turn on the NMOS transistor 23.

[0060] At time t14 when the inductor current IL decreases to zero, the comparator 201 changes the signal DET to the “H” level, and the second drive circuit 303 outputs the “L” level drive signal Vq2 to turn off the NMOS transistor 23. After time t14, the same operation is repeated.

[0061] In this way, by turning the NMOS transistors 22 and 23 on and off complementarily, the inductor current IL flows to the capacitor 24 via the NMOS transistor 23, not via the parasitic diode Dp. As a result, the conduction loss is not the amount of the forward voltage of the parasitic diode Dp, but the amount of the on-resistance of the NMOS transistor 23. Therefore, the conduction loss is reduced. The size of the NMOS transistor 23 is designed, and the gate voltage is also determined so that the loss due to the on-resistance is smaller than the loss due to the parasitic diode Dp.

[0062] ===Mode C Behavior=== 7 is a diagram showing an example of the operation of the switching control circuit 203 in mode C. When the switching control circuit 203 operates in mode C, the second drive circuit 303 outputs a drive signal Vq2 that turns on and off the NMOS transistor 23 in a complementary manner to the NMOS transistor 22.

[0063] Furthermore, the switching control circuit 203 typically operates in mode C when the load 11 is in a heavy load state and the phase angle of the AC voltage Vac is high. Therefore, if the switching control circuit 203 operates in the same manner as in mode B, as indicated by the dashed dotted line, the drain-source voltage Vds of the NMOS transistor 22 does not drop sufficiently when the NMOS transistor 22 is turned on. This increases the switching loss of the NMOS transistor 22. For this reason, as will be described later, a reverse charging period Trev is provided when the switching control circuit 203 operates in mode C.

[0064] First, at time t20, the first drive circuit 301 outputs a high-level signal Vq1. When the drive signal Vq1 goes high, the NMOS transistor 22 turns on, causing the inductor current IL to increase.

[0065] At time t21, when the drive signal Vq1 goes high and the on-period Ton has elapsed, the first drive circuit 301 outputs a low-level drive signal Vq1 to turn off the NMOS transistor 22. As a result, the inductor current IL gradually decreases. While the inductor current IL is decreasing, the voltage Vds maintains a high voltage level.

[0066] At time t22, when the dead time Tdead has elapsed since time t21, the second drive circuit 303 outputs the drive signal Vq2 at the "H" level to turn on the NMOS transistor 23.

[0067] At time t23 when the inductor current IL decreases to zero, the comparator 201 changes the signal DET to "H" level. The second drive circuit 303 starts timing the reverse charging period Trev, which will be described in detail later. The reverse charging period Trev is a period for performing zero-volt switching on the NMOS transistor 22 even when the load 11 is in a heavy load state.

[0068] At time t24, when the reverse charging period Trev has elapsed since time t23, the second drive circuit 303 outputs an “L” level drive signal Vq2 to turn off the NMOS transistor 23. Furthermore, the voltage Vds begins to decrease because the decrease in the inductor current IL has finished.

[0069] Here, because the voltage level of the output voltage Vout is higher than the voltage level of the rectified voltage Vrec, the inductor current IL flows in the negative direction during the reverse charging period Trev. Then, at time t23, when the NMOS transistor 23 is turned off, the inductor current IL that had been flowing through the coil L attempts to continue flowing in the negative direction, so charge is drawn from the parasitic capacitor Cp of the NMOS transistor 22, and the drain-source voltage Vds of the NMOS transistor 22 drops, falling to near 0 V. The reverse charging period Trev corresponds to a "predetermined period."

[0070] At time t25, when a predetermined period Ta has elapsed since time t24, the first drive circuit 301 outputs an "H" level signal Vq1. Then, the voltage Vds drops to 0 V. In this way, the NMOS transistor 22 is turned on with the drain-source voltage Vds lowered to 0 V, thereby reducing the switching loss of the NMOS transistor 22. After time t25, the same operation is repeated.

[0071] When the switching control circuit 203 operates in mode C, zero-voltage switching is realized and the switching loss of the NMOS transistor 22 is reduced, so that the loss of the AC-DC converter 10 is reduced to the same extent as in mode B in which the NMOS transistor 22 is switched when the voltage Vds becomes 0 V. On the other hand, when the switching control circuit 203 operates in mode A, the switching of the NMOS transistor 23 is repeated in a short time, which increases the switching loss of the NMOS transistor 23, so the NMOS transistor 23 is controlled to be always off.

[0072] === Calculation of reverse charging period Trev === Here, we will explain the reverse charging period Trev calculated by the calculation circuit 304. First, the inductor current IL is expressed by the following equations (1) and (2) when the NMOS transistor 22 is turned on and when the NMOS transistor 22 is turned off. In the following, the inductance value of the coil L is assumed to be L. IL=Vrec / L×Ton Equation (1) IL=(Vout-Vrec) / L×Tout...Equation (2)

[0073] Therefore, the relationship between the on-period Ton and the output period Tout is expressed by the following equation (3) based on the equations (1) and (2). Tout / Ton=Vrec / (Vout-Vrec)...Equation (3)

[0074] The current value Irev of the inductor current IL flowing in the negative direction during the reverse charging period Trev is given by the following equation (4). Irev=(Vout-Vrec) / L×Trev...Equation (4)

[0075] When the NMOS transistor 23 is turned off, the output voltage Vout is applied to the parasitic capacitor Cp, and the rectified voltage Vrec is applied to the capacitor 21. If the capacitance of the capacitor 21 is sufficiently larger than the capacitance of the parasitic capacitor Cp, then the parasitic capacitor Cp and the coil L are involved in the resonant operation. In an ideal state, the relationship between the resonant current I and the resonant voltage V is expressed by the following equation (5) based on the law of conservation of energy. Note that the capacitance of the parasitic capacitor Cp is Cp. 1 / 2×Cp×V^2+1 / 2×L×I^2=1 / 2×Cp×(Vout-Vrec)^2+1 / 2×L×Irev^2...Equation (5)

[0076] If zero-volt switching is taken into account in equation (5), the resonant current I becomes 0 at the lower peak of the resonant operation, and the resonant voltage V becomes the rectified voltage Vrec. Therefore, the current value Irev_min of the inductor current IL flowing in the negative direction in this case is given by the following equation (6). Irev_min=√{Cp / L×[Vrec^2―(Vout-Vrec)^2]} Formula (6)

[0077] Then, from equations (3), (4), and (6), the reverse charging period Trev for turning off the NMOS transistor 23 at the time of the lower limit peak of the resonant operation is calculated as shown in the following equation (7). Trev=√“L×Cp×{[Vrec^2 / (Vout-Vrec)^2]-1}” =√(L×Cp)×√{[Vrec / (Vout-Vrec)]^2-1} =√(L×Cp)×√[(Tout / Ton)^2-1] Formula (7)

[0078] ==Mode A to C Switching Conditions and Operation of Detection Circuit 302== FIG. 8 is a diagram showing an example of the relationship between modes A to C and the phase angle of the AC voltage Vac. FIG. 9A is a diagram showing an example of the relationship between modes A to C and the on-period Ton. FIG. 9B is a diagram showing an example of the relationship between modes A to C and the output period Tout. FIG. 10 is a diagram showing an example of the conditions for transitioning between modes A to C. Below, the conditions for switching the operation mode of the switching control circuit 203 to one of modes A to C and the operation of the detection circuit 302 will be described with reference to FIGS. 8 to 10.

[0079] As shown in FIG. 8, the detection circuit 302 detects the state of the load 11, the phase, instantaneous value, and peak of the AC voltage Vac based on the on-period Ton and the output period Tout, and outputs a signal mode indicating one of modes A to C.

[0080] ===Detecting Load 11 Conditions=== As shown in FIG. 9A, when the on-period Ton is shorter than a predetermined period Ton0, the detection circuit 302 detects that the load 11 is in a light load state and outputs a signal mode indicating mode A. On the other hand, when the phase angle of the AC voltage Vac becomes a medium phase angle, the peak value of the inductor current IL increases and the output period Tout becomes longer. Then, as shown in FIG. 10, when the state in which the output period Tout is longer than the predetermined period Tout0 occurs N0 consecutive times in terms of the number of switching operations of the NMOS transistor 22, the detection circuit 302 detects that the load 11 is in a heavy load state based on the fact that the on-period Ton is longer than the predetermined period Ton0 and outputs a signal mode indicating mode B. Note that N0 times may be one time, but by setting it to multiple times, frequent switching between modes A and B when the load 11 changes state between a light load and a heavy load can be suppressed.

[0081] Therefore, when the load 11 is in a light load state and the on-period Ton is short, the detection circuit 302 may always output the signal mode indicating mode A, as shown in FIG. 9A. However, when the load 11 is in a heavy load state, the on-period Ton is longer than when the load is light, and the peak value of the inductor current IL increases as the phase angle of the AC voltage Vac increases. As the peak value increases, the power stored in the coil L also increases, and the output period Tout becomes longer. Therefore, the detection circuit 302 detects the phase angle of the AC voltage Vac based on the output period Tout. Then, as shown in FIGS. 8 and 9B, when the output period Tout becomes longer than the period Tout0 and the phase angle falls within the range PA, the detection circuit 302 outputs the signal mode indicating mode B. Note that the range PA corresponds to the "first range," and the output period Tout corresponds to the "period from when the first transistor is turned off to when the inductor current reaches the first predetermined value."

[0082] 8, when the phase angle is out of the range PA, the detection circuit 302 outputs a signal mode indicating mode A. Furthermore, as shown in FIG. 10, when the state in which the output period Tout is shorter than the period Tout0 occurs N0 times in succession in terms of the number of switching times of the NMOS transistor 22, the detection circuit 302 detects that the state of the load 11 is a light load, and outputs a signal mode indicating mode A.

[0083] ===Detection of instantaneous value of AC voltage Vac=== The detection circuit 302 detects the instantaneous value of the input voltage Vrec based on the on-period Ton and the output period Tout. When the instantaneous value of the input voltage Vrec becomes half the output voltage Vout, the on-period Ton and the output period Tout become equal, as can be seen from the above equation (3).

[0084] Therefore, as shown in FIGS. 9A, 9B, and 10, when the instantaneous value of the input voltage Vrec is higher than half the output voltage Vout and the output period Tout is longer than the period Tout1, which is the output period Tout when the on-period Ton and the output period Tout are equal, the detection circuit 302 outputs a signal mode indicating mode C. In this case, the phase angle of the AC voltage Vac is within the range PB, as shown in FIG. 8. Note that in this case, the on-period Ton is longer than the predetermined period Ton0. Note that half the output voltage Vout corresponds to the "predetermined level," and the range PB corresponds to the "second range."

[0085] Further conditions include a condition that the on-period Ton is shorter than the output period Tout N1 times in succession, a condition that the period T0 elapses while operating in mode B, and a condition that the feedback voltage Vfb is higher than the voltage Va, as shown in FIG. 10. Note that the period Tout1 is longer than the period Tout0. Furthermore, the period T0 corresponds to a "second period," and the period voltage Vfb being higher than the voltage Va corresponds to a "predetermined condition."

[0086] On the other hand, when the instantaneous value of the input voltage Vrec is lower than half the output voltage Vout, the detection circuit 302 outputs a signal mode indicating mode B if the output period Tout is longer than the predetermined period Tout0, as shown in FIG. 9B.

[0087] ===Detection of AC voltage Vac peaks=== Furthermore, the detection circuit 302 detects the peak of the AC voltage Vac based on the output period Tout. Specifically, the detection circuit 302 detects the peak of the AC output voltage Vac based on the fact that, assuming that the on-period Ton is constant, the AC output voltage Vac reaches its peak, that is, the output period Tout is longest when the phase angle is 90°.

[0088] Then, as shown in Fig. 8, when a period Tp from when the switching control circuit 203 starts operating in mode C to when the AC voltage Vac reaches its peak has elapsed since the AC voltage Vac reached its peak, the detection circuit 302 outputs a signal mode indicating mode B. A further condition includes the elapse of a period T1 from when the switching control circuit 203 starts operating in mode C to when the AC voltage Vac reaches its peak, as shown in Fig. 10. Note that the period Tp corresponds to the "third period," and the period T1 corresponds to the "fourth period."

[0089] 8, the detection circuit 302 detects the state of the load 11, the phase, instantaneous value, and peak of the AC voltage Vac based on the on-period Ton and the output period Tout, and outputs a signal mode indicating one of modes A to C. This makes it possible to provide a switching control circuit that can switch between a plurality of operation modes to reduce loss in the PFC circuit.

[0090] Advantages of using this embodiment When the NMOS transistor 23 is turned off and the operation is always in mode A, as shown in FIG. 11A, when the AC voltage Vac has a medium phase angle and a low phase angle, the voltage Vds drops to near 0 V after the NMOS transistor 22 is turned off, and therefore the switching loss of the NMOS transistor 22 is small.

[0091] On the other hand, when the AC voltage Vac has a high phase angle, the voltage Vds does not decrease to near 0 V after the NMOS transistor 22 is turned off, resulting in a large switching loss in the NMOS transistor 22. Furthermore, if the output voltage Vout is generated using a diode without using the NMOS transistor 23, the conduction loss in the diode will be large.

[0092] In contrast, when operating by switching between modes A and C, as shown in Fig. 11B, when the AC voltage Vac has a low phase angle, the switching loss of the NMOS transistor 22 is small, similar to the case of the low phase angle in Fig. 11A. In this case, the inductor current IL flows to the capacitor 24 via the parasitic diode Dp, resulting in a conduction loss equivalent to the forward voltage of the parasitic diode Dp.

[0093] 11A, the switching loss of the NMOS transistor 22 is small. In this case, when the inductor current IL flows to the capacitor 24, the NMOS transistor 23 turns on, and therefore the conduction loss is reduced to the on-resistance of the NMOS transistor 23.

[0094] 11A, a reverse charging period Trev is provided before the NMOS transistor 23 is turned off, thereby realizing zero-volt switching and reducing the switching loss of the NMOS transistor 22. In this case, similar to the case of a medium phase angle, the NMOS transistor 23 is turned on when the inductor current IL flows to the capacitor 24, and therefore the conduction loss is reduced to the on-resistance of the NMOS transistor 23.

[0095] As described above, by switching control circuit 203 appropriately switching between modes A to C, the switching loss of NMOS transistor 22 and the conduction loss of the diode are reduced, and the loss of AC-DC converter 10 as a whole is reduced.

[0096] ===Summary=== The AC-DC converter 10 of this embodiment has been described above. The switching control circuit 203 includes a first drive circuit 301 and a second drive circuit 303. The second drive circuit 303 drives the NMOS transistor 23 in mode A or B based on the on-period Ton of the NMOS transistor 22, which indicates the state of the load 11. When the on-period Ton becomes longer than the predetermined period Ton0 and the switching control circuit 203 operates in mode B, the conduction loss corresponds to the on-resistance of the NMOS transistor 23. This makes it possible to provide a switching control circuit that can switch between multiple operation modes to reduce losses in the PFC circuit.

[0097] The switching control circuit 203 also includes a detection circuit 302, and the second drive circuit 303 drives the NMOS transistor 23 in mode B based on the on-period Ton and the phase angle of the AC voltage Vac. In this case, the switching control circuit 203 operates in mode B, the phase angle becomes medium, and the output period Tout becomes long, so that the NMOS transistor 23 is turned on and off complementarily to the NMOS transistor 22. Therefore, the inductor current IL flows to the capacitor 24 via the NMOS transistor 23 rather than the parasitic diode Dp. This reduces conduction loss.

[0098] Furthermore, when the phase angle of the AC voltage Vac falls outside the range PA, the second drive circuit 303 turns off the NMOS transistor 23 in mode A. In this case, if the phase angle is low, the output period Tout of the NMOS transistor 22 becomes short, and the NMOS transistor 23 is turned on and off in a short time, so the NMOS transistor 23 is turned off. This reduces the switching loss of the NMOS transistor 23.

[0099] Furthermore, the detection circuit 302 detects the phase angle of the AC voltage Vac based on the output period Tout, which allows the phase angle of the AC voltage Vac to be detected without providing a voltage divider circuit or the like outside the power factor correction IC 26 to directly detect the AC voltage Vac.

[0100] Furthermore, the switching control circuit 203 includes a first drive circuit 301 and a second drive circuit 303, and the second drive circuit 303 drives the NMOS transistor 23 in mode B or C. This makes it possible to provide a switching control circuit that can reduce loss in the PFC circuit by switching between multiple operation modes. Furthermore, when driving the NMOS transistor 23 in mode C, the switching control circuit 203 discharges the parasitic capacitor Cp of the NMOS transistor 22, thereby achieving zero-volt switching.

[0101] Furthermore, when the phase angle of the AC voltage Vac is within the range PB, the second drive circuit 303 drives the NMOS transistor 23 in mode C. As a result, when the phase angle of the AC voltage Vac becomes high, the switching loss of the NMOS transistor 22 is reduced because the voltage Vds does not drop to 0 V after the NMOS transistor 22 is turned off.

[0102] Furthermore, when the on-period Ton is longer than the predetermined period Ton0, the second drive circuit 303 drives the NMOS transistor 23 in mode C. As a result, the switching control circuit 203 operates in mode C only when the load 11 is in a heavy load state.

[0103] Furthermore, after the period T0 has elapsed in mode B, the second drive circuit 303 drives the NMOS transistor 23 in mode C. This makes it possible to prevent the operation mode from frequently changing between modes B and C.

[0104] Furthermore, when the feedback voltage Vfb becomes higher than the voltage Va, the second drive circuit 303 drives the NMOS transistor 23 in Mode C. As a result, the second drive circuit 303 drives the NMOS transistor 23 in Mode C only after the output voltage Vout has increased to a certain extent and reached a steady state, that is, after the startup of the AC-DC converter 10 is completed.

[0105] Furthermore, the second drive circuit 303 starts operating in Mode C, and when a period Tp has elapsed after the peak of the AC voltage Vac, the second drive circuit 303 drives the NMOS transistor 23 in Mode B. This allows the second drive circuit 303 to drive the NMOS transistor 23 in Mode C only when the phase angle of the AC voltage Vac is in the range PB.

[0106] Furthermore, after the period T1 has elapsed in mode C, the second drive circuit 303 drives the NMOS transistor 23 in mode B. This makes it possible to prevent the operation mode from frequently changing between modes B and C.

[0107] The switching control circuit 203 also includes a first drive circuit 301 and a second drive circuit 303. The second drive circuit 303 turns off the NMOS transistor 23 when the inductor current IL flows negatively and the reverse charging period Trev has elapsed. As a result, when the switching control circuit 203 drives the NMOS transistor 23 in Mode C, it discharges the parasitic capacitor Cp of the NMOS transistor 22, thereby achieving zero-voltage switching.

[0108] The above-described embodiments are intended to facilitate understanding of the present invention and are not intended to limit the present invention. Furthermore, the present invention may be modified or improved without departing from the spirit thereof, and the present invention includes equivalents thereof. [Explanation of symbols]

[0109] 10 AC-DC converter 11 Load 20 Full wave rectifier circuit 21,24 Capacitor 22,23 NMOS transistor 25, 27, 28 Resistance 26 Power Factor Correction IC 202 AD converter 203 Switching control circuit 204,205 Buffer circuit 300 ON period output circuit 301 First drive circuit 302 Detection circuit 303 Second drive circuit 304 Arithmetic circuit 400 Error amplifier circuit 401 PI control circuit

Claims

1. a first transistor that controls an inductor current flowing through the inductor; and a second transistor that is connected to the inductor and the first transistor; and a switching control circuit that controls switching of the first and second transistors of a power supply circuit that generates an output voltage of a target level from the AC voltage, a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor after an on-period corresponding to the output voltage has elapsed; a second driving circuit that drives the first transistor in a first mode in which the first transistor is switched while the second transistor is kept off when the on-period of the first transistor is shorter than a first period, and drives the second transistor in a second mode in which the second transistor is switched complementarily to the first transistor when the on-period of the first transistor is longer than the first period; A switching control circuit comprising:

2. 2. The switching control circuit according to claim 1, a detection circuit for detecting a phase angle of the AC voltage; The second drive circuit When the on-period becomes longer than the first period and the phase angle of the AC voltage is in a first range, the second transistor is driven in the second mode. Switching control circuit.

3. 3. The switching control circuit according to claim 2, The second drive circuit is When the phase angle of the AC voltage is outside the first range, the second transistor is driven in the first mode. Switching control circuit.

4. 4. The switching control circuit according to claim 3, The detection circuit detecting the phase angle based on a period from when the first transistor is turned off until when the inductor current reaches the first predetermined value; Switching control circuit.

5. a first transistor that controls an inductor current flowing through the inductor; and a second transistor that is connected to the inductor and the first transistor; and a switching control circuit that controls switching of the first and second transistors of a power supply circuit that generates an output voltage of a target level from the AC voltage, a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor after an on-period corresponding to the output voltage has elapsed; a second drive circuit that drives the second transistor in a first synchronous rectification mode when an instantaneous value of a full-wave rectified voltage obtained by full-wave rectifying the AC voltage becomes lower than a predetermined level corresponding to the output voltage, and drives the second transistor in a second synchronous rectification mode when the instantaneous value becomes higher than the predetermined level; Equipped with the first synchronous rectification mode is a mode in which the second transistor is switched complementarily to the first transistor; the second synchronous rectification mode is a mode in which the second transistor is turned on after the first transistor is turned off, and the second transistor is turned off when a predetermined period has elapsed since the inductor current flows in a second direction opposite to a first direction in which the inductor current flows when the first transistor is on. Switching control circuit.

6. 6. The switching control circuit according to claim 5, The second drive circuit is driving the second transistor in the second synchronous rectification mode when the phase angle of the AC voltage is within a second range including 90°; Switching control circuit.

7. 7. A switching control circuit according to claim 6, The second drive circuit is If the on-period is longer than the first period, driving the second transistor in the second synchronous rectification mode. Switching control circuit.

8. 8. The switching control circuit according to claim 7, The second drive circuit is After the first synchronous rectification mode continues for a second period, the second transistor is driven in the second synchronous rectification mode. Switching control circuit.

9. 8. The switching control circuit according to claim 7, The second drive circuit is When a feedback voltage according to the output voltage satisfies a predetermined condition, the second transistor is driven in the second synchronous rectification mode. Switching control circuit.

10. 10. A switching control circuit according to claim 8 or 9, The second drive circuit is When a third period from when the operation in the second synchronous rectification mode starts until the phase angle reaches 90° has elapsed after the phase angle reaches 90°, the second transistor is driven in the first synchronous rectification mode. Switching control circuit.

11. 11. The switching control circuit of claim 10, The second drive circuit is After a fourth period of operation in the second synchronous rectification mode has elapsed, the second transistor is driven in the first synchronous rectification mode. Switching control circuit.

12. 6. The switching control circuit according to claim 5, The second drive circuit is When the instantaneous value becomes lower than half of the output voltage, the second transistor is driven in the first synchronous rectification mode, and when the instantaneous value becomes higher than half of the output voltage, the second transistor is driven in the second synchronous rectification mode. Switching control circuit.

13. a first transistor that controls an inductor current flowing through the inductor; and a second transistor that is connected to the inductor and the first transistor; and a switching control circuit that controls switching of the first and second transistors of a power supply circuit that generates an output voltage of a target level from the AC voltage, a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor after an on-period corresponding to the output voltage has elapsed; a second driving circuit that turns on the second transistor after the first transistor is turned off, and turns off the second transistor when a predetermined period has elapsed since the inductor current flows in a second direction opposite to a first direction in which the inductor current flows while the first transistor is turned on; Equipped with The predetermined period is calculated based on the on-period and a period from when the first transistor is turned off until the inductor current reaches the first predetermined value. Switching control circuit.

14. A power supply circuit that generates an output voltage of a target level from an AC voltage, an inductor to which a voltage corresponding to the AC voltage is applied; a first transistor for controlling an inductor current flowing through the inductor; a second transistor connected to the inductor and the first transistor; a switching control circuit for controlling switching of the first and second transistors; Including, The switching control circuit a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor after an on-period corresponding to the output voltage has elapsed; a second driving circuit that drives the first transistor in a first mode in which the first transistor is switched while the second transistor is kept off when the on-period of the first transistor is shorter than a first period, and drives the second transistor in a second mode in which the second transistor is switched complementarily to the first transistor when the on-period of the first transistor is longer than the first period; A power supply circuit comprising:

15. A power supply circuit that generates an output voltage of a target level from an AC voltage, an inductor to which a voltage corresponding to the AC voltage is applied; a first transistor for controlling an inductor current flowing through the inductor; a second transistor connected to the inductor and the first transistor; a switching control circuit for controlling switching of the first and second transistors; Including, The switching control circuit a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor after an on-period corresponding to the output voltage has elapsed; a second drive circuit that drives the second transistor in a first synchronous rectification mode when an instantaneous value of a full-wave rectified voltage obtained by full-wave rectifying the AC voltage becomes lower than a predetermined level corresponding to the output voltage, and drives the second transistor in a second synchronous rectification mode when the instantaneous value becomes higher than the predetermined level; Equipped with the first synchronous rectification mode is a mode in which the second transistor is switched complementarily to the first transistor; the second synchronous rectification mode is a mode in which the second transistor is turned on after the first transistor is turned off, and the second transistor is turned off when a predetermined period has elapsed since the inductor current flows in a second direction opposite to a first direction in which the inductor current flows when the first transistor is on. power circuit.

16. A power supply circuit that generates an output voltage of a target level from an AC voltage, an inductor to which a voltage corresponding to the AC voltage is applied; a first transistor for controlling an inductor current flowing through the inductor; a second transistor connected to the inductor and the first transistor; a switching control circuit for controlling switching of the first and second transistors; Including, The switching control circuit a first drive circuit that turns on the first transistor after the inductor current reaches a first predetermined value, and turns off the first transistor after an on-period corresponding to the output voltage has elapsed; a second driving circuit that turns on the second transistor after the first transistor is turned off, and turns off the second transistor when a predetermined period has elapsed since the inductor current flows in a second direction opposite to a first direction in which the inductor current flows while the first transistor is turned on; Equipped with The predetermined period is calculated based on the on-period and a period from when the first transistor is turned off until the inductor current reaches the first predetermined value. power circuit.

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