Active Cell Balancing

Abstract

The system includes a first battery (204), a second battery (202), an integrated circuit (330), a capacitor (320), and an inductor (318). The first battery has first and second battery terminals, and the second battery has third and fourth battery terminals. The second battery terminal is coupled to the third battery terminal. The integrated circuit includes a first transistor (316), a second transistor (314), a third transistor (312), and a fourth transistor (310). The first transistor is coupled between the first battery terminal and the capacitor terminal, the second transistor is coupled between the capacitor terminal and the second battery terminal, the third transistor is coupled between the third battery terminal and the inductor terminal, and the fourth transistor is coupled between the inductor terminal and the fourth battery terminal. The capacitor and inductor are coupled in series, with the capacitor coupled to the capacitor terminal and the inductor coupled to the inductor terminal.

Description

[Technical Field]

[0001] High-voltage energy storage systems may include multiple energy storage cells, such as batteries, connected in series. The capacities of the stack cells may vary due to internal (e.g., internal impedance) or external (e.g., temperature) factors. This capacity variation can result in differences in the charging and discharging of the cells, which can cause charge imbalances across the stack and limit the energy capacity of the system. Summary of the Invention

[0002] In one example, an integrated circuit (IC) includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a control circuit. The first transistor is coupled between a first battery terminal and a capacitor terminal. The first transistor has a first transistor control terminal. The second transistor is coupled between the capacitor terminal and a second battery terminal. The second transistor has a second transistor control terminal. The third transistor is coupled between a third battery terminal and an inductor terminal. The third transistor has a third transistor control terminal. The third battery terminal is coupled to the second battery terminal. The fourth transistor is coupled between the inductor terminal and a fourth battery terminal. The fourth transistor has a fourth transistor control terminal. The control circuit has a control input and first, second, third, and fourth control outputs. The first control output is coupled to the first transistor control terminal, the second control output is coupled to the second transistor control terminal, the third control output is coupled to the third transistor control terminal, and the fourth control output is coupled to the fourth transistor control terminal.

[0003] In another example, a method includes connecting a capacitor and an inductor between a first battery terminal and a second battery terminal of a first battery cell to store a first voltage across the capacitor. A capacitor terminal of the capacitor is connected to the first battery terminal and an inductor terminal of the inductor is connected to the second battery terminal. The method also includes disconnecting the inductor terminal from the second battery terminal, connecting the inductor terminal to the first battery terminal to store the first voltage across the inductor, and disconnecting the capacitor terminal from the first battery terminal. The method further includes connecting the capacitor terminal to a third battery terminal of the second battery cell to transfer charge from the first battery cell to the second battery cell at a rate based on the first voltage and the inductance of the inductor.

[0004] In a further example, a system includes a first battery, a second battery, an integrated circuit, a capacitor, and an inductor. The first battery has a first battery terminal and a second battery terminal. The second battery has a third battery terminal and a fourth battery terminal. The second battery terminal is coupled to the third battery terminal. The integrated circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The first transistor is coupled between the first battery terminal and a capacitor terminal. The second transistor is coupled between the capacitor terminal and the second battery terminal. The third transistor is coupled between the third battery terminal and an inductor terminal. The fourth transistor is coupled between the inductor terminal and the fourth battery terminal. The capacitor and inductor are coupled in series. The capacitor is coupled to the capacitor terminal, and the inductor is coupled to the inductor terminal.

[0005] In a further example, a battery assembly includes a first battery module, a second battery module, a first transistor, a second transistor, a third transistor, a fourth transistor, and a control circuit. The first battery module includes a first module terminal, a second module terminal, a first battery, and a second battery. The first battery and the second battery are coupled in series between the first module terminal and the second module terminal. The second battery module includes a third module terminal, a fourth module terminal, a third battery, and a fourth battery. The third battery and the fourth battery are coupled in series between the third module terminal and the fourth module terminal. The third module terminal is coupled to the second module terminal. The first transistor is coupled between the first module terminal and a first resonant component terminal. The first transistor has a first transistor control terminal. The second transistor is coupled between the first resonant component terminal and the second module terminal. The second transistor has a second transistor control terminal. The third transistor is coupled between the third module terminal and the second resonant component terminal. The third transistor has a third transistor control terminal. The fourth transistor is coupled between the second resonant component terminal and the fourth module terminal. The fourth transistor has a fourth transistor control terminal. The control circuit has a control input and first, second, third, and fourth control outputs. The first control output is coupled to the first transistor control terminal. The second control output is coupled to the second transistor control terminal. The third control output is coupled to the third transistor control terminal. The fourth control output is coupled to the fourth transistor control terminal. [Brief explanation of the drawings]

[0006] [Figure 1A] 1 illustrates an example of charge redistribution in a battery module including active cell balancing. [Figure 1B] 1 illustrates an example of charge redistribution in a battery module including active cell balancing.

[0007] [Figure 2] FIG. 1 is a block diagram of an example battery module including active cell balancing.

[0008] [Figure 3] FIG. 3 is a schematic diagram of the active cell balancing example of FIG. 2.

[0009] [Figure 4] 4 is a graph of example signals in the active cell balancing circuit of FIG. 3 illustrating the transfer of charge between battery cells.

[0010] [Figure 5] FIG. 1 is a schematic diagram of an example active cell balancing circuit with input filtering. [Figure 6] FIG. 1 is a schematic diagram of an example active cell balancing circuit with input filtering.

[0011] [Figure 7] 3 is a block diagram illustrating an example charge transfer from one battery cell to two battery cells in the battery module of FIG. 2.

[0012] [Figure 8] 3 is a block diagram illustrating an example of multiple simultaneous charge transfers between battery cells of the battery module of FIG. 2.

[0013] [Figure 9A] 3 illustrates an example of charge transfer across six battery cells in the battery module of FIG. 2. [Figure 9B] 3 illustrates an example of charge transfer across six battery cells in the battery module of FIG. 2.

[0014] [Figure 10A] 3 illustrates an example of charge transfer across three battery cells in the battery module of FIG. 2. [Figure 10B]3 illustrates an example of charge transfer across three battery cells in the battery module of FIG. 2.

[0015] [Figure 11A] 3 illustrates an example of simultaneous charge transfer across three battery cells and two battery cells in the battery module of FIG. 2. [Figure 11B] 3 illustrates an example of simultaneous charge transfer across three battery cells and two battery cells in the battery module of FIG. 2.

[0016] [Figure 12A] 3 illustrates another example of simultaneous charge transfer across three battery cells and two battery cells in the battery module of FIG. 2. [Figure 12B] 3 illustrates another example of simultaneous charge transfer across three battery cells and two battery cells in the battery module of FIG. 2.

[0017] [Figure 13] FIG. 2 is a block diagram of an example of a portion of an active cell balancing circuit including multiple active cell balancing integrated circuits coupled in series.

[0018] [Figure 14] FIG. 1 is a schematic diagram of an active cell balancing circuit including a disconnect switch between LC circuits.

[0019] [Figure 15] FIG. 1 is a schematic diagram of an active cell balancing circuit configured for two-phase operation.

[0020] [Figure 16] 1 is a flowchart of an example method for active cell balancing.

[0021] [Figure 17] FIG. 10 is a schematic diagram of another example active cell balancing circuit.

[0022] [Figure 18A] 18 illustrates an example of simultaneous charge transfer between battery cells using the example active cell balancing circuit of FIG. 17. [Figure 18B] 18 illustrates an example of simultaneous charge transfer between battery cells using the example active cell balancing circuit of FIG. 17.

[0023] [Figure 19] FIG. 18 is a schematic diagram of an example of the active cell balancing circuit of FIG. 17 including a disconnect switch.

[0024] [Figure 20] FIG. 18 is a block diagram of an example of the active cell balancing circuit of FIG. 17 including a network of parallel capacitors.

[0025] [Figure 21] FIG. 18 is a schematic diagram of an active cell balancing circuit configured for two-phase operation, based on the active cell balancing circuit of FIG. 17.

[0026] [Figure 22] FIG. 10 is a schematic diagram of another example active cell balancing circuit.

[0027] [Figure 23] FIG. 23 is a schematic diagram of an example of the active cell balancing circuit of FIG. 22 including a disconnect switch.

[0028] [Figure 24] FIG. 23 is a schematic diagram of an active cell balancing circuit configured for two-phase operation, based on the active cell balancing circuit of FIG. 22.

[0029] [Figure 25] FIG. 10 is a schematic diagram of another example active cell balancing circuit.

[0030] [Figure 26] FIG. 26 is a schematic diagram of an example of the active cell balancing circuit of FIG. 25 including a disconnect switch.

[0031] [Figure 27] FIG. 26 is a schematic diagram of an active cell balancing circuit configured for two-phase operation, based on the active cell balancing circuit of FIG. 25.

[0032] [Figure 28] FIG. 1 is a block diagram of a battery assembly including balancing across battery modules. DETAILED DESCRIPTION OF THE INVENTION

[0033] A high-voltage battery module includes multiple low-voltage battery cells coupled in series. The series connection of the low-voltage battery cells limits the capacity of the battery module to the capacity of the weakest low-voltage battery cell. For example, when a battery pack is being discharged, the weakest cell discharges at the highest rate and has the lowest state of charge (SOC). When this cell's SOC reaches its lowest allowable value (e.g., the lowest value allowed by the battery manager coupled to the cell), the battery module can be disconnected and the charge stored in the other battery cells of the battery pack will not be used. Similarly, when a battery module is being charged, charging can be stopped when the battery cell with the smallest capacity is fully charged, leaving the stronger cells partially charged.

[0034] Active cell balancing is one technique for managing the SOC of battery cells in a battery module. Active cell balancing redistributes charge across cells of a battery module to reduce the difference in charge between the battery cells. For example, an active balancing circuit can transfer charge from a battery cell with a higher SOC to a battery cell with a lower SOC. FIGS. 1A and 1B show an example of charge redistribution in a battery module including active cell balancing. In FIG. 1A, battery cells 102 and 104 are being charged. Battery cell 102 is weaker than battery cell 104. For example, battery cell 102 charges and discharges more quickly than battery cell 104. Active balancing circuitry transfers charge from battery cell 102 to battery cell 104 during charging to allow both battery cell 102 and battery cell 104 to fully charge. Without active balancing, battery cell 102 may be fully charged before battery cell 104, and charging may be stopped before battery cell 104 is fully charged. Thus, the active balancing circuitry increases the total charge stored within the battery module.

[0035] 1B, battery cells 102 and 104 are being charged. Battery cell 102 discharges more quickly than battery cell 104. Active balancing circuitry transfers charge from battery cell 104 to battery cell 102 during discharge to allow both battery cell 102 and battery cell 104 to discharge to the same extent. Without active balancing, battery cell 102 may be discharged before battery cell 104, and the battery module is disconnected (e.g., an interrupted battery module discharge) before battery cell 104 is discharged. Thus, the active balancing circuitry increases the total charge provided by the battery module.

[0036] FIG. 2 is a block diagram of an example battery module 200 that can implement active cell balancing. The battery module 200 includes multiple battery cells. While battery cells 202 and 204 are shown in FIG. 2, the battery module 200 may include more than two battery cells. The battery module 200 also includes an active cell balancing circuit 206 and a battery manager circuit 208. The active cell balancing circuit 206 and the battery manager circuit 208 are coupled to the battery cells 202 and 204. The battery manager circuit 208 monitors the voltages of the battery cells 202 and 204 and the currents flowing from the battery cells 202 and 204 to determine the SOC of the battery cells 202 and 204. The battery manager circuit 208 may include measurement circuitry (e.g., an analog-to-digital converter, sampling circuitry, sensing circuitry, etc.) to measure the voltages and currents of the battery cells 202 and 204. The battery manager circuit 208 may include a microcontroller or other computational circuitry configured to determine the SOC based on current and voltage measurements.

[0037] Based on the SOC of battery cell 202 and battery cell 204, battery manager circuit 208 can generate an active balancing control signal (AB_CTL). AB_CTL can specify that charge is transferred from battery cell 202 to battery cell 204 if the SOC of battery cell 202 is greater than the SOC of battery cell 204, or can specify that charge is transferred from battery cell 204 to battery cell 202 if the SOC of battery cell 204 is greater than the SOC of battery cell 202. For example, AB_CTL can specify the rate and duration of charge transfer between battery cell 202 and battery cell 204 based on the SOC of battery cell 202 and battery cell 204.

[0038] Active cell balancing circuit 206 receives AB_CTL and transfers charge between battery cell 202 and battery cell 204 based on balancing parameters specified by AB_CTL (e.g., charge transfer source, charge transfer destination, charge transfer rate, charge transfer duration, transfer start, transfer stop, and / or other parameters). As mentioned above, battery module 200 may include two or more battery cells, and active cell balancing circuit 206 can transfer charge between any battery cells of battery module 200.

[0039] 3 is a schematic diagram of an example of an active cell balancing circuit 206 (or a portion thereof, for two adjacent battery cells). FIG. 3 also shows adjacent battery cells 202 and 204 coupled to the active cell balancing circuit 206. The active cell balancing circuit 206 includes a half-bridge circuit 302, a half-bridge circuit 304, an inductor-capacitor (LC) circuit 306, and a control circuit 308. The half-bridge circuit 302 is coupled in parallel with the battery cell 202 and includes a first battery terminal coupled to a first terminal of the battery cell 202 and a second battery terminal coupled to a second terminal of the battery cell 202. Similarly, the half-bridge circuit 304 is coupled in parallel with the battery cell 204 and includes a first battery terminal coupled to a first terminal of the battery cell 204 and a second battery terminal coupled to a second terminal of the battery cell 204.

[0040] Each half-bridge circuit includes a pair of transistors. The transistors may be n-channel field-effect transistors (NFETs). Half-bridge circuit 302 includes transistors 310 and 312. A first terminal (e.g., a source) of transistor 310 is coupled to the second battery terminal, and a second terminal (e.g., a drain) of transistor 310 is coupled to a switch node 332. Capacitor 322 represents the drain-source capacitance of transistor 310. A first terminal (e.g., a source) of transistor 312 is coupled to switch node 332, and a second terminal (e.g., a drain) of transistor 312 is coupled to the first battery terminal. Capacitor 324 represents the drain-source capacitance of transistor 312.

[0041] The half-bridge circuit 304 includes transistors 314 and 316 and a switch node 334. A first terminal (e.g., a source) of the transistor 314 is coupled to a first terminal of the battery cell 204, and a second terminal (e.g., a drain) of the transistor 314 is coupled to the switch node 334. A capacitor 326 represents the drain-source capacitance of the transistor 314. A first terminal (e.g., a source) of the transistor 316 is coupled to the switch node 334, and a second terminal (e.g., a drain) of the transistor 316 is coupled to the second terminal of the battery cell 204. A capacitor 328 represents the drain-source capacitance of the transistor 316.

[0042] LC circuit 306 is coupled between switch node 332 and switch node 334. LC circuit 306 includes an inductor 318 and a capacitor 330 coupled in series. Capacitor 320 capacitively couples half-bridge circuit 302 and half-bridge circuit 304. The capacitance of capacitor 320 and the inductance of inductor 318 may be relatively small. For example, the inductance of inductor 318 may be 50 nanohenries, and the capacitance of capacitor 320 may be 3 microfarads in some implementations of active cell balancing circuit 206. The voltage across transistor 310, transistor 312, transistor 314, transistor 316, inductor 318, or capacitor 320 may be limited to around the voltage of a single battery cell. Therefore, the voltage ratings of these components may be relatively low.

[0043] The control circuit 308 receives the AB_CTL provided by the battery manager circuit 208 (FIG. 2) and generates driver signals that control the transistors 310, 312, 314, and 316. The control circuit 308 generates the driver signals C1, TIFF2025540984000002.tif45C2, and TIFF2025540984000003.tif35 and provides a driver signal at the output of control circuit 308 that is coupled to the control inputs (eg, gates) of transistors 310 , 312 , 314 , and 316 . TIFF2025540984000004.tif45 is C1 and TIFF2025540984000005.tif45 can be an inverted version of C1, C2 and TIFF2025540984000006.tif35 is C1 and By controlling the switching of transistors 310, 312, 314, and 316 using a selected phase shift between the driver signals provided to half-bridge circuit 302 and half-bridge circuit 304, active cell balancing circuit 206 can transfer charge from battery cell 202 to battery cell 204 or from battery cell 204 to battery cell 202. In some examples, driver signals C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24, C25, C26, C27, C28, C29, C30, C31, C32, C33, C34, C35, C36, C37, C38, C39, C40, C41, C42, C43, C44, C45, C50, C51, C52, C53, C54, C55, C56, C57, C58, C59, C60, C61, C62, C63, C64, C65, C66, C67, C68, C69, C70, C71, C72, C73, C74, C75, C76, C77, C78, ​​C79, C80, C81, C82, C83, C84, C85, C90, C91, C92, C93, C94, C95, C96, C97, C98, C99, C100, C111, C121, C132, C141, C152, C162, C173, C184, C195, C19 TIFF2025540984000008.tif45C2, and TIFF2025540984000009.tif35 can each have a 50% duty cycle. In some examples, the duty cycle can deviate from 50% to increase efficiency when the imbalance between the cell voltages is high. In some examples, discontinuous conduction mode (DCM) operation can also be implemented in extreme cases of voltage imbalance between the battery cells to reduce losses.

[0044] In some examples of the active cell balancing circuit 206, the control circuit 308 may be distributed across the half-bridge circuit. For example, the control signals C1 and C2 may be As part of the control circuit 308 that generates TIFF2025540984000010.tif45, a half-bridge circuit 302 may be provided in the first sub-circuit, and control signals C2 and The portion of the control circuit 308 that generates TIFF2025540984000011.tif35 may be provided in the second sub-circuit with the half-bridge circuit 304. When the control circuit 308 is distributed across the half-bridge circuits, each portion of the control circuit 308 may receive transfer parameters such as source, sink, and current through AB_CTL and can adjust the phase of the generated control signal to maintain a specified current.

[0045] The half-bridge circuit 302, the half-bridge circuit 304, and the control circuit 308 may be incorporated into an integrated circuit 330. Some examples of the integrated circuit 330 may also include an inductor 318. Examples of the integrated circuit 330 may include any number of half-bridge circuits (e.g., the half-bridge circuit 302, the half-bridge circuit 304) coupled in series with a control circuit 308 configured to control the half-bridge circuits.

[0046] 4 is a graph of signals in the active cell balancing circuit 206 illustrating the transfer of charge from the battery cell 202 to the battery cell 204 during a switching cycle of the half-bridge circuits 302 and 304. In interval 402, the control circuit 308 sets transistors 310 and 314 to on in a first state. TIFF2025540984000012.tif45 and TIFF2025540984000013.tif35 and provides C1 and C2 in a second state to turn off transistors 312 and 316. The voltage across transistors 310 and 314 is zero or near zero. The current i B,AC1 is negative.

[0047] During interval 404, control circuit 308 sets transistor 314 to ON in a first state. TIFF2025540984000014.tif35 and in the second state ( TIFF2025540984000015.tif45 transitions from the second state to the first state) TIFF2025540984000016.tif45, C1, and C2. Transistor 312 can be turned off using zero voltage switching. The voltage across transistor 310 TIFF2025540984000017.tif817 will increase.

[0048] In interval 406, after the voltage across transistor 310 rises to a selected value, control circuit 308 can provide C1 in a first state to turn on transistor 312. Current i B,AC1 flows through transistor 312 due to the battery voltage across inductor 318. In this configuration, transistors 310 and 316 are off, and transistors 312 and 314 are on to provide a path for current flow. Capacitor 320 may provide capacitive isolation between adjacent battery cells and, as described above, may have a relatively low voltage tolerance (e.g., 5 volts). The voltage across capacitor 320 may be the average of the voltage v1 across battery cell 202 and the voltage v2 across battery cell 204. The voltage across inductor 318, which has the opposite polarity to the voltage across capacitor 320, is equal to the voltage across inductor 318 (i B,AC1 ) and the ramp rate can be determined by the inductance of inductor 318. The duration of interval 406 can determine the amount of increase in current and the amount of charge transfer before it stops increasing.

[0049] During interval 408, after the current flowing into inductor 318 has increased to a selected value, control circuit 308 sets transistor 314 to a second state to turn it off. TIFF2025540984000018.tif35 can be provided. In this configuration, transistors 310, 314, and 316 are off and transistor 312 is on. The voltage across transistor 314 TIFF2025540984000019.tif818 will increase.

[0050] During interval 410, after the voltage across transistor 314 has increased to a selected value, control circuit 308 can provide C2 in a first state to turn on transistor 316 using zero voltage switching. In this configuration, transistors 310 and 314 are off and transistors 312 and 316 are on. The voltage across inductor 318 is zero, and inductor (i B,AC1 ) remains at (or near) a selected value. During interval 410 (the power transfer interval), charge is transferred from LC circuit 306 to battery cell 204. Thus, charge transferred from battery cell 202 to LC circuit 306 is transferred to battery cell 204.

[0051] In interval 412, control circuit 308 can provide C1 in the second state to turn off transistor 312. The voltage across transistor 310 TIFF2025540984000020.tif817 will be degraded.

[0052] In interval 414, after the voltage across transistor 310 has decreased to a selected value, control circuit 308 sets transistor 310 to on in a first state using zero voltage switching. TIFF2025540984000021.tif45 can be provided. Current i B,AC1 decreases and becomes negative.

[0053] During interval 416, when the current flowing in inductor 318 drops to a selected value, control circuit 308 can provide C2 in a second state to turn off transistor 316. TIFF2025540984000022.tif818 will be degraded.

[0054] During interval 418, when the voltage across transistor 314 drops to a selected value, control circuit 308 switches transistor 314 on in a first state using zero voltage switching. TIFF2025540984000023.tif35 can be provided. During interval 418, the active cell balancing circuit 206 is in the same state as in interval 402 due to the execution of successive power transfer cycles.

[0055] 4, inductor 318 and capacitor 320 form a resonant circuit that can support soft switching, allowing the switch nodes (332 and 334) to commutate without discharging capacitors 322, 324, 326, and 328. This arrangement accelerates switching and allows half-bridge circuits 302 and 304 to operate at higher switching frequencies, allowing for smaller devices in half-bridge circuits 302 and 304. Increasing the switching frequency can also reduce the time that capacitor 320 blocks DC voltage, which may reduce the size of capacitor 320.

[0056] FIG. 4 illustrates the transfer of charge from battery cell 202 to battery cell 204, but signals C1 and C2 in FIG. The timing of TIFF2025540984000024.tif45 is shown in Fig. 4 as signals C2 and By exchanging the timing of TIFF2025540984000025.tif35, charge transfer from battery cell 204 to battery cell 202 can be provided.

[0057] 5 is a high-level diagram of an example of an active cell balancing circuit 206 including input filtering. In the example of FIG. 5, the active cell balancing circuit 206 includes half-bridge circuits 302, 304, 502, and 504, and LC circuits 306, 520, and 522. The active cell balancing circuit 206 can include any number of half-bridge circuits, with each half-bridge circuit coupled to an adjacent half-bridge circuit by an LC circuit (e.g., an example of LC circuit 306). All half-bridge circuits can be similar or identical, and all LC circuits can be similar or identical. The half-bridge circuits 302, 304, 502, and 504 are connected by a resistor Z interconnect 5. The power supply 201 is coupled to the battery cells 202, 204, 508, and 510, respectively, via conductors represented as

[0058] The active cell balancing circuit 206 also includes an input filter circuit 506. The input filter circuit 506 includes capacitors 512, 514, 516, and 518. Capacitor 512 is coupled across the battery terminals of half-bridge circuit 504. Capacitor 514 is coupled across the battery terminals of half-bridge circuit 502. Capacitor 516 is coupled across the battery terminals of half-bridge circuit 304. Capacitor 518 is coupled across the battery terminals of half-bridge circuit 302. Generally, the input filter circuit 506 includes a capacitor coupled across the battery terminals of each half-bridge circuit of the active cell balancing circuit 206. Each of the capacitors in the input filter circuit 506 blocks the DC voltage of a single battery cell. When transferring charge between two battery cells (e.g., from battery cell 202 to battery cell 510), the equivalent capacitance of input filter circuit 506 is C / (j-1), where C is the capacitance of each capacitor in input filter circuit 506 and j is the number of capacitors in input filter circuit 506 connected in series between the two battery cells (e.g., j=3 when transferring charge from battery cell 202 to 508).

[0059] 6 is a schematic level diagram of an example of an active cell balancing circuit 206 similar to the active cell balancing circuit 206 of FIG. 5 but including different input filtering. In FIG. 6, the active cell balancing circuit 206 includes an input filter circuit 606 instead of the input filter circuit 506. The input filter circuit 606 includes capacitors 612, 614, 616, and 618. The capacitor 612 is coupled across the battery cells 510, 508, 204, and 202. The capacitor 614 is coupled across the battery cells 508, 204, and 202. The capacitor 616 is coupled across the battery cells 204 and 202. The capacitor 618 is coupled across the battery cell 202. Each of the capacitors blocks the DC voltage of the series-connected batteries across which the capacitor is connected. When transferring charge between two battery cells, the equivalent capacitance of input filter circuit 606 is C (the capacitance of one capacitor in input filter circuit 606). Thus, input filter circuit 606 may reduce the AC signal path capacitance between the battery cells relative to input filter circuit 506.

[0060] In an example of the active cell balancing circuit 206, the current transferred from one battery cell to another may be modeled as follows: TIFF2025540984000026.tif622In the above formula, V is the battery voltage, L is the inductance of an inductor, such as inductor 318, φ is the phase shift between the driver signals driving the half-bridge circuits (e.g., C1 and C1), fsw is the switching frequency.

[0061] Thus, the phase shift produced by the control circuit 308 to provide a selected charge transfer between the battery cells can be determined as follows: TIFF2025540984000027.tif828

[0062] 7 is a block diagram illustrating an example of charge transfer from one battery cell to two battery cells in a battery module 200. In FIG. 7, the battery module 200 includes battery cells 202, 204, and 508 coupled to half-bridge circuits 302, 304, and 502, respectively, and LC circuits 306 and 520 coupled to the half-bridge circuits. The half-bridge circuit 502 can be the same as the half-bridge circuit 302, and the LC circuit 520 can be the same as the LC circuit 306. In the example of FIG. 7, charge can be transferred from battery cell 202 to battery cell 204 and battery cell 508 simultaneously. Driver signals provided to the half-bridge circuits 302, 304, and 502 direct 70% of the charge provided by battery cell 202 to battery cell 204 and 30% of the charge provided by battery cell 202 to battery cell 508. The amount of charge directed to each of battery cells 204 and 508 is determined by the phase of driver signals C1, C2, and C3 provided by control circuit 308 to half-bridge circuits 302, 304, and 502. Control circuit 308 can determine the phase shift to be applied to C2 (with respect to C1) as follows: TIFF2025540984000028.tif19102In the above formula, I 1A specifies 1 ampere of total current flowing from battery cell 202 to battery cell 204 and battery cell 508.

[0063] The control circuit 308 can determine the phase shift to be applied to C3 (with respect to C2) as follows: TIFF2025540984000029.tif19102In the above formula, I 0.3A specifies 0.3 amps of current flowing from battery cell 202 to battery cell 508. In some examples, control circuit 308 may be coupled to a current sensor that senses the amount of current flowing between the two half-bridges. Control circuit 308 may set a phase shift of the switching of the two half-bridges based on the sensed current to provide closed-loop control of the current.

[0064] 8 is a block diagram illustrating an example of multiple charge transfers between battery cells of a battery module 200. In FIG. 8, the battery module 200 includes battery cells 202, 204, 802, 804, 806, 818, 820, 822, and 824, half-bridge circuits 302, 304, 808, 810, 812, 826, 828, 830, and 832 coupled to the battery cells, and LC circuits 306, 814, 816, 834, 836, and 838 coupled to the half-bridge circuits. The half-bridge circuits 808, 810, 812, 826, 828, 830, and 832 can be the same as the half-bridge circuit 302, and the LC circuits 814, 816, 834, 836, and 838 can be the same as the LC circuit 306. Battery module 200 may also include batteries, half-bridge circuits, and LC circuits, which are not shown. In FIG. 8, charge is transferred from battery cell 202 to battery cell 204, from battery cell 802 to battery cell 806, and from battery cell 824 to battery cell 818. Multiple charge transfers can occur simultaneously. Control circuit 308 controls the transfers by setting the phase of the driver signals provided to the half-bridge circuits. In FIG. 8, the driver signal provided to half-bridge circuit 304 is shifted to the right (delayed) relative to the driver signal provided to half-bridge circuit 302 to transfer charge from battery cell 202 to battery cell 204.

[0065] In transferring charge to battery cell 806, the driver signal provided to half bridge circuit 810 is right shifted (delayed) relative to the driver signal provided to half bridge circuit 808. The driver signal provided to half bridge circuit 812 is right shifted (delayed) relative to the driver signal provided to half bridge circuit 810 to transfer charge from battery cell 802 to battery cell 806.

[0066] In transferring charge to battery cell 818, the driver signal provided to half bridge circuit 830 is right shifted (delayed) relative to the driver signal provided to half bridge circuit 832. The driver signal provided to half bridge circuit 828 is right shifted (delayed) relative to the driver signal provided to half bridge circuit 830. The driver signal provided to half bridge circuit 826 is right shifted (delayed) relative to the driver signal provided to half bridge circuit 828 to transfer charge from battery cell 824 to battery cell 818.

[0067] 9A and 9B illustrate an example of charge transfer across six battery cells in a battery module 200. In FIG. 9A, the battery module 200 includes battery cells 202, 204, 906, 908, 910, and 912 coupled to half-bridge circuits 302, 304, 914, 916, 918, and 920, respectively. LC circuits 306, 922, 924, 926, and 928 are coupled to the half-bridge circuits. Half-bridge circuits 914, 916, 918, and 920 can be the same as half-bridge circuit 302, and LC circuits 922, 924, 926, and 928 can be the same as LC circuit 306. In FIG. 9A, charge is transferred from battery cell 202 to battery cell 912. 9B illustrates the switching in half-bridge circuits 302, 304, 914, 916, 918, and 920 (e.g., driver signals provided by control circuit 308 to half-bridge circuits 302, 304, 914, 916, 918, and 920). The switching in half-bridge circuit 304 is delayed (phase shifted) relative to the switching in half-bridge circuit 302. The switching in half-bridge circuit 914 is delayed (phase shifted) relative to the switching in half-bridge circuit 304. The switching in half-bridge circuit 916 is delayed (phase shifted) relative to the switching in half-bridge circuit 914. The switching in half-bridge circuit 918 is delayed (phase shifted) relative to the switching in half-bridge circuit 916. The switching in half-bridge circuit 920 is delayed (phase shifted) relative to the switching in half-bridge circuit 918. An equal phase shift may be applied across the half-bridge circuits. For example, the phase shift between switching of half-bridge circuit 302 and half-bridge circuit 304 is the same as the phase shift between switching of half-bridge circuit 304 and half-bridge circuit 914, half-bridge circuit 914 and half-bridge circuit 916, half-bridge circuit 916 and half-bridge circuit 918, and half-bridge circuit 918 and half-bridge circuit 920.

[0068] Using this switching arrangement, charge can be transferred from battery cell 202 to battery cell 204, from battery cell 204 to battery cell 906, from battery cell 906 to battery cell 908, from battery cell 908 to battery cell 910, and from battery cell 910 to battery cell 912, resulting in a net charge transfer from battery cell 202 to battery cell 912. Multiple charge transfers can occur simultaneously. This switching arrangement can also reduce the total inductance between the pair of half-bridge circuits experiencing charge transfer. For example, in the case of charge transfer from battery cell 202 to battery cell 204 via half-bridge circuits 302 and 304, current flows through LC circuit 306 (and inductor 318) but not through the other LC circuits. Similarly, in the case of charge transfer from battery cell 910 to battery cell 912, current flows through LC circuit 928 (and the inductor corresponding to inductor 318) but not through the other LC circuits. By limiting the total inductance, the ramp rate of the inductor current between the phase shifts of switching between half bridge pairs (e.g., within interval 406 in FIG. 4 ) may also be increased, which may also increase the duration of the power transfer interval 410 within each cycle and improve the efficiency of charge transfer. On the other hand, if the intervening half bridge between half bridges 302 and 920 is not switching, the current flowing from half bridge 302 to half bridge 920 may experience the combined inductance of LC circuits 306, 922, 924, 926, and 928. As the total inductance increases, the ramp rate of the inductor current between the phase shifts of switching between half bridges 302 and 920 may be reduced, which decreases the duration of the power transfer interval 410 within each cycle and reduces the efficiency of charge transfer. To provide a longer time due to the reduced ramp rate of the inductor current, the switching frequency may also be reduced.

[0069] 10A and 10B illustrate an example of charge transfer across three battery cells in battery module 200. In FIG. 10A, battery module 200 is the same as battery module 200 shown in FIG. 9A. In FIG. 10A, charge is transferred from battery cell 202 to battery cell 906, while FIG. 10B illustrates switching within half bridges 302, 304, 914, 916, 918, and 920 (e.g., driver signals provided by control circuit 308 to half bridge circuits 302, 304, 914, 916, 918, and 920). Switching in half bridge circuit 304 is delayed (phase shifted) relative to switching in half bridge circuit 302. Switching in half bridge circuit 914 is delayed (phase shifted) relative to switching in half bridge circuit 304. Switching in half bridge circuits 916, 918, and 920 is in phase with switching in half bridge circuit 914. With this switching, charge is transferred from battery cell 202 to battery cell 906, and little or no charge is transferred from battery cell 202 to battery cells 204, 908, 910, or 912.

[0070] 11A and 11B illustrate an example of charge transfer across three battery cells and two battery cells in battery module 200. In FIG. 11A, battery module 200 is the same as that shown in FIG. 9A. In FIG. 11A, charge is transferred from battery cell 202 to battery cell 906 and from battery cell 910 to battery cell 908. Multiple charge transfers can occur simultaneously. FIG. 11B illustrates switching in half-bridge circuits 302, 304, 914, 916, 918, and 920 (e.g., driver signals provided by control circuit 308 to half-bridge circuits 302, 304, 914, 916, 918, and 920). Switching in half-bridge circuit 304 is delayed (phase-shifted) relative to switching in half-bridge circuit 302. Switching in half-bridge circuit 914 is delayed (phase-shifted) relative to switching in half-bridge circuit 304. The switching in half-bridge circuit 916 is in phase with the switching in half-bridge circuit 914. The switching in half-bridge circuits 918 and 920 is in phase with the switching in half-bridge circuit 304. With this switching, charge is transferred from battery cell 202 to battery cell 906, and little or no charge is transferred from battery cell 202 to battery cell 204. Charge is also transferred from battery cell 910 to battery cell 908, and no charge is transferred to or from battery cell 912.

[0071] 12A and 12B illustrate another example of charge transfer across three and two battery cells in battery module 200. In FIG. 12A, battery module 200 is the same as that shown in FIG. 9A. In FIG. 12A, charge is transferred from battery cell 202 to battery cell 906 and from battery cell 908 to battery cell 910. Multiple charge transfers can occur simultaneously. FIG. 12B illustrates switching in half-bridge circuits 302, 304, 914, 916, 918, and 920 (e.g., driver signals provided by control circuit 308 to half-bridge circuits 302, 304, 914, 916, 918, and 920). Switching in half-bridge circuit 304 is delayed (phase-shifted) relative to switching in half-bridge circuit 302. Switching in half-bridge circuit 914 is delayed (phase-shifted) relative to switching in half-bridge circuit 304. The switching in half-bridge circuit 916 is in phase with the switching in half-bridge circuit 914. The switching in half-bridge circuits 918 and 920 is in phase and delayed (phase shifted) with respect to the switching in half-bridge circuit 916. With this switching, charge is transferred from battery cell 202 to 906, and little or no charge is transferred from battery cell 202 to battery cell 204. Charge is also transferred from battery cell 908 to battery cell 910, and no charge is transferred to or from battery cell 912.

[0072] FIG. 13 is a block diagram of a portion of an example battery module 200. In FIG. 13, the battery module 200 includes multiple integrated circuits 330. Each integrated circuit 330 can include multiple half-bridge circuits (e.g., half-bridge circuits 302, 304, etc.). Each half-bridge circuit is coupled to a battery cell (e.g., battery cells 202, 204, etc.) and an LC circuit (e.g., an example of LC circuit 306). Each integrated circuit 330 can provide a synchronization signal (labeled SYNC in FIG. 13) to the subsequent integrated circuit 330. The synchronization signal enables synchronization of the timing (phasing) of driver signals generated by the control circuit 308 of each integrated circuit 330. The battery manager circuit 208 can be coupled to each of the battery cells and to each integrated circuit 330 for measuring battery cell parameters and communicating cell balancing parameters. Thus, the active cell balancing circuit 206 can set the phase of the driver signals generated in each of the integrated circuits 330 to transfer charge between batteries coupled to different instances of the integrated circuit 330.

[0073] FIG. 14 is a schematic diagram of an example of an active cell balancing circuit including a disconnect switch coupled between the LC circuits. In FIG. 14, the active cell balancing circuit includes half-bridge circuits 1400 and 1402 and a transistor 1404. The active cell balancing circuit may include more than two half-bridge circuits in some examples. The half-bridge circuits 1400 and 1402 may be the same as the half-bridge circuit 302. The LC circuits 1406 and 1408 may be the same as the LC circuit 306. The transistor 1404 is coupled between a switch node of the half-bridge circuit 1400 and a capacitor terminal of the active cell balancing circuit. For example, a first current terminal (e.g., a source) of the transistor 1404 is coupled to the first capacitor terminal of the active cell balancing circuit, and a second current terminal (e.g., a drain) of the transistor 1404 is coupled to the switch node of the half-bridge circuit 1400. An LC circuit 1408 is coupled between transistor 1404 and the switch node of half-bridge circuit 1402. An LC circuit 1406 is coupled to transistor 1404 and the switch node of half-bridge circuit 1400. The active cell balancing circuit may include any number of instances of transistor 1404. For example, the active cell balancing circuit may include an instance of transistor 1404 coupled to the switch node of each half-bridge circuit, or an instance of transistor 1404 coupled to the switch node of every other half-bridge circuit, or an instance of transistor 1404 coupled to the switch node of every fourth half-bridge circuit, every tenth half-bridge circuit, etc. The half-bridge circuits, transistor 1404, and control circuit 308 may be included within an integrated circuit 330.

[0074] Transistor 1404 can be configured as a unidirectional or bidirectional switch. Transistor 1404 can, in some examples, reduce the number of half-bridge circuits that are switched during charge transfer. For example, in FIG. 10A , half-bridge circuits 916, 918, and 920 are switched even if no charge is being transferred to battery cells 908, 910, and 912. In one example of an active balancing circuit that includes transistor 1404 between half-bridge circuits 914 and 916, transistor 1404 can be turned off, and half-bridge circuits 916, 918, and 920 do not need to be switched. Control circuit 308 includes an output coupled to the control terminal of transistor 1404. Control circuit 108 controls transistor 1404 to turn on and off based on control signal AB_CTL. D to provide.

[0075] In some examples, transistor 1404 may be coupled between the switching node of the half-bridge circuit and the LC circuit. For example, a first current terminal of transistor 1404 may be coupled to the switching node of half-bridge circuit 1400, and a second current terminal of transistor 1404 may be coupled to both LC circuits 1406 and 1408 (e.g., the second current terminal of transistor 1404 may be coupled to the connection point of LC circuits 1406 and 1408). In such examples, an instance of transistor 1404 may be coupled to the switching node of each half-bridge circuit. While the selected half-bridge circuit remains idle (not switching), the transistor 1404 of the selected half-bridge circuit may be turned off to allow charge transfer between the half-bridge circuits on either side of the selected half-bridge circuit.

[0076] 15 is a schematic diagram of an example active cell balancing circuit configured for two-phase operation. In the active cell balancing circuit of FIG. 15 , half-bridge circuits 302 and 304 and LC circuits 306 and 1508 are configured to operate in a first phase (e.g., to transfer charge between battery cells 202 and 204). Half-bridge circuits 1502 and 1504 and LC circuits 1506 and 1508 are configured to operate in a second phase (e.g., to transfer charge between battery cells 202 and 204). Half-bridge circuits 302 and 1502 are coupled in parallel to battery cell 202. Half-bridge circuits 304 and 1504 are coupled in parallel to battery cell 204. The active cell balancing circuit may include any number of half-bridge circuits coupled in series in each phase. Half-bridge circuits 1502 and 1504 may be the same as half-bridge circuit 302 , and LC circuits 1506 , 1508 , and 1510 may be the same as LC circuit 306 .

[0077] The control circuit 308 is coupled to the half-bridge circuits 302, 304, 1502, and 1504 and provides driver signals C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24 TIFF2025540984000030.tif1014, C2, TIFF2025540984000031.tif1014,C1', TIFF2025540984000032.tif45, C2', and The switching of half-bridge circuits 1502 and 1504 may be 180° out of phase with the switching of half-bridge circuits 302 and 304, respectively. The half-bridge circuits and control circuit 308 may be incorporated into an integrated circuit 330.

[0078] Two-phase operation reduces the current stress on the transistors in the half-bridge circuit, reduces DC current ripple, and incurs little or no increase in circuit area over a single-phase implementation. Although not shown in Figure 15, the active balancing circuit can include input filter circuit 506 or input filter circuit 606. Because the two phases operate 180° out of phase, two-phase operation can reduce the AC component in the current flowing through the input filter.

[0079] 16 is a flowchart of an example method 1600 of active cell balancing. While shown sequentially for convenience, at least some of the actions shown may occur in a different order and / or in parallel. Also, some implementations may perform only some of the actions shown. The operations of method 1600 may be performed by an example of active cell balancing circuitry 206.

[0080] In block 1602, capacitor 320 and inductor 318 are connected between a first terminal (e.g., a positive terminal) of battery cell 202 and a second terminal (e.g., a negative terminal) of battery cell 202 by turning on transistor 310 and transistor 314. Connecting capacitor 320 and inductor 318 between the first and second battery terminals of battery cell 202 provides a first voltage (e.g., voltage v1 of battery cell 202) across capacitor 320. A capacitor terminal of capacitor 320 is coupled to the first terminal of battery cell 202 via transistor 314, and an inductor terminal of inductor 318 is coupled to the second terminal of battery cell 202 via transistor 310. The operations of block 1602 may be performed during interval 402 of FIG. 4 .

[0081] In block 1604, the inductor terminal is disconnected from the second battery terminal of the battery cell 202 by turning off the transistor 310. The operations of block 1604 may be performed during the interval 404 of FIG.

[0082] In block 1606, the inductor terminal is connected to the first battery terminal of the battery cell 202 by turning on the transistor 312, and the voltage across the capacitor 320 is provided across the inductor 318. The operations of block 1606 may be performed during the interval 406 of FIG.

[0083] In block 1608, the capacitor terminal is disconnected from the first battery terminal of the battery cell 202 by turning off the transistor 314. The operations of block 1608 may be performed during the interval 408 of FIG.

[0084] In block 1610, the capacitor terminal is connected to a battery terminal (e.g., a positive terminal) of the battery cell 204 by turning on the transistor 316. Connecting the capacitor terminal to the third battery terminal of the battery cell 204 transfers charge from the capacitor 120 (e.g., from the battery cell 202 that stored charge on the capacitor 320 in block 1602) to the battery cell 204. The rate of charge transfer may be based on the first voltage and the instance of the inductor 318. The operations of block 1610 may be performed during interval 410 of FIG. 4.

[0085] In method 1600, control circuit 308 may determine a delay interval and apply this delay interval for connecting the capacitor terminal to the third battery terminal relative to connecting the inductor terminal to the first battery terminal. The delay interval may be determined based on a target amount of charge to be transferred from battery cell 202 to battery cell 204.

[0086] 17 is a schematic diagram of an active cell balancing circuit 1706. The active cell balancing circuit 1706 includes half-bridge circuits 302, 304, 502, and 504, each coupled to a battery cell 202, 204, 508, and 510. An example of the active cell balancing circuit 1706 may include any number of half-bridge circuits coupled in series. The half-bridge circuits may be included in the integrated circuit 330. The active cell balancing circuit 1706 is similar to the active cell balancing circuit 206, except that the arrangement of the inductors in the active cell balancing circuit 1706 is different from that in the active cell balancing circuit 206. In the active cell balancing circuit 206, the inductors and capacitors are in series. In the active cell balancing circuit 1706, the capacitors are in series, and the inductors are coupled between the half-bridge circuits and the switch nodes of the series capacitors. Thus, in the active cell balancing circuit 1706, the path between two half-bridge circuits separated by any number of battery cells and half-bridge circuits may include only a capacitor and two inductors. Such an arrangement can reduce losses incurred by the inductors and facilitate power transfer over longer distances (e.g., between battery cells separated by multiple battery cells). In some examples, the inductors used in the active cell balancing circuit 1706 may have half the inductance of the inductors used in the active cell balancing circuit 206. Although not shown in FIG. 17 , the active cell balancing circuit 1706 may also include the input filter circuit 506 or the input filter circuit 606.

[0087] An inductor is coupled to the switch node of each half-bridge circuit. A first terminal of inductor 1702 is coupled to the switch node of half-bridge circuit 302. A first terminal of inductor 1705 is coupled to the switch node of half-bridge circuit 304. A first terminal of inductor 1710 is coupled to the switch node of half-bridge circuit 502. A first terminal of inductor 1714 is coupled to the switch node of half-bridge circuit 504. Capacitors are coupled between the inductors coupled to the switch nodes of consecutive half-bridge circuits. Capacitor 1704 is coupled between the second terminal of inductor 1702 and the second terminal of inductor 1705. Capacitor 1708 is coupled between the second terminal of inductor 1705 and the second terminal of inductor 1710. Capacitor 1712 is coupled between the second terminal of inductor 1710 and the second terminal of another inductor (e.g., inductor 1714).

[0088] A control circuit 308 is coupled to the half-bridge circuits 302, 304, 502, and 504. The control circuit 308 generates driver signals that control the switching in the half-bridge circuits. The half-bridge switching for transferring charge between two batteries can be the same as that described in FIG. 4. In the active cell balancing circuit 206 (e.g., as shown in FIG. 5), the control circuit 308 switches all of the half-bridge circuits when charge is to be transferred between any two battery cells (see, e.g., FIGS. 10A and 10B). In the active cell balancing circuit 1706, because only two inductors are in series between a pair of half-bridge circuits, only the half-bridge circuits transferring charge need be switched; the intervening half-bridges between the pair of half-bridges do not need to be switched. For example, to transfer charge from battery cell 202 to battery cell 508, control circuit 308 may switch half-bridge circuit 302 and half-bridge circuit 502 according to the timing of Figure 4, while half-bridge circuit 304, half-bridge circuit 504, and any other half-bridge circuits of active cell balancing circuit 1706 do not switch. As discussed above with Figure 9A, intervening half-bridges may be switched (and the switching equally phase-shifted) to reduce the total inductance along the current path between the half-bridge pair involved in the charge transfer. Such an arrangement may be eliminated by limiting the number of inductors between any pair of half-bridge balancing circuit 1706 to two.

[0089] 18A and 18B illustrate an example of charge transfer between different pairs of battery cells in a battery module using an example of an active cell balancing circuit 1706. In Fig. 18A, the battery module includes battery cells 202, 204, 906, 908, 910, and 912 coupled to half-bridge circuits 302, 304, 914, 916, 918, and 920. Half-bridge circuits 914, 916, 918, and 920 may be the same as half-bridge circuit 302. One of inductors 1702, 1705, 1710, 1716, 1720, or 1714 is coupled to the switch node of each half-bridge circuit, and one of capacitors 1704, 1708, 1712, 1718, or 1722 is coupled between adjacent inductors. In Figure 18A, charge is transferred from battery cell 204 to battery cell 202 and from battery cell 910 to battery cell 912. Multiple charge transfers can occur simultaneously. Figure 18B illustrates switching within half-bridge circuits 302, 304, 918, and 920 (e.g., driver signals provided by control circuit 308 to half-bridge circuits 302, 304, 914, 916, 918, and 920). Switching in half-bridge circuit 302 is delayed (phase-shifted) relative to switching in half-bridge circuit 304. Switching in half-bridge circuit 920 is delayed (phase-shifted) relative to switching in half-bridge circuit 918. Switching in half-bridge circuit 918 may be in phase with switching in half-bridge circuit 304. Half-bridge circuits 914 and 916 are idle (not switching). Using this switching, charge is transferred from battery cell 204 to battery cell 202 and from battery cell 910 to battery cell 912. No charge is transferred between battery cell 906 or battery cell 908. In some examples, the half-bridge circuit coupled to the sinking battery cell may be switched in phase, and the phase shift applied to the half-bridge circuit coupled to the sourcing battery cell may be adjusted to transfer charge.

[0090] In the active cell balancing circuit 1706, as the number of capacitors coupled in series between the sourcing half-bridge circuit and the sinking half-bridge circuit increases, the capacitance decreases and the resonant frequency of the LC network formed by the inductors and capacitors increases. The control circuit 308 can, in some examples, switch the half-bridge circuit at a fixed switching frequency. The active cell balancing circuit 1706 transfers power when the switching frequency is higher than the resonant frequency of the LC network. Therefore, the number of capacitors coupled in series between the sourcing half-bridge circuit and the sinking half-bridge circuit can be limited so that the switching frequency can remain higher than the resonant frequency of the LC network.

[0091] FIG. 19 is a schematic diagram of an active cell balancing circuit including a disconnection switch coupled between the capacitors. The disconnection switch can be opened to reduce the number of capacitors coupled in series. The half-bridge circuits and disconnection switches of FIG. 19 are similar to those shown in FIG. 14. In FIG. 19, the active cell balancing circuit includes half-bridge circuits 1400 and 1402, inductors 1902 and 1906, capacitors 1904 and 1908, and a transistor 1404. The active cell balancing circuit may include more than two half-bridge circuits in some examples. A first terminal of inductor 1902 is coupled to the switch node of half-bridge circuit 1402, and a first terminal of inductor 1906 is coupled to the switch node of half-bridge circuit 1400. A transistor 1404 is coupled between a second terminal of inductor 1906 and capacitor 1904. Capacitor 1904 is coupled between transistor 1404 and the second terminal of inductor 1902. The capacitor 1908 is coupled to the second terminal of the inductor 1906 .

[0092] The active cell balancing circuit may include any number of instances of transistor 1404. For example, the active cell balancing circuit may include an instance of transistor 1404 for each half-bridge circuit, or an instance of transistor 1404 for every other half-bridge circuit, or an instance of transistor 1404 for every fourth half-bridge circuit, every tenth half-bridge circuit, etc. The half-bridge circuits, transistor 1404, and control circuit 308 may be included within integrated circuit 330.

[0093] Control circuit 308 includes an output coupled to the control terminal of transistor 1404. Control circuit 308 generates a control signal C to control the turning on and off of transistor 1404 based on AB_CTL. D Transistor 1404 allows the number of capacitors (e.g., capacitors 1904 and 1908) coupled in series to be controlled.

[0094] In some examples, half bridge 1400 can be a first set of M half bridges coupled together by M−1 instances of capacitors, and half bridge 1402 can be another set of M half bridges coupled by M−1 instances of capacitors, similar to that shown in FIG. 18A. By enabling or disabling transistor 1404, the total number of capacitors in the current conduction path between the half bridge pair experiencing charge transfer can be limited to M−1, thereby setting an upper limit for the resonant frequency below the switching frequency. Also, transistor 1404 can be disabled when no charge is being transferred between the first and second sets of M half bridges, avoiding switching of any intervening half bridges between the first and second sets of M half bridges.

[0095] FIG. 20 is a block diagram of an example of an active cell balancing circuit 1706 including a parallel capacitor network 2002. In FIG. 20, the active cell balancing circuit 1706 includes n half-bridge circuits 2004 and an inductor 2006 coupled to the switch node of each half-bridge circuit. The parallel capacitor network 2002 includes a first set of capacitors 2008, a second set of capacitors 2010, a third set of capacitors 2012, and a fourth set of capacitors 2014. The first set of capacitors 2008 is coupled to the inductor as shown in FIG. 17. The first set of capacitors 2008 may include a capacitor for each half-bridge circuit. The second set of capacitors 2010 is coupled in parallel with the first set of capacitors 2008. The second set of capacitors 2010 may include capacitors coupled in parallel with the m capacitors of the first set of capacitors 2008. A third set of capacitors 2012 is coupled in parallel with the second set of capacitors 2010 and the first set of capacitors 2008. The third set of capacitors 2012 may include capacitors coupled in parallel with 2m capacitors of the first set of capacitors 2008. The fourth set of capacitors 2014 may include capacitors coupled in parallel with n capacitors of the first set of capacitors 2008. Other examples of the network of parallel capacitors 2002 may include different numbers of parallel levels of capacitors, and the capacitors in each level may span a different number of capacitors of the first set of capacitors 2008.

[0096] The parallel capacitor network 2002 increases the capacitance between the two half-bridge circuits, which reduces the resonant frequency of the LC network formed by the parallel capacitor network 2002 and the inductor 2006, allowing power transfer between the half-bridge circuits that can be separated by very little capacitance using only the first set of capacitors 2008.

[0097] FIG. 21 is a schematic diagram of an example active cell balancing circuit configured for two-phase operation. The active cell balancing circuit of FIG. 21 is similar to the active cell balancing circuit of FIG. 15 , but uses the LC arrangement of active cell balancing circuit 1706 instead of the LC arrangement of LC circuit 306. In the active cell balancing circuit of FIG. 21 , half-bridge circuits 302 and 304, inductors 1702 and 1705, and capacitors 1704 and 1708 are configured to operate as a first phase. Half-bridge circuits 1502 and 1504, inductors 2102 and 2106, and capacitors 2104 and 2108 are configured to operate as a second phase. Half-bridge circuits 302 and 1502 are coupled in parallel with battery cell 202. Half-bridge circuits 304 and 1504 are coupled in parallel with battery cell 204. The active cell balancing circuit may include any number of half-bridge circuits coupled in series in each phase. 21 also shows input filter circuit 506. Some examples may include input filter circuit 606 instead of input filter circuit 506.

[0098] The control circuit 308 is coupled to the half-bridge circuits 302, 304, 1502, and 1504 and generates driver signals C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24 TIFF2025540984000034.tif1014, C2, TIFF2025540984000035.tif1014, C1', TIFF2025540984000036.tif45, C2', and The switching of half-bridge circuits 1502 and 1504 may be 180 degrees out of phase with the switching of half-bridge circuits 302 and 304. The half-bridge circuits and control circuit 308 may be incorporated into an integrated circuit 330.

[0099] Two-phase operation reduces the current stress on the transistors in the half-bridge circuit with little or no increase in circuit area over a single-phase implementation. Because the two phases operate 180° out of phase, two-phase operation reduces the AC component of the current flowing in the input filter.

[0100] FIG. 22 is a schematic diagram of another example active cell balancing circuit 2206. The active cell balancing circuit 2206 includes half-bridge circuits 302, 304, 502, and 504 coupled to battery cells 202, 204, 508, and 510, respectively. An example of the active cell balancing circuit 2206 may include any number of half-bridge circuits coupled in series. The half-bridge circuits may be included in the integrated circuit 330. The active cell balancing circuit 2206 is similar to the active cell balancing circuit 1706, except that the inductors and capacitors are swapped relative to the active cell balancing circuit 1706. In the active cell balancing circuit 2206, the inductors are coupled in series, and the capacitors are coupled between the switch nodes of the half-bridge circuits and the series inductors. Thus, in the active cell balancing circuit 2206, the path between the two half-bridge circuits includes only an inductor and two capacitors, which can reduce the capacitance resulting from the series-coupled capacitors and the resulting increase in resonant frequency. Active cell balancing circuit 2206 may also include input filter circuit 506 or input filter circuit 606. In Figure 22, active cell balancing circuit 2206 is shown to include input filter circuit 506.

[0101] In the active cell balancing circuit 2206, a capacitor is coupled to the switch node of each half-bridge circuit. A first terminal of capacitor 2202 is coupled to the switch node of half-bridge circuit 302. A first terminal of capacitor 2205 is coupled to the switch node of half-bridge circuit 304. A first terminal of capacitor 2210 is coupled to the switch node of half-bridge circuit 502. A first terminal of capacitor 2214 is coupled to the switch node of half-bridge circuit 504. Inductors are coupled between the capacitors coupled to the switch nodes of consecutive half-bridge circuits. Inductor 2204 is coupled between the second terminal of 2202 and the second terminal of capacitor 2205. Inductor 2208 is coupled between the second terminal of capacitor 2205 and the second terminal of 2210. Inductor 2212 is coupled between the second terminal of 2210 and the second terminal of another capacitor (e.g., capacitor 2214).

[0102] A control circuit 308 is coupled to the half-bridge circuits 302, 304, 502, and 504. The control circuit 308 generates driver signals that control switching in the half-bridge circuits. The half-bridge switching for transferring charge between the two batteries may be the same as that described in FIG. 4. In the active cell balancing circuit 2206, similar to the active cell balancing circuit 206, the control circuit 308 switches all half-bridge circuits when charge is to be transferred between any two battery cells (see FIGS. 9A / 9B, 10A / 10B, 11A / 11B, and 12A / 12B).

[0103] FIG. 23 is a schematic diagram of an example of an active cell balancing circuit 2206 including a disconnection switch. The disconnection switch can be opened to reduce the number of inductors coupled in series. The half-bridge circuits and disconnection switches of FIG. 23 are similar to those shown in FIG. 14. In FIG. 23, the active cell balancing circuit includes half-bridge circuits 1400 and 1402, capacitors 2302 and 2306, inductors 2304 and 2308, and a transistor 1404. In some examples, the active cell balancing circuit may include more than two half-bridge circuits, capacitors, and inductors. A first terminal of capacitor 2302 is coupled to the switch node of half-bridge circuit 1402, and a first terminal of capacitor 2306 is coupled to the switch node of half-bridge circuit 1400. A transistor 1404 is coupled between a second terminal of capacitor 2306 and inductor 2304. The inductor 2304 is coupled between transistor 1404 and the second terminal of capacitor 2302. An inductor 2308 is coupled to the second terminal of the capacitor 2306 .

[0104] The active cell balancing circuit may include any number of instances of transistor 1404. For example, the active cell balancing circuit may include an instance of transistor 1404 for each half-bridge circuit (between each adjacent pair of half-bridge circuits), or an instance of transistor 1404 for every other half-bridge circuit, or an instance of transistor 1404 for every fourth half-bridge circuit, every tenth half-bridge circuit, etc. The half-bridge circuits, transistor 1404, and control circuit 308 may be included within integrated circuit 330.

[0105] Control circuit 308 includes an output coupled to the control terminal of transistor 1404. Control circuit 308 generates a control signal C to control the turning on and off of transistor 1404 based on AB_CTL. DTransistor 1404 allows for control of the number of series-coupled inductors (e.g., inductors 2304 and 2308), allowing for a reduction in the number of half-bridge circuits switched during charge transfer in some instances, as described with reference to FIG.

[0106] FIG. 24 is a schematic diagram of an active cell balancing circuit configured for two-phase operation based on active cell balancing circuit 2206. The active cell balancing circuit of FIG. 24 is similar to the active cell balancing circuit of FIG. 15, but uses the LC arrangement of active cell balancing circuit 2206 instead of the LC arrangement of active cell balancing circuit 206. In the active cell balancing circuit of FIG. 24, half bridge circuits 302 and 304, capacitors 2202 and 2205, and inductors 2204 and 2208 are configured to operate as a first phase. Half bridge circuits 1502 and 1504, capacitors 2402 and 2406, and inductors 2404 and 2408 are configured to operate as a second phase. Half bridge circuits 302 and 1502 are coupled in parallel with battery cells 202. Half bridge circuits 304 and 1504 are coupled in parallel with battery cells 204. The active cell balancing circuit may include any number of half-bridge circuits coupled in series in each phase. Also shown in Figure 24 is input filter circuit 506. Some examples may include input filter circuit 606 instead of input filter circuit 506.

[0107] The control circuit 308 is coupled to the half-bridge circuits 302, 304, 1502, and 1504 and provides driver signals C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24 TIFF2025540984000038.tif1014, C2, TIFF2025540984000039.tif1014, C1', TIFF2025540984000040.tif45, C2', and Generates TIFF2025540984000041.tif1114. Control circuit 308 can generate driver signals such that the switching of half-bridge circuits 1502 and 1504 can be 180 degrees out of phase with the switching of half-bridge circuits 302 and 304. The half-bridge circuits and control circuit 308 can be incorporated into integrated circuit 330.

[0108] Two-phase operation reduces the current stress on the transistors in the half-bridge circuit with little or no increase in circuit area over a single-phase implementation. Because the two phases operate 180° out of phase, two-phase operation can reduce the AC component of the current flowing in the input filter.

[0109] FIG. 25 is a schematic diagram of another example active cell balancing circuit 2506. The active cell balancing circuit 2506 includes half-bridge circuits 302, 304, 502, and 504 coupled to battery cells 202, 204, 508, and 510, respectively. An example of the active cell balancing circuit 2506 may include any number of half-bridge circuits coupled in series. The half-bridge circuits may be included in the integrated circuit 330. The active cell balancing circuit 2506 is similar to the active cell balancing circuit 2206, except that in the active cell balancing circuit 2506, an inductor is coupled in series with a capacitor to the switch node of the half-bridge circuit. Thus, in the active cell balancing circuit 2506, the path between the two half-bridge circuits may include only two inductors and two capacitors. The active cell balancing circuit 2506 may also include an input filter circuit 506 or an input filter circuit 606. In FIG. 25, the active cell balancing circuit 2506 is shown to include an input filter circuit 506 .

[0110] A capacitor is coupled to the switch node of each half-bridge circuit. A first terminal of capacitor 2202 is coupled to the switch node of half-bridge circuit 302. A first terminal of capacitor 2205 is coupled to the switch node of half-bridge circuit 304. A first terminal of capacitor 2210 is coupled to the switch node of half-bridge circuit 502. A first terminal of capacitor 2214 is coupled to the switch node of half-bridge circuit 504.

[0111] An inductor is coupled in series with each capacitor. A first terminal of inductor 2504 is coupled to the second terminal of capacitor 2202. A first terminal of inductor 2508 is coupled to the second terminal of capacitor 2205. A first terminal of inductor 2512 is coupled to the second terminal of capacitor 2210. A first terminal of inductor 2516 is coupled to the second terminal of capacitor 2224. A second terminal of inductor 2504 is coupled to the second terminal of inductor 2508, the second terminal of inductor 2512, and the second terminal of inductor 2516.

[0112] A control circuit 308 is coupled to the half-bridge circuits 302, 304, 502, and 504. The control circuit 308 generates driver signals that control switching in the half-bridge circuits. The half-bridge switching for transferring charge between two batteries may be the same as that described in FIGS. 18A / 18B. In the active cell balancing circuit 2506, similar to the active cell balancing circuit 1706, the control circuit 308 may switch only the sourcing and sinking half-bridge circuits when charge is to be transferred between any two battery cells.

[0113] FIG. 26 is a schematic diagram of an example of an active cell balancing circuit 2506 including a disconnection switch. The disconnection switch can be opened to isolate a selected set of half-bridge circuits. The half-bridge circuits and disconnection switch of FIG. 26 are similar to those shown in FIG. 14. In FIG. 26, the active cell balancing circuit includes half-bridge circuits 1400 and 1402, capacitors 2602 and 2604, inductors 2604 and 2608, and transistor 1404. In some examples, the active cell balancing circuit may include two or more half-bridge circuits. A first terminal of capacitor 2602 is coupled to the switch node of half-bridge circuit 1402, and a first terminal of capacitor 2606 is coupled to the switch node of half-bridge circuit 1400. Inductor 2604 is coupled in series with capacitor 2602, and inductor 2608 is coupled in series with capacitor 2606. A first terminal of inductor 2608 is coupled to the second terminal of inductor 2602, and a first terminal of inductor 2608 is coupled to the second terminal of capacitor 2606. Transistor 1404 is coupled between the second terminal of inductor 2604 and the second terminal of inductor 2608.

[0114] The active cell balancing circuit 2506 may include any number of instances of transistor 1404. For example, the active cell balancing circuit may include an instance of transistor 1404 for each half-bridge circuit (between each adjacent pair of half-bridge circuits), or an instance of transistor 1404 for every other half-bridge circuit, or an instance of transistor 1404 for every fourth half-bridge circuit, every tenth half-bridge circuit, etc. The half-bridge circuits, transistor 1404, and control circuit 308 may be included within integrated circuit 330.

[0115] Control circuit 308 includes an output coupled to the control terminal of transistor 1404. Control circuit 308 generates a control signal C to control the turning on and off of transistor 1404 based on AB_CTL. DThe transistor 1404 allows selective control of the number of half-bridge circuits that are coupled via the LC circuit.

[0116] FIG. 27 is a schematic diagram of an active cell balancing circuit configured for two-phase operation based on active cell balancing circuit 2506. The active cell balancing circuit of FIG. 27 is similar to the active cell balancing circuit of FIG. 15, but uses the LC arrangement of active cell balancing circuit 2506 instead of the LC arrangement of active cell balancing circuit 206. In the active cell balancing circuit of FIG. 24, half bridge circuits 302 and 304, capacitors 2202 and 2205, and inductors 2504 and 2508 are configured to operate as a first phase. Half bridge circuits 1502 and 1504, capacitors 2702 and 2706, and inductors 2704 and 2708 are configured to operate as a second phase. Half bridge circuits 302 and 1502 are coupled in parallel with battery cells 202. Half bridge circuits 304 and 1504 are coupled in parallel with battery cells 204. The active cell balancing circuit may include any number of half-bridge circuits coupled in series in each phase. Also shown in Figure 27 is input filter circuit 506. Some examples may include input filter circuit 606 instead of input filter circuit 506.

[0117] The control circuit 308 is coupled to the half-bridge circuits 302, 304, 1502, and 1504 and provides driver signals C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24 TIFF2025540984000042.tif1014, C2, TIFF2025540984000043.tif1014, C1', TIFF2025540984000044.tif45, C2', and Generates TIFF2025540984000045.tif1114. Control circuit 308 can generate driver signals such that the switching of half-bridge circuits 1502 and 1504 can be 180 degrees out of phase with the switching of half-bridge circuits 302 and 304. The half-bridge circuits and control circuit 308 can be incorporated into integrated circuit 330.

[0118] Two-phase operation reduces the current stress on the transistors in the half-bridge circuit with little or no increase in circuit area over a single-phase implementation. Because the two phases operate 180° out of phase, two-phase operation reduces the AC component of the current flowing in the input filter.

[0119] 28 is a block diagram of a battery assembly 2800 including balancing across the battery modules. The battery assembly 2800 includes battery modules 28021 and 28022. k Each battery module includes a battery cell and an active cell balancing circuit. The battery module 28021 includes m battery cells 28041 to 28044. m , each coupled to an active cell balancing circuit 28061. The active cell balancing circuit 28061 balances the battery cells 28041 to 28044 of the battery module 28021. m The battery module 28022 is coupled in series with the battery module 28021 and includes m battery cells 2804 each coupled to an active cell balancing circuit 28062. m-1 ~2804 2m The active cell balancing circuit 28062 includes a m+1 From 2804 2m The battery module 2802 balances the charge between k are coupled in series with the battery modules 28022, each including an active cell balancing circuit 2806 k m battery cells 2804 coupled to n-m ~2804n Active cell balancing circuit 2806 k Battery module 2802 k Battery cell 2804 n-m From 2804 n The active cell balancing circuits 28061, 28062, and 2806 k may be an example of active cell balancing circuit 206, active cell balancing circuit 1706, active cell balancing circuit 2206, active cell balancing circuit 2506, or any other active cell balancing circuit described herein.

[0120] The battery assembly 2800 also includes a battery module balancing circuit 2807. The battery module balancing circuit 2807 balances the battery modules 28021 to 28022. k The battery module balancing circuit 2807 balances the charges between the half-bridge circuits 28081 and 28082 to 28088. k , control circuit 2814, components 28101 and 28102 to 2810 k , and components 28121 to 2812 k-1 Includes half-bridge circuits 28081 and 28082 to 2808 k The control circuit 2814 controls the half-bridge circuits 28081 and 28082 to 28088. k The control circuit 2814 generates driver signals S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15, S16, S17, S18, S19, S20, S21, S22, S23, S24, S25, S26, S27, S28, S29, S30, S31, S TIFF2025540984000046.tif45, S2, TIFF2025540984000047.tif35, SK, and Generates TIFF2025540984000048.tif35.

[0121] Components 28101 to 2810 k and components 28121 to 2812k-1 can be a capacitor, an inductor, a conductor, or a combination thereof (e.g., a series combination) as described herein. k are conductors, and LC components 28121 to 2812 k-1 is an example of an LC circuit 306. In such an example, the control circuit 2814 controls the switching of the half-bridge circuit as described for the active cell balancing circuit.

[0122] In another example, as in the active cell balancing circuit 1706, components 28101-2810 k are inductors, and components 28121 to 2812 k-1 is a capacitor. In such an example, the control circuit 2814 controls the switching of the half-bridge circuit as described for the active cell balancing circuit 1706.

[0123] In another example, as in active cell balancing circuit 2206, components 28101-2810 k is a capacitor, and components 28121 to 2812 k-1 is the inductor. In such an example, the control circuit 2814 controls the switching of the half-bridge circuit, as described for the active cell balancing circuit 2206.

[0124] In another example, as in the active cell balancing circuit 2506, components 28101-2810 k is a capacitor in series with an inductor, and components 28121 to 2812 k-1 is a conductor. In such an example, the control circuit 2814 controls the switching of the half-bridge circuit, as described for the active cell balancing circuit 2506.

[0125] Various examples of the battery module balancing circuit 2807 include components 28121-28122. k-1and / or multi-phase circuit elements as described herein.

[0126] In this description, the term "coupled" may encompass a connection, communication, or signal path that enables a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform a certain action, (a) in a first example, device A is coupled to device B by a direct connection, or (b) in a second example, device A is coupled to device B through an intervening component C, and device B is controlled by device A through a control signal generated by device A, where intervening component C does not change the functional relationship between device A and device B.

[0127] Also, in this description, the phrase "based on" means "based at least in part on." Thus, if X is based on Y, X can be a function of Y and any number of other factors.

[0128] A device that is "configured to" perform a certain task or function may be configured (e.g., programmed and / or hardwired) to perform that function when manufactured by a manufacturer, and / or may be configurable (or reconfigurable) by a user after manufacture to perform that function and / or other additional or alternative functions. Such configuration may be through firmware and / or software programming of the device, through the construction and / or layout of the hardware components and interconnections of the device, or a combination thereof.

[0129] As used herein, the terms "terminal," "node," "interconnect," "pin," and "lead" are used interchangeably and, unless otherwise noted, are used generally to refer to an interconnection or termination between device elements, circuit elements, integrated circuits, devices, or other electronic or semiconductor components.

[0130] A circuit or device described herein as including particular components may instead be adapted to be coupled to those components to form the described circuit element or device. For example, a structure described as including one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and / or inductors), and / or one or more sources (such as voltage and / or current sources) may instead include only semiconductor elements (e.g., a semiconductor die and / or integrated circuit (IC) package) in a single physical device, which may be adapted to be coupled to at least some of the passive elements and / or sources to form the described structure, either during or after manufacture, e.g., by an end user and / or a third party.

[0131] Although the use of particular transistors is described herein, other transistors (or equivalent devices) may alternatively be used with minor or no modifications to the remaining circuit elements. For example, field-effect transistors ("FETs") (such as n-channel FETs (NFETs) or p-channel FETs (PFETs)), bipolar junction transistors (BJTs, e.g., NPN or PNP transistors), insulated gate bipolar transistors (IGBTs), and / or junction field-effect transistors (JFETs) may be used in place of or in conjunction with the devices disclosed herein. The transistors may be depletion-mode, drain-extension, enhancement-mode, natural, or other types of device structure transistors. Additionally, the devices may be implemented in / on silicon substrates (Si), silicon carbide substrates (SiC), gallium nitride substrates (GaN), or gallium arsenide substrates (GaAs).

[0132] In the claims, reference may be made to a transistor's control input and its current terminals. In the context of a FET, the control input is the gate and the current terminals are the drain and source. In the context of a BJT, the control input is the base and the current terminals are the collector and emitter.

[0133] As used herein, a FET is "on" means that the FET's conduction channel is present and drain current can flow through the FET. As used herein, a FET is "off" means that the conduction channel is not present and drain current cannot flow through the FET. However, an "off" FET may have current flow through the transistor's body diode.

[0134] The circuits described herein are reconfigurable to include additional or different components to provide functionality at least partially similar to that available prior to the replacement of the component. A component depicted as a resistor, unless otherwise noted, generally represents any one or more elements coupled in series and / or parallel to provide the amount of impedance represented by the depicted resistor. For example, a resistor or capacitor depicted and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in parallel between the same nodes. For example, a resistor or capacitor depicted and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in series between the same two nodes as the single resistor or capacitor.

[0135] While certain elements of the described examples are included within an integrated circuit and others are external to the integrated circuit, in other exemplary embodiments, additional or fewer features may be incorporated into the integrated circuit. Also, some or all of the features shown as being external to the integrated circuit may be included within the integrated circuit, and / or some features shown as being internal to the integrated circuit may be incorporated outside the integrated circuit. As used herein, the term "integrated circuit" refers to one or more circuits that are (1) incorporated within / on a semiconductor substrate, (2) incorporated within a single semiconductor package, (3) incorporated within the same module, and / or (4) incorporated within / on the same printed circuit board.

[0136] Modifications may be made in the described embodiments, and other embodiments are possible, within the scope of the appended claims.

Claims

1. 1. An integrated circuit (IC), comprising: a first transistor coupled between the first battery terminal and the capacitor terminal, the first transistor having a first transistor control terminal; a second transistor coupled between the capacitor terminal and a second battery terminal, the second transistor having a second transistor control terminal; a third transistor coupled between a third battery terminal and an inductor terminal, the third transistor having a third transistor control terminal, the third battery terminal being coupled to the second battery terminal; a fourth transistor coupled between the inductor terminal and a fourth battery terminal, the fourth transistor having a fourth transistor control terminal; a control circuit having a control input and first, second, third, and fourth control outputs; Including, the first control output is coupled to the first transistor control terminal, the second control output is coupled to the second transistor control terminal, the third control output is coupled to the third transistor control terminal, and the fourth control output is coupled to the fourth transistor control terminal; IC.

2. 2. The IC of claim 1, wherein the control circuitry responds to a control signal by: configured to provide a first driver signal having a first state at the first control output and a second driver signal having a second state at the second control output within a first portion of a first switching cycle; configured to provide the first driver signal having a second state at the first control output and the second driver signal having a first state at the second control output within a second portion of a first switching cycle; configured to provide a third driver signal having a first state at the third control output and a fourth driver signal having a second state at the fourth control output within a first portion of a second switching cycle; configured to provide the third driver signal having a second state at the third control output and the fourth driver signal having a first state at the fourth control output within a second portion of the second switching cycle; the first transistor is enabled in response to the first driver signal having the first state and is disabled in response to the first driver signal having the second state; the second transistor is enabled in response to the second driver signal having the first state and is disabled in response to the second driver signal having the second state; the third transistor is enabled in response to the third driver signal having the first state and is disabled in response to the third driver signal having the second state; and the fourth transistor is disabled in response to the fourth driver signal having the second state and is enabled in response to the fourth driver signal having the first state; IC.

3. 3. The IC of claim 2, the control circuit is configured to set an interval between a first transition of the first driver signal from the second state to the first state and a second transition of the third driver signal from the second state to the first state in response to the control signal indicating a transfer of charge between the first and third battery terminals and between the second and fourth battery terminals; The spacing is based on the amount of current to be transferred.

4. 4. The IC of claim 3, an IC configured such that, in response to the control signal indicating the transfer of the charge from the third battery terminal to the first battery terminal and from the fourth battery terminal to the second battery terminal, the control circuit provides the second transition of the third driver signal in the interval before the first transition of the first driver signal.

5. 4. The IC of claim 3, an IC configured such that, in response to the control signal indicating the transfer of the charge from the first battery terminal to the third battery terminal and from the second battery terminal to the fourth battery terminal, the control circuit provides the second transition of the third driver signal in the interval after the first transition of the first driver signal.

6. 4. The IC of claim 3, wherein the spacing is based on at least one of a voltage difference between the first battery terminal and the third battery terminal or an inductance of an inductor coupled to the inductor terminal.

7. 4. The IC of claim 3, wherein the control circuit comprises: configured to provide the first and second driver signals having the second state within a first dead time interval and a second dead time interval of the first switching cycle, the first dead time interval being before the first portion of the first switching cycle and the second dead time interval being after the first portion of the first switching cycle; configured to provide the third and fourth driver signals having the second state within a third dead time interval and a fourth dead time interval of the second switching cycle, the third dead time interval being before the first portion of the second switching cycle and the fourth dead time interval being after the first portion of the second switching cycle. IC.

8. 3. The IC of claim 2, wherein the inductor terminal is a first inductor terminal, the capacitor terminal is a first capacitor terminal, the fourth transistor is coupled between a second capacitor terminal and the fourth battery terminal, the second capacitor terminal is coupled to the first inductor terminal, and the IC further comprises: a fifth transistor coupled between a fifth battery terminal and the second inductor terminal, the fifth transistor having a fifth transistor control terminal, the fifth battery terminal being coupled to the fourth battery terminal; a sixth transistor coupled between the second inductor terminal and a sixth battery terminal, the sixth transistor having a sixth transistor control terminal; Including, the control circuit has fifth and sixth control outputs, the fifth control output coupled to the fifth transistor control terminal and the sixth control output coupled to the sixth transistor control terminal, the control circuit being responsive to the control signals to: configured to provide, within a first portion of a third switching cycle, the fifth driver signal having a first state at the fifth control output and a sixth driver signal having a second state at the sixth control output; configured to provide the fifth driver signal having a second state at the fifth control output and the sixth driver signal having a first state at the fifth control output within a second portion of the third switching cycle; the fifth transistor is enabled in response to the fifth driver signal having the first state and is disabled in response to the fifth driver signal having the second state; and the sixth transistor is enabled in response to the sixth driver signal having the first state and is disabled in response to the sixth driver signal having the second state; IC.

9. 9. The IC of claim 8, wherein in response to the control signal indicating a transfer of charge between the first battery terminal and the fifth battery terminal and between the second battery terminal and the sixth battery terminal, the control circuit: configured to provide a first transition of the first driver signal from the second state to the first state at a first interval before a second transition of the third driver signal from the second state to the first state; configured to provide a third transition of the fifth driver signal from the second state to the first state at a second interval after the second transition of the third driver signal from the second state to the first state; the first and second spacings are based on an amount of current to be transferred; IC.

10. 10. The IC of claim 9, wherein the first spacing and the second spacing are equal.

11. 9. The IC of claim 8, wherein in response to the control signal indicating a transfer of charge from the first battery terminal to the fifth battery terminal and from the second battery terminal to the sixth battery terminal, the control circuit: configured to provide a first transition of the first driver signal from the second state to the first state at an interval before a second transition of the fifth driver signal from the second state to the first state, the interval being based on an amount of current to be transferred; configured to set the third and fourth driver signals to the second state within the interval; IC.

12. 9. The IC of claim 8, a seventh transistor coupled between a seventh battery terminal and a third inductor terminal, the seventh transistor having a seventh transistor control terminal, the seventh battery terminal being coupled to the sixth battery terminal; an eighth transistor coupled between the third inductor terminal and an eighth battery terminal, the eighth transistor having an eighth transistor control terminal; Further comprising: the control circuit has seventh and eighth control outputs, the seventh control output coupled to the seventh transistor control terminal and the eighth control output coupled to the eighth transistor control terminal, the control circuit being responsive to the control signals to: configured to provide a seventh driver signal having a first state at the seventh control output and an eighth driver signal having a second state at the eighth control output within a first portion of a fourth switching cycle; configured to provide the seventh driver signal having a second state at the seventh control output and the eighth driver signal having a first state at the eighth control output within a second portion of the fourth switching cycle; the seventh transistor is enabled in response to the seventh driver signal having the first state and is disabled in response to the seventh driver signal having the second state; the eighth transistor is enabled in response to the eighth driver signal having the first state and is disabled in response to the eighth driver signal having the second state; IC.

13. 13. The IC of claim 12, wherein the control circuit comprises: in response to the control signal indicating a first transfer of charge between the first battery terminal and the third battery terminal, and between the second battery terminal and the fourth battery terminal, and a second transfer of charge between the fifth battery terminal and the seventh battery terminal, and between the sixth battery terminal and the eighth battery terminal; configured to set an interval between a first transition of the first driver signal from the second state to the first state and a second transition of the third driver signal from the second state to the first state; and configured to set an interval between a first transition of the fifth driver signal from the second state to the first state and a second transition of the seventh driver signal from the second state to the first state, the interval being based on an amount of current to be transferred. IC.

14. 3. The IC of claim 2, a fifth transistor coupled between the capacitor terminal and the first and second transistors, the fifth transistor having a fifth transistor control terminal; the control circuit having a fifth control output coupled to the fifth transistor control terminal; IC.

15. 1. A method comprising: connecting the capacitor and inductor between a first battery terminal and a second battery terminal of a first battery cell to provide a first voltage across the capacitor, wherein a capacitor terminal of the capacitor is connected to the first battery terminal and an inductor terminal of the inductor is connected to the second battery terminal; disconnecting the inductor terminal from the second battery terminal; connecting the inductor terminal to the first battery terminal to provide the first voltage across the inductor; disconnecting the capacitor terminal from the first battery terminal; connecting the capacitor terminal to a third battery terminal of a second battery cell to transfer charge from the capacitor to the second battery cell at a rate based on the first voltage and an inductance of the inductor; A method comprising:

16. 16. The method of claim 15, determining a delay interval based on a target amount of current to be transferred from the first battery cell to the second battery cell; delaying the connection of the capacitor terminal to the third battery terminal by the delay interval with respect to the connection of the inductor terminal to the first battery terminal; The method further comprises:

17. 1. A system comprising: a first battery and a second battery, the first battery having a first battery terminal and a second battery terminal, the second battery having a third battery terminal and a fourth battery terminal, the second battery terminal being coupled to the third battery terminal; 1. An integrated circuit comprising: a first transistor coupled between the first battery terminal and a capacitor terminal; a second transistor coupled between the capacitor terminal and the second battery terminal; a third transistor coupled between the third battery terminal and an inductor terminal; a fourth transistor coupled between the inductor terminal and the fourth battery terminal; the integrated circuit comprising: a capacitor and an inductor coupled in series, the capacitor coupled to the capacitor terminal and the inductor coupled to the inductor terminal; Including, the system.

18. 18. The system of claim 17, the first transistor having a first transistor control terminal; the second transistor has a second transistor control terminal; the third transistor has a third transistor control terminal; the fourth transistor having a fourth transistor control terminal; and the integrated circuit includes a control circuit having a control input and first, second, third, and fourth control outputs, the first control output coupled to the first transistor control terminal, the second control output coupled to the second transistor control terminal, the third control output coupled to the third transistor control terminal, and the fourth control output coupled to the fourth transistor control terminal; system.

19. 20. The system of claim 18, wherein the control circuitry is responsive to a control signal to: configured to provide a first driver signal having a first state at the first control output and a second driver signal having a second state at the second control output within a first portion of a first switching cycle; configured to provide the first driver signal having a second state at the first control output and the second driver signal having a first state at the second control output within a second portion of the first switching cycle; configured to provide a third driver signal having a first state at the third control output and a fourth driver signal having a second state at the fourth control output within a first portion of a second switching cycle; configured to provide the third driver signal having a second state at the third control output and the fourth driver signal having a first state at the fourth control output within a second portion of the second switching cycle; the first transistor is enabled in response to the first driver signal having the first state and is disabled in response to the first driver signal having the second state; the second transistor is enabled in response to the second driver signal having the first state and is disabled in response to the second driver signal having the second state; the third transistor is enabled in response to the third driver signal having the first state and is disabled in response to the third driver signal having the second state; the fourth transistor is disabled in response to the fourth driver signal having the second state and is enabled in response to the fourth driver signal having the first state; system.

20. 20. The system of claim 19, the inductor terminal is a first inductor terminal, the capacitor terminal is a first capacitor terminal, the fourth transistor is coupled between a second capacitor terminal and the fourth battery terminal, and the second capacitor terminal is coupled to the first inductor terminal; the system includes a third battery having a fifth battery terminal and a sixth battery terminal, the fifth battery terminal coupled to the fourth battery terminal; The integrated circuit comprises: a fifth transistor coupled between a fifth battery terminal and the second inductor terminal, the fifth transistor having a fifth transistor control terminal; a sixth transistor coupled between the second inductor terminal and a sixth battery terminal, the sixth transistor having a sixth transistor control terminal; Further comprising: the control circuit has fifth and sixth control outputs, the fifth control output coupled to the fifth transistor control terminal and the sixth control output coupled to the sixth transistor control terminal, the control circuit being responsive to the control signals to: configured to provide a fifth driver signal having a first state at the fifth control output and a sixth driver signal having a second state at the sixth control output within a first portion of a third switching cycle; configured to provide the fifth driver signal having a second state at the fifth control output and the sixth driver signal having a first state at the fifth control output within a second portion of the third switching cycle; the fifth transistor is enabled in response to the fifth driver signal having the first state and is disabled in response to the fifth driver signal having the second state; and the sixth transistor is enabled in response to the sixth driver signal having the first state and is disabled in response to the sixth driver signal having the second state; system.

21. 21. The system of claim 20, wherein in response to the control signal indicating a transfer of charge from the first battery terminal to the fifth battery terminal and from the second battery terminal to the sixth battery terminal, the control circuit: configured to provide a first transition of the first driver signal from the second state to the first state at a first interval before a second transition of the third driver signal from the second state to the first state; configured to provide a third transition of the fifth driver signal from the second state to the first state at a second interval after the second transition of the third driver signal from the second state to the first state; the first spacing and the second spacing are based on an amount of current to be transferred; system.

22. 22. The system of claim 21, wherein the first spacing and the second spacing are equal.

23. 21. The system of claim 20, in response to the control signal indicating a transfer of charge from the first battery terminal to the fifth battery terminal and from the second battery terminal to the sixth battery terminal, the control circuit: configured to provide a first transition of the first driver signal from the second state to the first state at an interval before a second transition of the fifth driver signal from the second state to the first state, the interval being based on an amount of current to be transferred; configured to set the third driver signal and the fourth driver signal to the second state within the interval. system.

24. 1. A battery assembly comprising: a first battery module including a first module terminal, a second module terminal, and a first battery and a second battery coupled in series between the first module terminal and the second module terminal; a second battery module including a third module terminal, a fourth module terminal, and a third battery and a fourth battery coupled in series between the third module terminal and the fourth module terminal, the third module terminal being coupled to the second module terminal; a first transistor coupled between the first module terminal and a first resonant component terminal, the first transistor having a first transistor control terminal; a second transistor coupled between the first resonant component terminal and the second module terminal, the second transistor having a second transistor control terminal; a third transistor coupled between the third module terminal and a second resonant component terminal, the third transistor having a third transistor control terminal; a fourth transistor coupled between the second resonant component terminal and the fourth module terminal, the fourth transistor having a fourth transistor control terminal; a control circuit having a control input and first, second, third, and fourth control outputs, the first control output coupled to the first transistor control terminal, the second control output coupled to the second transistor control terminal, the third control output coupled to the third transistor control terminal, and the fourth control output coupled to the fourth transistor control terminal; 1. A battery assembly including:

25. 25. The battery assembly of claim 24, a capacitor and an inductor coupled in series between the first resonant component terminal and the second resonant component terminal; or a first inductor, a capacitor, and a second inductor coupled in series between the first resonant component terminal and the second resonant component terminal; or a first capacitor, an inductor, and a second capacitor coupled in series between the first resonant component terminal and the second resonant component terminal; or a first capacitor, a first inductor, a second inductor, and a second capacitor coupled in series between the first resonant component terminal and the second resonant component terminal; The battery assembly further includes:

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