Cell balance adjustment method and cell balance adjustment device for series secondary battery

Abstract

Provided is a cell balance adjustment method for evening a charge state of a cell 2 in a secondary battery 3. All of the cells 2 constituting the secondary battery 3 are divided into a plurality of processing target groups 4 in a state in which a part of the cell 2 is included in an overlapping manner in the processing target groups 4 adjacent to each other. The method comprises: a capacitor charging step of charging a capacitor 8 by connecting the capacitor 8 to both end portions of the processing target group 4; and a capacitor discharge step of charging a processing target cell by connecting a predetermined processing target cell included in the processing target group 4 and the capacitor 8 and discharging the charge.

Description

Cell balancing method and cell balancing device for series secondary batteries

[0001] The disclosed technology relates to a cell balancing method and a cell balancing device suitable for a drive battery for an electric vehicle or the like.

[0002] High-voltage (e.g., several hundred volts) drive batteries installed in hybrid vehicles, electric vehicles, etc. are generally made up of a large number of single cells (cells) connected in series, each of which is made up of lithium-ion batteries or the like with a voltage of several volts.

[0003] Even if a battery is charged and discharged in the same way, the state of charge of each cell will not be the same due to individual differences. In other words, differences will occur in the voltage of each cell. If a battery is charged while there are differences in the voltage of each cell, when the cell with the highest voltage reaches full charge (SOC 100%), charging must be stopped to prevent that cell from overcharging. At this time, the other cells have not yet reached full charge, so even if the battery is charged, the amount of power that can actually be used will be significantly lower than the battery's original power capacity.

[0004] Therefore, technologies for equalizing the charge state of the cells (cell balancing technologies) have been put into practical use so that the battery's original power can be used. These technologies are generally divided into passive and active methods.

[0005] In the passive system, in order to equalize the state of charge of each cell, the charge amount of the other cells is adjusted to match the charge amount (minimum charge amount) of the cell with the least charge amount. In other words, the power above the minimum charge amount of the other cells is discharged and discarded to adjust to the minimum charge amount and equalize the state of charge of all cells. In the passive system, the circuit and control are simple and can be implemented at low cost, but it has the disadvantage of high energy loss.

[0006] In contrast, the active method transfers power from cells with a high charge level to cells with a low charge level. By doing so, the charge level of each cell is adjusted to an average charge level, equalizing the state of charge of all cells. Therefore, with the active method, energy loss is low, but the circuitry and control tend to be complex. Therefore, the active method has the disadvantage of being high cost and large in size, and has not yet been put to practical use.

[0007] Various types of circuits (also called ACB circuits for short) that perform cell balancing using this active method have been proposed, including half-bridge inductor methods and transformer methods. Among these, ACB circuits that use capacitors that can be separated from the circuit (flying capacitor ACB circuits) are advantageous in that they have few drawbacks in terms of cost and size, and are relatively easy to control.

[0008] On the other hand, the flying capacitor ACB circuit has the problem that the equalization process takes time. That is, in a flying capacitor ACB circuit, the power of the most charged cell is first charged to the flying capacitor, and then the power from the flying capacitor is used to charge the least charged cell. This equalizes the charge state of each cell.

[0009] When the charge levels of the cells are equalized and the voltage difference between the cells decreases, the current flowing through the capacitor also decreases, which makes it take a long time for the voltage to converge, which results in a long equalization process.

[0010] Techniques have been proposed to solve the problems of such flying capacitor ACB circuits.

[0011] For example, Patent Document 1 discloses a state-of-charge adjusting device that includes a capacitor C (corresponding to a flying capacitor) connected via a switch to both the positive and negative terminals of each cell. In this state-of-charge adjusting device, a cell group consisting of two or more predetermined cells is connected to the capacitor C for charging, and then the cell with the least amount of charge is connected to the capacitor C to equalize the state of charge of each cell.

[0012] Furthermore, Patent Document 2 discloses an energy storage device that includes multiple capacitors (equivalent to flying capacitors) connected via switches to both the positive and negative sides of each cell. This energy storage device uses both an active method, which equalizes the voltage of each cell by charging and discharging the capacitors, and a passive method, which discharges the capacitors using switches, to equalize the state of charge of each cell.

[0013] JP 2007-43788 A JP 2015-37339 A

[0014] In the technology of Patent Document 1, the capacitor C is charged with the voltage of multiple cells, so even if the charge state of each cell becomes more equal, the current flowing through the capacitor C does not decrease. Therefore, the time for individual equalization processes can be shortened. However, because there is only one capacitor C, the equalization process must be repeated, and it takes time to equalize all the cells. Furthermore, the control is complicated, as it is necessary to perform a discharge time estimation process, and the calculation load is heavy.

[0015] With the technology of Patent Document 2, it is difficult to achieve stable discharge due to individual differences in switches, and since a passive system is also used, the problem of energy loss still remains.

[0016] Therefore, we now disclose a technology that can effectively solve this problem even in a basic flying capacitor ACB circuit by devising a switch control method.

[0017] One of the techniques disclosed is a cell balancing method for equalizing the states of charge of a secondary battery configured by connecting a plurality of cells in series.

[0018] All of the cells constituting the secondary battery are divided into a plurality of processing target groups each consisting of at least two or more consecutive cells, with some of the cells overlapping between adjacent processing target groups.

[0019] The cell balance adjustment method is characterized by including a capacitor charging step of charging a capacitor by connecting the capacitor to both ends of the processing target group, and a capacitor discharging step of connecting the capacitor to a predetermined processing target cell included in the processing target group and discharging the charge of the capacitor to charge the processing target cell.

[0020] That is, in this cell balance adjustment method, all of the cells constituting the secondary battery are divided into a plurality of processing target groups each consisting of at least two or more consecutive cells, and the division is performed so that adjacent processing target groups include some overlapping cells.

[0021] In this state, the capacitor is charged by connecting it to both ends of the group to be processed. That is, the capacitor is charged with the voltage of all the cells that make up the group to be processed. Then, a specific cell to be processed included in the group to be processed is connected to the capacitor, and the charge is discharged to charge the cell to be processed. That is, one cell that makes up the group to be processed is charged by discharging the high charge of the capacitor.

[0022] This allows the current flowing through the capacitor to remain constant even as the charge state becomes more uniform, enabling the charge / discharge process to be completed in a short time. Energy loss can also be reduced by transferring power between cells.

[0023] Moreover, since each processing group includes some overlapping cells, the state of charge of all cells constituting the secondary battery can be made uniform.

[0024] The cell to be treated is preferably a low-voltage cell having the lowest voltage in the group to be treated.

[0025] This allows for the most efficient cell balancing adjustment.

[0026] The processing group may be composed of two of the cells. In this case, the capacitor charging step and the capacitor discharging step may be repeated until the voltage magnitude relationship between one low-voltage cell corresponding to the low-voltage cell and the other high-voltage cell is reversed.

[0027] This eliminates the need to detect the voltage of each cell. It is sufficient to be able to compare the voltages of two cells relatively, eliminating the need for sophisticated detectors or calculations. This reduces the cost of components and allows for the device to be more compact.

[0028] The capacitor charging step and the capacitor discharging step may be repeated until a difference in voltage between the cells included in each of the processing target groups becomes equal to or less than a predetermined value.

[0029] In the case where the group to be processed is made up of three or more cells, this makes it possible to equalize the state of charge of the cells.

[0030] The capacitor charging step and the capacitor discharging step may be repeated continuously while the secondary battery is in use, which also makes it possible to equalize the state of charge of the cells.

[0031] The capacitor charging step and the capacitor discharging step may be alternately repeated at a cycle of 1 kHz to 1 MHz.

[0032] This allows the cell balancing device to be made compact and low cost while suppressing harmonic noise.

[0033] Another disclosed technique relates to a cell balancing device for equalizing the states of charge of a secondary battery configured by connecting a plurality of cells in series.

[0034] All of the cells constituting the secondary battery are divided into a plurality of processing target groups each consisting of at least two or more consecutive cells, with some of the cells overlapping between adjacent processing target groups.

[0035] The cell balance adjustment device is arranged for each of the processing target groups and includes a plurality of capacitors connected to the positive and negative sides of each of the cells via switches, cell voltage comparison means capable of comparing the voltages of each of the cells, and control means for controlling each of the switches based on the detection values ​​of the cell voltage comparison means.

[0036] The control means performs a capacitor charging process in which the capacitor is connected to both ends of each of the processing target groups to charge the capacitor, and a capacitor discharging process in which the capacitor is connected to a predetermined processing target cell included in each of the processing target groups to charge the processing target cell by discharging the charge.

[0037] That is, this cell balancing apparatus executes the above-described cell balancing method, and therefore a valuable cell balancing apparatus can be realized at low cost and put into practical use.

[0038] The disclosed technology can be applied to conventional flying capacitor ACB circuits, and effectively resolves the problems associated with them simply by changing the switch control method. As a result, it is possible to obtain only the advantages of flying capacitor ACB circuits, such as low energy loss, minimal cost and size drawbacks, and relatively easy control. Therefore, a valuable cell balancing device can be realized at low cost and put into practical use.

[0039] 10A and 10B .

[0023] FIG. 11A is a diagram illustrating a switch control method in a conventional flying capacitor ACB circuit (comparative example).

[0024] FIG. 11B is a diagram illustrating a switch control method in a flying capacitor ACB circuit to which the disclosed technology is applied (embodiment).

[0025] FIG. 11C is a diagram illustrating a flying capacitor ACB circuit to which the disclosed technology can be applied.

[0026] FIG. 11D is a block diagram illustrating the relationship of the main components of a cell balancing device.

[0027] FIG. 11E is a circuit diagram for reference in explaining an example of control by a control means.

[0028] FIG. 11F is a flowchart illustrating the flow of main processing executed by a control means.

[0029] FIG. 11F is a diagram corresponding to the main steps of the processing in FIG. 6.

[0029] FIG. 11F is a diagram illustrating the effect of the disclosed technology.

[0030] FIG. 11A is a diagram illustrating another flying capacitor ACB circuit to which the disclosed technology can be applied.

[0031] FIG. 11F is a flowchart following FIG. 10A.

[0032] FIG. 11F is a diagram corresponding to the main steps of the processing in FIGS. 10A and 10B.

[0033] FIG. 11F is a diagram following FIG.

[0040] The disclosed technology will now be described, however, the following description is merely exemplary in nature.

[0041] <Basic Features of the Disclosed Technology> Prior to specific descriptions of the embodiments, basic features of the disclosed technology will be described. Fig. 1 illustrates, as a comparative example, a switch control method (conventional SW method) in a conventional flying capacitor ACB circuit. Fig. 2 illustrates a switch control method (improved SW method) in a flying capacitor ACB circuit to which the disclosed technology is applied.

[0042] The circuit shown at the top of each figure represents the basic part of the flying capacitor ACB circuit (the part corresponding to the two cells V1 and V2 connected in series). The circuit structure is the same in both the conventional SW system and the improved SW system.

[0043] That is, the flying capacitor ACB circuit includes a plurality of branch lines Lb connected to the positive and negative sides of each of the cells V1 and V2, a plurality of switches S1 to S4 arranged on each of the branch lines Lb, and a capacitor C (a so-called flying capacitor) connected to both the positive and negative sides of each of the cells V1 and V2 via the switches S1 to S4. Note that, under normal conditions, each of the switches S1 to S4 is OFF (disabled from conducting electricity) (a so-called normally open state).

[0044] Here, we assume that cell V1 has a higher voltage than cell V2 (V1>V2). In this case, in the conventional SW system, as shown in the upper left diagram of Figure 1, switches S1 and S3 are turned ON (to allow current to flow) so that cell V1, which has the higher voltage, is connected to capacitor C. This causes current Ic to flow as shown by the dashed line, transferring charge from cell V1 to capacitor C and charging it.

[0045] 1, switches S2 and S4 are turned on instead of switches S1 and S3 so that cell V2, which has a lower voltage, is connected to capacitor C. This causes current Ic to flow as shown by the dashed line, transferring charge from capacitor C to cell V2 and charging cell V2.

[0046] In the conventional SW method, the switches S1 to S4 are controlled so that such an operation is repeated.

[0047] The lower part of each figure shows a time chart corresponding to the operation shown above. As shown in the lower left diagram of Figure 1, when the voltage difference between cell V2 and cell V1 is large (V1>V2), that voltage difference is applied to capacitor C, and the current Ic flowing through capacitor C is also relatively large. Therefore, the charge states of both cells V1 and V2 are equalized relatively quickly.

[0048] As shown in the lower right diagram of Figure 1, as the voltage difference between cell V2 and cell V1 decreases (V1 ≒ V2), the current Ic flowing through capacitor C also decreases. The more the states of charge of cells V1 and V2 are equalized, the smaller the difference becomes, so the process of equalizing the states of charge of cells V1 and V2 becomes slower. Theoretically, the voltages of cells V1 and V2 never become completely identical, but instead converge exponentially. Therefore, with the conventional SW method, it takes a long time for the states of charge to be equalized.

[0049] 2, switches S1 and S4 are turned on so that both cells V1 and V2 are connected to capacitor C. This causes current Ic to flow as shown by the dashed line, transferring charge from cells V1 and V2 to capacitor C and charging capacitor C.

[0050] 2, switches S2 and S4 are turned on instead of switches S1 and S4 so that cell V2, which has a lower voltage, is connected to capacitor C. This causes current Ic to flow as shown by the dashed line, transferring charge from capacitor C to cell V2 and charging cell V2.

[0051] In the improved SW method, the switches S1 to S4 are controlled so that such an operation is repeated.

[0052] As shown in the lower left diagram of Figure 2, when the voltage difference between cell V2 and cell V1 is large (V1>V2), the total voltage of both cells V1 and V2 is applied to capacitor C, so the current Ic flowing through capacitor C is relatively large regardless of the voltage difference. Therefore, the charge states of both cells V1 and V2 are equalized relatively quickly.

[0053] As shown in the lower right diagram of Figure 2, even if the voltage difference between cell V2 and cell V1 becomes small (V1 ≒ V2), the sum of the voltages of both cells V1 and V2 is applied to capacitor C (approximately twice the voltage of the conventional SW system), so the current Ic flowing through capacitor C remains large. Even as the states of charge of both cells V1 and V2 become more equal, the current Ic does not decrease, so the states of charge of both cells V1 and V2 become more equal quickly. Therefore, the improved SW system allows the process of equalizing the states of charge to be completed in a short time.

[0054] 3 shows a flying capacitor ACB circuit (first circuit 10) to which the disclosed technology can be applied. Note that the disclosed technology can be applied to any flying capacitor ACB circuit, and the first circuit 10 is an example thereof.

[0055] Electrically powered vehicles, such as hybrid vehicles and electric vehicles, are equipped with a high-voltage battery 3 (secondary battery) as their driving power source, which is configured by connecting a large number of cells 2 in series, as shown in Fig. 3. Fig. 3 shows a portion (five cells 2) of the battery 3 (first cell 2a to fifth cell 2e). The first circuit 10 has the same configuration for all cells 2, so the other parts are not shown.

[0056] Although not shown, such a battery 3 is provided with a dedicated controller for controlling its power. The first circuit 10 is built into such a controller in order to equalize the states of charge of the cells 2. Specifically, most of the cell balancing device 1 in this embodiment is configured as a single semiconductor chip including the first circuit 10, and can be used by being mounted on the controller board.

[0057] A group of cells 2 constituting the battery 3 is divided into a plurality of groups (processing target groups 4) each consisting of at least two or more consecutive cells 2 (two in this example). In Fig. 3, the cells are divided into a first processing target group 4a, a second processing target group 4b, a third processing target group 4c, and a fourth processing target group 4d.

[0058] These processing target groups 4 overlap with each other in part of the cell 2 (here, one cell 2) between adjacent processing target groups 4. For example, the first processing target group 4a and the second processing target group 4b overlap with each other in the second cell 2b. The second processing target group 4b and the third processing target group 4c overlap with each other in the third cell 2c. The third processing target group 4c and the fourth processing target group 4d overlap with each other in the fourth cell 2d.

[0059] The first circuit 10 is configured with a plurality of branch wirings 5, a plurality of connecting wirings 6, a plurality of switches 7, a plurality of capacitors 8, etc. for the battery 3. As shown in Figure 3, these components are conceptually arranged so as to extend along the series of cells 2 (for convenience, the first circuit 10 will be described below based on Figure 3).

[0060] One end of each branch wiring 5 is connected to a location between the positive electrode side of one serially connected cell 2 and the negative electrode side of the other serially connected cell 2. The other end of each branch wiring 5 branches into two and is connected to one end of two switches 7, 7.

[0061] When looking at a certain cell 2, the other end of the switch 7 connected to the positive electrode side of the cell 2 via the branch wiring 5 is connected to the other end of the switch 7 connected to the negative electrode side of the cell 2 via the branch wiring 5 by the connecting wiring 6. By repeatedly arranging circuits with this configuration along the series of cells 2, a series of continuous circuits 9 is formed.

[0062] Two such continuous circuits 9 are arranged symmetrically with respect to the series of cells 2. Capacitors 8 are connected alternately between two adjacent connecting wires 6, 6 of each of these continuous circuits 9. In other words, one capacitor 8 is arranged for each processing target group 4.

[0063] For example, in one (left) continuous circuit 9, a capacitor 8 (first capacitor 8a) is connected between the connecting wiring 6 corresponding to the first cell 2a and the connecting wiring 6 corresponding to the second cell 2b. Similarly, a capacitor 8 (third capacitor 8c) is connected between the connecting wiring 6 corresponding to the third cell 2c and the connecting wiring 6 corresponding to the fourth cell 2d.

[0064] In the other (right) continuous circuit 9, a capacitor 8 (second capacitor 8b) is connected between the connecting wiring 6 corresponding to the second cell 2b and the connecting wiring 6 corresponding to the third cell 2c. Similarly, a capacitor 8 (fourth capacitor 8d) is connected between the connecting wiring 6 corresponding to the fourth cell 2d and the connecting wiring 6 corresponding to the fifth cell 2e.

[0065] In addition to the first circuit 10, the cell balancing apparatus 1 includes a cell voltage comparison unit 11 and a control unit 12. A block diagram showing the relationship between these main components of the cell balancing apparatus 1 is shown in FIG.

[0066] The cell voltage comparison means 11 is a means capable of comparing the voltages of each cell 2. For example, in a conventional controller, a voltage monitoring device is normally installed to monitor the voltage of each cell 2 for abnormalities. The voltage monitoring device is equipped with a mechanism for detecting the voltage of each cell 2 with high precision. Therefore, by utilizing this mechanism, it is possible to obtain the voltage (absolute value) of each cell 2 and compare the magnitude of the voltage of each cell 2. In this case, the cell voltage comparison means 11 can be configured using an existing controller.

[0067] If there is no voltage monitoring device, it is not necessary to detect the voltage of each individual cell 2. The cell voltage comparison means 11 only needs to compare the relative magnitude of the voltages of each cell 2. Therefore, a highly accurate voltage detection mechanism is not necessary, and the cell voltage comparison means 11 can be configured with a simple circuit. For example, the cell voltage comparison means 11 may be a comparator or the like.

[0068] That is, most of the control means 12 can be configured as a predetermined circuit including the above-mentioned first circuit 10 and cell voltage comparison means 11 using resistors, comparators, capacitors, etc. Therefore, if this circuit is built into a chip, the cell balancing device 1 can be made smaller and can be easily incorporated into a controller. The control means 12 is configured to control each of the switches 7 in a predetermined manner based on the detection value of the cell voltage comparison means 11.

[0069] (Example of control by control means) Next, with reference to Figures 5 to 7, a specific example of control performed by the control means 12 in order to equalize the state of charge of the cells 2 of the battery 3 with respect to the first circuit 10 described above will be described.

[0070] Figure 5 shows the first circuit 10. For ease of explanation, in Figure 5, the cell 2, switch 7, capacitor 8, and processing group 4 are each assigned a reference symbol to distinguish them individually instead of a numerical symbol. Figure 6 is a flowchart showing the main processing flow executed by the control means 12. Figure 7 is a diagram for explaining the state of charge of each cell corresponding to the main steps of the processing.

[0071] 7A shows the initial state of charge of each cell. In this control example, the initial state of charge of each cell is as follows: first cell V1 > fourth cell V4 > third cell V3 > second cell V2.

[0072] 6 , first, the control unit 12 turns on the switches S1, S4, S5, S8, S9, and S12 (step S1). As a result, in the first processing target group G1, the first cell V1 and the second cell V2 are connected to the first capacitor C1 via the switches S1 and S4 (corresponding to both ends of the first processing target group G1). In the second processing target group G2, the second cell V2 and the third cell V3 are connected to the second capacitor C2 via the switches S5 and S8. In the third processing target group G3, the third cell V3 and the fourth cell V4 are connected to the third capacitor C3 via the switches S9 and S12.

[0073] As a result, charge is transferred from the first cell V1 and the second cell V2 to the first capacitor C1, charging the first capacitor C1. Similarly, charge is transferred from the second cell V2 and the third cell V3 to the second capacitor C2, charging the second capacitor C2. Charge is transferred from the third cell V3 and the fourth cell V4 to the third capacitor C3, charging the third capacitor C3. As a result, the charge amount of each cell decreases according to its discharge state, as shown by the arrows in Figure 7(a).

[0074] At this time, as described above, the total voltage of the two cells in each processing group is applied to the capacitor. Therefore, regardless of the charge state of the cell, the current flowing through each capacitor remains large, and charging and discharging converges in a short time. Taking into account the time required for convergence, the control means 12 pre-sets a predetermined capacitor charging time tj (e.g., 50 μs) that is longer than that time. The control means 12 then determines whether the capacitor charging time tj has elapsed (step S2).

[0075] Then, when it is determined that the capacitor charging time tj has elapsed, the control means 12 compares the voltages of the first cell V1 and the second cell V2 based on information from the cell voltage comparison means 11 (step S3). If the voltage of the first cell V1 is higher than that of the second cell V2 (the first cell V1 corresponds to the high-voltage cell, and the second cell V2 corresponds to the low-voltage cell, respectively; the same applies below), the control means 12 turns on switches S2 and S4 (step S4) to connect the first capacitor C1 to the second cell V2. If the voltage of the second cell V2 is higher than that of the first cell V1, the control means 12 turns on switches S1 and S3 (step S5) to connect the first capacitor C1 to the first cell V1.

[0076] Next, the control means 12 similarly compares the voltages of the second cell V2 and the third cell V3 (step S6). If the voltage of the second cell V2 is greater than that of the third cell V3, the control means 12 turns on switches S6 and S8 (step S7) to connect the second capacitor C2 to the third cell V3. If the voltage of the third cell V3 is greater than that of the second cell V2, the control means 12 turns on switches S5 and S7 (step S8) to connect the second capacitor C2 to the second cell V2.

[0077] Next, the control unit 12 similarly compares the voltages of the third cell V3 and the fourth cell V4 (step S9). If the voltage of the third cell V3 is greater than that of the fourth cell V4, the control unit 12 turns on switches S10 and S12 (step S10) to connect the third capacitor C3 to the fourth cell V4. If the voltage of the fourth cell V4 is greater than that of the third cell V3, the control unit 12 turns on switches S9 and S11 (step S11) to connect the third capacitor C3 to the third cell V3.

[0078] In this control example, as shown in Fig. 7(b), the voltage of the first cell V1 is higher than that of the second cell V2, so the first capacitor C1 and the second cell V2 are connected (step S4). As a result, charge is transferred from the first capacitor C1 to the second cell V2, as shown by the arrow in Fig. 7(b), and the second cell V2 is charged.

[0079] In this case, the cell with a relatively low voltage corresponds to the “cell to be processed.” Therefore, in this case, the second cell V2 corresponds to the cell to be processed.

[0080] Similarly, as shown in Fig. 7(c), since the voltage of the second cell V2 is greater than that of the third cell V3, the second capacitor C2 is connected to the third cell V3 (corresponding to the cell to be processed) (step S7), and charge is transferred from the second capacitor C2 to the third cell V3, as shown by the arrow in Fig. 7(c).

[0081] 7(d), since the voltage of the fourth cell V4 is greater than that of the third cell V3, the third capacitor C3 is connected to the third cell V3 (corresponding to the cell to be processed) (step S11). As a result, charge is transferred from the third capacitor C3 to the third cell V3, as shown by the arrow in FIG. 7(d), and the third cell V3 is charged.

[0082] In consideration of the time required for the discharge of the capacitor to converge, a predetermined capacitor discharge time th (e.g., 50 μs) longer than that time is set in the control means 12. The control means 12 determines whether the capacitor discharge time th has elapsed (step S12).

[0083] If it is determined that the capacitor discharge time th has elapsed, the control means 12 determines whether the magnitude relationship between the voltages of the first cell V1 and the second cell V2 has reversed (step S13). For example, in this control example, since the voltage of the first cell V1 before the process was higher than that of the second cell V2, the control means 12 determines whether the voltage of the second cell V2 has become equal to or higher than the voltage of the first cell V1 (essentially, this corresponds to determining whether the two voltages have become approximately equal).

[0084] If it is determined that the voltage relationship between the first cell V1 and the second cell V2 has reversed, the control means 12 further determines whether the voltage relationship between the second cell V2 and the third cell V3 has reversed (step S14). For example, in this control example, the voltage of the third cell V3 before processing is higher than that of the second cell V2, so it determines whether the voltage of the second cell V2 has become equal to or higher than the voltage of the third cell V3.

[0085] If it is determined that the voltage relationship between the second cell V2 and the third cell V3 has reversed, the control means 12 further determines whether the voltage relationship between the third cell V3 and the fourth cell V4 has reversed (step S15). For example, in this control example, the voltage of the fourth cell V4 before processing is higher than that of the third cell V3, so it determines whether the voltage of the third cell V3 has become equal to or higher than the voltage of the fourth cell V4.

[0086] If it is determined that the voltage magnitude relationship between the first cell V1 and the second cell V2 has not reversed (No in step S13), if it is determined that the voltage magnitude relationship between the second cell V2 and the third cell V3 has not reversed (No in step S14), or if it is determined that the voltage magnitude relationship between the third cell V3 and the fourth cell V4 has not reversed (No in step S15), the process returns to step S1 and repeats the series of processes. That is, the series of processes is repeated until the cell voltage magnitude relationship is reversed in all groups to be processed.

[0087] In this control example, the magnitude relationship of the cell voltages is reversed in the second processing target group G2, but the magnitude relationship of the cell voltages is not reversed in the other processing target groups, so the processing is executed again from step S1. Specifically, as shown in Figure 7(e), the processing is executed starting from the capacitor charging processing.

[0088] At this time, because each processing target group includes some overlapping cells, the states of charge of the first cell V1 to the fourth cell V4 are more uniform than initially. Therefore, by repeating this processing, the states of charge of the first cell V1 to the fourth cell V4 are uniformed. In this way, by repeating the series of processing until the magnitude relationship of the cell voltages is reversed in all processing target groups of the battery 3, the states of charge of all cells constituting the battery 3 can be uniformed in a short time.

[0089] Note that steps S1 and S2 here correspond to the capacitor charging step in the cell balancing method, and also correspond to the capacitor charging process of the cell balancing adjustment device 1. Steps S3 to S12 correspond to the capacitor discharging step in the cell balancing method, and also correspond to the capacitor discharging process of the cell balancing adjustment device 1.

[0090] Furthermore, the order of steps S3 to S5, steps S6 to S8, and steps S9 to S11 is not limited to this and may be any order.Similarly, the order of steps S13, S14, and S15 is not limited to this and may be any order.

[0091] It is preferable that steps S1 and S2 (capacitor charging step or capacitor charging process) and steps S3 to S12 (capacitor discharging step or capacitor discharging process) are alternately repeated at a cycle of 1 kHz or more and 1 MHz or less.

[0092] The larger the capacitor, the fewer the number of charge / discharge cycles, but the larger the capacitor and the higher the material costs. Therefore, making the capacitor smaller and increasing the number of charge / discharge cycles is advantageous in terms of cost and size. However, increasing the number of charge / discharge cycles generates harmonic noise.

[0093] Therefore, the inventors have conducted research and found that it is most preferable to alternately repeat charge and discharge processes at a cycle of 1 kHz to 1 MHz. Therefore, by alternately repeating charge and discharge processes at the above-mentioned cycle, it is possible to suppress harmonic noise while making the cell balancing device 1 compact and low-cost.

[0094] <Effects of the Disclosed Technology> A verification test was conducted to verify the effects of the improved SW method. In the verification test, a capacitor was used as a cell (substitute cell) instead of a lithium-ion battery, and six of these substitute cells were connected together to form a simulated battery. An experimental device equipped with the above-described first circuit 10 was installed in the simulated battery, and control similar to the above-described control example was performed.

[0095] The results of the verification test are shown in Figure 8. The bottom graph in Figure 8 shows the verification results of the improved SW method (Example). The top graph in Figure 8 shows the results when passive cell balancing was performed on the same experimental device (Comparative Example). The vertical axis represents cell voltage (V), and the horizontal axis represents elapsed time (ms). The voltage magnitude relationship of each cell V1 to V6 before processing is V1 > V2 > V3 > V4 > V5 > V6.

[0096] As shown in the upper diagram of Figure 8, in passive cell balancing, the lowest voltage cell V6 is matched to the voltage of the other cells V1 to V5, and the remaining cells V1 to V5 are discharged. As a result, a loss of 54 mW occurred in this test, but the charge state of each cell was equalized in about 500 ms.

[0097] In contrast, as shown in the lower diagram of Figure 8, the improved SW method is based on active cell balancing, so each cell is charged and discharged so that it converges to an approximate average value. As a result, a loss of 2 mW occurred in this test, and the charge state of each cell was equalized in about 500 ms. Note that this time of about 500 ms is for a replacement cell with a very small capacity; with an actual cell, it would take, for example, about 5 hours.

[0098] In this way, by adopting the improved SW method, the process can be completed in a short time equivalent to that of the passive method of cell balance adjustment, and energy loss can also be significantly reduced.

[0099] 9 shows a flying capacitor ACB circuit (second circuit 20) to which the disclosed technology can be applied. The second circuit 20 differs from the first circuit 10 in that a processing target group is composed of three cells 2.

[0100] Specifically, the first processing target group G1 is composed of the first cell V1 to the third cell V3, the second processing target group G2 is composed of the third cell V3 to the fifth cell V5, and the third processing target group G3 is composed of the fifth cell V5 to the seventh cell V7.

[0101] The second circuit 20 is also composed of a plurality of branch wirings 5, a plurality of connecting wirings 6, a plurality of switches 7, a plurality of capacitors 8, etc. As shown in Fig. 9, these components are conceptually arranged so as to extend along the series of cells 2 (for convenience, the second circuit 20 will be described below based on Fig. 9).

[0102] The configurations of the branch wiring 5 and the switch 7 of the second circuit 20 are the same as those of the first circuit 10. The configurations of the connecting wiring 6 and the capacitor 8 of the second circuit 20 are different from those of the first circuit 10. That is, the connecting wiring 6 of the second circuit 20 is composed of a first connecting wiring 6a and a second connecting wiring 6b, and the capacitor 8 is connected between the first connecting wiring 6a and the second connecting wiring 6b.

[0103] Specifically, when looking at a certain processing target group 4, of the two switches 7, 7 connected to the positive or negative side of each cell 2 included in that processing target group 4 via branch wiring 5, one is connected to the first connecting wiring 6a, and the other is connected to the second connecting wiring 6b.

[0104] For example, in the first processing target group G1, the first, third, fifth, and seventh switches S1, S3, S5, and S7 are connected to the first connecting wire 6a, and the second, fourth, sixth, and eighth switches S2, S4, S6, and S8 are connected to the second connecting wire 6b, and a first capacitor C1 is connected between the first connecting wire 6a and the second connecting wire 6b.

[0105] The cell balancing apparatus 1 in the second embodiment also has a second cell voltage comparing means 21 and a second controlling means 22, in addition to the second circuit 20. The configuration of the cell balancing apparatus 1 is the same as that of the first embodiment, except that the cell voltage comparing means 11 and controlling means 12 in Fig. 3 are replaced by the second cell voltage comparing means 21 and second controlling means 22, and therefore the corresponding reference numerals are given in parentheses in Fig. 3 and their description will be omitted.

[0106] The second control means 22 is also mostly made up of predetermined circuits including resistors, comparators, capacitors, etc. built into the chip, and includes the above-mentioned second circuit 20 and second cell voltage comparison means 21. The second control means 22 is configured to control each of the switches 7 in a predetermined manner based on the detection value of the second cell voltage comparison means 21.

[0107] 9 to 11B, a specific example of control performed by the second control means 22 in order to equalize the states of charge of the cells 2 of the battery 3 in relation to the second circuit 20 will be described. FIG. 9 shows the second circuit 20 referred to in the description.

[0108] 10A and 10B are flowcharts showing the main processing steps executed by the second control means 22. Figures 11A and 11B are diagrams for explaining the state of the second circuit 20 and the state of charge of each cell corresponding to the main steps of the processing for the first processing target group G1.

[0109] 11A(a) shows the initial state of charge of each cell in the first processing target group G1. In this control example, the first cell V1>the second cell V2>the third cell V3.

[0110] 10A , first, the second control means 22 turns on the switches S1, S8, S9, S16, S17, and S24 (step S31). As a result, in the first processing target group G1, the first cell V1, the second cell V2, and the third cell V3 are connected to the first capacitor C1 via the switches S1 and S8. In the second processing target group G2, the third cell V3, the fourth cell V4, and the fifth cell V5 are connected to the second capacitor C2 via the switches S9 and S16. In the third processing target group G3, the fifth cell V5, the sixth cell V6, and the seventh cell V7 are connected to the third capacitor C3 via the switches S17 and S24.

[0111] As a result, in the first processing target group G1, a current Ic flows as shown by the dashed arrow in the left diagram of FIG. 11A (a), transferring charge from the first cell V1 to the third cell V3 to the first capacitor C1, thereby charging the first capacitor C1. Similarly, in the second processing target group G2, charge is transferred from the third cell V3 to the fifth cell V5 to the second capacitor C2, thereby charging the second capacitor C2. Similarly, in the third processing target group G3, charge is transferred from the fifth cell V5 to the seventh cell V7 to the third capacitor C3, thereby charging the third capacitor C3.

[0112] As a result, in the first processing group G1, the charge amount of each cell decreases according to its discharge state, as shown in the right diagram of (a) in Figure 11A. Similarly, in the other processing groups, the charge amount of each cell decreases according to its discharge state.

[0113] At this time, the total voltage of the three cells in each processing group is applied to the capacitor. Therefore, regardless of the charge state of the cells, the current Ic flowing through each capacitor remains large, and charging and discharging converges in a short time. Taking into account the time required for convergence, the second control means 22 pre-sets a predetermined capacitor charging time tj (e.g., 50 μs) that is longer than that time. The second control means 22 then determines whether the capacitor charging time tj has elapsed (step S32).

[0114] If it is determined that the capacitor charging time tj has elapsed, the second control means 22 turns off the switches S1, S8, S9, S16, S17, and S24 (step S33). After that, the second control means 22 compares the voltages of the cells included in each processing target group based on the information from the second cell voltage comparison means 21, and extracts the processing target cell.

[0115] In this case, any cell with a relatively low voltage within the group to be processed can be selected as the cell to be processed. However, it is preferable to select the cell with the lowest voltage (low-voltage cell) as the cell to be processed. This allows for the most efficient cell balancing.

[0116] For example, in the first processing group G1, the third cell V3 has the lowest voltage, so it is selected as the processing cell Vmin-a (step S34). Then, as shown in the left diagram of FIG. 11A(b), the switches S5 and S8 are turned ON (step S35) to connect the first capacitor C1 to the third cell V3.

[0117] As a result, a current Ic flows as shown by the dashed arrow in the left diagram of (b) of Fig. 11A, and charge is transferred from the first capacitor C1 to the third cell V3, charging the third cell V3. As a result, the voltage of the third cell V3 rises as shown in the right diagram of (b) of Fig. 11A.

[0118] Next, in the second processing target group G2, the cell with the lowest voltage among the third cell V3 to the fifth cell V5 is extracted as the processing target cell Vmin-b, and the switch connecting the processing target cell Vmin-b to the second capacitor C2 is turned ON (steps S36, S37).

[0119] Furthermore, in the third processing target group G3, the cell with the lowest voltage among the fifth cell V5 to the seventh cell V7 is extracted as the processing target cell Vmin-c, and the switch connecting the processing target cell Vmin-c to the third capacitor C3 is turned ON (steps S38, S39).

[0120] Taking into consideration the time required for the discharge of the capacitor to converge, a predetermined capacitor discharge time th (e.g., 50 μs) longer than that time is also set in the second control means 22. As shown in Fig. 10B, the second control means 22 determines whether the capacitor discharge time th has elapsed (step S40).

[0121] The second control means 22 is equipped with a function to estimate an average voltage Vavg of the multiple cells included in the processing target group before processing based on information from the second cell voltage comparison means 21, and to store this average voltage Vavg.The second control means 22 then compares the voltage of each cell with the average voltage Vavg so that the voltage of each cell falls within a predetermined range including the average voltage Vavg.

[0122] Specifically, the second control means 22 determines whether the voltages of the first cell V1, the second cell V2, and the third cell V3 in the first processing group G1 have reached their approximate average value Vavg-a (step S41). Similarly, the second control means 22 determines whether the voltages of the third cell V3, the fourth cell V4, and the fifth cell V5 in the second processing group G2 have reached their approximate average value Vavg-b (step S42). Similarly, the second control means 22 determines whether the voltages of the fifth cell V5, the sixth cell V6, and the seventh cell V7 in the third processing group G3 have reached their approximate average value Vavg-c (step S43).

[0123] The process here only needs to determine whether the voltage difference between all cells in each group to be processed is equal to or less than a predetermined value. Therefore, for any two cells in each group to be processed, the determination of whether the magnitude relationship between the cells is reversed as in the control example of the first embodiment may be repeated for all cells, so that the voltage difference between the two cells is equal to or less than a predetermined value for all cells.

[0124] The second control means 22 then returns to step S31 and repeats the series of processes unless it determines that the voltages of the cells included in all of the target groups have reached the approximate average value Vavg. That is, the second control means 22 repeats the series of processes until the voltages of the cells included in all of the target groups have reached the approximate average value Vavg.

[0125] For example, in the first processing group G1, the first cell V1 and the second cell V2 are not approximately Vavg-a, as shown in the right diagram of (b) of Figure 11A. Therefore, the second control means 22 executes the series of processes again from step S1 (No in step S41).

[0126] Specifically, as shown in the left diagram of Fig. 11B(c), the first cell V1, the second cell V2, and the third cell V3 are connected to the first capacitor C1 via the switches S1 and S8, and the first capacitor C1 is charged. As a result, the charge amount of each cell decreases according to its discharge state, as shown in the right diagram of Fig. 11B(c).

[0127] After the capacitor charging time tj has elapsed, the second control means 22 turns off the switches S1, S8, etc. (step S33) and extracts the cell to be processed. Here, the second cell V2 has the lowest voltage, so the second cell V2 is extracted as the cell to be processed Vmin-a (step S34).

[0128] As shown in the left diagram of FIG. 11B (d), switches S3 and S6 are turned ON (step S35) to connect the first capacitor C1 to the second cell V2. This causes the voltage of the second cell V2 to rise, as shown in the right diagram of the figure. As a result, the charge states of the first cell V1 to the third cell V3 included in the first processing target group G1 become more uniform than they were initially. By repeating this process, the voltages of the first cell V1 to the third cell V3 become approximately Vavg-a.

[0129] Since each group to be processed contains some overlapping cells, the average voltage Vavg of the cells contained in each group to be processed will eventually converge to a constant value. Therefore, by repeating this process for all groups to be processed of the battery 3, the state of charge of all cells constituting the battery 3 can be made uniform in a short time.

[0130] Note that steps S31 and S32 here correspond to the capacitor charging step in the cell balancing method, and also correspond to the capacitor charging process of the cell balancing adjustment device 1. Steps S34 to S40 correspond to the capacitor discharging step in the cell balancing method, and also correspond to the capacitor discharging process of the cell balancing adjustment device 1.

[0131] Furthermore, the order of steps S34 and S35, steps S36 and S37, and steps S38 and S39 is not limited to this and may be any order. Similarly, the order of steps S41, S42, and S43 is not limited to this and may be any order.

[0132] The disclosed technology is not limited to the above-described embodiment, but includes various other configurations. For example, in the above-described embodiment, an example in which a processing target group is composed of two or three cells is shown, but a processing target group may be composed of four or more cells. The number of overlapping cells is also not limited to one, and may be two or more.

[0133] Furthermore, the series of processes may be continuously and repeatedly executed without stopping while the battery is in use.

[0134] That is, in the first embodiment described above, after step S12, a series of processes is repeated from step S1, whereas in the second embodiment described above, after step S40, a series of processes is repeated from step S31.

[0135] For example, in the second embodiment, if the charge states of the cells V1 to V3 of the first processing target group G1 before processing are V1: L (low), V2: H (high), and V3: M (medium), the voltages of these cells (V1, V2, V3) will change, for example, as follows: (L, H, M) → (M, H, L) → (L, H, M) → (M, H, L) → (L, M, H) → (H, L, M) → (M, H, L) → (L, M, H)...

[0136] In this way, the cells with the lowest voltage among the cells constituting the processing target group are continuously charged, so that a very small voltage difference can be achieved and a highly accurate and stable cell balance can be maintained.

[0137] REFERENCE SIGNS LIST 1 Cell balancing device 2 Cell 4 Processing target group 7 Switch 8 Capacitor 10 First circuit 11 Cell voltage comparison means 12 Control means 20 Second circuit 21 Second cell voltage comparison means 22 Second control means

Claims

1. A cell balancing method for equalizing the states of charge of cells in a secondary battery constructed by connecting a plurality of cells in series, wherein all of the cells constituting the secondary battery are divided into a plurality of processing target groups consisting of at least two or more consecutive cells, with some of the cells overlapping between adjacent processing target groups, the cell balancing method comprising: a capacitor charging step of charging a capacitor by connecting a capacitor to both ends of the processing target group; and a capacitor discharging step of connecting a specific processing target cell included in the processing target group to the capacitor and discharging the charge, thereby charging the processing target cell.

2. The cell balancing method according to claim 1, wherein the processing target cell is a low-voltage cell having the lowest voltage in the processing target group.

3. A cell balancing method according to claim 2, wherein the processing group is composed of two of the cells, and the capacitor charging step and the capacitor discharging step are repeated until the voltage magnitude relationship between one low-voltage side cell corresponding to the low-voltage cell and the other high-voltage side cell is reversed.

4. A cell balancing method according to claim 1, characterized in that the capacitor charging step and the capacitor discharging step are repeated until a difference in voltage between the cells included in each of the processing target groups becomes equal to or less than a predetermined value.

5. A cell balance adjustment method according to claim 1, characterized in that the capacitor charging step and the capacitor discharging step are repeated continuously while the secondary battery is in use.

6. A cell balancing method according to any one of claims 3 to 5, wherein the capacitor charging step and the capacitor discharging step are alternately repeated at a cycle of 1 kHz to 1 MHz.

7. A cell balancing device for equalizing the states of charge of cells in a secondary battery constructed by connecting a plurality of cells in series, wherein all of the cells constituting the secondary battery are divided into a plurality of processing target groups consisting of at least two or more consecutive cells, with some of the cells overlapping between adjacent processing target groups, the cell balancing device having: a plurality of capacitors arranged for each processing target group and connected via switches to the positive and negative sides of each of the cells; cell voltage comparing means capable of comparing the voltages of each of the cells; and control means for controlling each of the switches based on the detection value of the cell voltage comparing means, wherein the control means performs a capacitor charging process for charging the capacitor by connecting the capacitor to both ends of each of the processing target groups; and a capacitor discharging process for charging the processing target cell by connecting the capacitor to a predetermined processing target cell included in each of the processing target groups and discharging the charge.

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