Memory array and manufacturing method therefor, and memory and electronic device

Abstract

The present application relates to the technical field of electronics. Provided are a memory array and a manufacturing method therefor, and a memory and an electronic device, which are used for solving the problem of a capacitor structure in a memory having a low density of integration. The memory array comprises: a substrate, and a capacitor unit arranged on the substrate. The capacitor unit comprises a first electrode, a second electrode and a third electrode, wherein the first electrode, the second electrode and the third electrode all extend in the thickness direction of the substrate, the first electrode is arranged around the second electrode, and the second electrode is arranged around the third electrode. The capacitor unit further comprises a first dielectric layer and a second dielectric layer, wherein the first dielectric layer is arranged between the first electrode and the second electrode, and the second dielectric layer is arranged between the second electrode and the third electrode. The memory array is used for improving the density of integration of a capacitor structure.

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