Transformerless unified power quality conditioner and modulation method and control method therefor
Through the transformer-free unified power quality regulator, the ANPC three-level converter and output half-bridge module are adopted, combined with the three-level SVPWM modulation and control method, the high cost and large volume problems caused by the transformer in the prior art are solved, and low-cost and efficient voltage regulation and compensation are achieved.
Patent Information
- Application Number
- PCT/CN2025/070912
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-02-06
- Filing Date
- 2025-01-07
- Publication Date
- 2025-08-14
AI Technical Summary
There are problems in the existing unified power quality regulators with high cost, large volume and large footprint caused by transformers, and the existing control methods are only applicable to two-level converters and not three-level converters.
It adopts a transformer-free unified power quality regulator, an ANPC three-level converter and an output half-bridge module, and controls the switching tubes of the input and output AC ports through a three-level SVPWM modulation method, so that their voltage vectors have the same phase, and combines the input AC port voltage and current dual closed-loop control and the output AC port voltage open-loop control to achieve voltage stability and compensation.
It realizes voltage regulation with lower cost, smaller volume and smaller footprint, and is suitable for three-level converters and can effectively adjust the voltage quality of the distribution network.
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Figure CN2025070912_14082025_PF_FP_ABST
Abstract
Description
Transformerless unified power quality conditioner and modulation method and control method thereof Technical Field
[0001] The present invention relates to the fields of low-voltage distribution network voltage quality management and power electronics technology, and in particular to a transformerless unified power quality conditioner and a modulation method and control method thereof, as well as a corresponding modulation system and control system. Background Art
[0002] In recent years, the increasingly severe environmental crisis and shortage of non-renewable fossil energy have accelerated the transformation of energy consumption structures. Low-voltage distribution systems are increasingly connected not only to distributed power sources such as photovoltaics and energy storage, but also to high-power DC loads such as electric vehicle charging stations and data centers. The intermittent, uncertain, and volatile nature of these loads makes voltages at low-voltage distribution line nodes prone to frequent fluctuations and voltage limits, adversely affecting the power supply quality of regional users and the ability to accommodate new sources and loads. Low-voltage distribution networks face significant challenges in voltage control. Consequently, the management and control of voltage quality has become a research hotspot.
[0003] To address voltage quality issues on low-voltage distribution lines, current voltage regulation methods or devices include: 1) Traditional voltage regulation: Using on-load tap changers (OLTCs). This method is low-cost and simple to control, but suffers from delays and infrequent regulation. 2) Reactive voltage regulation: Using reactive compensation devices such as static var generators (SVGs), but regulation performance is limited by the high R / X resistance-inductance ratio of the lines. 3) Active voltage regulation: Reducing the output of distributed energy resources or deploying energy storage devices, but this is less economical. 4) Flexible on-load voltage regulation: ① Using full-power back-to-back VSCs, but this is costly and inefficient. ② Using dynamic voltage restorers (DVRs) or unified power quality conditioners (UPQCs) can effectively improve voltage quality, but the presence of transformers leads to high cost, bulk, and a large footprint. Therefore, it is necessary to study a new transformerless unified power quality conditioner topology.
[0004] After searching, we found:
[0005] The Chinese invention patent application, publication number CN109980949A, titled "A Unified Power Quality Conditioner Based on Soft-Switching Circuit," describes a three-phase converter circuit consisting of three half-bridge arms on the input side, connected in series with the three-phase grid via an LC filter and transformer. The output side consists of another three half-bridge arms, connected in parallel to the grid at the load end via an output filter inductor. Each half-bridge arm consists of two main switches connected in series. A resonant branch consisting of an auxiliary switch, a clamping capacitor, and a resonant inductor is connected between the positive and negative common busbars of the six half-bridge arms. Resonant capacitors are connected in parallel across the main and auxiliary switches. The present invention synchronizes the drive pulse signals of the auxiliary switches with those of the main switches, enabling zero-voltage switching of all switches within each switching cycle. However, while this regulator achieves zero-voltage switching of all switches within each switching cycle, improving circuit efficiency and system power density, it still inevitably uses a three-phase transformer, resulting in high device cost, bulk, and a large footprint.
[0006] The Chinese invention patent application, "A Three-Phase Unified Power Quality Conditioner (UPQC) Control Method," with publication number CN115065054A, obtains system modulation parameters and sets an active vector; synthesizes a virtual vector based on the active vector; distributes the virtual vector and active vector in different sectors; calculates the action time of the virtual vector and the action time of the active vector in each sector; and outputs a PWM signal to control the operation of the power quality conditioner based on the action time of the virtual vector and the action time of the active vector. The present invention effectively suppresses the DC bus inductor current ripple of the unified power quality conditioner by controlling the virtual vector action sequence and virtual vector action time of the unified power quality conditioner. However, this control method is only applicable to SVPWM modulation of a three-phase unified power quality conditioner composed of a two-level converter and is not applicable to a three-level converter. Summary of the Invention
[0007] In view of the above-mentioned deficiencies in the prior art, the present invention provides a transformerless unified power quality conditioner and a modulation method and a control method thereof.
[0008] According to one aspect of the present invention, a transformerless unified power quality conditioner is provided, comprising: a three-phase regulator substructure, wherein each phase of the regulator substructure comprises: an ANPC three-level converter and an output half-bridge module connected to the ANPC three-level converter; wherein:
[0009] The output half-bridge module includes: 2 switching tubes S connected in series x7 and S x8, the midpoint of the series structure formed serves as the output AC port of the output half-bridge module, which is used to be connected in series with the load side of the distribution line, and the two ends of the series structure formed serve as the input ends of the output half-bridge module;
[0010] The ANPC three-level converter includes: 6 switch tubes S x1 ~S x6 Among them, the switch tube S x1 、S x2 、S x3 and S x4 The two sides of the series structure are connected in series as DC ports, respectively connected to the upper and lower common connection points of the DC side, and the series midpoint of the series structure is connected to the DC side common connection midpoint. The other two series points of the series structure are connected to a switch tube S x5 and S x6 The output half-bridge structure is composed of a series connection, and the switch tube S x5 and S x6 The series midpoint of the three-phase ANPC is used as the input AC port of the ANPC three-level converter, which is used to be connected in series with the power supply side of the distribution line; the first DC capacitor C shared by the three phases is connected between the common connection point and the common connection midpoint on the DC side and between the common connection midpoint and the lower common connection point. dc1 and the second DC capacitor C dc2 , used to provide DC side voltage;
[0011] Here, x is a, b, and c, representing phase A, phase B, and phase C of the three phases, respectively.
[0012] Preferably, the voltage of the input AC port is clamped by the power supply side, and the active power and reactive power provided by the power supply side are adjusted by adjusting the AC current provided by the power supply side, thereby achieving the stability of the DC port voltage; the output AC port provides a stable and constant AC voltage to the load side, and the voltage compensation is achieved by adjusting the AC voltage amplitude and phase of the output AC port.
[0013] According to a second aspect of the present invention, a modulation method for a transformerless unified power quality conditioner according to any one of the above-mentioned embodiments is provided, wherein a three-level SVPWM modulation method is used to control the switches of the input AC port and the output AC port of the conditioner so that the voltage vectors of the two ports have the same phase, including:
[0014] The reference voltage vectors of the two ports are transformed from the abc coordinate system to the αβ coordinate system to obtain the reference voltage components in the αβ coordinate system;
[0015] Based on the obtained reference voltage component in the αβ coordinate system, the amplitude and phase angle of the reference voltage component are extracted, and the number of the large sector where the current reference voltage component is located is determined based on the phase angle and the sector division principle of the three-level SVPWM modulation method;
[0016] According to the determined large sector where the reference voltage component is located, further determining the number of the small sector where the reference voltage component is located;
[0017] According to the specific positions of the reference voltage components of the two ports obtained by the small sector number, the action time of the voltage vector in the corresponding small sector is calculated;
[0018] Determine the order of action of the voltage vectors in each small sector of each large sector;
[0019] Calculate the value of the three-phase modulation wave according to the action time and action sequence of the voltage vector;
[0020] Compare the calculated three-phase modulation wave values with the positive load wave with amplitudes between 0 and 1 and -1 and 0 and a frequency equal to the switching frequency to obtain the PWM waves of the input AC port and the output AC port;
[0021] The switch tubes of the input AC port and the output AC port are controlled respectively according to the corresponding PWM waves obtained, so that the voltage vectors of the two ports have the same phase.
[0022] According to a third aspect of the present invention, a modulation system for a transformerless unified power quality conditioner according to any one of the above-mentioned embodiments is provided, wherein both the input AC port and the output AC port of the conditioner adopt a three-level SVPWM modulation method so that the voltage vectors of the two ports have the same phase, including:
[0023] Clarke transformation module, which is used to transform the reference voltage vectors of the two ports from the abc coordinate system to the αβ coordinate system to obtain the reference voltage components in the αβ coordinate system;
[0024] A large sector determination module is used to extract the amplitude and phase angle of the reference voltage component based on the obtained reference voltage component in the αβ coordinate system, and determine the number of the large sector in which the current reference voltage component is located based on the phase angle and the sector division principle of the three-level SVPWM modulation method;
[0025] A small sector determination module, which is used to further determine the number of the small sector where the reference voltage component is located according to the determined large sector where the reference voltage component is located;
[0026] An action time calculation module, which is used to calculate the action time of the voltage vector in the corresponding small sector according to the specific positions of the reference voltage components of the two ports obtained by the small sector number;
[0027] A time logic sequencing module, which is used to determine the order in which the voltage vectors in each small sector of each large sector act;
[0028] Modulation wave calculation module, which is used to calculate the value of the three-phase modulation wave according to the voltage vector action time and action sequence;
[0029] The carrier comparison module generates a PWM signal, which compares the calculated three-phase modulation wave with a positive load wave with an amplitude between 0 and 1 and -1 and a frequency equal to the switching frequency, to obtain the PWM signal at the input and output AC ports.
[0030] The switch tube control module is used to control the switch tubes of the input AC port and the output AC port respectively according to the corresponding PWM waves obtained, so that the voltage vectors of the two ports have the same phase.
[0031] According to a fourth aspect of the present invention, there is provided a control method for the transformerless unified power quality conditioner according to any one of the above-mentioned embodiments of the present invention, comprising:
[0032] Provides a dual closed-loop control strategy for input AC port voltage and current, used to control the dq axis components of the input AC port current to be equal to the reference value i gd * and i gq *, and make the power factor on the power supply side 1, and obtain the three-phase reference voltage required for SVPWM modulation of the input AC port through the input AC port voltage and current dual closed-loop control strategy;
[0033] Provide an output AC port voltage open-loop control strategy, through which the output AC port voltage open-loop control strategy makes the amplitude of the output AC port voltage vector equal to the reference value u Ld *, the phase of the output AC port voltage vector is equal to the phase of the input AC port voltage vector, and the three-phase reference voltage required for SVPWM modulation of the output AC port is obtained;
[0034] A DC side midpoint potential balance control strategy is provided, by which the zero-sequence voltage of the injected modulated wave is controlled, thereby controlling the midpoint current so that the midpoint potential does not deviate.
[0035] According to a fifth aspect of the present invention, there is provided a control system for the transformerless unified power quality conditioner according to any one of the above-mentioned embodiments of the present invention, comprising:
[0036] Input AC port voltage and current dual closed-loop control module, which is used to control the input AC port current dq axis component to be equal to the reference value i gd * and i gq *, and make the power factor on the power supply side 1, and obtain the three-phase reference voltage required for SVPWM modulation of the input AC port;
[0037] Output AC port voltage open-loop control module, which is used to make the amplitude of the output AC port voltage vector equal to the reference value u Ld *, the phase of the output AC port voltage vector is equal to the phase of the input AC port voltage vector, and the three-phase reference voltage required for SVPWM modulation of the output AC port is obtained;
[0038] The DC side midpoint potential balance control module is used to control the zero-sequence voltage of the injected modulation wave, and then control the midpoint current so that the midpoint potential does not shift.
[0039] Due to the adoption of the above technical solution, the present invention has at least one of the following beneficial effects compared with the prior art:
[0040] Compared with existing voltage regulation devices, the transformerless unified power quality conditioner and its modulation and control methods provided by the present invention do not contain an industrial frequency transformer in the topology, but adopt the form of a three-level converter expansion port to achieve voltage regulation. Therefore, it has the advantages of lower cost, smaller size, smaller footprint, and lower loss.
[0041] Compared with the existing single-vector SVPWM modulation method, the transformerless unified power quality conditioner and its modulation and control methods provided by the present invention combine the dual-port (input AC port and output AC port) characteristics of the transformerless unified power quality conditioner, synthesize two in-phase reference voltage vectors, adapt to the dual-port characteristics of the topology itself, and can simultaneously output two in-phase reference voltage vectors to achieve regulation of the distribution network line voltage. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] Other features, objects and advantages of the present invention will become more apparent upon reading the detailed description of non-limiting embodiments with reference to the following drawings:
[0043] FIG1 is a schematic diagram of the topological structure of a unified power quality conditioner in a preferred embodiment of the present invention, wherein each phase includes an AC input, an AC output port, and a DC port.
[0044] FIG2 is a schematic diagram of the topological structure of a unified power quality conditioner in a preferred embodiment of the present invention, wherein each phase includes an AC input, an AC output port and a DC port, and the DC port is connected to an energy storage device.
[0045] FIG3 is a schematic diagram of an operating mode of a unified power quality conditioner including eight switching states in a preferred embodiment of the present invention.
[0046] FIG4 is a schematic diagram of the SVPWM large and small sector division and the input and output AC port voltage vector rotation trajectory in the unified power quality conditioner modulation in a preferred embodiment of the present invention.
[0047] 5 is a schematic diagram of the vector and switch level states of the input and output AC port voltage vectors in the unified power quality conditioner modulation in a preferred embodiment of the present invention, which are simultaneously located in the first large sector and the first small sector.
[0048] 6 is a schematic diagram of the states of the input and output AC port voltage vectors in the unified power quality conditioner modulation in a preferred embodiment of the present invention, where the voltage vectors are located in the first and third small sectors of the first large sector, respectively, and the switch levels.
[0049] FIG7 is a schematic diagram showing a specific implementation process of the SVPWM algorithm for input and output AC ports in the unified power quality conditioner modulation in a preferred embodiment of the present invention.
[0050] FIG8 is a structural block diagram of a voltage and current dual closed-loop control strategy for the input AC port of a unified power quality conditioner in a preferred embodiment of the present invention.
[0051] FIG9 is a structural block diagram of an open-loop control strategy for the output AC port voltage of a unified power quality conditioner in a preferred embodiment of the present invention.
[0052] FIG10 is a phasor diagram and a structural block diagram of voltage compensation in an open-loop control strategy for the output AC port voltage of a unified power quality conditioner in a preferred embodiment of the present invention.
[0053] FIG11 is a block diagram of a unified DC side voltage and current and port current positive direction definition and midpoint potential balancing algorithm for a power quality conditioner in a preferred embodiment of the present invention.
[0054] FIG12 is a waveform diagram of the node voltage and line current on the power supply side when a 20% voltage sag occurs at a 30 kVA device power level in a specific application example of the present invention; wherein (a) is a waveform diagram of the power supply side voltage, and (b) is a waveform diagram of the power supply side current.
[0055] FIG13 is a waveform diagram of the load-side node voltage and line current when a 20% voltage sag occurs at a 30 kVA device power level in a specific application example of the present invention; wherein (a) is a load-side voltage waveform diagram, and (b) is a load-side current waveform diagram.
[0056] Figure 14 is a waveform diagram of the node voltage and line current on the power supply side when a 20% voltage surge occurs at a 30kVA device power level in a specific application example of the present invention; wherein (a) is the power supply side voltage waveform diagram, and (b) is the power supply side current waveform diagram.
[0057] FIG15 is a waveform diagram of the load-side node voltage and line current when a 20% voltage swell occurs at a 30 kVA device power level in a specific application example of the present invention; wherein (a) is a load-side voltage waveform diagram, and (b) is a load-side current waveform diagram.
[0058] FIG16 is a waveform diagram of the node voltage and line current on the power supply side when a 20% voltage sag occurs at a 100 kVA device power level in a specific application example of the present invention; wherein (a) is a waveform diagram of the power supply side voltage, and (b) is a waveform diagram of the power supply side current.
[0059] FIG17 is a waveform diagram of the load-side node voltage and line current when a 20% voltage sag occurs at a 100 kVA device power level in a specific application example of the present invention; wherein (a) is a load-side voltage waveform diagram, and (b) is a load-side current waveform diagram.
[0060] Figure 18 is a waveform diagram of the node voltage and line current on the power supply side when the voltage temporarily rises by 20% at a power level of 100kVA device in a specific application example of the present invention; wherein (a) is the waveform diagram of the power supply side voltage, and (b) is the waveform diagram of the power supply side current.
[0061] FIG19 is a waveform diagram of the load-side node voltage and line current when a 20% voltage surge occurs at a 100kVA device power level in a specific application example of the present invention; wherein (a) is a load-side voltage waveform diagram, and (b) is a load-side current waveform diagram. DETAILED DESCRIPTION
[0062] The following is a detailed description of an embodiment of the present invention. This embodiment is implemented based on the technical solution of the present invention, and provides a detailed implementation method and specific operation process. It should be noted that those skilled in the art may make various modifications and improvements without departing from the scope of the present invention, and these modifications and improvements fall within the scope of protection of the present invention.
[0063] An embodiment of the present invention provides a transformerless unified power quality conditioner with voltage quality management capability, which can tolerate and actively manage and compensate for grid voltage fluctuations.
[0064] Specifically, as shown in FIG1 , the transformerless unified power quality conditioner provided in this embodiment may include: a three-phase regulator substructure, wherein each phase regulator substructure includes: an ANPC three-level converter and an output half-bridge module connected to the ANPC three-level converter; wherein:
[0065] Output half-bridge module, including: 2 series connected switch tubes S x7 and S x8 The midpoint of the series structure formed is used as the output AC port of the output half-bridge module, which is used to be connected in series with the load side of the distribution line, and the two ends of the series structure are used as the input ends of the output half-bridge module;
[0066] ANPC three-level converter, including: 6 switch tubes S x1 ~S x6 Among them, the switch tube S x1 、S x2 、S x3 and S x4 The two sides of the series structure are connected in series as DC ports, respectively connected to the upper and lower common connection points of the DC side, and the series midpoint of the series structure is connected to the DC side common connection midpoint. The other two series points of the series structure are connected to a switch tube S x5 and S x6 The output half-bridge structure is composed of a series, the switch tube S x5 and S x6 The series midpoint of the three-phase rectifier serves as the input AC port of the ANPC three-level converter, which is used to be connected in series with the power supply side of the distribution line; the first DC capacitor C shared by the three phases is connected between the upper common connection point and the common connection midpoint and between the common connection midpoint and the lower common connection point. dc1 and the second DC capacitor C dc2 , used to provide DC side voltage;
[0067] Here, x is a, b, and c, representing phase A, phase B, and phase C of the three phases, respectively.
[0068] In some preferred embodiments, the regulator may further include: an energy storage device, the energy storage device and the first DC side capacitor C dc1 and the second DC link capacitor C dc2 Connected in parallel to provide active power to maintain a constant DC side voltage.
[0069] In some preferred embodiments, the regulator may further include: using an IGBT switch multiplexing operation mode to connect the two switch tubes S directly connected to the DC port. x1 and S x4 And two switching tubes S for midpoint clamping x2 and Sx3 They are used as multiplexing tubes respectively.
[0070] The regulator provided by the above embodiment of the present invention, through the above operation mode, can cause the input AC port and the output AC port to simultaneously output two voltage vectors with the same phase but the same or different amplitudes.
[0071] In some preferred embodiments, the above-mentioned regulator may further include: the voltage of the input AC port is clamped by the power supply side, and the active power and reactive power provided by the power supply side are adjusted by adjusting the AC current provided by the power supply side to achieve stability of the DC port voltage; the output AC port provides a stable and constant AC voltage to the load side, and voltage compensation is achieved by adjusting the AC voltage amplitude and phase of the output AC port.
[0072] The transformerless unified power quality conditioner provided in the above-described embodiments of the present invention is not a traditional unified power quality conditioner employing a series-parallel structure, but rather an improved active neutral-point clamped (ANPC) three-level converter. Specifically, an output half-bridge module is added to the traditional ANPC three-level converter topology, having two AC ports and one DC port, connected in series in the distribution circuit, as shown in FIG1 . Regarding the dual AC ports of this improved topology, one port is connected in series with the power supply side of the distribution circuit (hereinafter referred to as the input AC port), and the other port is connected in series with the load side of the distribution circuit (hereinafter referred to as the output AC port). Regarding the DC port of this improved topology (hereinafter referred to as the DC side), the required DC side voltage is provided by two DC side capacitors connected in series, as shown in FIG1 . Alternatively, an energy storage device may be connected in parallel with the series capacitors to provide a certain amount of active power to maintain a constant DC side voltage in the event of more severe power supply voltage fluctuations, as shown in FIG2 .
[0073] The improved topology adopts the IGBT switch multiplexing mode, which reuses the two switches directly connected to the DC port (S as shown in Figure 1). a1 and S a4 ) and two switching tubes for midpoint clamping (S as shown in Figure 1 a2 and S a3 ) as a multiplexing tube, the remaining four switch tubes (such as S a5 and S a6 、S a7 and S a8 ) form two half-bridges, i.e., two AC ports. This allows the input AC port and the output AC port to simultaneously output two voltage vectors with the same phase but different amplitudes.
[0074] The switching states of this improved topology are similar to those of a traditional three-level active neutral-point clamped converter. Taking the eight IGBTs in phase A shown in Figure 1 as an example, the specific switching states, the voltage values corresponding to the input and output AC ports (here, the voltage between the port and the DC midpoint), and the corresponding voltage level symbols are shown in Table 1:
[0075] Table 1
[0076] From Table 1, there are eight switching states, V dc The DC side voltage, level "P" represents the positive level, level "N" represents the negative level, level "OU" represents the zero level and the upper clamp tube S a2 The level "OL" represents zero level and the lower clamp tube S a3 The schematic diagram of the working mode is shown in Figure 3. ("OL-OL" means the input AC port level is "OL" and the output AC port level is "OL", and so on).
[0077] For the input AC port, the port voltage is clamped by the power supply side. By adjusting the AC current provided by the power supply side, the active power and reactive power provided by the power supply side are adjusted to achieve DC port voltage stability. For the output AC port, a stable and constant AC voltage needs to be provided to the load side. By adjusting the AC voltage amplitude and phase of the output AC port, voltage compensation is achieved.
[0078] An embodiment of the present invention provides a modulation method applicable to the transformerless unified power quality conditioner provided in the above embodiment of the present invention.
[0079] Specifically, the modulation method of the transformerless unified power quality conditioner provided in this embodiment adopts a three-level SVPWM modulation method to control the switch tubes of the input AC port and the output AC port of the regulator so that the voltage vectors of the two ports have the same phase, which may include the following operations:
[0080] Clarke transformation: transform the reference voltage vectors of the two ports from the abc coordinate system to the αβ coordinate system to obtain the reference voltage components in the αβ coordinate system;
[0081] Large sector determination: Based on the reference voltage component obtained in the αβ coordinate system, the amplitude and phase angle of the reference voltage component are extracted. Based on the phase angle and the sector division principle of the three-level SVPWM modulation method, the number of the large sector in which the current reference voltage component is located is determined;
[0082] Small sector determination: Based on the determined large sector where the reference voltage component is located, the number of the small sector where the reference voltage component is located is further determined;
[0083] Action time calculation: Based on the specific positions of the reference voltage components of the two ports obtained from the small sector number, the action time of the voltage vector in the corresponding small sector is calculated;
[0084] Time logic sequencing: Determine the order of action of voltage vectors in each small sector of each large sector;
[0085] Modulation wave calculation: Calculate the value of the three-phase modulation wave according to the voltage vector action time and action sequence;
[0086] Carrier comparison generates PWM: The calculated three-phase modulation wave values are compared with positive load waves with amplitudes between 0 and 1 and -1 and 0 and a frequency equal to the switching frequency to obtain PWM waves for the input and output AC ports.
[0087] The switch tubes of the input AC port and the output AC port are controlled respectively according to the corresponding PWM waves obtained, so that the voltage vectors of the two ports have the same phase.
[0088] In some preferred embodiments, the three-level SVPWM modulation method includes 27 voltage vectors, namely 3 zero vectors, 6 small vectors, 6 medium vectors and 6 large vectors; wherein the modulus length of the zero vector is 0, the modulus length of the small vector is V dc / 3, the modulus of the mid-vector is The modulus of the large vector is 2V dc / 3, V dc is the DC port voltage value; the large vector is divided into 6 large sectors, each of which contains 6 small sectors.
[0089] In some preferred embodiments, the Clarke transformation further includes the following operations:
[0090] The three-phase reference voltage in the abc coordinate system is transformed into the two-phase reference voltage in the αβ coordinate system. For the input AC port reference voltage of the regulator, the transformation formula is:
[0091] Among them, u inα * and u inβ * are the components of the reference voltage vector on the α-axis and β-axis, u ina * 、u inb * 、u inc * are the components of the reference voltage vector on the a-axis, b-axis, and c-axis respectively;
[0092] The output AC port reference voltage u of the regulator outa * 、uoutb * 、u outc * Perform the transformation in the same way.
[0093] In some preferred implementations, the large sector determination further includes the following operations:
[0094] Based on the voltage components obtained in the αβ coordinate system, the amplitude and phase angle of the voltage vector are extracted. Based on the phase angle and the sector division principle shown in Figure 4, the number of the large sector in which the current voltage vector is located is determined. The calculation formula for the large sector number is:
[0095] Where N is the large sector number, which can be 1 to 6, and ceil is the rounding up function;
[0096] Calculate the relative angle of the voltage vector in the large sector. The calculation formula is:
[0097] Where θ is the angle of the voltage vector relative to the starting edge of the large sector (defined by the vector rotating counterclockwise);
[0098] The same method is used to determine the large sector of the output AC port voltage vector.
[0099] In some preferred implementations, the small sector determination further includes the following operations:
[0100] After determining the large sector where the voltage vector is located, further determine the small sector number where the voltage vector is located. The small sector division method of each large sector is the same;
[0101] For the input AC port voltage vector, the process quantity is defined as:
[0102] Among them, X1, X2, and X3 are auxiliary process quantities used to determine the small sector number, V dc is the DC port voltage;
[0103] The specific judgment process is as follows: when θ≥π / 6, first judge the value of X2. If X2≥0, the vector is located in the 6th small sector. If X2<0, then further judge the value of X1. If X1≥0, the vector is located in the 4th small sector. If X1<0, the vector is located in the 2nd small sector. When θ<π / 6, first judge the value of X1. If X1<0, the vector is located in the 1st small sector. If X1≥0, then further judge the value of X3. If X3≥0, the vector is located in the 3rd small sector. If X3<0, the vector is located in the 5th small sector.
[0104] Where θ is the relative angle calculated during the large sector judgment process;
[0105] The output AC port voltage vector is judged in a small sector using the same method.
[0106] In some preferred embodiments, the above action time calculation may further include the following operations:
[0107] After obtaining the specific positions of the reference voltage components of the two ports, the three basic voltage vectors closest to the small sector are used to synthesize and obtain the voltage vector within the small sector; wherein, the output voltage of each phase output AC port of the regulator is defined as V dc When the output voltage is 0, the level is 0, and the output voltage is -V dc When the voltage level is N at / 2, the basic voltage vector is represented by a combination of three-phase voltage levels. For example, "POO" is a basic voltage vector, representing the output level "P" of the AC port of phase A and the output levels "O" of the AC ports of phases B and C. Since the other five large sectors can be obtained by rotating the first large sector, the calculation method of the vector action time in each large sector is consistent;
[0108] For the input AC port voltage vector:
[0109] If the voltage vector in the small sector is located in the first and second small sectors, the action time calculation formula is:
[0110] Among them, T x 、T y 、T z are the action time of the three basic voltage vectors, T s is the switching period, m is the modulation ratio, and its expression is:
[0111] Among them, V m is the amplitude of the reference voltage component;
[0112] If the voltage vector in the small sector is located in the third and fourth small sectors, the action time calculation formula is:
[0113] If the voltage vector in the small sector is located in the fifth small sector, the action time calculation formula is:
[0114] If the small sector voltage vector is located in the sixth small sector, the action time calculation formula is:
[0115] The same method is used to calculate the action time of the output AC port voltage vector.
[0116] In some preferred implementations, the above time logic sequence may further include the following operations:
[0117] For the input AC port voltage vector, the basic voltage vector action order of the voltage vectors in each small sector of each large sector is determined, as shown in Table 2. Within one switching cycle, the voltage vectors in the small sectors are divided into 7 segments and are centrally symmetrical. Among them, the action time of the voltage vectors in the small sectors of segments 1 and 7 is 1 / 4 of the corresponding time value, and the action time of the voltage vectors in the small sectors of segments 2 to 6 is 1 / 2 of the corresponding time value, thereby obtaining the corresponding time logic order. Among them, the ordering principle can be summarized as follows:
[0118] The basic voltage vector used is the closest vector that constitutes the triangle of the small sector; the basic voltage vector of adjacent time periods only allows the level of one phase to change, and this level change does not allow "P→N" or "N→P"; small vectors are used in segments 1, 4, and 7. Since the same point corresponds to two small vectors (i.e., basic voltage vectors, as shown in Figure 4), segments 1 and 7 use one of the small vectors, and segment 4 uses the other (for example, PPO and OON); segments 2 and 6 use the same basic voltage vector, and segments 3 and 5 use the same basic voltage vector.
[0119] Table 2 The order of vector action in each large sector and small sector
[0120] The output AC port voltage vector is time-logically sequenced in the same way.
[0121] In some preferred implementations, the above-mentioned modulation wave calculation may further include the following operations:
[0122] The voltage vector action time in the first, second and third small sectors in the action sequence (as shown in Table 2) is represented by T1, T2 and T3. The modulation wave calculation results in Table 3 are obtained by combining the vector action sequence in Table 2 and the triangle similarity principle of the modulation wave and the carrier wave. The three-phase modulation wave v is calculated. a 、v b 、v c The value of can be summarized as:
[0123] If the seven-segment level of a phase is OOOPOOO, then the modulation wave value of this phase is T1 / 2 / Ts;
[0124] If the seven-segment level of a phase is NOOOOON, the modulation wave value of the phase is -T1 / 2 / Ts;
[0125] If the seven-segment level of a phase is OOPPPOO, the modulation wave value of the phase is (T1 / 2+T3) / Ts;
[0126] If the seven-segment level of a phase is NNOOOONN, the modulation wave value of the phase is (-T1 / 2-T2) / Ts;
[0127] If the seven-segment level of a phase is OPPPPPO, the modulation wave value of the phase is (T1 / 2+T2+T3) / Ts;
[0128] If the seven-segment level of a phase is NNNONNN, the modulation wave value of the phase is (-T1 / 2-T2-T3) / Ts;
[0129] The seven-segment level of a certain phase mentioned above is obtained by the vector action sequence, that is, the level of the corresponding phase is taken from the basic voltage vector corresponding to the seven-segment action time.
[0130] The specific calculation method is shown in Table 3.
[0131] The obtained three-phase modulated wave v a 、v b 、v c The initial value is divided by the switching period T s , get the value of the three-phase modulation wave;
[0132] Table 3 Calculation of three-phase modulation wave for each large sector and each small sector
[0133] The output AC port voltage vector is modulated using the same method to calculate the wave.
[0134] In some preferred implementations, the carrier comparison and PWM generation may further include:
[0135] The calculated three-phase modulation wave is compared with the positive load wave with amplitude between 0 and 1 and -1 and 0 and frequency equal to the switching frequency to obtain the PWM wave of the input and output ports. The specific process of generating the PWM wave is as follows: for the switching tube S in the regulator that forms the output half-bridge structure, x5 With S x6 And the switch tube S that constitutes the output half-bridge module x7 and S x8 When the modulation wave value is greater than or equal to 0, the modulation wave is compared with the positive carrier wave. If the former is greater than the latter, 1 and 0 are given to the upper and lower switches respectively, where 1 represents PWM high level and 0 represents PWM low level. If the former is less than the latter, 0 and 1 are given to the upper and lower switches respectively; when the modulation wave value is less than 0, the modulation wave is compared with the load wave. If the former is greater than the latter, 1 and 0 are given to the upper and lower switches respectively; if the former is less than the latter, 0 and 1 are given to the upper and lower switches respectively; for the multiplexed switch tube S in the regulator x1、S x2 、S x3 、S x4 When the modulation wave value is greater than or equal to 0, the four switching tubes are given 1, 0, 1, and 0 respectively; when the modulation wave value is less than 0, the four switching tubes are given 0, 1, 0, and 1 respectively;
[0136] in:
[0137] The PWM wave of the input AC port is used to drive the switch tube S of the three-phase regulator substructure x5 and S x6 , controls its own output half-bridge; the PWM wave of the output AC port is used to drive the S of the three-phase regulator substructure x1 ~S x4 and S x7 and S x8 , controlling the on and off of its own output half-bridge and the multiplexed switch tube.
[0138] In some preferred embodiments, the method further includes: determining whether the voltage vectors of two ports located in the same large sector are located in the same small sector:
[0139] The voltage vector of the input AC port is expressed as The voltage vector of the output AC port is recorded as exist and During the rotation process, the two voltage vectors are in the same large sector. To check whether they are in the same small sector, the following operations are performed:
[0140] When the voltage vectors of the input AC port and the output AC port are located in the same small sector n, then:
[0141] Among them, V m1 and V m2 They are and The amplitude of , θ is the phase angle;
[0142] For the voltage vector in the nth small sector, after synthesizing the three basic voltage vectors shown in Table 2 (for example, OON, OOO, POO (ONN) in the first small sector of the first large sector), according to the calculation formula of the action time, we can get and After the action time of each basic voltage vector is sorted by time logic, the size relationship of the same time period in the 7-segment time distribution can be obtained;
[0143] Since the two voltage vectors are located in the same small sector, the magnitude relationship of the two voltage vectors in the same period is determined only by the modulation ratio and is fixed. For example, for the first large sector and the first small sector, and there is V m1 <V m2 ,but and The action time has the following relationship:
[0144] Among them, T x1 、T y1 、T z1 、T x2 、T y2 、T z2 Synthetic and The action time of the three basic voltage vectors;
[0145] By ensuring that the calculated action time satisfies the above relationship, two in-phase voltage vectors located in the first small sector of the first large sector can be output at the input AC port and the output AC port. Similarly, when expanding to the nth small sector, as long as the calculated action time satisfies the above action time relationship, two in-phase voltage vectors located in the same small sector can be output;
[0146] When the voltage vectors of the input AC port and the output AC port are located in different small sectors, then:
[0147] when and When located in the nth and mth small sectors respectively, three basic voltage vectors are used to synthesize the voltage vector in the corresponding small sector; (for example, the first small sector of the first large sector is synthesized by OON, OOO, POO (ONN), and the third small sector of the first large sector is synthesized by OON, PON, POO (ONN)); according to the calculation formula of the action time, and After the action time of each basic voltage vector is sorted by time logic, the size relationship of the same time period in the 7-segment time distribution can be obtained;
[0148] Since the two voltage vectors are located in different small sectors, the magnitude relationship of the two voltage vectors in the same period of time is determined by both the modulation ratio and the phase angle. There are many situations for the magnitude relationship of the two voltage vectors in the same period of time. For example, Located in the first small sector of the first large sector When located in the first large sector and the third small sector, the relationship between the action time is as follows:
[0149] Similarly, by simply ensuring that the calculated action time satisfies the above relationship, two in-phase voltage vectors located in the first and third small sectors of the first large sector can be output at the input AC port and the output AC port, respectively. Similarly, expanding to the nth and mth small sectors, by simply ensuring that the calculated action time satisfies any of the above action time relationships, two in-phase voltage vectors located in different small sectors can be output.
[0150] The modulation method provided by the above embodiment of the present invention is further described below with reference to a specific application example.
[0151] As shown in Figure 4, the traditional three-level SVPWM has 27 voltage vectors, namely 3 zero vectors, 6 small vectors, 6 medium vectors and 6 large vectors, where the modulus length of the zero vector is 0 and the modulus length of the small vector is V dc / 3, the modulus of the mid-vector is The modulus of the large vector is 2V dc / 3. It is divided into 6 large sectors through the large vector, and each large sector contains 6 small sectors. In Figure 4, P represents the output voltage of the AC port (input AC port or output AC port) is V dc / 2, N means the AC port output voltage is -V dc / 2, O means the AC port output voltage is 0; different combinations of P, N, and O represent different combinations of three-phase AC port output voltages.
[0152] The voltage vector of the input AC port is expressed as The voltage vector of the output AC port is simply expressed as exist and During the rotation process, due to the same phase, the two voltage vectors are in the same large sector, and whether they are in the same small sector depends on the actual situation. In fact, The amplitude reflects the amplitude of the phase voltage on the power supply side, which is affected by the grid voltage fluctuation. The amplitude is the amplitude of the phase voltage on the load side, which is generally a constant value.
[0153] The following analyzes the two cases of being located in the same small sector and being located in different small sectors in the first large sector respectively:
[0154] (1) The voltage vectors of the input AC port and the output AC port are located in the same small sector
[0155] For two voltage vectors with the same phase, there are 6 situations where they are located in the same small sector, corresponding to the 6 divided small sectors;
[0156] by and For example, all are located in the first small sector. Assume:
[0157] Among them, V m1 and V m2 They are and The amplitude of , θ is the phase angle;
[0158] For the voltage vector of the first small sector, use PPO(OON), PPP(OOO, NNN), and POO(ONN) in Figure 4 to synthesize them, and let them be numbered as x, y, and z, and the action time is T x 、T y 、T z , the order of action is z, x, y. According to the calculation formula of action time:
[0159] Then we can get The action time of each vector:
[0160] and for The action time of each vector:
[0161] Among them, m1 and m2 are the modulation ratios of the two ports respectively, T s is the switching period. m1 and m2 are expressed as:
[0162] The relationship between the two action times is as follows:
[0163] and The vector diagram and three-phase port level timing diagram are shown in Figure 5. As can be seen, due to amplitude inconsistency, phase A exhibits "OL-P" in addition to "OL-OL" and "PP"; phase B exhibits "OU-N" in addition to "NN" and "OU-OU"; and phase C is identical to phase B. It is worth noting that the selection of "OL-OL" and "OU-OU" is arbitrary, while the modulation method is chosen based on minimizing switching losses during state switching. Therefore, Figure 5 shows that for two vectors with the same phase within the same small sector, the level transition timing differs. For most of a switching cycle, the two levels are identical; it is only the different level transition timings that create new switching states. Since direct switching between P and N is not permitted in three-level SVPWM, and both "OL-P" and "OU2-N" are feasible, it is feasible to output two voltage vectors with the same phase in the first small sector. Similar analysis can be used to obtain the output of two voltage vectors with the same phase within the other small sectors.
[0164] (2) The voltage vectors of the input AC port and the output AC port are located in different small sectors
[0165] For two voltage vectors with the same phase, there are six situations in which they are located in different small sectors, namely: ① the 1st and 3rd small sectors; ② the 1st and 5th small sectors; ③ the 2nd and 4th small sectors; ④ the 2nd and 6th small sectors; ⑤ the 3rd and 5th small sectors; ⑥ the 4th and 6th small sectors.
[0166] by and Taking the first and third sectors as examples, the voltage vectors in the first sector are synthesized using PPO(OON), PPP(OOO, NNN), and POO(ONN), which are denoted as x1, y1, and z1, respectively, and the action time is T x1 、T y1 、T z1 , the action order is z1, x1, y1; the voltage vector in the third small sector is synthesized using POO(ONN), PON, PPO(OON), recorded as x2, y2, z2, and the action time is T x2 、T y2 、T z2 , the order of action is x2, z2, y2. According to the action time calculation formula, we can get
[0167] As the modulation ratio and phase angle change, there are many situations in which the relationship between the two groups of corresponding action times exists:
[0168] Here, we use case ① as an example, as shown in Figure 6. Similar to the case of the same small sector, the difference in voltage vector amplitude is also caused by the difference in level transition time. Furthermore, the "OL-P" and "OU-N" operating modes are feasible, so it is feasible to output two in-phase voltage vectors in the first and third small sectors, respectively. Similar analysis can be used to solve other cases.
[0169] The specific implementation of the modulation method requires SVPWM modulation of the input and output AC ports, as shown in Figure 7. The basic steps of the SVPWM algorithm are Clarke transformation, large sector determination, small sector determination, action time calculation, time logic sequencing, modulation wave calculation, and carrier comparison to generate PWM. The PWM wave generated by the SVPWM algorithm at the input AC port drives three-phase S5 and S6, controlling only its own output half-bridge. The PWM wave generated by the SVPWM algorithm at the output AC port drives three-phase S1-S4 and S7 / S8, controlling not only its own output half-bridge but also the on / off switching of multiplexed switches.
[0170] An embodiment of the present invention provides a modulation system for a transformerless unified power quality conditioner according to any of the above embodiments of the present invention. A three-level SVPWM modulation scheme is used at both the input and output AC ports of the conditioner, so that the voltage vectors at the two ports have the same phase. The modulation system may include the following modules:
[0171] Clarke transformation module, which is used to transform the reference voltage vectors of the two ports from the abc coordinate system to the αβ coordinate system to obtain the reference voltage components in the αβ coordinate system;
[0172] A large sector determination module is used to extract the amplitude and phase angle of the reference voltage component based on the obtained reference voltage component in the αβ coordinate system, and determine the number of the large sector in which the current reference voltage component is located based on the phase angle and the sector division principle of the three-level SVPWM modulation method;
[0173] A small sector determination module, which is used to further determine the number of the small sector where the reference voltage component is located according to the determined large sector where the reference voltage component is located;
[0174] An action time calculation module, which is used to calculate the action time of the voltage vector in the corresponding small sector according to the specific positions of the reference voltage components of the two ports obtained by the small sector number;
[0175] A time logic sequencing module, which is used to determine the order in which the voltage vectors in each small sector of each large sector act;
[0176] Modulation wave calculation module, which is used to calculate the value of the three-phase modulation wave according to the voltage vector action time and action sequence;
[0177] The carrier comparison module generates a PWM signal, which compares the calculated three-phase modulation wave with a positive load wave with an amplitude between 0 and 1 and -1 and a frequency equal to the switching frequency, to obtain the PWM signal at the input and output AC ports.
[0178] The switch tube control module is used to control the switch tubes of the input AC port and the output AC port respectively according to the corresponding PWM waves obtained, so that the voltage vectors of the two ports have the same phase.
[0179] It should be noted that the steps in the method provided by the present invention can be implemented using corresponding modules, devices, units, etc. in the system. Those skilled in the art can refer to the technical solution of the method to implement the composition of the system, that is, the embodiments in the method can be understood as preferred examples of constructing the system, which will not be elaborated here.
[0180] An embodiment of the present invention provides a control method applicable to the transformerless unified power quality conditioner provided in the above-mentioned embodiment of the present invention.
[0181] Specifically, the control method provided in this embodiment may include the following operations:
[0182] Providing an input AC port voltage and current dual closed-loop control strategy, through which the input AC port voltage and current dual closed-loop control strategy is used to obtain the three-phase reference voltage required for input AC port SVPWM modulation;
[0183] Provide an output AC port voltage open-loop control strategy, through which the output AC port voltage open-loop control strategy makes the amplitude of the output AC port voltage vector equal to the reference value u Ld *, the phase of the output AC port voltage vector is equal to the phase of the input AC port voltage vector, and the three-phase reference voltage required for SVPWM modulation of the output AC port is obtained;
[0184] A DC side midpoint potential balance control strategy is provided, by which the zero-sequence voltage of the injected modulated wave is controlled, thereby controlling the midpoint current so that the midpoint potential does not deviate.
[0185] In some preferred embodiments, the above-mentioned dual closed-loop control strategy for input AC port voltage and current may further include: a DC voltage outer loop and an input AC port current inner loop; wherein:
[0186] The DC voltage outer loop is used to control the DC port voltage to be stable at the reference value V dc *, the reference value V dc *Compared to the actual value V dc The deviation is used as the input of the DC voltage outer loop proportional integral controller (PI controller), and the mathematical equation is i gd * =k pv (V dc * -V dc )+∫k iv (V dc * -V dc )dt
[0187] Among them, i gd * is the current reference value of the inner loop of the current d-axis component, k pv is the gain coefficient of the proportional link of the PI controller, k iv is the gain coefficient of the integral link of the PI controller;
[0188] The input AC port current inner loop may further include: a current d-axis component inner loop and a current q-axis component inner loop; wherein:
[0189] The inner loop of the current d-axis component is used to stabilize the input AC port current at the reference value i gd *;
[0190] The reference value i gd *With the actual value i gd The deviation is used as the input of the proportional integral controller (PI controller), and the mathematical equation is:
[0191] u d,PI =k pi (i gd * -i gd )+∫k ii (i gd * -i gd )dt
[0192] Among them, u d,PI is the output of the inner loop PI controller of the current d-axis component, k pi is the gain coefficient of the proportional link of the PI controller, k ii is the gain coefficient of the integral link of the PI controller;
[0193] The output of the PI controller is fed forward and decoupled to finally become the reference value u of the d-axis component of the input AC port voltage. ind *, where feedforward includes: using the power supply side voltage u gd Perform feedforward compensation; decoupling includes: using the current component i gq Decoupling the coupling between dq axes caused by Park transformation;
[0194] The inner loop of the current q-axis component is used to stabilize the input AC port current at the reference value i gq *;
[0195] The reference value i gq * and the actual value i gq The deviation is used as the input of the proportional integral controller (PI controller), and the mathematical equation is:
[0196] u q,PI =k pi (i gq * -i gq )+∫k ii (i gq * -i gq )dt
[0197] The output of the PI controller is fed forward and decoupled to finally become the reference value u of the q-axis component of the input AC port voltage inq*; Among them, the feedforward includes: using the power supply side voltage u gq Perform feedforward compensation; decoupling includes: using the current component i gd Decoupling the coupling between dq axes caused by Park transformation;
[0198] Finally, u ind * and u inq *After Park inverse transformation, the three-phase reference voltage u required for input AC port SVPWM modulation is obtained ina *、u inb *、u inc *.
[0199] In some preferred embodiments, the above-mentioned output AC port voltage open-loop control strategy may further include:
[0200] Input the three-phase reference voltage u ina *、u inb *、u inc *After Clarke transformation, the input AC port voltage αβ axis component u is obtained inα * and u inβ *, for the component u inα * and u inβ *Perform amplitude phase extraction to obtain the amplitude V of the input AC port voltage vector m1 And the phase angle θ, the mathematical formula is:
[0201] The output AC port voltage vector amplitude reference value u Ld *Added to the voltage compensation ΔV, the amplitude of the input AC port voltage vector V is obtained m2 ; According to the amplitude and phase angle information, the output AC port voltage αβ axis component u is obtained outα * and u outβ *, the mathematical formula is:
[0202] After Clarke inverse transformation, the three-phase reference voltage u required for SVPWM modulation of the output AC port is obtained outa *、u outb *、u outc *.
[0203] In some preferred embodiments, the voltage compensation amount ΔV is used to offset the voltage drop of the LC filter so that the load side voltage is closer to the reference value, and is calculated as follows:
[0204] Output the actual value of the three-phase current of the AC port i outa 、i outb 、i outc After Park transformation, the dq axis component i is obtainedoutd and i outq , then the calculation formula for voltage compensation is:
[0205] Among them, u out 'and u out are the output AC port voltage vector amplitudes before and after compensation, L out is the filter inductance value of the LC filter, R out For L out parasitic resistance.
[0206] In some preferred embodiments, the DC side midpoint potential balance control strategy may further include:
[0207] The DC side midpoint potential balance control strategy adopts the zero sequence voltage injection method to inject the zero sequence voltage v com Only inject into the SVPWM modulation wave of the input AC port;
[0208] First, tentatively calculate the zero-sequence voltage v that needs to be injected com_test , the mathematical formula is:
[0209] Among them, C dc1 and C dc2 They are the upper and lower capacitors on the DC side, V dc1 and V dc2 C dc1 and C dc2 The voltage on both sides, T s is the switching period; i oav_in and i oav_out are the average current drawn from the input AC port and the output AC port to the midpoint of the DC side in one switching cycle before the zero-sequence voltage is injected. The mathematical formula is:
[0210] Among them, i ain 、i bin 、i cin are the three-phase currents of the input AC port, v ain 、v bin 、v cin are the three-phase modulation wave values of the input AC port, i aout 、i bout 、i cout They are the three-phase current of the output AC port, v aout 、v bout 、v cout are the three-phase modulation wave values of the output AC port respectively;
[0211] i o_in' is the equivalent current change value of the input AC port caused by zero-sequence voltage injection, and its mathematical formula is:
[0212] i o_in ′=-sign(v ain )i ain -sign(v bin )i bin -sign(v cin )i cin
[0213] For zero sequence voltage v com_test For further inspection, the verification formula is:
[0214] Among them, v mid is the middle value of the three-phase modulation wave;
[0215] If the trial calculation result is correct, the constraint condition judgment is performed:
[0216] If the maximum value of the three-phase modulated wave does not exceed the upper limit 1 after superimposing the zero-sequence voltage, and the minimum value does not exceed the lower limit -1 after superimposing the zero-sequence voltage, then:
[0217] v com =v com_test
[0218] If any of the conditions are not met, the range is restricted:
[0219] Among them, v max is the maximum value in the three-phase modulation wave, v min It is the minimum value in the three-phase modulation wave;
[0220] If the trial calculation result is wrong, perform sign correction:
[0221] sign(v mid )=-sign(v mid +v com )
[0222] Then recalculate the zero-sequence voltage and make constraint condition judgment.
[0223] An embodiment of the present invention provides a control system for a transformerless unified power quality conditioner according to any one of the above embodiments of the present invention, which may include the following modules:
[0224] Input AC port voltage and current dual closed-loop control module, which is used to control the input AC port current dq axis component to be equal to the reference value i gd * and i gq*, and make the power factor on the power supply side 1, and obtain the three-phase reference voltage required for SVPWM modulation of the input AC port;
[0225] Output AC port voltage open-loop control module, which is used to make the amplitude of the output AC port voltage vector equal to the reference value u Ld *, the phase of the output AC port voltage vector is equal to the phase of the input AC port voltage vector, and the three-phase reference voltage required for SVPWM modulation of the output AC port is obtained;
[0226] The DC side midpoint potential balance control module is used to control the zero-sequence voltage of the injected modulation wave, and then control the midpoint current so that the midpoint potential does not shift.
[0227] It should be noted that the steps in the method provided by the present invention can be implemented using corresponding modules, devices, units, etc. in the system. Those skilled in the art can refer to the technical solution of the method to implement the composition of the system, that is, the embodiments in the method can be understood as preferred examples of constructing the system, which will not be elaborated here.
[0228] The control method provided by the above embodiment of the present invention is further described in detail below with reference to the accompanying drawings and working principles.
[0229] The control method provided by the above embodiment of the present invention includes: a dual closed-loop control strategy for input AC port voltage and current, an open-loop control strategy for output AC port voltage, and a DC side midpoint potential balance control strategy.
[0230] 1. Input AC port voltage and current dual closed-loop control strategy
[0231] The dual closed-loop control strategy for the voltage and current of the input AC port includes a DC voltage outer loop and an input AC port current inner loop, as shown in Figure 8. The current inner loop is divided into the current d-axis component inner loop and the current q-axis component inner loop. The phase-locked loop locks the three-phase voltage of the power supply node of the input AC port line. The output of the phase-locked loop provides the angle ωt for the Park transform (transformation from the abc coordinate system to the dq coordinate system) of the current. The input AC port current dq axis component i gd and i gq Obtained by Park transform of its abc components.
[0232] ① Current d-axis component inner loop: Its control goal is to stabilize the input AC port current at the reference value i gd *, the reference value i gd *With the actual value i gd The deviation is used as the input of the proportional integral controller (hereinafter referred to as PI controller), and the mathematical equation is
[0233] u d,PI =k pi (igd * -i gd )+∫k ii (i gd * -i gd )dt
[0234] Among them, k pi is the gain coefficient of the proportional link of the PI controller, k ii is the gain coefficient of the integral link of the PI controller.
[0235] The output of the PI regulator is fed forward and decoupled to finally become the input AC port voltage d-axis component reference value u ind *, where feedforward refers to the voltage u on the power supply side gd Feedforward compensation, decoupling refers to the coupling between the dq axes caused by Park transformation, which requires the use of the current component i gq Decoupling is performed to facilitate PI parameter design and improve system dynamic performance.
[0236] ② Current q-axis component inner loop: The structure is basically the same as the current d-axis component inner loop, and the reference value and actual value become i gq * and i gq The output is the reference value u of the q-axis component of the input AC port voltage inq *, feedforward needs to use u gq , decoupling requires i gd The mathematical equation of the PI controller is
[0237] u q,PI =k pi (i gq * -i gq )+∫k ii (i gq * -i gq )dt
[0238] Finally, u ind * and u inq *After Park inverse transformation, the three-phase voltage u required by the input AC port SVPWM algorithm is obtained ina *、u inb *、u inc *.
[0239] 2. Output AC port voltage open-loop control strategy
[0240] The voltage open-loop control strategy of the output AC port is shown in Figure 9. The control target is to make the amplitude of the output AC port voltage vector equal to the reference value u Ld *, whose phase is equal to the phase of the input AC port voltage vector.
[0241] Input AC port three-phase reference voltage u ina *、u inb *、u inc *After Clarke transformation, we get the αβ axis component u inα * and u inβ *, extract the amplitude and phase of the input AC port voltage vector to obtain the amplitude V m1 and phase angle θ, the mathematical formula is
[0242] Output AC port voltage vector amplitude reference value u Ld *Added to the voltage compensation ΔV, the amplitude of the input AC port voltage vector V is obtained m2 According to the amplitude and phase angle information, the output AC port voltage αβ axis component u is obtained outα * and u outβ *, the mathematical formula is
[0243] After Clarke inverse transformation, the three-phase voltage u required by the output AC port SVPWM algorithm is obtained outa *、u outb *、u outc *.
[0244] The calculation of voltage compensation ΔV is shown in Figure 10. The purpose of adding compensation is to offset the voltage drop of the LC filter and make the load side voltage closer to the reference value. According to the phasor diagram, before adding compensation, The amplitude is u Ld *, after filtering by LC filter, compared to The amplitude becomes smaller and the phase changes. Here, the influence of phase change is not considered and the amplitude is compensated to u Ld *. Output the actual value of the three-phase current of the AC port i outa 、i outb 、i outc After Park transformation, we get i outd 、i outq , then the calculation formula for voltage compensation is
[0245] Among them, u out 'and u out are the output AC port voltage vector amplitudes before and after compensation, L out is the filter inductance value of the LC filter, R out For L out parasitic resistance.
[0246] 3. DC side midpoint potential balance control strategy
[0247] To ensure proper circuit operation, the DC midpoint potential must be maintained at zero, meaning the voltage across the DC capacitors remains balanced. A shift in the midpoint potential is caused by a non-zero midpoint current. Using the zero-sequence voltage injection method, the control objective is to control the zero-sequence voltage of the injected modulated wave, thereby controlling the midpoint current to prevent the midpoint potential from shifting.
[0248] The definition of the DC side capacitor voltage, DC side current, and the positive direction of the input and output AC port currents, as well as the midpoint potential balance algorithm are shown in Figure 11. The midpoint current i o The direction is from the midpoint of the DC side, and the positive direction of the current at each phase port is defined as flowing from the input / output AC port to the power side / load side.
[0249] Zero sequence voltage v com It is only injected into the SVPWM modulation wave of the input AC port. First, the zero-sequence voltage to be injected needs to be calculated tentatively. The mathematical formula is
[0250] Among them, C dc1 and C dc2 They are the upper and lower capacitors on the DC side, V dc1 and V dc2 C dc1 and C dc2 The voltage on both sides, T s is the switching cycle.
[0251] i oav_in and i oav_out are the average current drawn from the input AC port and the output AC port to the midpoint of the DC side in one switching cycle before the zero-sequence voltage is injected, and the mathematical formula is:
[0252] Among them, i ain 、i bin 、i cin are the three-phase currents of the input AC port, v ain 、v bin 、v cin are the three-phase modulation wave values of the input AC port, i aout 、i bout 、i cout They are the three-phase current of the output AC port, v aout 、v bout 、v cout are the three-phase modulation wave values of the output AC port respectively.
[0253] i o_in ' is the equivalent current change value of the input AC port caused by zero-sequence voltage injection, and its mathematical formula is
[0254] io_in ′=-sign(v ain )i ain -sign(v bin )i bin -sign(v cin )i cin
[0255] Since the formula for calculating the zero-sequence voltage requires the value of the modulation wave to be known in advance, and the actual value of the modulation wave is the value after the zero-sequence component is superimposed, there is a contradiction in the order of the relationship, so the calculated V com_test Further verification is needed, and the verification formula is
[0256] Among them, v mid is the middle value of the three-phase modulation wave.
[0257] ① If the trial calculation result is correct, then the constraint condition judgment is performed. If the maximum value of the three-phase modulation wave does not exceed the upper limit 1 after superimposing the zero-sequence voltage and the minimum value does not exceed the lower limit -1 after superimposing the zero-sequence voltage, then
[0258] v com =v com_test
[0259] If any of the conditions are not met, the range must be restricted.
[0260] Among them, v max is the maximum value in the three-phase modulation wave, v min It is the minimum value in the three-phase modulation wave.
[0261] ② If the trial calculation result is wrong, it is necessary to perform sign correction
[0262] sign(v mid )=-sign(v mid +v com )
[0263] Then recalculate the zero-sequence voltage and make constraint condition judgment.
[0264] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.
[0265] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.
[0266] Secondly, the term "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive of other embodiments.
[0267] As shown in Figure 1, the transformerless unified power quality conditioner with voltage quality management capabilities provided by the above embodiment of the present invention is connected in series between the power supply side and the load side. Each phase has an AC input port and an AC output port. The DC side is connected to two series capacitors. By adjusting the amplitude and phase of the input AC port current and the output AC port voltage, voltage compensation is achieved in the face of power supply side voltage fluctuations. The overall DC side voltage is stabilized by controlling the active component of the input AC port current, and the DC side voltage is balanced by controlling the DC side midpoint current.
[0268] The following is a simulation example to further illustrate the application of the structure and method in the above embodiment. The following system is simulated and verified using MATLAB / Simulink 2021a software.
[0269] Simulation Example 1:
[0270] Figures 1, 8, 9, 10, and 11 are the first simulation examples, and the simulation parameters are shown in Table 2. This example provides compensation and control for voltage sags and swells when the device capacity is 30 kVA.
[0271] As shown in Figure 1, the device's AC input port is connected to a 380V three-phase feeder on the power supply side, where the feeder voltage is subject to a 20% sag or swell. The AC output port is connected to a 20kW constant active load. The three-phase voltages and three-phase currents collected by the sensors at the power supply node are transformed using Park transforms to obtain the corresponding dq components. These components are used in the input AC port voltage and current control loop, generating an input AC port SVPWM modulation wave to control the power supply current. Based on the phase of the input AC port modulation wave and the compensated load voltage amplitude, a voltage vector is synthesized and transformed using an inverse Clarke transform to obtain an output AC port SVPWM modulation wave. This wave controls the load-side voltage to maintain a constant voltage, unaffected by power supply voltage sags or swells.
[0272] Table 2
[0273] In order to verify the effectiveness of the voltage compensation strategy of the unified power quality conditioner at the 30kVA power level, the voltage sag and voltage swell cases are simulated respectively.
[0274] (1) The node voltage on the power supply side temporarily drops
[0275] The simulation simulates a short-term voltage sag during normal operation. The simulated operating conditions are as follows: 0 to 0.2 seconds, the power supply node voltage is normal, 0.1 second the midpoint potential balance control loop is activated; 0.2 to 0.4 seconds, the power supply node voltage drops by 20% of the rated amplitude; 0.4 to 0.6 seconds, the power supply node voltage returns to normal.
[0276] Figures 12 and 13 show the simulation results for this operating condition. Each figure contains two waveforms. Figure 12 (a) and (b) show the waveforms of the voltage and current on the power supply side, respectively. Figure 13 (a) and (b) show the waveforms of the voltage and current on the load side, respectively.
[0277] The simulation waveform results show that the use of the input AC port voltage and current closed-loop control strategy and the output AC port voltage open-loop control strategy can prevent the load side voltage from being affected by temporary voltage drops, which is equivalent to playing the role of voltage compensation and maintaining the load voltage constant and stable.
[0278] (2) The node voltage on the power supply side rises temporarily
[0279] The simulation simulates a short-term voltage surge during normal operation. The simulated operating conditions are as follows: 0 to 0.2 seconds, the power supply node voltage is normal; 0.1 second, the midpoint potential balance control loop is activated; 0.2 to 0.4 seconds, the power supply node voltage rises by 20% of the rated amplitude; 0.4 to 0.6 seconds, the power supply node voltage returns to normal.
[0280] Figures 14 and 15 show the simulation results for this operating condition. Each figure contains two waveforms. Figure 14 (a) and (b) show the waveforms of the voltage and current on the power supply side, respectively. Figure 15 (a) and (b) show the waveforms of the voltage and current on the load side, respectively.
[0281] The simulation waveform results show that, by using the control strategy, the load side voltage is not affected by the temporary voltage rise and the load voltage can be maintained at a normal level.
[0282] Simulation Example 2:
[0283] Figures 1, 8, 9, 10, and 11 are the second simulation examples, and the simulation parameters are shown in Table 3. This example provides compensation and control for voltage sags and swells when the device capacity is 100 kVA.
[0284] Table 2
[0285] In order to verify the effectiveness of the voltage compensation strategy of the unified power quality conditioner at the 100kVA power level, the voltage sag and voltage swell cases are simulated respectively.
[0286] (1) The node voltage on the power supply side temporarily drops
[0287] The simulation simulates a short-term voltage sag during normal operation. The simulated operating conditions are as follows: 0 to 0.2 seconds, the power supply node voltage is normal, 0.1 second the midpoint potential balance control loop is activated; 0.2 to 0.4 seconds, the power supply node voltage drops by 20% of the rated amplitude; 0.4 to 0.6 seconds, the power supply node voltage returns to normal.
[0288] Figures 16 and 17 show the simulation results for this operating condition. Each figure contains two waveforms. Figure 16 (a) and (b) show the waveforms of the voltage and current on the power supply side, respectively. Figure 17 (a) and (b) show the waveforms of the voltage and current on the load side, respectively.
[0289] The simulation waveform results show that the use of the input AC port voltage and current closed-loop control strategy and the output AC port voltage open-loop control strategy can prevent the load side voltage from being affected by temporary voltage drops, which is equivalent to playing the role of voltage compensation and maintaining the load voltage constant and stable.
[0290] (2) The node voltage on the power supply side rises temporarily
[0291] The simulation simulates a short-term voltage surge during normal operation. The simulated operating conditions are as follows: 0 to 0.2 seconds, the power supply node voltage is normal; 0.1 second, the midpoint potential balance control loop is activated; 0.2 to 0.4 seconds, the power supply node voltage rises by 20% of the rated amplitude; 0.4 to 0.6 seconds, the power supply node voltage returns to normal.
[0292] Figures 18 and 19 show the simulation results for this operating condition. Each figure contains two waveforms. Figure 18 (a) and (b) show the waveforms of the voltage and current on the power supply side, respectively. Figure 19 (a) and (b) show the waveforms of the voltage and current on the load side, respectively.
[0293] The simulation waveform results show that the use of the input AC port voltage and current closed-loop control strategy and the output AC port voltage open-loop control strategy can prevent the load side voltage from being affected by temporary voltage rise and maintain the load voltage at a normal level.
[0294] It is important to note that the construction and arrangement of the present application shown in a number of different exemplary embodiments are merely illustrative. Although only a few embodiments are described in detail in this disclosure, it should be readily understood by those who refer to this disclosure that many modifications are possible (e.g., the size, scale, structure, shape and proportion of various elements, as well as parameter values (e.g., temperature, pressure, etc.), mounting arrangements, use of materials, color, directional changes, etc.) without departing substantially from the novel teachings and advantages of the subject matter described in this application. For example, an element shown as integrally formed may be composed of multiple parts or elements, the position of the element may be inverted or otherwise changed, and the nature or number or position of the discrete elements may be altered or changed. Therefore, all such modifications are intended to be included within the scope of the present invention. The order or sequence of any process or method steps may be changed or reordered according to alternative embodiments. In the claims, any "means plus function" clause is intended to cover the structure of the performance function described herein, and is not only structurally equivalent but also equivalent structures. Without departing from the scope of the present invention, other replacements, modifications, changes, and omissions may be made in the design, operating conditions, and arrangement of the exemplary embodiments. Therefore, the invention is not limited to the specific embodiments, but extends to various modifications that still fall within the scope of the appended claims.
[0295] Additionally, in order to provide a concise description of exemplary embodiments, all features of an actual embodiment (ie, those features that are not relevant to the best mode presently contemplated for carrying out the invention or those that are not relevant to implementing the invention) may not be described.
[0296] It should be understood that in the development of any actual embodiment, as in any engineering or design project, numerous implementation-specific decisions may be made. Such a development effort may be complex and time-consuming, but for those of ordinary skill having the benefit of this disclosure, the development effort will be a routine task of design, fabrication, and production without undue experimentation.
[0297] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.
[0298] The transformerless unified power quality conditioner and its modulation method and control method provided in the above-mentioned embodiment of the present invention do not contain an industrial frequency transformer in the topology compared with the existing voltage regulation device, but adopt the form of a three-level converter expansion port to achieve voltage regulation. Therefore, it has the advantages of lower cost, smaller size, smaller footprint, and lower loss.
[0299] Matters not mentioned in the above embodiments of the present invention are well known in the art.
[0300] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art may make various variations or modifications within the scope of the claims, which do not affect the essence of the present invention.
Claims
1. A transformerless unified power quality conditioner, characterized in that: include: A three-phase regulator substructure, wherein each phase of the regulator substructure includes: an ANPC three-level converter and an output half-bridge module connected to the ANPC three-level converter; wherein: The output half-bridge module includes: 2 switching tubes S connected in series x7 and S x8 , the midpoint of the series structure formed serves as the output AC port of the output half-bridge module, which is used to be connected in series with the load side of the distribution line, and the two ends of the series structure formed serve as the input ends of the output half-bridge module; The ANPC three-level converter includes: 6 switch tubes S x1 ~S x6 Among them, the switch tube S x1 、S x2 、S x3 and S x4 The two sides of the series structure are connected in series as DC ports, respectively connected to the upper and lower common connection points of the DC side, and the series midpoint of the series structure is connected to the DC side common connection midpoint. The other two series points of the series structure are connected to a switch tube S x5 and S x6 The output half-bridge structure is composed of a series connection, and the switch tube S x5 and S x6 The series midpoint of the three-phase ANPC is used as the input AC port of the ANPC three-level converter, which is used to be connected in series with the power supply side of the distribution line; the first DC capacitor C shared by the three phases is connected between the common connection point and the common connection midpoint on the DC side and between the common connection midpoint and the lower common connection point. dc1 and the second DC capacitor C dc2 , used to provide DC side voltage; Here, x is a, b, and c, representing phase A, phase B, and phase C of the three phases, respectively.
2. The transformerless unified power quality conditioner according to claim 1, characterized in that: The IGBT switch tube reuse operation mode is adopted to connect the two switch tubes S directly connected to the DC port. x1 and S x4 And two switching tubes S for midpoint clamping x2 and S x3 They are used as multiplexing tubes respectively.
3. The transformerless unified power quality conditioner according to claim 1, characterized in that: Also includes: Energy storage device, the energy storage device and the first DC link capacitor C dc1 and the second DC link capacitor C dc2 Connected in parallel to provide active power to maintain a constant DC side voltage.
4. The transformerless unified power quality conditioner according to any one of claims 1 to 3, characterized in that: The voltage of the input AC port is clamped by the power supply side, and the active power and reactive power provided by the power supply side are adjusted by adjusting the AC current provided by the power supply side, thereby achieving the stability of the DC port voltage; the output AC port provides a stable and constant AC voltage to the load side, and the voltage compensation is achieved by adjusting the AC voltage amplitude and phase of the output AC port.
5. A modulation method for the transformerless unified power quality conditioner according to any one of claims 1 to 4, characterized in that: A three-level SVPWM modulation method is used to control the switch tubes of the input AC port and the output AC port of the regulator so that the voltage vectors of the two ports have the same phase, including: The reference voltage vectors of the two ports are transformed from the abc coordinate system to the αβ coordinate system to obtain the reference voltage components in the αβ coordinate system; Based on the obtained reference voltage component in the αβ coordinate system, the amplitude and phase angle of the reference voltage component are extracted, and the number of the large sector where the current reference voltage component is located is determined based on the phase angle and the sector division principle of the three-level SVPWM modulation method; According to the determined large sector where the reference voltage component is located, further determining the number of the small sector where the reference voltage component is located; According to the specific positions of the reference voltage components of the two ports obtained by the small sector number, the action time of the voltage vector in the corresponding small sector is calculated; Determine the order of action of the voltage vectors in each small sector of each large sector; Calculate the value of the three-phase modulation wave according to the action time and action sequence of the voltage vector; Compare the calculated three-phase modulation wave values with the positive load wave with amplitudes between 0 and 1 and -1 and 0 and a frequency equal to the switching frequency to obtain the PWM waves of the input AC port and the output AC port; The switch tubes of the input AC port and the output AC port are controlled respectively according to the corresponding PWM waves obtained, so that the voltage vectors of the two ports have the same phase.
6. The modulation method of the transformerless unified power quality conditioner according to claim 5, characterized in that: The three-level SVPWM modulation method includes 27 voltage vectors, namely 3 zero vectors, 6 small vectors, 6 medium vectors and 6 large vectors; wherein the modulus length of the zero vector is 0, the modulus length of the small vector is V dc / 3, the modulus of the midpoint vector is The modulus of the large vector is 2V dc / 3, V dc is the DC port voltage value; the large vector is divided into 6 large sectors, each of which contains 6 small sectors.
7. The modulation method of the transformerless unified power quality conditioner according to claim 6, characterized in that: The step of transforming the reference voltage vectors of the two ports from the abc coordinate system to the αβ coordinate system to obtain the reference voltage components in the αβ coordinate system includes: The three-phase reference voltage in the abc coordinate system is transformed into the two-phase reference voltage in the αβ coordinate system. For the input AC port reference voltage of the regulator, the transformation formula is: Among them, u inα * and u inβ * are the components of the reference voltage vector on the α-axis and β-axis, u ina * 、u inb * 、u inc * are the components of the reference voltage vector on the a-axis, b-axis, and c-axis respectively; The output AC port reference voltage u of the regulator outa * 、u outb * 、u outc * Transform in the same way; The method of extracting the amplitude and phase angle of the reference voltage component based on the obtained reference voltage component in the αβ coordinate system, and determining the number of the large sector in which the current reference voltage component is located based on the phase angle and the sector division principle of the three-level SVPWM modulation method, includes: For the input AC port voltage vector, the formula for calculating the large sector number is: Where N is the large sector number, and ceil is the rounding function. Calculate the relative angle of the voltage vector in the large sector. The calculation formula is: Where θ is the angle of the voltage vector relative to the starting edge of the large sector in which it is located, defined by the vector rotating counterclockwise; For the output AC port voltage vector, the same method is used to determine the large sector; The step of further determining the number of the small sector where the voltage vector is located based on the determined large sector where the voltage vector is located includes: For the input AC port voltage vector, the process quantity is defined as: Among them, X1, X2, and X3 are auxiliary process quantities used to determine the small sector number, V dc is the DC port voltage; When θ≥π / 6, first determine the value of X2. If X2≥0, the vector is located in the 6th small sector. If X2<0, then further determine the value of X1. If X1≥0, the vector is located in the 4th small sector. If X1<0, the vector is located in the 2nd small sector. When θ<π / 6, first determine the value of X1. If X1<0, the vector is located in the 1st small sector. If X1≥0, then further determine the value of X3. If X3≥0, the vector is located in the 3rd small sector. If X3<0, the vector is located in the 5th small sector. Wherein, θ is the relative angle calculated during the large sector determination process; For the output AC port voltage vector, the small sector judgment is performed in the same way; The specific positions of the reference voltage components of the two ports obtained according to the small sector number and the calculation of the action time of the voltage vector in the corresponding small sector include: After obtaining the specific positions of the reference voltage components of the two ports, the three basic voltage vectors closest to the small sector are used to synthesize and obtain the voltage vector within the small sector; wherein, the output voltage of each phase output AC port of the regulator is defined as V dc When the output voltage is 0, the level is 0, and the output voltage is -V dc When the level is N when φ / 2, the basic voltage vector is a combination of three-phase levels; For the input AC port voltage vector: If the voltage vector in the small sector is located in the first and second small sectors, the action time calculation formula is: Among them, T x 、T y 、T z are the action time of the three basic voltage vectors, T s is the switching period, m is the modulation ratio, and its expression is: Among them, V m is the amplitude of the reference voltage component; If the voltage vector in the small sector is located in the third and fourth small sectors, the action time calculation formula is: If the voltage vector in the small sector is located in the fifth small sector, the action time calculation formula is: If the small sector voltage vector is located in the sixth small sector, the action time calculation formula is: The same method is used to calculate the action time of the output AC port voltage vector; The determining of the action order of the voltage vectors in each small sector of each large sector includes: For the input AC port voltage vector, determine the action order of the basic voltage vectors of the voltage vectors in each small sector of each large sector. Within one switching cycle, the voltage vectors in the small sectors are divided into 7 segments and are centrally symmetrical. Among them, the action time of the voltage vectors in the small sectors of segments 1 and 7 is 1 / 4 of the corresponding time value, and the action time of the voltage vectors in the small sectors of segments 2 to 6 is 1 / 2 of the corresponding time value. According to the following ordering principle, the corresponding time logic order is obtained: The basic voltage vectors closest to the small sector triangle are used for sorting. The basic voltage vectors of adjacent time periods are only allowed to change the level of one phase, and the level change is not allowed to be from P to N or from N to P. Among them, the 1st, 4th and 7th segments use two basic voltage vectors corresponding to the same point, of which the 1st and 7th segments use the same vector, and the 4th segment uses another vector; the 2nd and 6th segments use the same basic voltage vector; the 3rd and 5th segments use the same basic voltage vector; The output AC port voltage vector is sorted by time logic in the same way; The calculation of the value of the three-phase modulation wave according to the voltage vector action time and action sequence includes: The voltage vector action time in the first to third small sectors in the action sequence is expressed as T1, T2, and T3, and the three-phase modulation wave v is calculated. a 、v b 、v c The values are: If the seven-segment level of a phase is OOOPOOO, then the modulation wave value of this phase is T1 / 2 / Ts; If the seven-segment level of a phase is NOOOOON, the modulation wave value of the phase is -T1 / 2 / Ts; If the seven-segment level of a phase is OOPPPOO, the modulation wave value of the phase is (T1 / 2+T3) / Ts; If the seven-segment level of a phase is NNOOOONN, the modulation wave value of the phase is (-T1 / 2-T2) / Ts; If the seven-segment level of a phase is OPPPPPO, the modulation wave value of the phase is (T1 / 2+T2+T3) / Ts; If the seven-segment level of a phase is NNNONNN, the modulation wave value of the phase is (-T1 / 2-T2-T3) / Ts; The seven-segment level of a certain phase is obtained by the vector action sequence, that is, the level of the corresponding phase is taken from the basic voltage vector corresponding to the seven-segment action time; The output AC port voltage vector is modulated using the same method; The calculated three-phase modulation wave values are compared with positive load waves with amplitudes between 0 and 1 and -1 and 0 and a frequency equal to the switching frequency to obtain PWM waves of the input AC port and the output AC port, including: The output AC port is connected to the switch tube S in the regulator that forms the output half-bridge structure. x5 With S x6 And the switch tube S that constitutes the output half-bridge module x7 and S x8 When the modulation wave value is greater than or equal to 0, the modulation wave is compared with the positive carrier wave. If the former is greater than the latter, 1 and 0 are given to the upper and lower switches respectively, where 1 represents PWM high level and 0 represents PWM low level. If the former is less than the latter, 0 and 1 are given to the upper and lower switches respectively; when the modulation wave value is less than 0, the modulation wave is compared with the load wave. If the former is greater than the latter, 1 and 0 are given to the upper and lower switches respectively; if the former is less than the latter, 0 and 1 are given to the upper and lower switches respectively; for the multiplexed switch tube S in the regulator x1 ~S x4 When the modulation wave value is greater than or equal to 0, the four switching tubes are given 1, 0, 1, and 0 respectively; when the modulation wave value is less than 0, the four switching tubes are given 0, 1, 0, and 1 respectively; in: The PWM wave of the input AC port is used to drive the switch tube S of the three-phase regulator substructure x5 and S x6 , controls its own output half-bridge; the PWM wave of the output AC port is used to drive the S of the three-phase regulator substructure x1 ~S x4 and S x7 and S x8 , controlling the on and off of its own output half-bridge and the multiplexed switch tube.
8. The modulation method according to claim 7, characterized in that: Also includes: Determine whether the voltage vectors of two ports in the same large sector are in the same small sector: The voltage vector of the input AC port is expressed as The voltage vector of the output AC port is recorded as exist and During the rotation process, the two voltage vectors are in the same large sector. To check whether they are in the same small sector, the following operations are performed: When the voltage vectors of the input AC port and the output AC port are located in the same small sector n, then: Among them, V m1 and V m2 They are and The amplitude of , θ is the phase angle; For the voltage vector in the nth small sector, after synthesizing the three basic voltage vectors, according to the calculation formula of the action time, we can get and After the action time of each basic voltage vector is sorted by time logic, the size relationship of the same time period in the 7-segment time distribution can be obtained; Since the two voltage vectors are located in the same small sector, the magnitude relationship of the two voltage vectors in the same period of time is determined only by the modulation ratio, which is fixed and has V m1 <V m2 ,but and The action time has the following relationship: Among them, T x1 、T y1 、T z1 、T x2 、T y2 、T z2 Synthetic and The action time of the three basic voltage vectors; When the calculated action time is ensured to satisfy the above-mentioned action time relationship, two in-phase voltage vectors located in the same small sector can be output; When the voltage vectors of the input AC port and the output AC port are located in different small sectors, then: when and When located in the nth and mth small sectors respectively, three basic voltage vectors are used to synthesize the voltage vector in the corresponding small sector; according to the calculation formula of the action time, and After the action time of each basic voltage vector is sorted by time logic, the size relationship of the same time period in the 7-segment time distribution can be obtained; Since the two voltage vectors are located in different small sectors, the magnitude relationship of the two voltage vectors in the same period of time is determined by both the modulation ratio and the phase angle. There are many situations for the magnitude relationship of the two voltage vectors in the same action time: When the calculated action time is ensured to satisfy any one of the above-mentioned action time relationships, two in-phase voltage vectors located in different small sectors can be output.
9. A modulation system for a transformerless unified power quality conditioner according to any one of claims 1 to 4, characterized in that: A three-level SVPWM modulation method is used at both the input AC port and the output AC port of the regulator so that the voltage vectors of the two ports have the same phase, including: Clarke transformation module, which is used to transform the reference voltage vectors of the two ports from the abc coordinate system to the αβ coordinate system to obtain the reference voltage components in the αβ coordinate system; A large sector determination module is used to extract the amplitude and phase angle of the reference voltage component based on the obtained reference voltage component in the αβ coordinate system, and determine the number of the large sector in which the current reference voltage component is located based on the phase angle and the sector division principle of the three-level SVPWM modulation method; A small sector determination module, which is used to further determine the number of the small sector where the reference voltage component is located according to the determined large sector where the reference voltage component is located; An action time calculation module, which is used to calculate the action time of the voltage vector in the corresponding small sector according to the specific positions of the reference voltage components of the two ports obtained by the small sector number; A time logic sequencing module, which is used to determine the order in which the voltage vectors in each small sector of each large sector act; Modulation wave calculation module, which is used to calculate the value of the three-phase modulation wave according to the voltage vector action time and action sequence; The carrier comparison module generates a PWM signal, which compares the calculated three-phase modulation wave with a positive load wave with an amplitude between 0 and 1 and -1 and a frequency equal to the switching frequency, to obtain the PWM signal at the input and output AC ports. The switch tube control module is used to control the switch tubes of the input AC port and the output AC port respectively according to the corresponding PWM waves obtained, so that the voltage vectors of the two ports have the same phase.
10. A control method for the transformerless unified power quality conditioner according to any one of claims 1 to 4, characterized in that: include: Provide an input AC port voltage and current dual closed-loop control strategy, through which the input AC port voltage and current dual closed-loop control strategy is used to control the input AC port current dq axis component to be equal to the reference value i gd * and i gq *, and make the power factor on the power supply side 1, and the input AC port obtains the three-phase reference voltage required for SVPWM modulation of the input AC port; Provide an output AC port voltage open-loop control strategy, through which the output AC port voltage open-loop control strategy makes the amplitude of the output AC port voltage vector equal to the reference value u Ld *, the phase of the output AC port voltage vector is equal to the phase of the input AC port voltage vector, and the three-phase reference voltage required for SVPWM modulation of the output AC port is obtained; A DC side midpoint potential balance control strategy is provided, by which the zero-sequence voltage of the injected modulated wave is controlled, thereby controlling the midpoint current so that the midpoint potential does not deviate.
11. The control method according to claim 10, characterized in that: The input AC port voltage and current dual closed-loop control strategy includes: a DC voltage outer loop and an input AC port current inner loop; wherein: The DC voltage outer loop is used to control the DC port voltage to be stable at the reference value V dc *, the reference value V dc *Compared to the actual value V dc The deviation is used as the input of the DC voltage outer loop proportional integral controller, and the mathematical equation is: and gd * =k pv (V dc * -V dc )+∫k iv (V dc * -V dc )dt Among them, i gd * is the current reference value of the inner loop of the current d-axis component, k pv is the gain coefficient of the proportional link of the PI controller, k iv is the gain coefficient of the integral link of the PI controller; The input AC port current inner loop may further include: a current d-axis component inner loop and a current q-axis component inner loop; wherein: The inner loop of the current d-axis component is used to stabilize the input AC port current at a reference value i gd *; The reference value i gd *With the actual value i gd The deviation is used as the input of the proportional integral controller (PI controller), and the mathematical equation is: u d,PI =k pi (i gd * -i gd )+∫k ii (i gd * -i gd )dt Among them, u d,PI is the output of the inner loop PI controller of the current d-axis component, k pi is the gain coefficient of the proportional link of the PI controller, k ii is the gain coefficient of the integral link of the PI controller; The output of the PI controller is fed forward and decoupled to finally become the reference value u of the d-axis component of the input AC port voltage. ind *, where feedforward includes: using the power supply side voltage u gd Perform feedforward compensation; decoupling includes: using the current component i gq Decoupling the coupling between dq axes caused by Park transformation; The inner loop of the current q-axis component is used to stabilize the input AC port current at a reference value i gq *; The reference value i gq * and the actual value i gq The deviation is used as the input of the proportional integral controller (PI controller), and the mathematical equation is: u q,PI =k pi (i gq * -i gq )+∫k ii (i gq * -i gq )dt The output of the PI controller is fed forward and decoupled to finally become the reference value u of the q-axis component of the input AC port voltage inq *; Among them, the feedforward includes: using the power supply side voltage u gq Perform feedforward compensation; decoupling includes: using the current component i gd Decoupling the coupling between dq axes caused by Park transformation; Finally, u ind * and u inq *After Park inverse transformation, the three-phase reference voltage u required for input AC port SVPWM modulation is obtained ina *、u inb *、u inc *.
12. The control method according to claim 10, characterized in that: The output AC port voltage open-loop control strategy includes: Input the three-phase reference voltage u ina *、u inb *、u inc *After Clarke transformation, the input AC port voltage αβ axis component u is obtained inα * and u inβ *, for the component u inα * and u inβ *Perform amplitude phase extraction to obtain the amplitude V of the input AC port voltage vector m1 And the phase angle θ, the mathematical formula is: The output AC port voltage vector amplitude reference value u Ld *Added to the voltage compensation ΔV, the amplitude of the input AC port voltage vector V is obtained m2 ; According to the amplitude and phase angle information, the output AC port voltage αβ axis component u is obtained outα * and u outβ *, the mathematical formula is: After Clarke inverse transformation, the three-phase reference voltage u required for SVPWM modulation of the output AC port is obtained outa *、u outb *、u outc *.
13. The control method according to claim 12, characterized in that: The voltage compensation amount ΔV is calculated as follows: Output the actual value of the three-phase current of the AC port i outa 、i outb 、i outc After Park transformation, the dq axis component i is obtained outd and i outq , then the calculation formula for voltage compensation is: Among them, u out 'and u out are the output AC port voltage vector amplitudes before and after compensation, L out is the filter inductance value of the LC filter, R out For L out parasitic resistance.
14. The control method according to claim 10, characterized in that: The DC side midpoint potential balance control strategy includes: The DC side midpoint potential balance control strategy adopts the zero sequence voltage injection method to inject the zero sequence voltage v com Only inject into the SVPWM modulation wave of the input AC port; First, tentatively calculate the zero-sequence voltage v that needs to be injected com_test , the mathematical formula is: Among them, C dc1 and C dc2 They are the upper and lower capacitors on the DC side, V dc1 and V dc2 C dc1 and C dc2 The voltage on both sides, T s is the switching period; i oav_in and i oav_out are the average current drawn from the input AC port and the output AC port to the midpoint of the DC side in one switching cycle before the zero-sequence voltage is injected. The mathematical formula is: Among them, i ain 、i bin 、i cin are the three-phase currents of the input AC port, v ain 、v bin 、v cin are the three-phase modulation wave values of the input AC port, i aout 、i bout 、i cout They are the three-phase current of the output AC port, v aout 、v bout 、v cout are the three-phase modulation wave values of the output AC port respectively; i o_in ' is the equivalent current change value of the input AC port caused by zero-sequence voltage injection, and its mathematical formula is: i o_in ′=-sign(v ain )i ain -sign(v bin )i bin -sign(v cin )i cin For zero sequence voltage v com_test For further inspection, the verification formula is: Among them, v mid is the middle value of the three-phase modulation wave; If the trial calculation result is correct, the constraint condition judgment is performed: If the maximum value of the three-phase modulated wave does not exceed the upper limit 1 after superimposing the zero-sequence voltage, and the minimum value does not exceed the lower limit -1 after superimposing the zero-sequence voltage, then: v com =v com_test If any of the conditions are not met, the range is restricted: Among them, v max is the maximum value in the three-phase modulation wave, v min It is the minimum value in the three-phase modulation wave; If the trial calculation result is wrong, perform sign correction: sign(in mid )=-sign(in mid +v com ) Then recalculate the zero-sequence voltage and make constraint condition judgment.
15. A control system for the transformerless unified power quality conditioner according to any one of claims 1 to 4, characterized in that: include: Input AC port voltage and current dual closed-loop control module, which is used to obtain the three-phase reference voltage required for input AC port SVPWM modulation; Output AC port voltage open-loop control module, which is used to make the amplitude of the output AC port voltage vector equal to the reference value u Ld *, the phase of the output AC port voltage vector is equal to the phase of the input AC port voltage vector, and the three-phase reference voltage required for SVPWM modulation of the output AC port is obtained; The DC side midpoint potential balance control module is used to control the zero-sequence voltage of the injected modulation wave, and then control the midpoint current so that the midpoint potential does not shift.
Citation Information
Patent Citations
Control method for three-phase unified electric energy quality controller without isolating transformer
CN102055189A
Three-level virtual space vector voltage equalizing modulation method based on simplified balance factor
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Active neutral point clamped three-level converter and adjustment and control method thereof
CN113765428A
Operation control method of unified power quality conditioner integrated with photovoltaic power generation
CN117154741A
Transformerless unified power quality conditioner and modulation method and control method thereof
CN117937490A
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