Compound semiconductor substrate and method for producing compound semiconductor substrate
The compound semiconductor substrate with GaP layers and controlled impurity concentrations addresses dopant diffusion issues, enhancing brightness and efficiency by suppressing defects and improving luminance life characteristics.
Patent Information
- Application Number
- PCT/JP2025/018322
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-06-13
- Filing Date
- 2025-05-21
- Publication Date
- 2025-12-18
AI Technical Summary
Existing methods for manufacturing compound semiconductor substrates with AlGaInP quaternary light-emitting layers face challenges in achieving high luminance life characteristics due to dopant diffusion and thermal history, leading to decreased brightness and efficiency.
A compound semiconductor substrate design with GaP window layers on both sides of the quaternary light-emitting layer, combined with controlled impurity concentrations and undoped layers, to suppress dopant diffusion and crystal defects, thereby improving brightness lifespan.
The proposed substrate structure enhances external quantum efficiency and brightness by reducing dopant-induced defects, resulting in improved luminance life characteristics and stability under current application.
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Figure JP2025018322_18122025_PF_FP_ABST
Abstract
Description
Compound semiconductor substrate and method for manufacturing the same
[0001] The present invention relates to a compound semiconductor substrate and a method for manufacturing the compound semiconductor substrate.
[0002] Light-emitting devices are known in which a light-emitting layer and a window layer (or a current-spreading layer) are formed on a GaAs substrate. For example, a light-emitting layer having a double heterostructure made of an AlGaInP quaternary alloy and a window layer made of GaP are formed on a GaAs substrate.
[0003] This GaP window layer can be fabricated by forming a relatively thin window layer on the light-emitting layer side by metal organic vapor phase epitaxy (hereinafter simply referred to as MOVPE), and then forming a relatively thick window layer by hydride vapor phase epitaxy (hereinafter simply referred to as HVPE).
[0004] Furthermore, although providing a window layer on one side of the light-emitting layer is effective in improving the light-emitting efficiency, it is known that providing a window layer on the other side, i.e., above and below the light-emitting layer, improves the external quantum efficiency and realizes higher brightness. In this case, the light-absorbing GaAs substrate can be removed and a light-transmitting GaP substrate can be bonded instead, or a GaP layer can be deposited by crystal growth.
[0005] However, the total film thickness formed by MOVPE is at most about 10 μm, and if the GaAs substrate were removed in this state, the wafer would not have the mechanical strength required for industrial processing. Therefore, it is rational to grow a thick GaP layer before removing the GaAs substrate to provide the wafer (also called an epitaxial wafer or epi-wafer) with mechanical strength, so that the GaP layer can function both as a window layer for extracting light and as a strength-retaining plate.
[0006] When such a thick GaP layer is formed by crystal growth, the GaP layer must be 20 μm or thicker to have sufficient mechanical strength for industrial processing. However, it takes several to several dozen hours to grow a GaP layer with a thickness of 20 μm or thicker.
[0007] Furthermore, the temperature required to grow a GaP layer formed by HVPE is generally higher than the temperature required to grow an emitting layer, and the emitting layer is exposed to the temperature during MOVPE growth or higher for a long period of time, i.e., it is subjected to a large thermal history.
[0008] On the other hand, the p-type cladding layer is doped with a p-type dopant such as Mg or Zn, and when heated, this p-type dopant diffuses thermodynamically, and also diffuses into the active layer.
[0009] Furthermore, dopant diffusion occurs not only due to thermal history but also due to current flow. For example, in a p / n junction element, a potential difference occurs, and p-type dopants that have been ionized to p-type diffuse into regions where p-type dopants are scarce or into n-type dopant regions during current flow. In principle, n-type dopants also undergo the same phenomenon as p-type dopants, but the diffusion of n-type dopants during current flow is much smaller than that of p-type dopants.
[0010] The p-type dopant diffused into the active layer is prone to forming defects, and so when a current is applied, defects are formed, resulting in a decrease in carrier injection efficiency, an increase in light absorption, and the like, which leads to a decrease in brightness.
[0011] As a method for suppressing the diffusion of p-type dopants such as Mg and Zn into such an active layer, for example, Patent Document 1 discloses setting the carrier concentration within an appropriate range, providing an undoped layer that is not doped with a dopant (hereinafter also referred to as a non-doped layer), and using two or more types of dopants.
[0012] Furthermore, Patent Document 2 discloses a method of doping a p-type intermediate layer between a p-type cladding layer and a p-type window layer with a p-type dopant and an n-type dopant, and describes doping with an n-type dopant in an amount of 0.1 to 140% of the p-type dopant.
[0013] JP 2011-151240 A JP 2008-166399 A
[0014] However, the methods described in Patent Documents 1 and 2 have limitations in terms of epitaxial manufacturing, which requires a severe thermal history. If the doping concentration of the p-type cladding layer is drastically reduced in order to suppress the diffusion of the p-type dopant into the active layer, or if the thickness of the non-doped layer in Patent Document 1 or the p-type intermediate layer in Patent Document 2 is increased, the electrical characteristics will deteriorate.
[0015] Furthermore, Patent Documents 1 and 2 do not take into consideration the influence of n-type dopants, although the influence is smaller than that of p-type dopants. In practice, even when the diffusion of p-type dopants into the active layer is sufficiently suppressed, there are occasional cases in which the luminance life characteristics during life tests of light-emitting devices do not improve as much as expected. This is because, even if the diffusion of p-type dopants into the active layer is sufficiently suppressed, if a large amount of n-type dopants is incorporated during the crystal growth of the active layer, crystal defects occur in the active layer, causing a decrease in luminance when current is applied.
[0016] The present invention has been made in view of the above-mentioned problems, and has an object to provide a compound semiconductor substrate and a method for manufacturing the compound semiconductor substrate, which has an AlGaInP quaternary light-emitting layer and can improve the luminance life characteristics when energized when applied to a light-emitting device.
[0017] In order to achieve the above object, the present invention provides a method for manufacturing a semiconductor device comprising: x Ga 1-x ) y In 1-y a compound semiconductor substrate having a quaternary light-emitting layer in which at least an n-type cladding layer, an active layer, and a p-type cladding layer made of GaP (where 0≦x≦1, 0≦y≦1) are sequentially stacked, and a p-type GaP layer serving as a window layer is stacked on a second main surface of the quaternary light-emitting layer opposite to a first main surface on the n-type GaP substrate side; 15 (Atoms / cm 3 ) or less, the n-type impurity concentration is 7×10 15 (Atoms / cm 3The present invention provides a compound semiconductor substrate characterized in that:
[0018] Such a compound semiconductor substrate has GaP window layers (an n-type GaP substrate and a p-type GaP layer) on both sides (the first main surface and the second main surface) of the quaternary light-emitting layer, respectively, thereby achieving high external quantum efficiency and high brightness. Second, the active layer has low concentrations of both p-type and n-type impurities, thereby suppressing both the diffusion of p-type dopants into the active layer and the generation of crystal defects in the active layer due to n-type dopants. As a result, when this compound semiconductor substrate is applied to a light-emitting device, the amount of unnecessary dopant in the active layer is low, thereby reducing the number of defects formed by the dopants when current is applied. This prevents defects from causing a decrease in carrier injection efficiency and an increase in light absorption, thereby improving the brightness lifespan when current is applied.
[0019] Furthermore, it is preferable that the concentration of p-type impurities in the active layer is higher than the concentration of n-type impurities.
[0020] In this way, the concentration of p-type impurities, which diffuse more during current flow than n-type impurities, is sufficiently suppressed, and the concentration of n-type impurities is also lower than the concentration of p-type impurities, so that both the diffusion of p-type dopants into the active layer and the occurrence of crystal defects in the active layer due to n-type dopants can be reliably suppressed, thereby further improving the brightness life characteristics.
[0021] Preferably, the quaternary light-emitting layer has an undoped layer between the n-type cladding layer and the active layer, and the thickness of the undoped layer is 0.1 μm or more and 0.3 μm or less.
[0022] The presence of such a non-doped layer prevents direct contact between the n-type cladding layer and the active layer, i.e., prevents continuous crystal growth. This reduces the n-type dopant concentration in the crystal growth reactor prior to crystal growth of the active layer, reducing the incorporation of n-type dopants into the active layer and suppressing the occurrence of crystal defects in the active layer. A non-doped layer thickness of 0.1 μm or more is preferable because it ensures good brightness life characteristics. Furthermore, a non-doped layer thickness of 0.3 μm or less is preferable because it hardly causes deterioration in electrical characteristics.
[0023] The present invention also provides a method for manufacturing a semiconductor device comprising: x Ga 1-x ) y In 1-y a p-type GaP layer serving as a window layer is laminated on the p-type cladding layer of the quaternary light-emitting layer; the p-type GaP layer is then laminated on the p-type cladding layer of the quaternary light-emitting layer; the substrate is removed; and an n-type GaP substrate is bonded to the surface from which the substrate was removed, or an n-type GaP layer is laminated; and the p-type impurity concentration in the active layer is adjusted to 9×10 15 (Atoms / cm 3 ) Hereinafter, the n-type impurity concentration is set to 7×10 15 (Atoms / cm 3 ) A method for manufacturing a compound semiconductor substrate is provided, which is characterized by:
[0024] This method of manufacturing a compound semiconductor substrate first forms GaP (a p-type GaP layer and an n-type GaP substrate or n-type GaP layer) on both sides of the quaternary light-emitting layer, thereby increasing the external quantum efficiency and achieving high brightness. Second, the concentrations of both the p-type and n-type impurities in the active layer are reduced, thereby suppressing both the diffusion of p-type dopants into the active layer and the generation of crystal defects in the active layer due to n-type dopants. As a result, when the manufactured compound semiconductor substrate is used in a light-emitting device, the amount of unnecessary dopant in the active layer can be reduced, thereby reducing defects formed by the dopants during current application, preventing defects-related problems such as a decrease in carrier injection efficiency and an increase in light absorption, and improving the brightness lifespan during current application.
[0025] It is also preferable that the concentration of p-type impurities in the active layer is higher than the concentration of n-type impurities.
[0026] In this way, the concentration of p-type impurities, which diffuse more during current flow than n-type impurities, is sufficiently suppressed, and the concentration of n-type impurities is further made lower than the concentration of p-type impurities. This reliably suppresses both the diffusion of p-type dopants into the active layer and the occurrence of crystal defects in the active layer due to n-type dopants, thereby further improving the brightness life characteristics.
[0027] It is also preferable that an undoped layer be provided between the n-type cladding layer and the active layer of the quaternary light-emitting layer, and that the thickness of the undoped layer be 0.1 μm or more and 0.3 μm or less.
[0028] By including such a non-doped layer, the n-type cladding layer and the active layer are not in direct contact, i.e., the crystals are not grown continuously. This reduces the n-type dopant concentration in the crystal growth reactor before the crystal growth of the active layer, reducing the incorporation of n-type dopants into the active layer and suppressing the occurrence of crystal defects in the active layer. A non-doped layer having a thickness of 0.1 μm or more is preferable because it ensures good brightness life characteristics. Furthermore, a non-doped layer having a thickness of 0.3 μm or less is preferable because it hardly causes deterioration in electrical characteristics.
[0029] The compound semiconductor substrate of the present invention has GaP window layers (an n-type GaP substrate and a p-type GaP layer) on both sides (the first main surface and the second main surface) of the quaternary light-emitting layer, respectively, thereby achieving high external quantum efficiency and high brightness. Second, the active layer has low concentrations of both p-type and n-type impurities, thereby suppressing both the diffusion of p-type dopants into the active layer and the generation of crystal defects in the active layer due to n-type dopants. As a result, when this compound semiconductor substrate is applied to a light-emitting device, the amount of unnecessary dopant in the active layer is reduced, thereby reducing the number of defects formed by the dopants during conduction. This prevents defects from causing a decrease in carrier injection efficiency and an increase in light absorption, thereby improving the lifetime characteristics of brightness during conduction.
[0030] Furthermore, the compound semiconductor substrate manufacturing method of the present invention first forms GaP (a p-type GaP layer and an n-type GaP substrate or n-type GaP layer) on both sides of the quaternary light-emitting layer, thereby increasing the external quantum efficiency and achieving high brightness. Second, the concentrations of both the p-type and n-type impurities in the active layer are reduced, thereby suppressing both the diffusion of p-type dopants into the active layer and the generation of crystal defects in the active layer due to n-type dopants. As a result, when the manufactured compound semiconductor substrate is applied to a light-emitting device, unnecessary dopants in the active layer can be reduced, thereby reducing defects formed by dopants during current application, preventing defects-related problems such as a decrease in carrier injection efficiency and an increase in light absorption, and improving the lifetime characteristics of brightness during current application.
[0031] Fig. 1 is a schematic diagram showing a compound semiconductor substrate according to a first embodiment of the present invention; Fig. 2 is a schematic diagram showing a compound semiconductor substrate according to a second embodiment of the present invention; Fig. 3 is a schematic diagram showing a compound semiconductor substrate according to a third embodiment of the present invention; Fig. 4 is a graph showing the impurity concentration of a compound semiconductor substrate; Fig. 5 is a diagram explaining wafer warpage and re-evaporation of n-type dopants during epitaxial growth; Fig. 6 is a graph showing the correlation between luminance lifetime characteristics and impurity concentration;
[0032] As described above, there has been a demand for a compound semiconductor substrate and a method for manufacturing the compound semiconductor substrate that can improve the life characteristics of luminance when energized when applied to a light-emitting device.
[0033] In particular, in cases where the luminance lifetime characteristics of light-emitting devices during life tests did not improve as expected even when the diffusion of p-type dopants into the active layer was sufficiently suppressed, investigations revealed that the concentration of n-type dopants in the active layer was high. That is, under conditions where the diffusion of p-type dopants into the active layer was sufficiently suppressed, the impact of n-type dopants on luminance lifetime became apparent and was found to depend on the amount of n-type dopants in the active layer. Furthermore, in the case of n-type dopants, the amount of diffusion is not large, so it was found that the concentration of n-type dopants incorporated during the growth of the active layer is directly linked to the amount of defects that become non-luminescent centers in the active layer, and methods for suppressing this were investigated.
[0034] As a result of extensive investigations, the inventors have found that the luminance life characteristics during current application can be improved by providing GaP layers or GaP substrates on both sides of a quaternary light-emitting layer of a compound semiconductor substrate and by setting the p-type impurity concentration and the n-type impurity concentration in the active layer of the quaternary light-emitting layer to not more than predetermined values, respectively, and have completed the present invention.
[0035] That is, the present invention provides a method for growing an n-type GaP substrate on which an Al x Ga 1-x ) y In 1-y a compound semiconductor substrate having a quaternary light-emitting layer in which at least an n-type cladding layer, an active layer, and a p-type cladding layer made of GaP (where 0≦x≦1, 0≦y≦1) are sequentially stacked, and a p-type GaP layer serving as a window layer is stacked on a second main surface of the quaternary light-emitting layer opposite to a first main surface on the n-type GaP substrate side; 15 (Atoms / cm 3 ) or less, the n-type impurity concentration is 7×10 15 (Atoms / cm 3 ) or less.
[0036] The present invention also provides a method for manufacturing a semiconductor device comprising: x Ga 1-x ) y In 1-y a p-type GaP layer serving as a window layer is laminated on the p-type cladding layer of the quaternary light-emitting layer; the p-type GaP layer is then laminated on the p-type cladding layer of the quaternary light-emitting layer; the substrate is removed; and an n-type GaP substrate is bonded to the surface from which the substrate was removed, or an n-type GaP layer is laminated; and the p-type impurity concentration in the active layer is adjusted to 9×10 15 (Atoms / cm 3 ) Hereinafter, the n-type impurity concentration is set to 7×10 15 (Atoms / cm 3 ) A method for manufacturing a compound semiconductor substrate, characterized in that:
[0037] The present invention will be described in detail below with reference to the drawings, but the present invention is not limited thereto.
[0038] [Compound Semiconductor Substrate] FIG. 1 is a schematic diagram showing a compound semiconductor substrate according to a first embodiment of the present invention.
[0039] On an n-type GaP substrate 11, (Al x Ga 1-x ) y In 1-y P (where 0≦x≦1, 0≦y≦1), an n-type cladding layer 12, an active layer 13, and a p-type cladding layer 14 are sequentially stacked on a quaternary light-emitting layer 15, and a p-type GaP layer 18 serving as a window layer is stacked on a second main surface 17 of the quaternary light-emitting layer 15 opposite to a first main surface 16 on the n-type GaP substrate 11 side. The p-type impurity concentration in the active layer 13 is 9×10 15 (Atoms / cm 3 ) or less, the n-type impurity concentration is 7×10 15 (Atoms / cm 3 ) below.
[0040] Such a compound semiconductor substrate 19 has GaP window layers (n-type GaP substrate 11 and p-type GaP layer 18) on both sides (first main surface 16 and second main surface 17) of quaternary light-emitting layer 15, respectively, thereby achieving high external quantum efficiency and high brightness. Second, the active layer 13 has low concentrations of both p-type and n-type impurities, thereby suppressing both the diffusion of p-type dopants contained in p-type cladding layer 14 into active layer 13 and the generation of crystal defects in active layer 13 due to n-type dopants contained in n-type cladding layer 12. As a result, when this compound semiconductor substrate 19 is applied to a light-emitting device, the amount of unnecessary dopant in active layer 13 is low, thereby reducing the number of defects formed by the dopants during conduction. This prevents defects from causing a decrease in carrier injection efficiency and an increase in light absorption, thereby improving the brightness lifetime during conduction.
[0041] Furthermore, although not particularly limited, the concentration of p-type impurities in the active layer 13 can be higher than the concentration of n-type impurities.
[0042] In this way, the p-type impurity concentration, which is more diffused during current flow than the n-type, is sufficiently suppressed (9×10 15(Atoms / cm 3 ) or less), and the n-type impurity concentration is (7 × 10 15 (Atoms / cm 3 ) below) is lower than the p-type impurity concentration, it is possible to reliably suppress both the diffusion of p-type dopants into the active layer 13 and the generation of crystal defects in the active layer 13 due to n-type dopants, thereby further improving the brightness life characteristics.
[0043] 2 is a schematic diagram showing a compound semiconductor substrate according to a second embodiment of the present invention. The second embodiment differs from the first embodiment in that a non-doped layer (n-side) 20 is provided on the n-side of the quaternary light-emitting layer 15.
[0044] Although not particularly limited, the quaternary light-emitting layer 15 has an undoped layer (n-side) 20 between the n-type cladding layer 12 and the active layer 13, and although the thickness of the undoped layer (n-side) 20 is not particularly limited, it is preferably 0.1 μm or more and 0.3 μm or less.
[0045] The presence of such a non-doped layer (n-side) 20 prevents direct contact between the n-type cladding layer 12 and the active layer 13, i.e., prevents continuous crystal growth. This reduces the n-type dopant concentration in the crystal growth reactor prior to crystal growth of the active layer 13, reducing the amount of n-type dopant taken up by the active layer 13 and suppressing the occurrence of crystal defects in the active layer 13. A thickness of the non-doped layer (n-side) 20 of 0.1 μm or more is preferable because it ensures good brightness life characteristics. Furthermore, a thickness of the non-doped layer (n-side) 20 of 0.3 μm or less is also preferable because it hardly causes deterioration in electrical characteristics.
[0046] 3 is a schematic diagram showing a compound semiconductor substrate according to a third embodiment of the present invention. The third embodiment differs from the second embodiment in that the compound semiconductor substrate has an undoped layer (p-side) 21 on the p-side of the quaternary light-emitting layer 15 in addition to an undoped layer (n-side) 20 on the n-side of the quaternary light-emitting layer 15.
[0047] Although not particularly limited, the quaternary light-emitting layer 15 has an undoped layer (p-side) 21 between the p-type cladding layer 14 and the active layer 13. The thickness of the undoped layer (p-side) 21 is not particularly limited, but is preferably 0.5 μm or more and 1.0 μm or less, and can be, for example, 0.8 μm.
[0048] The presence of such non-doped layer (p-side) 21 prevents direct contact between the p-type cladding layer 14 and the active layer 13, and therefore, when the p-type dopant in the p-type cladding layer 14 diffuses, it diffuses from the p-type cladding layer 14 to the non-doped layer (p-side) 21, which further suppresses diffusion into the active layer 13. A thickness of 0.8 μm for the non-doped layer (p-side) 21 is preferable because it ensures good brightness life characteristics.
[0049] Here, a method for measuring the impurity concentration will be described. The impurity concentration is not particularly limited, but the average value in the active layer 13 can be calculated based on the analysis results of D-SIMS (Dynamic SIMS). For example, in a compound semiconductor substrate having a structure as shown in FIG. 3, if the substrate has a double heterostructure made of a quaternary mixed crystal of AlGaInP using, although not particularly limited, Mg as a p-type dopant and, although not particularly limited, Si as an n-type dopant, an example of a D-SIMS profile will be shown in FIG. 4.
[0050] The horizontal axis of the graph in Figure 4 represents the depth relative to the measurement surface, and the vertical axis represents the concentration of each impurity. If the measurement surface is the top surface of the substrate, the layer is determined by the depth, so from left to right on the graph it shows the change in concentration of each impurity (Mg, Si) in each layer: p-type cladding layer, non-doped layer (p-side), active layer, non-doped layer (n-side), and n-type cladding layer.
[0051] Referring to FIG. 4, first, the concentration of the p-type dopant Mg is naturally high in the p-type cladding layer (2×10 17 (Atoms / cm 3 )), but it drops sharply in the non-doped layer (p-side), and the concentration is low in the active layer (10 15 It can be seen that it is a platform.
[0052] Furthermore, the concentration of the n-type dopant Si is naturally high in the n-type cladding layer (7×10 17 However, it drops sharply in the non-doped layer (n-side), and the concentration is low in the active layer (10 on average). 15 It can be seen that it is a platform.
[0053] Therefore, if an undoped layer of an appropriate thickness, but not too thick, is provided between the cladding layer and the active layer, the impurity concentration in the undoped layer can be rapidly reduced, and as a result, the impurity concentration in the active layer can be adjusted to a desired low concentration.
[0054] [Method for Manufacturing Compound Semiconductor Substrate] A method for manufacturing a compound semiconductor substrate as shown in FIG. 1 will now be described.
[0055] (Step 1) First, a substrate is prepared.
[0056] (Step 2) Next, (Al x Ga 1-x ) y In 1-y A quaternary light-emitting layer 15 is formed by sequentially stacking at least an n-type cladding layer 12 made of P (where 0≦x≦1, 0≦y≦1), an active layer 13, and a p-type cladding layer 14.
[0057] (Step 3) Next, a p-type GaP layer 18 serving as a window layer is laminated on the p-type cladding layer 14 of the quaternary light-emitting layer 15 .
[0058] (Step 4) Next, the substrate is removed, and an n-type GaP substrate is bonded to the surface from which the substrate was removed (first main surface 16 in FIG. 1), or an n-type GaP layer is laminated thereon. In the example of FIG. 1, an n-type GaP substrate 11 is bonded.
[0059] The compound semiconductor substrate 19 manufactured through the above steps has a p-type impurity concentration in the active layer 13 of 9×10 15 (Atoms / cm 3 ) Hereinafter, the n-type impurity concentration is set to 7×10 15 (Atoms / cm 3 ) or less.
[0060] In this way, in order to achieve a desired impurity concentration in the active layer 13 in the compound semiconductor substrate 19, although not particularly limited thereto, it is conceivable to appropriately adjust the dopant concentrations when stacking the n-type cladding layer 12 and the p-type cladding layer 14 in step 2, for example.
[0061] The substrate prepared in step 1 is not particularly limited, but may be a GaAs substrate.
[0062] This method of manufacturing the compound semiconductor substrate 19 first forms GaP (p-type GaP layer 18 and n-type GaP substrate 11 or n-type GaP layer) on both sides of the quaternary light-emitting layer 15, thereby increasing the external quantum efficiency and achieving high brightness. Second, the concentrations of both the p-type and n-type impurities in the active layer 13 are reduced, thereby suppressing both the diffusion of p-type dopants into the active layer 13 and the generation of crystal defects in the active layer 13 due to n-type dopants. As a result, when the manufactured compound semiconductor substrate 19 is used in a light-emitting device, the amount of unnecessary dopant in the active layer 13 can be reduced, thereby reducing defects formed by the dopants during conduction, preventing a decrease in carrier injection efficiency and an increase in light absorption due to defects, and improving the brightness life characteristics during conduction.
[0063] Although not particularly limited, it is preferable that the concentration of p-type impurities in the active layer 13 be higher than the concentration of n-type impurities.
[0064] In this way, the concentration of p-type impurities, which diffuse more during current flow than n-type impurities, is sufficiently suppressed, and the concentration of n-type impurities is further made lower than the concentration of p-type impurities. This makes it possible to reliably suppress both the diffusion of p-type dopants into the active layer 13 and the generation of crystal defects in the active layer 13 due to the n-type dopants, thereby further improving the brightness life characteristics.
[0065] Furthermore, although not particularly limited, when manufacturing a compound semiconductor substrate such as that shown in FIGS. 2 and 3 above, a non-doped layer (n-side) 20 is provided between the n-type cladding layer 12 and the active layer 13 of the quaternary light-emitting layer 15, and the thickness of the non-doped layer (n-side) 20 is not particularly limited, but is preferably 0.1 μm or more and 0.3 μm or less.
[0066] By including such a non-doped layer (n-side) 20, the n-type cladding layer 12 and the active layer 13 are not in direct contact, i.e., are not grown continuously, so that the n-type dopant concentration in the crystal growth reactor decreases before the crystal growth of the active layer 13, reducing the incorporation of n-type dopants into the active layer 13 and suppressing the occurrence of crystal defects in the active layer 13. Setting the thickness of the non-doped layer (n-side) 20 to 0.1 μm or more is preferable because it ensures good brightness life characteristics. Setting the thickness of the non-doped layer (n-side) 20 to 0.3 μm or less is also preferable because it hardly causes deterioration in electrical characteristics.
[0067] In the above-described method for manufacturing a compound semiconductor substrate, the quaternary light-emitting layer 15 can be formed by MOVPE, although this is not particularly limited.
[0068] Here, when epitaxially growing (also called epi-growth) the active layer of the quaternary light-emitting layer by MOVPE, although not particularly limited thereto, it is possible to suppress the incorporation of n-type impurities (n-type dopants) by controlling the amount of warpage of the wafer during the reaction, as will be described below with reference to FIG. 5 .
[0069] For example, when a double heterostructure made of a quaternary mixed crystal of AlGaInP is epitaxially grown on a GaAs substrate, an n-type cladding layer, an active layer, and a p-type cladding layer are laminated in this order.
[0070] In epitaxial growth, a wafer 23 is set on a susceptor 22 in a reactor as shown in FIG. 5 , and when an active layer is to be deposited, the supply of n-type dopant gas into the reactor is stopped. However, n-type dopant 25 is still present that has been re-evaporated from a precipitate 24 that has accumulated on the susceptor 22 up to that point.
[0071] During the reaction, the wafer 23 warps due to the difference in thermal expansion coefficient, and takes on a concave shape as shown in FIG. 5, and the temperature distribution within the surface of the wafer 23 changes accordingly.
[0072] In response to this, it is possible to suppress the incorporation of n-type impurities (n-type dopants) by appropriately changing the warpage of the wafer 23 to a desired shape by adjusting the growth temperature during epitaxial growth and the composition of the epitaxial layer to adjust the degree of lattice mismatch with the substrate (for example, by changing the In composition of AlGaInP).
[0073] The impurity concentration in the active layer is set to 9×10 15 (Atoms / cm 3 ) and below, the n-type impurity (dopant) concentration is 7×10 15 (Atoms / cm 3 ) or less, it is possible to sufficiently suppress the conventional problem of reduced brightness due to p-type dopant diffusion, and further improve the brightness life characteristics. This will be specifically described with reference to FIG.
[0074] FIG. 6 is a graph showing the correlation between the luminance life characteristics and the impurity concentration in a life test, in which Mg is used as a p-type dopant and Si is used as an n-type dopant.
[0075] From FIG. 6, it can be seen that the p-type impurity concentration is 9×10 15 (Atoms / cm 3 ) or less, there is almost no correlation between the p-type impurity concentration and the luminance lifetime characteristics. 15 ~2 x 10 16 (Atoms / cm 3 ) a good correlation can be obtained.
[0076] In reality, the p-type impurity concentration and n-type impurity concentration are determined for each product, so the p-type impurity concentration is 9×10 15 (Atoms / cm 3 ) or less, the lifetime characteristics are determined by the n-type impurity concentration. 15 (Atoms / cm 3 ) or less, and the n-type impurity concentration is 7×10 15 (Atoms / cm 3 ) the luminance life characteristics are 88% or more.
[0077] Furthermore, the n-type impurity concentration is increased to 3×10 15 (Atoms / cm 3 ), it can be seen from FIG. 6 that the luminance life characteristics can be improved to 94%.
[0078] In general, it has been thought that n-type dopants have extremely small impurity diffusion due to thermal history and current flow compared to p-type dopants, and therefore have only a minor effect on luminance life characteristics.
[0079] On the other hand, if a large amount of n-type impurities (dopants) is incorporated into the active layer during epitaxial growth using the MOVPE method, crystal defects increase, and in a lifespan test, rapid deterioration may occur, with the brightness decreasing to about half of the initial brightness within about 100 hours (this will be explained later in Comparative Example 2).
[0080] Since p-type dopants diffuse more easily into the active layer than n-type dopants, the carrier concentration of the p-type cladding layer is generally set lower than that of the n-type cladding layer.
[0081] On the other hand, as mentioned above, in order to realize a longer luminance life, it is preferable to make the concentration of n-type impurities lower than the concentration of p-type impurities in the active layer while suppressing the impurity of p-type dopants, and it has been shown that this can sufficiently suppress the influence of the fast degradation mode. The lower limit of the p-type impurity concentration in the active layer is not particularly limited, but is, for example, 3 × 10 15 (Atoms / cm 3 ) or more. The lower limit of the n-type impurity concentration in the active layer is not particularly limited, but may be, for example, 1×10 15 (Atoms / cm 3 ) or more.
[0082] Example 1 <Fabrication of Compound Semiconductor Substrate> A compound semiconductor substrate was fabricated as shown in Fig. 3. First, epitaxial growth of the following (1) to (8) was carried out by MOVPE.
[0083] (1) A Si-doped n-GaAs buffer layer (0.5 μm, 5.0 × 10 17 Atoms / cm 3 ) was grown.
[0084] (2) On top of that, as an n-type cladding layer, Si-doped n-AlGaInP (1.3 μm, 1.0 × 10 18 Atoms / cm 3 ) was grown.
[0085] (3) On top of this, non-doped i-AlGaInP (0.2 μm) was grown.
[0086] (4) On top of that, 9 pairs of non-doped i-AlGaInP (0.02 μm, well layer) and non-doped i-AlGaInP (0.02 μm, barrier layer) + non-doped i-AlGaInP (0.02 μm, well layer) were grown as the active layer.
[0087] (5) On top of this, non-doped i-AlGaInP (0.8 μm) was grown.
[0088] (6) On top of that, as a p-type cladding layer, Mg-doped p-AlGaInP (1.8 μm, 2.0 × 10 17 Atoms / cm 3 ) was grown.
[0089] (7) On top of that, a Mg-doped p-type GaP layer (1.6 μm, 2.0×10 17 Atoms / cm 3 From 2.0 x 10 18 Atoms / cm 3 This has led to the growth of the
[0090] (8) The source gases include TMAl, TMGa, TMIn, and AsH 3 , P.H. 3 , SiH 4 , Cp 2 The pressure inside the furnace was reduced to 100 hPa or less, and the growth temperature was 690°C.
[0091] (9) Next, a Zn-doped p-type GaP layer (60 μm, 8.0×10 17 Atoms / cm 3 ) was grown.
[0092] (10) Next, the GaAs substrate and the n-GaAs buffer layer were removed, and an n-type GaP substrate was bonded to the GaAs substrate. This completed the compound semiconductor substrate of Example 1.
[0093] <Fabrication of Light-Emitting Device> Next, a first (p) electrode and a second (n) electrode were formed on the compound semiconductor substrate by vacuum deposition, and a bonding pad was placed on the first electrode, followed by baking at an appropriate temperature to fix the electrodes. Thereafter, the substrate was diced into chips, and the second electrode was fixed to a terminal electrode that also served as a support using a conductive paste such as an Ag base, while an Au wire was bonded across the bonding pad and another terminal electrode, and a resin mold was then formed to fabricate a light-emitting device.
[0094] <Method for Evaluating Light-Emitting Device> In order to evaluate the characteristics of the fabricated light-emitting device, the following evaluations were carried out.
[0095] First, to evaluate the initial brightness, the omnidirectional light output when a direct current of 20 mA was applied was measured using an integrating sphere. Then, to evaluate the lifespan characteristics, the brightness was evaluated after 100 hours in an accelerated test with a direct current of 50 mA and an ambient temperature of 85°C, and the deterioration of the initial brightness was evaluated.
[0096] Before the accelerated test, the light emitting device was subjected to D-SIMS measurement to evaluate the impurity concentration in the active layer.
[0097] Comparative Example 1 Fabrication and evaluation were carried out in the same manner as in Example 1, except that the thickness of the non-doped (n-side) i-AlGaInP in (3) above was set to 0.1 μm.
[0098] Comparative Example 2 Fabrication and evaluation were carried out in the same manner as in Example 1, except that the thickness of the non-doped (n-side) i-AlGaInP in (3) above was set to 0 μm (none).
[0099] Comparative Example 3: As the p-type cladding layer of the above (6), Mg-doped p-AlGaInP (1.8 μm, 3.0×10 17 Atoms / cm 3 The fabrication and evaluation were carried out in the same manner as in Example 1, except that the above-mentioned step (1) was changed to the above-mentioned step (2).
[0100] Example 2 The fabrication and evaluation were carried out in the same manner as in Example 1, except that the thickness of the non-doped (n-side) i-AlGaInP in (3) above was 0.1 μm and the growth temperature in (8) above was 700° C.
[0101] Comparative Example 4 The fabrication and evaluation were carried out in the same manner as in Example 1, except that the thickness of the non-doped (n-side) i-AlGaInP in (3) above was 0.1 μm and the growth temperature in (8) above was 710° C.
[0102] <Evaluation Results> First, Table 1 shows the luminance lifetime characteristics and the impurity concentration in the active layer for Example 1, Comparative Example 1, Comparative Example 2, and Comparative Example 3 when the thickness of the non-doped (n-side) i-AlGaInP in (3) above and the carrier concentration of the p-type cladding layer in (6) above were changed.
[0103]
[0104] First, in Example 1, the p-type impurity concentration is 9×10 15 (Atoms / cm 3 ) or less, the n-type impurity concentration is 7×10 15 (Atoms / cm 3 ) or less, and the luminance life characteristics were 92.9%, which was an extremely good result.
[0105] Next, in Comparative Examples 1 and 2, the p-type impurity concentration was 9×10 15 (Atoms / cm 3 ) or less, but the n-type impurity concentration is 7×10 15 (Atoms / cm 3 ) and the luminance life characteristics were worse at 88.9% and 48.6%.
[0106] Next, in Comparative Example 3, the p-type impurity concentration was 9×10 15 (Atoms / cm 3 ) and the n-type impurity concentration is 7×10 15(Atoms / cm 3 ) or less, the luminance life characteristics were poor at 86.8%.
[0107] Comparing Comparative Example 1 and Example 1, the thickness of the non-doped layer (n-side) is 0.1 μm in Comparative Example 1 and 0.2 μm in Example 1. By increasing the thickness of the non-doped layer (n-side), the impurity (Si, which is an n-type dopant) concentration in the active layer is reduced to 7×10 15 (Atoms / cm 3 ) or less, which is thought to have resulted in a favorable result of luminance life characteristics of 90% or more.
[0108] In Comparative Example 2, the non-doped layer (n-side) was omitted, and the luminance life characteristics were significantly deteriorated. The absence of the non-doped layer (n-side) led to the incorporation of a large amount of n-type impurities (dopants) into the active layer, which is thought to have increased crystal defects and caused rapid deterioration in the life test, with the luminance dropping to about half of the initial level.
[0109] Furthermore, in Comparative Example 3, the carrier concentration of p-AlGaInP was 3.0×10 17 (Atoms / cm 3 ), that is, the concentration of Mg, a p-type impurity in the active layer, was intentionally increased, and the p-type impurity concentration was 9×10 15 (Atoms / cm 3 ) and therefore the luminance life characteristics are thought to have deteriorated.
[0110] Here, we will further consider the influence of the thickness of the non-doped layer (n-side). If the non-doped layer (n-side) is made thicker, the resistance value of the light-emitting device increases, and the forward voltage increases (deteriorates). If the non-doped layer (n-side) is made thicker, the Si concentration in the active layer decreases, but the increase in forward voltage becomes non-negligible. Therefore, it is not possible to make the layer thicker without limit.
[0111] Table 2 shows the luminance lifetime characteristics and the forward voltage (normalized with Example 1 set to 1.00) when a forward current of 20 mA is applied when the thickness of the non-doped layer (n-side) is changed.
[0112]
[0113] When the thickness of the non-doped layer (n-side) is in the range of 0.06 to 0.3 μm, the forward voltage is the same, but at a thickness of 0.6 μm, it increases by 1% or more.
[0114] Therefore, although not particularly limited, the thickness of the non-doped layer (n-side) is preferably 0.3 μm or less in order to suppress the influence on the forward voltage.
[0115] Although not particularly limited, the thickness of the non-doped layer (n-side) is preferably 0.1 μm or more in order to avoid deterioration of the luminance life characteristics.
[0116] Next, Table 3 shows the luminance lifetime characteristics and impurity concentrations in the active layer for Example 2, Comparative Example 1, and Comparative Example 4 when the thickness of the non-doped layer (n-side) is fixed at 0.1 μm and the growth temperature is changed.
[0117]
[0118] First, in Example 2, the p-type impurity concentration is 9×10 15 (Atoms / cm 3 ) or less, the n-type impurity concentration is 7×10 15 (Atoms / cm 3 ) or less, and the luminance life characteristics were 91.9%, which was an extremely good result.
[0119] Next, in Comparative Example 1 and Comparative Example 4, the p-type impurity concentration was 9×10 15 (Atoms / cm 3 ) or less, but the n-type impurity concentration is 7×10 15 (Atoms / cm 3 ) and the luminance life characteristics were worse at 88.9% and 79.5%.
[0120] The growth temperature was set to 700° C. in Example 2 and 690° C. in Comparative Example 1. When the growth temperature is lowered in this way, the wafer warpage (concave shape) during the reaction increases, and the wafer temperature decreases, which reduces the amount of re-evaporation of the n-type dopant from the wafer and increases the concentration of impurities (Si, which is an n-type dopant) in the active layer, which increases the occurrence of crystal defects due to the impurities, and is thought to result in a deterioration in life characteristics.
[0121] Furthermore, the growth temperature was 710°C in Comparative Example 4, compared to 700°C in Example 2. When the growth temperature is increased in this way, wafer warpage (concave shape) during the reaction is reduced and the wafer temperature does not decrease, but the amount of re-evaporation of n-type dopant from precipitates in the furnace increases, increasing the incorporation of impurities (Si as n-type dopant), and presumably deteriorating the life characteristics.
[0122] In summary, in Examples 1 and 2, the p-type impurity concentration in the active layer is 9×10 15 (Atoms / cm 3 ) or less, the n-type impurity concentration is 7×10 15 (Atoms / cm 3 ) or less, which indicates that the luminance life characteristics are good.
[0123] Furthermore, comparing Example 1 and Example 2 with reference to Tables 1 and 3, it was found that Example 1, in which the p-type impurity concentration in the active layer was higher than the n-type impurity concentration, had better brightness life characteristics. This means that when the p-type impurity concentration was sufficiently suppressed, the n-type impurity concentration was lower than the p-type impurity concentration, and it is believed that this reliably suppresses both the diffusion of p-type dopants into the active layer and the occurrence of crystal defects in the active layer due to n-type dopants, thereby further improving brightness life characteristics.
[0124] Furthermore, both Examples 1 and 2 have a non-doped layer between the n-type cladding layer and the active layer, and the thickness of this non-doped layer is in the range of 0.1 μm to 0.3 μm. The evaluation results of Examples 1 and 2 showed that in addition to having good luminance life characteristics, there was almost no deterioration in electrical characteristics, which was more preferable.
[0125] The present invention is not limited to the above-described embodiments. The above-described embodiments are merely examples, and any configuration that is substantially identical to the technical idea described in the claims of the present invention and that provides similar effects is included within the technical scope of the present invention.
Claims
1. On an n-type GaP substrate, (Al x Ga 1-x ) y In 1-y a compound semiconductor substrate having a quaternary light-emitting layer in which at least an n-type cladding layer, an active layer, and a p-type cladding layer made of GaP (where 0≦x≦1, 0≦y≦1) are sequentially stacked, and a p-type GaP layer serving as a window layer is stacked on a second main surface of the quaternary light-emitting layer opposite to a first main surface on the n-type GaP substrate side, wherein a p-type impurity concentration in the active layer is 9×10 15 (Atoms / cm 3 ) or less, the n-type impurity concentration is 7×10 15 (Atoms / cm 3 ) or less.
2. The compound semiconductor substrate according to claim 1, wherein the concentration of p-type impurities in said active layer is higher than the concentration of n-type impurities.
3. The compound semiconductor substrate according to claim 1 or 2, characterized in that the quaternary light-emitting layer has an undoped layer between the n-type cladding layer and the active layer, and the thickness of the undoped layer is 0.1 μm or more and 0.3 μm or less.
4. On the substrate, (Al x Ga 1-x ) y In 1-y a quaternary light-emitting layer is formed by sequentially stacking at least an n-type cladding layer, an active layer, and a p-type cladding layer each made of GaP (where 0≦x≦1, 0≦y≦1); a p-type GaP layer serving as a window layer is stacked on the p-type cladding layer of the quaternary light-emitting layer; the substrate is removed; and an n-type GaP substrate is bonded to the surface from which the substrate was removed, or an n-type GaP layer is stacked; 15 (Atoms / cm 3 ) Hereinafter, the n-type impurity concentration is set to 7×10 15 (Atoms / cm 3 1. A method for manufacturing a compound semiconductor substrate, comprising:
5. The method for manufacturing a compound semiconductor substrate according to claim 4, wherein the concentration of p-type impurities in the active layer is higher than the concentration of n-type impurities.
6. The method for manufacturing a compound semiconductor substrate according to claim 4 or 5, characterized in that a non-doped layer is provided between the n-type cladding layer and the active layer of the quaternary light-emitting layer, and the thickness of the non-doped layer is 0.1 μm or more and 0.3 μm or less.
Citation Information
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