Solid-state frisch grid device based on perovskite material, and preparation method therefor

Abstract

The present invention belongs to the field of semiconductor detection, and specifically relates to a solid-state Frisch grid device based on a perovskite material, and a preparation method therefor. On the basis of inherent defects of existing virtual Frisch grid structures, provided in the present invention is a solid-state Frisch grid device based on a perovskite semiconductor material. The specific preparation method comprises: a direct growth method using a solution method, a mechanical fabrication method, etc. The weight potential field distribution of a device is greatly limited at a grid location, which indicates that a grid can provide a good charge shielding effect. Moreover, by comparing weight potential distributions at different grids, it can be seen that the solid-state Frisch grid structure used in the present invention can realize a more uniform and near-ideal weight potential field distribution by means of the adjustment of grid parameters. In addition, by means of further analyzing signals from an anode, a cathode and a gate in an individual event, more accurate information, such as pulse rise time information and radiation interaction location information, can be obtained.

Description

A solid-state frisch grid device based on perovskite material and a preparation method thereof TECHNICAL FIELD

[0001] The present application belongs to the field of semiconductor detection, and particularly relates to a solid-state frisch grid device based on perovskite material and a preparation method thereof. BACKGROUND

[0002] The gas ionization chamber is one of the earliest used detectors in nuclear science applications, and its working principle is that under the condition of radiation, a large number of electron-ion pairs are generated through ionization or excitation of gas molecules, and relevant radiation information is obtained by detecting the generated electrons and positive ions, and it has the characteristics of simple structure, convenient production, etc. In the gas ionization chamber, the effective mass and volume of the electron are much smaller than those of the positive ion, and the electron has a larger average free path, therefore, most of the gas ionization chambers are mainly collected by electrons. However, the electron will collide and be captured to form a negative ion in the process of movement, resulting in diffusion, adsorption, recombination, drift and other charge effects in the gas ionization chamber, resulting in charge loss of the carrier in the transmission process.

[0003] In gas ionization chamber, the effective mass of electron is smaller, and under the effect of multiple charge effects, its drift speed is about 3 orders of magnitude higher than that of positive ions. Therefore, when the electron drifts to the anode, the positive ions will still induce a slower induced signal, which is not conducive to the rapid measurement of the pulse signal, and this phenomenon is particularly significant when detecting particles with ionization trajectory direction (Fig. 1a and b). To solve this problem, Frisch (Frisch O. British atomic energy report br-49 [J]. Atomic Energy Research Establishment: Harwell, UK, 1944.) proposed a Frisch grid device structure (Fig. 1c), which establishes electrostatic shielding in the gas medium through a metal grid, which can effectively shield the induced signal of positive ions during the drift process, thereby realizing the signal collection of single carrier (electron). Experiments have proved that through the charge shielding of positive ions, the device structure can speed up the time response of the device (Fig. 1d). Specifically, as shown in Fig. 1a, the weight potential field of the planar device is linearly distributed, and the huge difference in the mobility of the two carriers will seriously affect the charge collection time of the rays at different positions, causing the difference in the order of the induced charge termination nodes, thereby affecting the final amplitude (Fig. 1b). In comparison, Fig. 1c shows the weight potential distribution of the Frisch grid detector with electrostatic shielding grid, in which the grid can effectively shield the induced charge of slow carriers, so that the amplitude of the device only depends on the fast carriers, so that the rise time and amplitude of the induced carriers of the rays at different positions are basically consistent (Fig. 1d), so that the device can more accurately reflect the energy of the rays.

[0004] Similar to gas ionization chamber, semiconductor detector (i.e. solid ionization chamber) uses solid semiconductor material as medium, and the difference between the electron and hole carriers is caused by the inconsistent electrostatic interaction between the atoms of the material. Due to the limitation of material synthesis and processing technology, it is still impossible to embed shielding grid in semiconductor, so it is impossible to realize solid Frisch grid detector similar to gas ionization chamber detector. In 1998, McGregor (Mcgregor D, He Z, Seifert H, et al. CdZnTe semiconductor parallel strip Frisch grid radiation detectors[J]. IEEE Transactions on Nuclear Science, 1998, 45(3): 443-449.) used cadmium zinc telluride (CdZnTe) crystal to realize virtual Frisch grid structure by referring to gas ionization chamber. As shown in Fig. 2a, the virtual Frisch grid device is a planar device structure composed of cathode, semiconductor material and anode; then, an insulating layer is wrapped outside the crystal to shield the charge between the collector and the Frisch grid; finally, the Frisch grid (metal electrode) is wrapped near the collector side to obtain the charge shielding effect on the collector side. Further research shows that adding an insulating layer between the crystal and the grid can effectively reduce the absorption of the grid to the carriers, and the thickness of the insulating layer is thin, which is equivalent to a capacitor, and the grid can still induce signals during the carrier drift (Montémont G, Argues M, Verger L, et al. A capacitive Frisch grid structure for CdZnTe detectors[C]. 2000 IEEE Nuclear Science Symposium. Conference Record (Cat. No. 00CH37149), 2000: 4 / 9-412.).Subsequently, virtual Frisch grid structures have also been applied to semiconductor crystals such as TlBr (Hitomi K, Tada T, Onodera T, et al. TlBr capacitive Frisch grid detectors[J]. IEEE Transactions on Nuclear Science, 2012, 60(2): 1156-1161.) and CdZnTeSe (Roy UN, Camarda GS, Cui Y, et al. Evaluation of CdZnTeSe as a high-quality gamma-ray spectroscopic material with better compositional homogeneity and reduced defects[J]. Scientific reports, 2019, 9(1): 7303.) to improve the energy spectrum performance of detectors. However, existing unipolar devices (hemispherical, pixel-type devices, etc.), including virtual Frisch grids, still widely suffer from problems such as uneven weighted potential fields and incomplete signal shielding, which discretize the distribution characteristics of the collected signal. Therefore, developing and optimizing the weighted potential field distribution of devices based on semiconductor materials is of great scientific significance and practical value for obtaining accurate energy spectrum information and reducing signal rise time.

[0005] Novel halide perovskite semiconductors, with their excellent carrier transport performance and defect tolerance, are expected to become next-generation room-temperature semiconductor nuclear radiation detection materials. A unique advantage of halide perovskites is their ability to be fabricated using low-temperature solution methods, resulting in more flexible device structures and significantly reduced manufacturing costs. Based on the high defect tolerance of halide perovskites, a shielding effect can be more effectively introduced during crystal growth by incorporating wire electrodes or gates, thereby optimizing the weighted potential field and ultimately realizing a true solid-state Frisch gate device structure (Figure 3). To date, traditional room-temperature semiconductor detectors use virtual Frisch gate structures to optimize the weighted potential field. Taking cadmium zinc telluride (CZT) as an example, its device structure is shown in Figure 2a. In this structure, the cathode, CZT, and anode form a simple planar (sandwich) device structure, with the anode serving as the electron collector. An insulating layer is then wrapped around the CZT crystal, and a metal layer is wrapped near the anode as the gate.

[0006] In addition, researchers have also developed other unipolar detection devices for semiconductors, such as hemispherical, pixel-type, and coplanar gates. These devices have a weighted potential field distribution at the collection electrode that is similar to that of a virtual Frisch gate device.

[0007] To date, no true solid-state Frisch gate device has been realized in traditional compound semiconductor detectors (such as CdTe and CdZnTe). Summary of the Invention

[0008] The disadvantages of existing technologies are as follows:

[0009] 1. As shown in Figure 2a, existing virtual Frisch gate device structures are mainly based on planar devices. From the perspective of weighted potential field optimization, the only adjustable parameters are the insulation layer thickness and height, and the gate height. Since the virtual Frisch gate only acts on the outer layer of the device, the effect of adjusting these parameters on the optimization of the weighted potential field is limited. As shown in Figure 2b, the weighted potential of the virtual Frisch gate device is not uniform in the X and Y axes. That is, the weighted potential distribution at the center tends to be more dispersed towards the cathode, while the weighted potential distribution at the edge tends to be more concentrated towards the anode. This non-uniformity of the weighted potential field leads to inconsistent shielding effects at different locations, resulting in a complex pulse shape distribution and further limiting its application range. Moreover, the pulse waveform contains information such as the depth of the ray and the drift time of the charge carriers. This non-uniform weighted potential field will seriously reduce the temporal and spatial resolution of the device.

[0010] 2. To ensure effective shielding, virtual Frisch gate devices have relatively strict requirements on crystal size and gate height. Generally, the crystal of a virtual Frisch gate device needs to have equal length and width, and a height twice the length and width, while the gate height must be greater than or equal to the length and width to achieve a good shielding effect. Therefore, virtual Frisch gate devices are suitable for cuboid crystals and restrict the electrode orientation, making it difficult to achieve weighted potential optimization using large-area, low-height crystals.

[0011] 3. In hemispherical devices, due to the uneven distribution of electric field, the pulse shape varies greatly, and it is currently impossible to further electronically correct the signal.

[0012] 4. In pixel-type devices, unipolar signal sensitivity is mainly achieved through the small pixel effect, requiring at least N pixels. 2 The number of electronic readout channels (N being the number of pixels) significantly increases the design and readout complexity of the electronic system. Due to the expansion of the weighted potential field, the induced charge regions between different pixels overlap, leading to charge sharing events and further increasing the difficulty of signal processing.

[0013] To address the aforementioned technical problems, this application provides the following technical solution:

[0014] This invention provides a solid-state Frisch gate device based on perovskite material, comprising a crystal and a grid embedded inside the crystal; the crystal has an anode and a cathode at its two ends, and the grid, anode, and cathode are arranged in parallel.

[0015] The grid consists of several layers of gate metal sheets and an insulating layer that wraps the metal sheets. The gate metal sheets are disposed between the cathode and anode of the crystal. The crystal is selected from three-dimensional organic-inorganic hybrid perovskite, all-inorganic perovskite, two-dimensional perovskite, zero-dimensional perovskite, or double perovskite.

[0016] Preferably, the chemical formula of the three-dimensional organic-inorganic hybrid perovskite and the all-inorganic perovskite is APbX3, wherein A is selected from, but is not limited to, methylamine cations (MA). + ), formamidinium cation (FA) + ) or Cs + X is selected from F - Cl - ,Br - or I - The chemical formula of the two-dimensional perovskite is A3B2X9, where A is selected from, but is not limited to, ammonium ions (NH4+). + ), methylamine cation (MA) + ), formamidinium cation (FA) + ), Cs + or Rb + B is selected from Sb 3+ Or Bi 3+ X is selected from Br - or I - The chemical formula of the zero-dimensional perovskite is Cs3Bi2I9, Cs2TeI6 or Cs2TeBr6; the chemical formula of the double perovskite is Cs2AgBiBr6.

[0017] Preferably, the material of the gate metal sheet is selected from, but is not limited to, gold, copper, tungsten, or stainless steel.

[0018] Preferably, the shape of the grid is selected from one or more of the following: wire type, strip type, mesh type, hole type and honeycomb type.

[0019] The gate structure in this invention includes, but is not limited to, different regular or irregular metal patterns such as wire, strip, mesh, hole, and honeycomb, as well as combinations of the above different patterns (as shown in ad of Figure 3).

[0020] Preferably, the thickness of the grid is 1 nm-50 mm.

[0021] Preferably, the thickness of the insulating layer is 0-500μm. Depending on the actual needs, there may be cases where an insulating layer is not required.

[0022] Preferably, the material of the insulating layer is selected from inorganic insulating materials or organic insulating materials; the inorganic insulating materials are selected from, but are not limited to: AlN, Al2O3 or SiO2, and the organic insulating materials are selected from, but are not limited to: type C pyrene, type N pyrene, polytetrafluoroethylene, paraffin or acrylic.

[0023] Preferably, the materials of the anode and cathode are selected from, but are not limited to, platinum, gold, silver, gallium, indium, lead or bismuth.

[0024] The present invention also provides a method for fabricating the above-mentioned solid-state Frisch gate device based on perovskite material, wherein the fabrication method is selected from, but is not limited to, one or more of: solution direct crystal growth, machining and crystal bonding;

[0025] The solution-based direct crystal growth method includes the following steps:

[0026] S11: After placing the grid on top of the bottom crystal, the crystal is grown in the precursor solution;

[0027] S12: An anode and a cathode are fabricated at the top and bottom of the crystal grown in step S11, respectively, to obtain the solid-state Frisch gate device based on perovskite material;

[0028] The machining method includes the following steps:

[0029] S21: After cutting the underlying crystal to form cutting grooves, the grid is embedded;

[0030] S22: The crystal with the embedded grid in step S21 is placed in the precursor solution for growth;

[0031] S23: An anode and a cathode are fabricated at the top and bottom of the crystal grown in step S22, respectively, to obtain the solid-state Frisch gate device based on perovskite material;

[0032] The crystal bonding method includes the following steps:

[0033] S31: After coating the surface of the underlying crystal A with a precursor solution, a grid is covered;

[0034] S32: Cover the top of the bottom crystal A after the grid is covered in step S31 with the stacked crystal B;

[0035] S33: Under the action of the precursor solution, crystal C is grown in the gap between the bottom crystal A and the stacked crystal B in step S32 to obtain a crystal with an embedded grid; the composition of crystal C and stacked crystal B is the same as that of the bottom crystal A.

[0036] S34: An anode and a cathode are fabricated at the top and bottom of the crystal with the embedded gate, respectively, to obtain the solid-state Frisch gate device based on perovskite material.

[0037] Preferably, in the precursor solution, the solvent is an organic solvent, and the solute is a number of metal salts; the cations and anions in the metal salts are both selected from the chemical elements in the crystal.

[0038] Furthermore, depending on the properties of the perovskite crystals, the organic solvent is selected from solutions that can dissolve perovskite materials, including but not limited to one or more of dimethyl sulfoxide (DMSO), N,N-dimethylformamide (DMF), and γ-butyrolactone (GBL).

[0039] Preferably, the organic solvent is dimethyl sulfoxide (DMSO).

[0040] Specifically, the Frisch gate device structure proposed in this invention can be fabricated in various ways, including but not limited to the following three, which are illustrated below using cesium lead bromide (CsPbBr3) perovskite crystal as an example:

[0041] Example 1 of the complete technical process of this invention is shown in Figure 4. The specific steps are as follows:

[0042] 1. Seed crystal growth. As shown in Figure 4a, a DMSO solution with a CsBr to PbBr2 molar ratio of 1:2 was used as the precursor solution to grow CsPbBr3 seed crystals at a concentration of 0.9 mol / L, and suitable seed crystals were selected for subsequent crystal growth;

[0043] 2. Over-gate growth. As shown in Figure 4b, a grid with an insulating layer is placed on top of a CsPbBr3 seed crystal, and the seed crystal continues to grow in the precursor solution. Growth is stopped when the seed crystal has grown to completely cover the grid and has a certain size, as shown in Figure 4c.

[0044] 3. Device fabrication. The CsPbBr3 crystal containing the grid was removed from the solution, and gold and gallium-indium alloys were fabricated on the top and bottom surfaces of the crystal as the cathode and anode, respectively (d and e in Figure 4), thus obtaining a solid-state Frisch gate detector based on the CsPbBr3 crystal.

[0045] 4. Device Testing. As shown in Figure 4f, a negative high voltage is applied to the cathode (gold electrode) and a positive high voltage is applied to the anode (gallium indium alloy electrode) of the solid-state Frisch gate detector. The gate is grounded or no voltage is applied. The signal on the electrode is connected to the readout system to obtain the pulse waveform information or energy spectrum of the device.

[0046] Example 2 of the gate fabrication technology process of the present invention is shown in Figure 5. The specific steps are as follows:

[0047] 1. Crystal preparation. Select CsPbBr3 single crystals with suitable length, height, and width dimensions for fabrication of solid-state Frisch gate detectors, as shown in Figure 5a;

[0048] 2. Crystal processing. As shown in Figure 5b, diamond wire cutting and laser cutting processes are used to process one side of the CsPbBr3 crystal to match the grid.

[0049] 3. Embedding the grid. A grid of a certain size and shape is placed into the cutting groove, closely adhering to the crystal, as shown in Figure 5c;

[0050] 4. Crystal regrowth. The CsPbBr3 crystal with embedded grid is placed in the DMSO precursor solution to allow the CsPbBr3 crystal to grow and fill the processed cutting groove, so that the grid is embedded inside the crystal, as shown in Figure 5d;

[0051] 5. For subsequent device fabrication and testing, refer to df in Figure 4.

[0052] Example 3 of the gate fabrication technology process of the present invention is shown in Figure 6. The specific steps are as follows:

[0053] 1. Crystal preparation. As shown in Figure 6a, CsPbBr3 crystals A and B with suitable shapes and sizes were selected for the fabrication of a solid-state Frisch gate detector;

[0054] 2. Solution addition. As shown in Figure 6b, a DMSO precursor solution is added dropwise to the upper surface of CsPbBr3 crystal A for subsequent growth;

[0055] 3. Covering the grid and crystal. As shown in Figure 6c, a grid of a certain size and shape and CsPbBr3 crystal B are sequentially covered on CsPbBr3 crystal A and the precursor solution;

[0056] 4. Interstitial growth. As shown in Figure 6d, under the action of the precursor solution, CsPbBr3 grows in the interstitial space between crystals A and B, and the two crystals A and B are connected, finally obtaining a CsPbBr3 crystal with an embedded grid.

[0057] 5. For subsequent device fabrication and testing, refer to df in Figure 4.

[0058] To address the inherent defects of existing virtual Frisch gate structures, this invention proposes a solid-state Frisch gate device based on perovskite semiconductor materials. Specific fabrication methods include direct growth using solution methods and mechanical processing. Figure 3(ad) shows four different gate types (note: not limited to these four types, but also including honeycomb, irregular polygonal, etc.), and the corresponding weighted potential field distribution in the Y and Z directions at X = 1.5 mm is shown in Figure 3(eh). It is evident from the figures that the weighted potential field distribution of the device is significantly restricted at the gate location, indicating that the gate provides excellent charge shielding. Furthermore, comparing the weighted potential distributions of different gates reveals that the solid-state Frisch gate structure used in this invention can achieve a more uniform and near-ideal weighted potential field distribution by adjusting the gate parameters. Additionally, further analysis of the anode, cathode, and gate signals of independent events can yield more accurate pulse rise time information and ray application location information.

[0059] The solid-state Frisch gate structure of this invention is applicable to perovskite crystals of all sizes and can serve as one of the optimal optimization schemes for the weighting potential field of semiconductor detectors. Moreover, compared to pixel-type devices, the readout system of the solid-state Frisch gate device is very simple, requiring only single-channel readout, and the pulse waveform, in principle, does not require complex electronic corrections.

[0060] The technical solution of the present invention has the following advantages compared with the prior art:

[0061] This invention utilizes the low-temperature solution-based preparation of halide perovskites, which exhibits high defect tolerance, to directly grow crystals with Frisch gate structures, thereby realizing true solid-state Frisch gate device structures and solving the following problems:

[0062] 1. Compared with existing unipolar devices, in this invention, since the gate structure is directly embedded inside the crystal, the distribution of the weighted potential field and its shielding effect can be effectively controlled, thereby improving the time resolution of the device, as shown in Figure 3.

[0063] 2. In this invention, by adjusting gate parameters such as gate height (distance between gate and collector), gate thickness, gate aperture, and insulating layer thickness, different weighted potential field distributions can be obtained, resulting in a more uniform and controllable distribution. Specifically, a thinner gate has less impact on crystal growth, which is beneficial for obtaining larger crystals and increasing the detection volume; however, the shielding effect increases with increasing gate thickness. A smaller distance between the gate and collector leads to a more concentrated weighted potential at the collector. A denser gate (smaller aperture) results in a more uniform distribution of the weighted potential in the horizontal plane. Compared to virtual Frisch gate devices, this invention allows for a wider range of applicable crystal sizes.

[0064] 3. The embedded gate structure in the crystal improves the uniformity of the weighted potential field distribution, making the signal inflection point at the gate more distinct. The position of the ray between the gate and non-collector electrodes can be determined based on the drift time; therefore, this invention has higher spatial resolution compared to a virtual Frisch gate.

[0065] 4. Compared to pixel-type devices, the structure of this invention is based on an improvement of planar devices, with only three readout electrodes: cathode, anode, and gate, which greatly simplifies the readout difficulty of the back-end electronics. Attached Figure Description

[0066] Figure 1 shows (a) a schematic diagram of a planar device and its internal weighted potential field distribution; (b) a schematic diagram of the rise time and amplitude of different ray positions in a planar device; (c) a schematic diagram of a Frisch gate device and its internal weighted potential field distribution; and (d) a schematic diagram of the rise time and amplitude of different ray positions in a Frisch gate device.

[0067] Figure 2 shows (a) a schematic diagram of the virtual Frisch gate device structure of a cadmium zinc telluride crystal; and (b) the cross-sectional weighted potential field distribution of a cadmium zinc telluride virtual Frisch gate detector with a crystal size of 3.1×3.1×4.0mm and a gate height of 1mm at X=1.5mm.

[0068] Figure 3 shows schematic diagrams of Frisch grating structures of mesh type (a), aperture type (b), strip aperture type (c), and wire type (d), and (eh) is the cross-sectional weighted potential field distribution diagram of the corresponding solid-state Frisch grating detector at X = 1.5 mm.

[0069] Figure 4 shows a schematic diagram of the fabrication of a solid-state Frisch gate device based on CsPbBr3 crystal: (a) seed crystal growth; (b) adding the gate; (c) through-gate growth; (d) cathode fabrication; (e) anode fabrication; (f) signal collection.

[0070] Figure 5 shows a schematic diagram of the fabrication of a solid-state Frisch gate device based on CsPbBr3 crystal: (a) crystal preparation; (b) crystal processing; (c) embedding the gate; (d) crystal regrowth.

[0071] Figure 6 shows a schematic diagram of the fabrication of a solid-state Frisch gate device based on CsPbBr3 crystal: (a) crystal preparation; (b) adding CsPbBr3 growth precursor solution; (c) covering the gate and crystal; (d) crystal regrowth.

[0072] Figure 7 shows (a) the weighted potential distribution of a grid-type solid-state Frisch gate device at different gate heights, with the weighted potential increasing sharply near the gate; (b) a comparison of the cathode, anode, and gate pulse waveforms of the solid-state Frisch gate device, with the inset showing the CsPbBr3 solid-state Frisch gate crystal grown in Example 1; and (c) a CsPbBr3 solid-state Frisch gate detector. 137Scatter plot of Cs pulse height versus drift time distribution; (d) Height-corrected 137 Cs energy spectrum. Detailed Implementation

[0073] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, so that those skilled in the art can better understand and implement the present invention. However, the embodiments described are not intended to limit the present invention.

[0074] Example 1

[0075] CsBr and PbBr2 in a molar ratio of 1:2 were dissolved in DMSO solution at a concentration of approximately 0.9 mol / L. The solution was heated to 60°C and stirred until completely dissolved. The solution was filtered through a 0.22 μm PTEE filter to obtain a clear, saturated precursor solution. CsPbBr3 crystals were then grown using a reverse-temperature crystallization method. When the crystals grew to approximately 1 mm, a copper mesh gate (0.05 mm thick) with a 10 μm thick Al2O3 insulating layer was placed on top of the crystal. The crystal continued to grow in the precursor solution, passing through the mesh. Once the mesh was perfectly embedded in the crystal and the crystal reached a certain size, it was removed. A cathode was fabricated using gold paste on the lower surface of the crystal, and an anode was fabricated using gallium-indium alloy on the upper surface, resulting in a mesh-type solid-state Frisch gate device based on the CsPbBr3 crystal. The signals from the cathode, anode, and gate were led out through wires. A negative high voltage was applied to the cathode, a positive high voltage to the anode, and no voltage was applied to the gate. The signal response and energy spectrum of the device were then measured.

[0076] Example 2

[0077] CsBr and PbBr2 in a molar ratio of 1:2 were dissolved in DMSO solution at a concentration of approximately 0.9 mol / L. The solution was heated to 60°C and stirred until completely dissolved. The solution was filtered through a 0.22 μm PTEE filter to obtain a clear, saturated precursor solution. CsPbBr3 crystals were then grown using a reverse-temperature crystallization method. When the crystals grew to approximately 1 mm, a stainless steel wire grid (0.01 mm diameter) with a 50 μm thick SiO2 insulating layer was placed on top of the crystal. The crystal continued to grow in the precursor solution, passing through the grid. Once the grid was perfectly embedded in the crystal and the crystal had grown to a certain size, it was removed. A cathode was fabricated using gold paste on the lower surface of the crystal, and a bismuth electrodeposited on the upper surface as the anode, resulting in a wire-type solid-state Frisch gate device based on the CsPbBr3 crystal. The signals from the cathode, anode, and gate were led out through wires. A negative high voltage was applied to the cathode, a positive high voltage to the anode, and no voltage was applied to the gate. The signal response and energy spectrum of the device were then measured.

[0078] Example 3

[0079] A 1.5 mol / L γ-butyrolactone solution with a MAI to PbI2 molar ratio of 1:1 was used as the precursor solution, and MAPbI3 crystals were grown using a reverse-temperature crystallization method. When the crystal grew to approximately 1 mm, it was used as a seed crystal. A gold-coated aperture grid with a 500 μm thick pyrene C insulating layer was placed on the seed crystal, allowing the crystal to continue growing in the precursor solution and pass through the grid. Once the grid was embedded in the crystal and the crystal had grown to a certain size, it was removed. Platinum was sputtered onto the lower surface of the crystal as the cathode, and indium was evaporated onto the upper surface as the anode, resulting in a aperture-type solid-state Frisch gate device based on the MAPbI3 crystal. The cathode, anode, and gate signals were led out through wires. A negative high voltage was applied to the cathode, a positive high voltage to the anode, and no voltage was applied to the gate. The signal response and energy spectrum of the device were measured.

[0080] Example 4

[0081] CsPbBr3 single crystals were grown using the Bridgman process with a molar ratio of CsBr and PbBr2 of 1:1. The crystals were polished to obtain dimensions of 2×2×4 mm. One side of the crystal was machined using a wire EDM machine to match the dicing groove with the grid. A grid with a thickness of 0.1 mm, a wire diameter of 0.01 mm, and a wire pitch of 1 mm was embedded into the dicing groove. The crystal and grid were then immersed in a saturated CsPbBr3 solution for further growth, allowing the crystal to fill the pores and obtain a grid-connected CsPbBr3 crystal. A cathode was fabricated on the lower surface of the crystal using gold paste, and an anode was fabricated on the upper surface using a gallium-indium alloy, resulting in a grid-type solid-state Frisch gate device based on the CsPbBr3 crystal. The cathode, anode, and gate signals were led out separately using wires. A negative high voltage was applied to the cathode, a positive high voltage to the anode, and no voltage was applied to the gate. The signal response and energy spectrum of the device were then measured.

[0082] Example 5

[0083] CsPbBr3 single crystals were grown using the Bridgman process with a molar ratio of CsBr and PbBr2 of 1:1. Crystals A and B, measuring 2×2×2 mm, were obtained through grinding and polishing. A saturated CsPbBr3 solution was dropped onto crystal A, covering the grid and crystal B. The solvent was evaporated using a evaporation method, allowing the CsPbBr3 crystal to grow within the pores. Crystals A, the grid, and B were then connected to obtain a grid-connected CsPbBr3 crystal. A cathode was fabricated on the lower surface of the crystal using gold paste, and an anode was fabricated on the upper surface using a gallium-indium alloy, resulting in a grid-type solid-state Frisch gate device based on the CsPbBr3 crystal. The signals from the cathode, anode, and gate were respectively led out via wires. A negative high voltage was applied to the cathode, a positive high voltage to the anode, and no voltage was applied to the gate. The signal response and energy spectrum of the device were then measured.

[0084] Effect Evaluation 1

[0085] Based on the weighted potential field distribution of the solid-state Frisch gate device in Figure 3e, the weighted potential field distribution along the Z-axis at X = 1.5 mm and Y = 1.5 mm can be obtained by adjusting the gate height, as shown in Figure 7a. As can be seen from the figure, the gate height significantly affects the weighted potential field distribution of the device; its shielding effect decreases as the gate height decreases. Only when the gate height of the device is 1 mm can the weighted potential field distribution on the anode side be limited to a low level, resulting in a low induced charge generated by the target carriers in this region. Figure 7b shows the pulse waveforms of the anode, gate, and cathode of the solid-state Frisch gate detector based on CsPbBr3 crystal. The inset shows the CsPbBr3 solid-state Frisch gate grown in Example 1. As shown in the figure, in the initial stage, the anode responds before the cathode, indicating that the radiation is acting on the region between the anode and the gate. When the generated charge carriers begin to drift under the influence of the electric field, the anode and the gate generate induced signals in opposite directions (i.e., the anode signal is positive, and the gate signal is negative). When the charge carriers pass through the gate and begin to move away from it, the anode signal is shielded by the gate, the induced signal decreases, the anode height reaches its maximum and begins to decay before the cathode and the gate. The hole carriers induced by the cathode, due to passing through a large weighted potential difference, cause the cathode signal to increase rapidly, with a negative signal direction. The gate begins to generate a positive signal, exhibiting a bipolar signal. Based on the fabricated solid-state Frisch gate device, a voltage of 662 keV as shown in Figure 7c was obtained. 137 The scatter plot of the cathode height versus drift time in the Csγ-ray response shows two scatter plots with the same slope at the top, corresponding to... 137 The study observed a 662 keV full-energy peak for Cs and an escape peak for Pb. Furthermore, the cathode height decreased by approximately 10% with increasing drift time, indicating that the carrier mobility of the solution-grown CsPbBr3 crystal is low, leading to attenuation during drift, with the attenuation becoming more severe the further away from the gate. This also verifies that the fabricated solid-state Frisch gate device can obtain X-ray energy and position information across the entire deposition range. Subsequently, energy correction was performed on the pulse height at different drift times, as shown in Figure 7d.

[0086] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.

Claims

1. A solid-state Frisch gate device based on perovskite material, characterized in that, It includes a crystal and a grid embedded inside the crystal; the crystal has an anode and a cathode at its two ends, and the grid, anode and cathode are arranged in parallel. The grid consists of several layers of gate metal sheets and an insulating layer that wraps the gate metal sheets. The gate metal sheets are disposed between the cathode and anode of the crystal. The crystal is selected from three-dimensional organic-inorganic hybrid perovskite, all-inorganic perovskite, two-dimensional perovskite, zero-dimensional perovskite, or double perovskite.

2. The solid-state Frisch gate device based on perovskite material as described in claim 1, characterized in that, The chemical formula of the three-dimensional organic-inorganic hybrid perovskite and the all-inorganic perovskite is APbX3, wherein A is selected from, but is not limited to: methylamine cation, formamidinium cation or Cs + X is selected from F - Cl - ,Br - Or I - The chemical formula of the two-dimensional perovskite is A3B2X9, wherein A is selected from, but is not limited to: ammonium ions, methylamine cations, formamidinium cations, and Cs. + or Rb + B is selected from Sb 3+ Or Bi 3+ X is selected from Br - Or I - ; The chemical formula of the zero-dimensional perovskite is Cs3Bi2I9, Cs2TeI6, or Cs2TeBr6; the chemical formula of the double perovskite is Cs2AgBiBr6.

3. The solid-state Frisch gate device based on perovskite material as described in claim 1, characterized in that, The material of the gate metal sheet is selected from, but is not limited to, gold, copper, tungsten, or stainless steel.

4. The solid-state Frisch gate device based on perovskite material as described in claim 1, characterized in that, The shape of the grid is selected from one or more of the following, including but not limited to: wire type, strip type, mesh type, hole type and honeycomb type.

5. The solid-state Frisch gate device based on perovskite material as described in claim 1, characterized in that, The thickness of the grid is 1nm-50mm.

6. The solid-state Frisch gate device based on perovskite material as described in claim 1, characterized in that, The thickness of the insulating layer is 0-500 μm.

7. The solid-state Frisch gate device based on perovskite material as described in claim 1, characterized in that, The material of the insulating layer is selected from inorganic insulating materials or organic insulating materials; the inorganic insulating materials are selected from, but are not limited to: AlN, Al2O3 or SiO2, and the organic insulating materials are selected from, but are not limited to: type C pyrene, type N pyrene, polytetrafluoroethylene, paraffin or acrylic.

8. The solid-state Frisch gate device based on perovskite material as described in claim 1, characterized in that, The materials of the anode and cathode are selected from, but are not limited to, platinum, gold, silver, gallium, indium, lead, or bismuth.

9. A method for fabricating a solid-state Frisch gate device based on perovskite material as described in any one of claims 1-8, characterized in that, The preparation method is selected from, but is not limited to, one or more of: solution-based direct crystal growth, machining, and crystal bonding; The solution-based direct crystal growth method includes the following steps: S11: After placing the grid on top of the bottom crystal, the crystal is grown in the precursor solution; S12: An anode and a cathode are fabricated at the top and bottom of the crystal grown in step S11, respectively, to obtain the solid-state Frisch gate device based on perovskite material; The machining method includes the following steps: S21: After cutting the underlying crystal to form cutting grooves, the grid is embedded; S22: The crystal with the embedded grid in step S21 is placed in the precursor solution for growth; S23: An anode and a cathode are fabricated at the top and bottom of the crystal grown in step S22, respectively, to obtain the solid-state Frisch gate device based on perovskite material; The crystal bonding method includes the following steps: S31: After coating the surface of the underlying crystal A with a precursor solution, a grid is covered; S32: Cover the top of the bottom crystal A after the grid is covered in step S31 with the stacked crystal B; S33: Under the action of the precursor solution, crystal C is grown in the gap between the bottom crystal A and the stacked crystal B in step S32 to obtain a crystal with an embedded grid; the composition of crystal C and stacked crystal B is the same as that of the bottom crystal A. S34: An anode and a cathode are fabricated at the top and bottom of the crystal with the embedded gate, respectively, to obtain the solid-state Frisch gate device based on perovskite material.

10. The preparation method according to claim 9, characterized in that, In the precursor solution, the solvent is an organic solvent, and the solute is a number of metal salts; the cations and anions in the metal salts are selected from the chemical elements in the crystal.

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