Method and device for reliability testing of memory cell, and computer-readable storage medium

Abstract

The present application discloses a method and device for reliability testing of a memory cell, and a computer-readable storage medium. The method for reliability testing of the memory cell comprises: applying read voltages to a memory cell on the basis of a read voltage sequence; upon applying each of the read voltages, recording a raw bit error rate of data in the memory cell; determining, as a valid window boundary, the read voltage corresponding to the raw bit error rate equal to a preset threshold; determining a length of a valid window on the basis of the valid window boundary; and determining a test result of the memory cell on the basis of the length of the valid window, the test result being used for representing the reliability of the memory cell during data storage.

Description

Reliability testing methods, equipment, and computer-readable storage media for storage cells

[0001] This application claims priority to Chinese patent application No. 202411672349.X, filed on November 21, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of data processing technology, and in particular to methods, devices and computer-readable storage media for testing the reliability of storage units. Background Technology

[0003] The traditional method for measuring the reliability of Flash storage is to use the raw bit error rate (BER). The BER reflects the probability of data read errors in the storage cell. However, the BER has a significant drawback: it varies with the read voltage. If the read voltage is set too high, some data cells that should be read correctly may be misjudged as errors. If the read voltage is set too low, the charge in the storage cell may not be fully activated, causing some cells that actually store data to be misjudged as empty or without data. This increases the number of read errors and ultimately leads to low accuracy in the reliability testing of the storage cell.

[0004] The above content is only used to help understand the technical solution of this application and does not represent an admission that the above content is prior art. Technical issues

[0005] The main objective of this application is to provide a method, apparatus, and computer-readable storage medium for testing the reliability of storage cells, aiming to solve the technical problem of how to improve the accuracy of storage cell reliability testing. Technical solutions

[0006] To achieve the above objectives, this application proposes a method for detecting the reliability of a storage cell, which includes:

[0007] Apply a read voltage to the memory cell according to the read voltage sequence;

[0008] Record the raw bit error rate of the data in the storage cell when each read voltage is applied;

[0009] The read voltage corresponding to the original bit error rate equal to the preset threshold is determined as the effective window boundary;

[0010] Determine the length of the effective window based on the effective window boundaries;

[0011] The detection result of the storage unit is determined based on the length of the effective window. The detection result is used to characterize the reliability of the storage unit when storing data.

[0012] In one embodiment, the step of recording the raw bit error rate of the data in the storage cell when each read voltage is applied includes:

[0013] Data in the memory cell is read by applying a read voltage, and the read result corresponding to each read voltage is determined.

[0014] The reading results are analyzed to determine the original bit error rate corresponding to the reading voltage, and the original bit error rate is recorded.

[0015] In one embodiment, the steps of parsing the read results to determine the original bit error rate corresponding to the read voltage and recording the original bit error rate include:

[0016] Analyze the reading results for each reading voltage to determine the total number of data bits and the number of error bits in the reading results;

[0017] The original bit error rate is calculated based on the proportion of the number of erroneous bits to the total number of data bits.

[0018] Each read voltage is associated with and recorded in relation to the corresponding raw bit error rate.

[0019] In one embodiment, the step of determining the read voltage corresponding to the original bit error rate equal to a preset threshold as the effective window boundary includes:

[0020] The original bit error rate recorded at each read voltage is compared with a preset threshold.

[0021] The reading voltage corresponding to the first time the original bit error rate equals the preset threshold is used as the lower boundary of the effective window;

[0022] The reading voltage at which the original bit error rate equals the preset threshold again after the reading voltage is increased is used as the upper boundary of the effective window.

[0023] In one embodiment, the step of using the read voltage corresponding to the first time the original bit error rate equals a preset threshold as the lower boundary of the effective window further includes:

[0024] If the original bit error rate is not equal to the preset threshold, check the trend of the recorded original bit error rate as a function of the reading voltage.

[0025] Identify all points where the original bit error rate changes from above a preset threshold to below a preset threshold, indicating a downward trend.

[0026] Calculate the absolute value of the difference between the point of change in the downward trend and the preset threshold, and take the read voltage corresponding to the original bit error rate with the smallest absolute value as the lower boundary of the effective window.

[0027] In one embodiment, the step of using the read voltage corresponding to the original bit error rate being equal to a preset threshold again after increasing the read voltage as the upper boundary of the effective window further includes:

[0028] If the original bit error rate is not equal to the preset threshold, check the trend of the recorded original bit error rate as a function of the reading voltage.

[0029] Identify all points where the original bit error rate changes from below a preset threshold to above a preset threshold, showing an upward trend.

[0030] Calculate the absolute value of the difference between the point of change in the upward trend and the preset threshold, and take the reading voltage corresponding to the original bit error rate with the smallest absolute value as the upper boundary of the effective window.

[0031] In one embodiment, the step of determining the detection result of the storage cell based on the length of the effective window, wherein the detection result is used to characterize the reliability of the storage cell when storing data, includes:

[0032] When the length of the effective window is less than or equal to the preset length threshold, the detection result is determined as the first stored data;

[0033] When the length of the effective window is greater than the preset length threshold, the detection result is determined as the second stored data, and the reliability of the second stored data is higher than that of the first stored data.

[0034] In one embodiment, prior to the step of applying a read voltage to the memory cell according to the read voltage sequence, the method includes:

[0035] Perform voltage tests on the storage cells to determine their actual operating voltage range.

[0036] The voltage interval in the read voltage sequence is set according to the accuracy requirements of the storage unit;

[0037] The reading voltage sequence is determined based on the operating voltage range and voltage interval.

[0038] In addition, to achieve the above objectives, this application also proposes a storage cell reliability testing device, the device comprising: a memory, a processor, and a computer program stored on the memory and executable on the processor, the computer program being configured to implement the steps of the storage cell reliability testing method described above.

[0039] In addition, to achieve the above objectives, this application also proposes a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the storage cell reliability detection method described above. Beneficial effects

[0040] This application provides a method for detecting the reliability of a storage cell. Firstly, by applying a series of read voltages based on the operating voltage range of the storage cell, a more comprehensive understanding of the storage cell's performance is obtained. By reading data at each voltage and recording the corresponding raw bit error rate, the data read accuracy of the storage cell under different voltages is evaluated. By comparing the raw bit error rate with a preset threshold, the read voltage that makes the raw bit error rate equal to the preset threshold can be found, thereby defining the boundary of the storage cell's effective window. The effective window length is calculated based on the effective window boundary, further quantifying the reliability of the storage cell and improving the accuracy of storage cell reliability detection. Attached Figure Description

[0041] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0042] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 is a flowchart illustrating the storage unit reliability testing method of this application in Embodiment 1.

[0044] Figure 2 is a flowchart of the second embodiment of the storage unit reliability detection method of this application;

[0045] Figure 3 is a flowchart of the storage unit reliability testing method of this application in Embodiment 3.

[0046] Figure 4 is a flowchart of the storage cell reliability detection method of this application in Embodiment 4.

[0047] Figure 5 is a flowchart of the fifth embodiment of the storage cell reliability testing method of this application;

[0048] Figure 6 is a schematic diagram of the hardware operating environment involved in the storage unit reliability detection method in this application embodiment.

[0049] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Embodiments of the present invention

[0050] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0051] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0052] The main solution in this application's embodiments is:

[0053] Currently, the traditional method for measuring the reliability of Flash storage is to use the raw bit error rate (BER). The BER reflects the probability of data read errors in the storage cell. However, the BER has a significant drawback: it varies with the read voltage. If the read voltage is set too high, some data cells that should be read correctly may be misjudged as errors. If the read voltage is set too low, the charge in the storage cell may not be fully activated, causing some cells that actually store data to be misjudged as empty or without data. This increases the number of read errors and ultimately leads to low accuracy in the reliability detection of the storage cell.

[0054] This application provides a more comprehensive understanding of the performance of a storage cell by applying a series of read voltages based on the cell's operating voltage range. By reading data at each voltage and recording the corresponding raw bit error rate, the accuracy of data reading at different voltages is evaluated. By comparing the raw bit error rate with a preset threshold, the read voltage that makes the raw bit error rate equal to the preset threshold can be found, thereby defining the boundary of the storage cell's effective window. The effective window length is calculated based on the effective window boundary, further quantifying the reliability of the storage cell and improving the accuracy of storage cell reliability detection.

[0055] It should be noted that the execution subject in this embodiment can be a storage unit reliability testing device, or a computing service device with data processing, network communication, and program execution functions, such as a tablet computer, personal computer, or mobile phone, or a control device capable of implementing the above functions of a storage unit reliability testing device, etc. This embodiment does not specifically limit it in this way. The following uses a storage unit reliability testing device as the execution subject as an example to describe this embodiment and the following embodiments.

[0056] Example 1

[0057] Based on this, this application proposes a storage cell reliability detection method according to a first embodiment. Referring to Figure 1, the storage cell reliability detection method includes:

[0058] Step S100: Apply a read voltage to the memory cell according to the read voltage sequence.

[0059] In this embodiment, the storage unit is a Flash storage unit used to store data. It is a non-volatile memory unit that can retain data after power failure. The read voltage sequence is a series of preset read voltage values ​​used to test the performance of the storage unit under different voltages. The read voltage is the voltage applied when reading data from the storage unit.

[0060] For example, based on the specifications and technical documents of the storage cell, its operating voltage range is determined. Within the operating voltage range, a series of equally spaced read voltage values ​​covering the entire operating voltage range are designed, and the voltage is applied to the storage cell according to the designed read voltage sequence.

[0061] Step S200: When each read voltage is applied, record the raw bit error rate of the data in the storage cell.

[0062] By reading and parsing the data in the storage unit, the original bit error rate under different read voltages can be accurately calculated, providing accurate data support for the reliability assessment of the storage unit.

[0063] In this embodiment, the raw bit error rate (RBER) is the read bit error rate, which represents the proportion of bits that erroneously occur when reading data from a storage unit out of the total number of bits read.

[0064] As an optional implementation, at each read voltage, data is read from the storage unit, the read data is parsed to determine the number of erroneous bits in the data, the proportion of erroneous bits to the total number of bits in the data is calculated, and the original bit error rate at each voltage point is recorded.

[0065] Step S300: Determine the read voltage corresponding to the original bit error rate that is equal to the preset threshold, as the effective window boundary.

[0066] In this embodiment, the preset threshold is a set upper limit for the raw bit error rate, used to determine whether the data read accuracy of the Flash memory meets the requirements under a specific read voltage. The effective window is the voltage range within the operating voltage range of the Flash memory that can maintain data read accuracy meeting the preset threshold requirement. The boundary of the effective window is determined by the read voltage corresponding to the raw bit error rate equal to the preset threshold.

[0067] For example, the raw bit error rate data is traversed and compared with a preset threshold. The first raw bit error rate that is equal to or exceeds the preset threshold is identified as the upper boundary of the effective window. The first raw bit error rate that is lower than the preset threshold but the next raw bit error rate that is higher than the threshold is identified as the lower boundary of the effective window.

[0068] In one embodiment, the read voltage corresponding to the original bit error rate equal to a preset threshold is estimated by interpolation and used as the effective window boundary.

[0069] Step S400: Determine the length of the valid window based on the valid window boundaries.

[0070] By calculating the effective window length of the storage cell, we can understand the voltage range within which the storage cell can stably and accurately store and retrieve data, i.e., keep its original bit error rate below a preset threshold, and thus evaluate the reliability of the storage cell.

[0071] In this embodiment, the length of the effective window is the difference between the upper and lower boundary voltages of the effective window, representing the range of read voltage variations that the storage unit maintains for data accuracy.

[0072] As an optional implementation, the length of the effective window is determined by calculating the difference between the upper boundary and the lower boundary of the effective window.

[0073] Step S500: Determine the detection result of the storage unit based on the length of the effective window. The detection result is used to characterize the reliability of the storage unit when storing data.

[0074] For example, the detection result of the storage cell is determined based on the measured effective window length, combined with the specifications and performance requirements of the storage cell. If the effective window length is greater than or equal to a specified threshold, the storage cell is considered reliable; otherwise, the storage cell is considered to have a performance or reliability problem.

[0075] This embodiment provides a method for detecting the reliability of a storage cell. Firstly, by applying a series of read voltages based on the operating voltage range of the storage cell, a more comprehensive understanding of the storage cell's performance is obtained. By reading data at each voltage and recording the corresponding raw bit error rate, the data read accuracy of the storage cell under different voltages is evaluated. By comparing the raw bit error rate with a preset threshold, the read voltage that makes the raw bit error rate equal to the preset threshold can be found, thereby defining the boundary of the storage cell's effective window. The effective window length is calculated based on the effective window boundary, further quantifying the reliability of the storage cell and improving the accuracy of storage cell reliability detection.

[0076] Based on Embodiment 1, Embodiment 2 of this application proposes a method for detecting the reliability of a storage cell. Referring to Figure 2, step S200 includes:

[0077] Step S210: Read the data in the storage unit by applying a read voltage, and determine the read result corresponding to each read voltage.

[0078] By applying different read voltages to read data from the memory cells and obtaining the corresponding read results for each read voltage, the impact of different read voltages on the accuracy of data reading can be determined.

[0079] Before applying the read voltage, the physical and electrical characteristics, such as the range of the read voltage and the data retention time, are determined according to the type of the storage cell. Based on the characteristics of the storage cell, a read circuit is selected. The read circuit includes a programmable voltage source for providing a precise read voltage and a data read interface for reading data from the storage cell. The storage cell is then connected to the read circuit.

[0080] For example, at each read voltage, data is read from the storage unit through the data read interface, and the read result is recorded.

[0081] In some implementations, while recording the reading results, the integrity of the data can be verified by comparing the reading results under different reading voltages.

[0082] Step S220: Analyze the reading results to determine the original bit error rate corresponding to the reading voltage, and record the original bit error rate.

[0083] By analyzing the read results at each read voltage in detail, information about the error rate of the memory cell under different voltage conditions can be obtained.

[0084] For example, the read result is parsed to extract binary data, the original bit error rate is calculated based on the expected state of the storage unit, and the calculated original bit error rate is correlated with the corresponding read voltage.

[0085] In one embodiment, step S220 includes:

[0086] Step S221: Analyze the reading results of each reading voltage to determine the total number of data bits and the number of error bits in the reading results.

[0087] Analyzing the reading results at each reading voltage to determine the total number of data bits read and the number of errors that occurred is the basis for calculating the original bit error rate, in order to determine the accuracy and error rate of the data under different reading voltages.

[0088] In this embodiment, the total number of data bits refers to the total number of data bits in the read result, i.e., the total length of the data. The number of error bits refers to the number of bits in the read result that are incorrect, i.e., the number of bits that are inconsistent with the original data.

[0089] For example, for the reading results under each reading voltage, the data content is parsed, the total number of bits in the reading results is calculated, and the reading results are compared with the original data to count the number of bits that were erroneous.

[0090] Step S222: Calculate the original bit error rate based on the proportion of the number of erroneous bits to the total number of data bits.

[0091] The impact of different read voltages on data read accuracy is quantified by calculating the raw bit error rate.

[0092] For example, the raw bit error rate corresponding to each read voltage can be calculated using the formula "raw bit error rate = number of error bits / total number of data bits".

[0093] Step S223: Associate each read voltage with the corresponding original bit error rate and record it.

[0094] Each read voltage is associated with and recorded with its corresponding original bit error rate to establish a mapping relationship between the read voltage and the original bit error rate, providing data support for subsequent adjustment of the read voltage and improvement of data read accuracy.

[0095] For example, each read voltage is associated with its corresponding original bit error rate to form a mapping relationship, and the mapping relationship between read voltage and original bit error rate is recorded in a table or database.

[0096] This embodiment provides a method for detecting the reliability of a storage cell. First, different reading voltages are applied to determine the reading result corresponding to each voltage. The reading result is analyzed to determine the total number of data bits and the number of error bits. The original bit error rate is calculated to intuitively display the reading quality of data under different reading voltages. By recording the mapping relationship between reading voltage and original bit error rate, the reading quality of data under different reading voltages can be accurately found and analyzed, providing basic data for the evaluation of data accuracy.

[0097] Based on Embodiment 1 or 2, Embodiment 3 of this application proposes a method for detecting the reliability of a storage cell. Referring to Figure 3, step S300 includes:

[0098] Step S310: Compare the original bit error rate recorded under each reading voltage with a preset threshold.

[0099] In this embodiment, the preset threshold is a preset RBER threshold, which is set according to the performance requirements and data reliability requirements of the storage system, and represents the upper limit of the acceptable raw bit error rate.

[0100] Step S320: The reading voltage corresponding to the first time the original bit error rate equals the preset threshold is used as the lower boundary of the effective window.

[0101] In the performance evaluation of a storage system, the effective window represents a range of read voltages within which the raw bit error rate remains below a preset threshold, thus ensuring data reliability. The first step in determining the effective window is to use the read voltage at which the raw bit error rate first equals the preset threshold as the lower boundary of the effective window. Find a starting point for the read voltage. From this starting point, as the read voltage increases, the raw bit error rate begins to gradually rise, but still remains within an acceptable range.

[0102] In some implementations, step S320 further includes:

[0103] Step S321: If no original bit error rate equal to the preset threshold is found, check the trend of the recorded original bit error rate as a function of the reading voltage.

[0104] For example, the recorded raw bit error rate and the reading voltage are correlated, and a curve of the raw bit error rate changing with the reading voltage is plotted. It is determined whether there is a point in the curve where the raw bit error rate is equal to a preset threshold. If not, the trend of the raw bit error rate is further observed.

[0105] Step S322: Identify all points where the original bit error rate changes from above a preset threshold to below a preset threshold, representing a downward trend.

[0106] In this embodiment, the point of change in the downward trend is a clear inflection point or point of change in the curve of the original bit error rate as a function of the read voltage, where the original bit error rate starts to decrease from a higher value.

[0107] For example, in the curve of the original bit error rate changing with the reading voltage, find the inflection point where the original bit error rate starts to decrease from above the preset threshold, that is, the point of change of the downward trend, and record all the points of change of the downward trend.

[0108] Step S323: Calculate the absolute value of the difference between the point of change in the downward trend and the preset threshold, and take the reading voltage corresponding to the original bit error rate with the smallest absolute value as the lower boundary of the effective window.

[0109] For example, among all the identified downward trend change points, find the point where the original bit error rate is closest to the preset threshold, and use the read voltage corresponding to that point as the lower boundary of the effective window.

[0110] In one embodiment, if multiple points are close to a preset threshold, the point that is closest and whose original bit error rate is lower than the preset threshold for the first time is selected as the lower boundary.

[0111] In step S330, the reading voltage at which the original bit error rate is equal to the preset threshold again after the reading voltage is increased is taken as the upper boundary of the effective window.

[0112] By finding the reading voltage at which the original bit error rate equals the preset threshold again, it can be determined that above this voltage, the data reading quality will no longer meet the requirements, and the reading voltage at this point is determined as the upper boundary of the effective window.

[0113] For example, after the lower boundary of the effective window has been determined, the value of the reading voltage is gradually increased. As the reading voltage increases, the change of the original bit error rate is monitored. When the original bit error rate is equal to the preset threshold again, the value of the reading voltage at this time is recorded, and this reading voltage is used as the upper boundary of the effective window.

[0114] In one embodiment, step S330 further includes:

[0115] Step S331: If no original bit error rate equal to the preset threshold is found, check the trend of the recorded original bit error rate as a function of the reading voltage.

[0116] For example, after determining the lower boundary of the effective window, the reading voltage is increased and recorded. The recorded original bit error rate is correlated with the reading voltage, and a curve of the original bit error rate changing with the reading voltage is plotted. It is determined whether a point in the curve appears where the original bit error rate is equal to the preset threshold. If it does not appear, the trend of the original bit error rate is further observed.

[0117] Step S332: Identify all upward trend points where the original bit error rate changes from below a preset threshold to above a preset threshold.

[0118] In this embodiment, the point of change of the upward trend is in the curve of the original bit error rate changing with the reading voltage. The original bit error rate starts to rise from a low value, forming a clear inflection point or point of change, indicating that as the reading voltage increases further, the data reading quality begins to decline.

[0119] For example, in the curve of the original bit error rate changing with the reading voltage, find the point where the original bit error rate starts to rise from below the preset threshold. This indicates that the original bit error rate begins to increase significantly, marking the beginning of the deterioration of data reading quality. Record all such points, i.e., the points of upward trend change.

[0120] Step S333: Calculate the absolute value of the difference between the rising trend change point and the preset threshold, and take the reading voltage corresponding to the original bit error rate with the smallest absolute value as the upper boundary of the effective window.

[0121] For example, among all the identified upward trend change points, find the point where the original bit error rate is closest to the preset threshold, and use the reading voltage corresponding to that point as the upper boundary of the effective window.

[0122] In one embodiment, if there are multiple points that are close to a preset threshold but have not yet clearly exceeded it, the point that is closest to the original bit error rate and is clearly higher than the preset threshold for the first time can be selected as the upper boundary.

[0123] In one embodiment, if the data points are very dense or the noise is high, more sophisticated analysis methods such as interpolation and fitting may be needed to determine the change points that are closest to the preset threshold.

[0124] This embodiment provides a method for detecting the reliability of a storage cell. First, the original bit error rate is compared with a preset threshold to determine the upper and lower boundaries of the effective window, thereby accurately finding the reading voltage range when the storage cell has high read reliability, laying the foundation for the subsequent determination of the reliability of the storage cell.

[0125] Based on any one of the embodiments 1 to 3, Embodiment 4 of this application proposes a method for detecting the reliability of a storage cell. Referring to Figure 4, step S500 includes:

[0126] Step S510: When the length of the effective window is less than or equal to a preset length threshold, the detection result is determined to be the first stored data.

[0127] For example, when the length of the effective window is less than or equal to a preset length threshold, the judgment logic is triggered to determine the detection result as the first stored data and record the corresponding data identifier.

[0128] In some implementations, for the first stored data, due to its low reliability, additional processing measures are taken, including data verification, error correction, or data retransmission, to improve the accuracy of the data.

[0129] Step S520: When the length of the effective window is greater than a preset length threshold, the detection result is determined to be the second stored data, and the reliability of the second stored data is higher than that of the first stored data.

[0130] In this embodiment, the preset length threshold is a preset standard threshold used to determine the length of the valid window.

[0131] The length of the effective window directly reflects the tolerance of the memory cell to changes in read voltage. A larger effective window means that the memory cell can maintain data accuracy over a wider range of read voltages, thus having higher reliability. A smaller effective window means that the memory cell is more sensitive to changes in read voltage and is more susceptible to noise or process variations, thereby reducing its reliability.

[0132] For example, when the length of the detected effective window is greater than a preset length threshold, the detection result is determined to be the second stored data, and the corresponding data identifier is recorded.

[0133] In some implementations, the second stored data is highly reliable and can be directly used for subsequent data processing or storage operations without the need for additional processing measures.

[0134] This embodiment provides a method for detecting the reliability of storage units. This embodiment first compares the length of the effective window with a preset length threshold to determine the detection result, which helps to accurately evaluate the reliability of storage units, thereby improving the accuracy of storage unit reliability detection and providing a basis for subsequent storage strategy optimization.

[0135] Based on any one of the embodiments one to four, embodiment five of this application proposes a method for detecting the reliability of a storage cell. Referring to Figure 5, before step S100, the method includes:

[0136] Step S600: Perform a voltage test on the storage cell to determine the actual operating voltage range of the storage cell.

[0137] In this embodiment, the operating voltage range is the voltage range in which the Flash memory cell can operate, and the information on the operating voltage range is obtained from the Flash memory's specifications and technical documents.

[0138] For example, a series of voltage values ​​are applied to the storage unit using a test device, and the performance of the storage unit under different voltages, such as read error rate and read speed, is recorded. The test data is analyzed to determine the voltage range in which the storage unit can work stably, i.e., the operating voltage range.

[0139] Step S700: Set the voltage interval in the read voltage sequence according to the accuracy requirements of the storage cell.

[0140] In this embodiment, the accuracy requirement refers to the accuracy of data reading from the storage unit; higher accuracy results in smaller errors during data reading. The voltage interval is the difference between two adjacent voltage values ​​in the read voltage sequence, and the size of the voltage interval determines the resolution of the read voltage sequence.

[0141] For example, the required read accuracy is determined based on the accuracy requirements of the storage cell, and the voltage interval in the read voltage sequence is set according to the read accuracy. The higher the accuracy requirement, the smaller the voltage interval.

[0142] Step S800: Determine the reading voltage sequence based on the operating voltage range and voltage interval.

[0143] For example, the starting voltage and ending voltage of the read voltage sequence are determined according to the operating voltage range, and a series of equally spaced voltage values ​​are generated within the operating voltage range according to the set voltage interval to form the read voltage sequence.

[0144] This embodiment provides a method for testing the reliability of a storage cell. First, the storage cell is subjected to voltage testing to determine the voltage range of the storage cell in actual operation. Then, the voltage interval in the read voltage sequence is set according to the accuracy requirements of the storage cell to construct a suitable read voltage sequence for subsequent read testing of the storage cell, thereby evaluating the performance and reliability of the storage cell under different voltages.

[0145] It should be noted that the above examples are only for understanding this application and do not constitute a limitation on the storage cell reliability detection method of this application. Any simple modifications based on this technical concept are within the protection scope of this application.

[0146] This application provides a storage cell reliability testing device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the storage cell reliability testing method in the above embodiment 1.

[0147] Referring to Figure 6 below, a schematic diagram of a storage cell reliability testing device suitable for implementing embodiments of this application is shown. The storage cell reliability testing device in embodiments of this application may include, but is not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Description), PMPs (Portable Media Players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. The storage cell reliability testing device shown in Figure 6 is merely an example and should not impose any limitations on the functionality and scope of use of embodiments of this application.

[0148] As shown in Figure 6, the storage cell reliability testing device may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage device 1003 into a random access memory (RAM) 1004. The RAM 1004 also stores various programs and data required for the operation of the storage cell reliability testing device. The processing unit 1001, ROM 1002, and RAM 1004 are interconnected via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems can be connected to the I / O interface 1006: input devices 1007 including, for example, a touchscreen, touchpad, keyboard, mouse, image sensor, microphone, accelerometer, gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), speaker, vibrator, etc.; storage devices 1003 including, for example, magnetic tape, hard disk, etc.; and communication devices 1009. The communication device 1009 allows the storage cell reliability testing device to communicate wirelessly or wiredly with other devices to exchange data. Although the figure shows storage cell reliability testing devices with various systems, it should be understood that it is not required to implement or have all of the systems shown. More or fewer systems may be implemented alternatively.

[0149] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from ROM 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0150] The storage cell reliability testing device provided in this application, employing the storage cell reliability testing method in the above embodiments, can solve the technical problem of how to improve the accuracy of storage cell reliability testing. Compared with the prior art, the beneficial effects of the storage cell reliability testing device provided in this application are the same as those of the storage cell reliability testing method provided in the above embodiments, and other technical features in this storage cell reliability testing device are the same as those disclosed in the method of the previous embodiment, and will not be repeated here.

[0151] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0152] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0153] This application provides a computer-readable storage medium having computer-readable program instructions (i.e., a computer program) stored thereon, which are used to execute the storage cell reliability detection method in the above embodiments.

[0154] The computer-readable storage medium provided in this application may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0155] The aforementioned computer-readable storage medium may be included in the storage cell reliability testing device; or it may exist independently and not be assembled into the storage cell reliability testing device.

[0156] The aforementioned computer-readable storage medium carries one or more programs. When these programs are executed by the storage unit reliability testing device, the storage unit reliability testing device can write computer program code for performing the operations of this application in one or more programming languages ​​or a combination thereof. These programming languages ​​include object-oriented programming languages—such as Java, Smalltalk, and C++—and conventional procedural programming languages—such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0157] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0158] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0159] The readable storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a computer program) for executing the above-described storage cell reliability detection method, thereby solving the technical problem of how to improve the accuracy of storage cell reliability detection. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as the beneficial effects of the storage cell reliability detection method provided in the above embodiments, and will not be repeated here.

[0160] The above are only some embodiments of this application and do not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.

Claims

1. A method for detecting the reliability of a storage cell, wherein, The aforementioned storage cell reliability detection method includes: Apply a read voltage to the memory cell according to the read voltage sequence; When each of the read voltages is applied, the raw bit error rate of the data in the storage cell is recorded; The read voltage corresponding to the original bit error rate, which is equal to a preset threshold, is determined as the effective window boundary; The length of the effective window is determined based on the effective window boundaries; The detection result of the storage unit is determined based on the length of the effective window, and the detection result is used to characterize the reliability of the storage unit when storing data.

2. The storage cell reliability detection method as described in claim 1, wherein, The step of recording the raw bit error rate of the data in the storage cell when each of the read voltages is applied includes: Data in the storage unit is read by applying the read voltage, and the read result corresponding to each read voltage is determined. The reading result is analyzed to determine the original bit error rate corresponding to the reading voltage, and the original bit error rate is recorded.

3. The storage cell reliability detection method as described in claim 2, wherein, The step of parsing the read result to determine the original bit error rate corresponding to the read voltage and recording the original bit error rate includes: The reading results for each reading voltage are analyzed to determine the total number of data bits and the number of error bits in the reading results; The original bit error rate is calculated based on the proportion of the number of erroneous bits to the total number of data bits. Each read voltage is associated with and recorded in relation to the corresponding raw bit error rate.

4. The storage cell reliability detection method as described in claim 1, wherein, The step of determining the read voltage corresponding to the original bit error rate equal to the preset threshold as the effective window boundary includes: The original bit error rate recorded at each read voltage is compared with the preset threshold. The reading voltage corresponding to the first time the original bit error rate equals the preset threshold is used as the lower boundary of the effective window; The reading voltage at which the original bit error rate is equal to the preset threshold again after the reading voltage is increased will be used as the upper boundary of the effective window.

5. The storage cell reliability detection method as described in claim 4, wherein, The step of using the read voltage corresponding to the first time the original bit error rate equals the preset threshold as the lower boundary of the effective window further includes: If the original bit error rate is not equal to the preset threshold, then check the recorded trend of the original bit error rate as a function of the read voltage. Identify all points where the original bit error rate changes from above the preset threshold to below the preset threshold, showing a downward trend. Calculate the absolute value of the difference between the point of change in the downward trend and the preset threshold, and take the read voltage corresponding to the original bit error rate with the smallest absolute value as the lower boundary of the effective window.

6. The storage cell reliability detection method as described in claim 4, wherein, The step of using the read voltage, which corresponds to the original bit error rate being equal to the preset threshold again after increasing the read voltage, as the upper boundary of the effective window, further includes: If the original bit error rate is not equal to the preset threshold, then check the recorded trend of the original bit error rate as a function of the read voltage. Identify all points where the original bit error rate changes from below the preset threshold to above the preset threshold, showing an upward trend. Calculate the absolute value of the difference between the point of change in the upward trend and the preset threshold, and take the read voltage corresponding to the original bit error rate with the smallest absolute value as the upper boundary of the effective window.

7. The storage cell reliability detection method as described in claim 1, wherein, The step of determining the detection result of the storage unit based on the length of the effective window, wherein the detection result is used to characterize the reliability of the storage unit when storing data, includes: When the length of the effective window is less than or equal to a preset length threshold, the detection result is determined to be the first stored data; When the length of the effective window is greater than a preset length threshold, the detection result is determined to be the second stored data, and the reliability of the second stored data is higher than that of the first stored data.

8. The storage cell reliability detection method as described in claim 1, wherein, Before the step of applying a read voltage to the memory cell according to the read voltage sequence, the following steps are included: The storage unit is subjected to voltage testing to determine its actual operating voltage range. The voltage interval in the read voltage sequence is set according to the accuracy requirements of the storage unit; The read voltage sequence is determined based on the operating voltage range and the voltage interval.

9. A storage cell reliability testing device, wherein, The device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the memory cell reliability detection method as described in any one of claims 1 to 8.

10. A storage medium, wherein, The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, it implements the steps of the storage cell reliability detection method as described in any one of claims 1 to 8.

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