Chip-embedded package

Abstract

The present application discloses a chip-embedded package. The chip-embedded package comprises a base circuit board, a chip unit, a plastic packaging layer, and a plurality of connecting members; the chip unit is fixedly mounted in a corresponding mounting slot, and the chip unit comprises a metal substrate and a chip; a step having a first surface and a second surface is formed on the metal substrate, and the chip is fixedly connected to the second surface; the first surface protrudes from the second surface, and the second surface extends to at least one side edge of the metal substrate; one end of each connecting member is correspondingly connected to the chip, and the other end of the connecting member extends to a first side of the plastic packaging layer so as to be exposed; the connecting members include a first connecting member, one end of the first connecting member is connected to a first side of the chip, and the other end of the first connecting member crosses the second surface to horizontally extend to a first side of the base circuit board and extend to the edge of a board so as to be exposed. By means of the described arrangement, the present application can reduce the risk of electrical aging and insulation failure of the chip-embedded package.

Description

Embedded chip package [Technical Field]

[0001] This application applies to the field of chip packaging technology, particularly embedded chip packages. [Background Technology]

[0002] With the ongoing transformation of the global energy structure, electricity has become an increasingly important form of energy. Power chips are characterized by high conversion efficiency, but current packaging methods have excessively large parasitic parameters, which affect the switching frequency of power chips.

[0003] Embedding power chips into printed circuit boards is one of the best solutions for reducing integration parameters.

[0004] However, once power chips are embedded in printed circuit boards, they are prone to electrical breakdown or leakage. [Summary of the Invention]

[0005] This application provides a chip-embedded package to solve the problem of electrical insulation of the package.

[0006] To address the aforementioned technical problems, this application provides a chip-embedded package, comprising: a base circuit board, at least one chip unit, a molding compound, and multiple connectors. At least one mounting groove is formed on a first side of the base circuit board, and the chip unit is fixedly mounted in a corresponding mounting groove. The chip unit includes at least one metal substrate and at least one chip. A step with a first surface and a second surface is formed on the first side of the metal substrate, and the chip is fixedly connected to the second surface. The first surface protrudes from the second surface and extends to at least one edge of the metal substrate. The molding compound is adhered to the first side of the base circuit board and fills the gap between the base circuit board and the at least one chip unit. One end of each connector is connected to a corresponding electrode of the chip, and the other end of each connector extends to the first side of the molding compound for exposure. Each connector includes a first connector, one end of which is connected to the first side of the chip, and the other end of which extends horizontally across the second surface within the molding compound to the first side of the base circuit board and extends along the first side of the base circuit board to the edge of the board for exposure. The projections of the first connectors on the metal substrate are all located on the second surface.

[0007] The molding layer includes a filler layer, a first layer, and a second layer. The filler layer is disposed in the mounting groove. The second layer is stacked and bonded to the first side of the base circuit board. The first layer and the second layer are stacked and bonded to the side away from the base circuit board. The other end of the first connector extends horizontally across the second surface on the side of the second layer away from the base circuit board to the first side of the base circuit board.

[0008] The first connector includes a cross member, a first extension member, and a first vertical member connected in sequence. One end of the cross member is connected to the first side of the chip, and the other end of the cross member crosses the second surface on the side of the second layer away from the base circuit board to reach the first side of the base circuit board. One end of the first extension member is connected to the other end of the cross member, and the other end of the first extension member extends along the first side of the base circuit board to the edge of the board. The first vertical member is disposed in the molding layer and located at the edge of the board. One end of the first vertical member is connected to the other end of the first extension member, and the other end of the first vertical member penetrates the second layer and the first layer until it is exposed on the first side of the molding layer.

[0009] The transverse component includes a first connecting hole, a transverse portion, and a second connecting hole connected in sequence. The first connecting hole and the second connecting hole are disposed within the second layer, and the transverse portion is attached to the side of the second layer away from the base circuit board. One end of the first connecting hole is connected to the first side of the chip, and the other end of the first connecting hole is connected to one end of the transverse portion. The other end of the transverse portion is connected to one end of the second connecting hole, and the other end of the second connecting hole is connected to one end of the first extension component. The first vertical component includes a third connecting hole and a fourth connecting hole connected in sequence. The third connecting hole is disposed within the second layer, and the fourth connecting hole is disposed within the first layer. One end of the third connecting hole is connected to the other end of the first extension component, and the end of the fourth connecting hole away from the third connecting hole is exposed on the first side of the molding layer.

[0010] The connector further includes a second connector, which includes a conductive member, a second extension member, and a second vertical member connected in sequence. One end of the conductive member is connected to the first surface, and the other end of the conductive member reaches the first side of the base circuit board. One end of the second extension member is connected to the other end of the conductive member, and the other end of the second extension member extends along the first side of the base circuit board to the edge of the board. The second vertical member is disposed at the edge of the board within the molding layer, and one end of the second vertical member is connected to the other end of the second extension member. The other end of the second vertical member penetrates the second layer and the first layer until the first side of the molding layer is exposed.

[0011] The conductive component includes a fifth connecting hole, a conductive portion, and a sixth connecting hole connected in sequence. The fifth and sixth connecting holes are disposed within the second layer, and the conductive portion is attached to the side of the second layer away from the base circuit board. One end of the fifth connecting hole is connected to the first surface, and the other end of the fifth connecting hole is connected to one end of the conductive portion. The other end of the conductive portion is connected to one end of the sixth connecting hole, and the other end of the sixth connecting hole is connected to one end of the second extension. The second vertical component includes a seventh connecting hole and an eighth connecting hole connected in sequence. The seventh connecting hole is disposed within the second layer, and the eighth connecting hole is disposed within the first layer. One end of the seventh connecting hole is connected to the other end of the second extension, and the end of the eighth connecting hole away from the seventh connecting hole is exposed on the first side of the molding layer.

[0012] The embedded chip package further includes: conductive lines; the conductive lines are arranged on the first side and / or the second layer away from the base circuit board; wherein the distance between the conductive lines and the connectors is greater than 0.3 mm.

[0013] The embedded chip package further includes: a heat dissipation device; the heat dissipation device is attached to the second side of the base circuit board, the second side of the base circuit board being the opposite side of the first side of the base circuit board; the heat dissipation device includes an insulating plate and a heat sink; the insulating plate is fixed and attached to the second side of the base circuit board, and the heat sink is fixed and attached to the side of the insulating plate away from the base circuit board.

[0014] The insulating board includes a first metal layer, an insulating layer, and a second metal layer that are stacked and bonded together in sequence. The first metal layer is also bonded to the second side of the metal substrate, and the second metal layer is also bonded to the side of the heat sink near the metal substrate. The first metal layer is bonded to the second side of the base circuit board and the second side of the metal substrate. The length of the side connection path between the side of the first metal layer and the heat sink is greater than 0.3 mm.

[0015] The chip has a side away from the metal substrate that is flush with the first surface; the step also includes a third surface, with the second surface protruding from the third surface; and the other end of the first connector extends horizontally across the third surface within the molding layer to the first side of the base circuit board.

[0016] To address the aforementioned technical issues, the embedded chip package of this application forms a step with a first surface and a second surface on the first side of a metal substrate. This reduces the thickness of the second surface. When the first connector of the chip extends horizontally across the second surface within the molding compound to the first side of the base circuit board, the step increases the distance between the second surface and the first connector, ensuring electrical insulation between them. This guarantees electrical insulation between different chip leads during lateral routing, improving the safety and reliability of the embedded chip package. Furthermore, after crossing the second surface, the first connector extends along the first side of the base circuit board to the edge. The molding compound can encapsulate this portion of the first connector, reducing leakage or electrical breakdown between the connector and the outside environment. It also provides more wiring space for other conductive lines in the area corresponding to the extended region of the molding compound, increasing the wiring freedom of the embedded chip package. [Attached Image Description]

[0017] Figure 1 is a schematic diagram of the structure of the first embodiment of the chip embedded package provided in this application;

[0018] Figure 2 is a schematic diagram of the structure of the second embodiment of the chip embedded package provided in this application;

[0019] Figure 3 is an enlarged schematic diagram of the first connector in Figure 2;

[0020] Figure 4 is an enlarged schematic diagram of the second connector in Figure 2;

[0021] Figure 5 is a partial structural diagram of the metal substrate and the heat sink;

[0022] Figure 6 is a top view of the first side of the metal substrate;

[0023] Figure 7 is a schematic diagram of another embodiment of the metal substrate;

[0024] Figure 8 is a structural schematic diagram of the third embodiment of the chip embedded package provided in this application;

[0025] Figure 9 is a structural schematic diagram of the fourth embodiment of the chip embedded package provided in this application.

Detailed Implementation Methods

[0026] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0027] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0028] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0029] Please refer to Figure 1, which is a schematic diagram of the structure of the first embodiment of the chip embedded package provided in this application.

[0030] The embedded chip package 100 of this embodiment includes: a base circuit board 110, at least one chip unit 112, a molding layer 140, and a plurality of connectors 150.

[0031] The base circuit board 110 is a pre-fabricated PCB (Printed Circuit Board) that serves as the basic framework for chip embedding; the circuitry of the base circuit board 110 is patterned. The base circuit board 110 can be a multilayer board with only through-hole interconnects, or an HDI (High Density Interconnect) board with blind via interconnects. The specific structure of the base circuit board 110 is set according to actual requirements (not shown in the figure).

[0032] The chip unit 112 is fixedly installed in the corresponding mounting slot 111. The chip unit 112 includes at least one metal substrate 120 and at least one chip 130. The chip 130 may include a power chip, such as an IGBT (Insulated-Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), or other devices such as diodes, electron tubes, electromechanical components, etc., which are not specifically limited here. The metal substrate 120 may be made of copper, molybdenum copper, tungsten copper, etc., to conduct heat and electricity to the chip 130. Its coefficient of thermal expansion (CTE) is 5 to 20 ppm / ℃. This range of CTE matches the expansion coefficient of the chip 130, thereby maintaining structural stability between the thermal expansion of the chip 130 and the metal substrate 120, reducing stress caused by the difference in thermal expansion, and improving the connection stability between the chip 130 and the metal substrate 120.

[0033] The embedded chip package 100 may include multiple chip units 112, and each chip unit 112 may include multiple chips 130, depending on actual needs.

[0034] At least one mounting groove 111 is formed on the first side 117 of the base circuit board 110, and the chip unit 112 is fixedly mounted in the corresponding mounting groove 111. The mounting groove 111 is a through groove. One or more chip units 112 can be disposed on a base circuit board 110. The first side 117 of the base circuit board 110 is in the same direction as the first side of the metal substrate 120 and the first side of the chip 130.

[0035] The molding compound 140 is bonded to the first side 117 of the base circuit board 110 and fills the gap between the base circuit board 110 and at least one chip unit 112 for insulating encapsulation and device fixation. The molding compound 140 includes, but is not limited to, one or more insulating materials such as epoxy resin, polyester resin (PET), polyimide, polyimide, polycarbonate (PC), bismaleimide triazine (BT), Ajinomoto build film (ABF), FR4 resin, and ceramic matrix.

[0036] One end of each connector 150 is connected to the corresponding electrode of the chip 130, and the other end of each connector 150 extends to the first side of the molding layer 140 for exposure, so as to bring out the signal of the chip 130 to the outside.

[0037] The metal substrate 120 has a step formed on its first side, which has a first surface 131 and a second surface 132. The chip 130 is fixedly connected to the second surface 132. The first surface 131 protrudes from the second surface 132, and the second surface 132 extends to at least one edge of the metal substrate 120. That is, the thickness of the second surface 132 of the metal substrate 120 is lower than the thickness of the first surface 131.

[0038] The connector 150 includes a first connector 151. One end of the first connector 151 is connected to the first side of the chip 130, and the other end of the first connector 151 extends horizontally across the second surface 132 within the molding compound 140 to the first side 117 of the base circuit board 110, and extends along the first side 117 of the base circuit board 110 to the edge of the board for exposure. The projection of the first connector 151 onto the metal substrate 120 is located on the second surface 132. In this embodiment, the edge of the board refers to the edge region, not that the connector is exposed at the edge. The edge region has a certain width, and some connectors are disposed within this width and are enclosed by the board to improve external insulation.

[0039] The embedded chip package 100 needs to route the signals of the chip 130 to the edge of the board for external device connection. The embedded chip package 100 may include multiple chips 130. When the signals of multiple chips 130 are routed to the edge of the board, lateral traces are often required. The signals led out from the top of the chip 130 and the signals led out from the bottom of the chip 130 belong to different connection networks. In this embodiment, in order to ensure the electrical insulation of the lateral traces, a stepped structure is set to reduce the thickness of the second surface 132. Therefore, when the first connector 151 of the chip 130 extends horizontally across the second surface 132 within the molding layer 140 to the first side 117 of the base circuit board 110, the step structure can be used to increase the distance between the second surface 132 and the first connector 151, thereby ensuring the electrical insulation characteristics between the second surface 132 and the first connector 151, that is, ensuring the electrical insulation between the different signals led out of the chip 130 and other connection networks when lateral traces are routed. The second side of the base circuit board 110 can be insulated from the outside world by means of pressing an insulating layer or setting other insulating structures.

[0040] Furthermore, in this embodiment, after crossing the second surface 132, the first connector 151 extends along the first side 117 of the base circuit board 110 to the edge of the board. This allows the molding compound 140 to wrap the portion of the first connector 151, reducing leakage or electrical breakdown between the first connector 151 and the outside world. It also allows for more wiring space for other conductive lines in the area corresponding to the extended region of the molding compound 140, increasing the wiring freedom of the chip embedded package 100.

[0041] Through the above structure, the embedded chip package of this embodiment forms a step with a first surface and a second surface on the first side of the metal substrate to reduce the thickness of the second surface. Therefore, when the first connector of the chip extends horizontally across the second surface within the molding compound to the first side of the base circuit board, the step design increases the distance between the second surface and the first connector, ensuring electrical insulation between them. This guarantees electrical insulation between different lead-out signals of the chip during lateral routing, improving the safety and reliability of the embedded chip package. Furthermore, after crossing the second surface, the first connector extends along the first side of the base circuit board to the edge of the board. The molding compound can encapsulate this portion of the first connector, reducing leakage or electrical breakdown between the first connector and the outside world. It also allows for more wiring space for other conductive lines in the area corresponding to the extended region of the molding compound, increasing the wiring freedom of the embedded chip package.

[0042] Please refer to Figure 2, which is a structural schematic diagram of the second embodiment of the chip embedded package provided in this application.

[0043] The positions and connections between the base circuit board 210, at least one chip unit, molding layer L, and multiple connectors in the embedded chip package 200 of this embodiment are the same as in the previous embodiment. Furthermore, this embodiment also includes:

[0044] In some embodiments, the molding compound L includes a filler layer L0, a first layer L1, and a second layer L2. The filler layer L0 is disposed within the mounting groove 211, filling the gap between the mounting groove 211 and the chip unit. The second layer L2 is stacked and bonded to a first side of the base circuit board 210, and the first layer L1 and the second layer L2 are stacked and bonded to the side of the base circuit board 210 away from the base circuit board 210. The filler layer L0, the first layer L1, and the second layer L2 are fused together after being pressed.

[0045] The end of the first connector 250 away from the chip 220 extends horizontally across the second surface 232 on the side of the second layer L2 away from the base circuit board 210, reaching the first side of the base circuit board 210. This results in a distance equal to the thickness of the second layer L2 + the fill layer L0 between this portion of the first connector 250 and the second surface 232, thereby increasing the distance between the first connector 250 and the second surface 232. Insulation is provided by the molding layer L, thereby reducing the occurrence of leakage or electrical breakdown between the first connector 250 and the second surface 232, ensuring the electrical insulation characteristics between the second surface 232 and the first connector 250. Furthermore, the portion of the first connector 250 that spans the second surface 232 is sandwiched between the first layer L1 and the second layer L2, which can further reduce leakage or electrical breakdown between the first connector 250 and the outside world, further improving the overall insulation effect, safety, and reliability of the chip-embedded package 200.

[0046] In some embodiments, a gate and a transmission electrode are disposed on a first side of the chip 220, and another transmission electrode is disposed on a second side of the chip 220. A first connector 250 is connected to the transmission electrode on the first side of the chip 220 to guide the signal of the transmission electrode to the edge of the board for docking with external devices, and a metal substrate 230 is connected to a transmission electrode on the second side of the chip 220.

[0047] Chip 220 includes power chips such as insulated gate bipolar transistors (IGBT chips) or metal-oxide-semiconductor field-effect transistors (MOS chips).

[0048] The transfer electrode (not shown) includes a current input stage and a current output stage. When chip 220 is an insulated-gate bipolar transistor, the transfer electrode can be the emitter or collector; when chip 220 is a metal-oxide-semiconductor field-effect transistor, the transfer electrode can be the source or drain. The specific types of the transfer electrode connected to the first connector 250 and the other transfer electrode connected to the metal substrate 230 can be arbitrarily set or interchanged based on the chip type and actual needs, and are not limited here. For example, when chip 220 is a metal-oxide-semiconductor field-effect transistor, the electrode connected to the first connector 250 can be the source and the electrode connected to the metal substrate 230 can be the drain; or the electrode connected to the first connector 250 can be the drain and the electrode connected to the metal substrate 230 can be the source.

[0049] In some embodiments, the first connector 250 includes a transverse member 251, a first extension member 252, and a first vertical member 253 connected in sequence.

[0050] One end of the transverse member 251 is connected to the first side of the chip 220, specifically to the transmission electrode on that side. The other end of the transverse member 251 crosses the second surface 232 on the side of the second layer L2 away from the base circuit board 210 to reach the first side of the base circuit board 210. The transverse member 251 is used to transmit the signal from the transmission electrode on the first side of the chip 220 to the first side of the base circuit board 210.

[0051] One end of the first extension 252 is connected to the other end of the cross member 251, and the other end of the first extension 252 extends along the first side of the base circuit board 210 to the edge of the board. The first extension 252 is used to transmit the signal from the transmission electrode on the first side of the chip 220 to the edge of the first side of the base circuit board 210.

[0052] A first vertical member 253 is disposed on the edge of the board within the molding layer L. One end of the first vertical member 253 is connected to the other end of the first extension member 252, and the other end of the first vertical member 253 penetrates through the second layer L2 and the first layer L1 until the first side of the molding layer L is exposed. The first vertical member 253 is used to vertically transmit signals from the edge of the first side of the base circuit board 210 to the outer edge of the first layer L1 for external connection.

[0053] The above structure, by combining the transverse member 251 with the reduced-thickness second surface 232, increases the vertical distance between the first connector 250 and the second surface 232, another transmission network at the bottom of the chip 220, reducing the occurrence of leakage or electrical breakdown between the first connector 250 and the second surface 232, and ensuring the electrical insulation characteristics between the second surface 232 and the first connector 250. The first extension member 252 extends towards the edge on the first side of the base circuit board 210, freeing up space between the first layer L1 and the second layer L2 on the first extension member 252 to facilitate wiring of the conductive lines 290. Furthermore, the first connector 250 vertically guides the signal from the first edge of the base circuit board 210 to the edge of the first layer L1 away from the base circuit board 210, thereby facilitating external connections.

[0054] In some embodiments, the thickness of the lines and connectors on the first side of the base circuit board 210 can be greater than or equal to 100 micrometers to meet the conductivity requirements of various connectors and lines.

[0055] Please refer to Figure 3 for further details. Figure 3 is an enlarged schematic diagram of the first connector in Figure 2.

[0056] In some embodiments, the span 251 includes a first connecting hole 2511, a span portion 2512, and a second connecting hole 2513 connected in sequence; wherein, each connecting hole in this embodiment is a metallized hole with conductive conductivity.

[0057] The first connection hole 2511 and the second connection hole 2513 are disposed in the second layer L2, and the transverse portion 2512 is attached to the side of the second layer L2 away from the base circuit board 210. One end of the first connection hole 2511 is connected to the first side of the chip 220, the other end of the first connection hole 2511 is connected to one end of the transverse portion 2512, the other end of the transverse portion 2512 is connected to one end of the second connection hole 2513, and the other end of the second connection hole 2513 is connected to one end of the first extension 252 on the first side of the base circuit board 210.

[0058] The first connecting hole 2511, the cross section 2512 and the second connecting hole 2513 form a bridge structure. The cross section 251 is first led up to the second layer L2 through the first connecting hole 2511, crosses the second surface 232 and then leads down to the first side of the base circuit board 210, thereby increasing the distance upward, while the second surface 232 increases the distance downward, thereby doubly increasing the distance between the first connecting section 250 and the second surface 232.

[0059] The first vertical member 253 includes a third connecting hole 2531 and a fourth connecting hole 2532 connected in sequence. The third connecting hole 2531 is disposed in the second layer L2, and the fourth connecting hole 2532 is disposed in the first layer L1. One end of the third connecting hole 2531 is connected to the other end of the first extension member 252, and the end of the fourth connecting hole 2532 away from the third connecting hole 2531 is exposed on the first side of the molding layer L. The third connecting hole 2531 and the fourth connecting hole 2532 form a vertical stacked hole to guide the signal upward. In order to prevent the first connector 250 from leaking electricity to the outside, a sufficient thickness needs to be set on the molding layer L on the first side of the base circuit board 210. However, if the first layer L1 and the second layer L2 are pressed together at once, the first vertical component 253 will not be able to be fully electroplated due to the excessive thickness of the single pressing. Therefore, by setting the first layer L1 and the second layer L2 and the corresponding double stacked hole design of the first vertical component 253, the thickness of the molding layer L on the first side of the base circuit board 210 and the conductivity of the first vertical component 253 are ensured at the same time.

[0060] Please refer back to Figure 2. The connector also includes a second connector 270, which includes a conductor 273, a second extension 272, and a second vertical member 271 connected in sequence.

[0061] One end of the conductive element 273 is connected to the first surface 231. Since the chip 220 is connected to the second surface 232, the conductive element 273 is actually connected to another transmission electrode on the second side of the chip 220 through the metal substrate 230, and the signal of the transmission electrode is drawn up through the first surface 231 of the metal substrate 230.

[0062] The other end of the conductive element 273 reaches the first side of the base circuit board 210. The conductive element 273 is used to transmit the signal of the transmission electrode on the second side of the chip 220 from the first surface 231 to the first side of the base circuit board 210. The first side of the base circuit board 210 contacted by the conductive element 273 of the second connector 270 is in a different location area from the first side of the base circuit board 210 contacted by the first connector 250, so as to isolate them from each other.

[0063] One end of the second extension 272 is connected to the other end of the conductor 273, and the other end of the second extension 272 extends along the first side of the base circuit board 210 to the edge of the board. The second extension 272 is used to transmit the signal of the transmission electrode on the second side of the chip 220 to other edges on the first side of the base circuit board 210, i.e., edges different from the first connector 250.

[0064] The second vertical member 271 is disposed on the edge of the board within the molding layer L. One end of the second vertical member 271 is connected to the other end of the second extension member 272, and the other end of the second vertical member 271 penetrates through the second layer L2 and the first layer L1 until the first side of the molding layer L is exposed. The second vertical member 271 is used to vertically transmit the signal corresponding to the edge of the first side of the base circuit board 210 to other edges outside the first layer L1 for external connection, i.e., edges different from the first connector 250.

[0065] The above structure connects the first surface 231 and the first side of the base circuit board 210 via the conductor 273 for signal transmission. A second extension 272 extends along the edge of the first side of the base circuit board 210, creating space between the first layer L1 and the second layer L2 on the second extension 272 to facilitate wiring of conductive lines. Furthermore, a second connector 270 vertically guides the signal from the edge of the first side of the base circuit board 210 to the edge of the first layer L1 away from the base circuit board 210, thereby facilitating external connections.

[0066] Please refer to Figure 4 for further details. Figure 4 is an enlarged schematic diagram of the second connector in Figure 2.

[0067] The conductive member 273 includes a fifth connecting hole 2733, a conductive part 2732 and a sixth connecting hole 2731 connected in sequence; wherein, each connecting hole in this embodiment is a metallized hole and has the ability to conduct electricity.

[0068] The fifth connecting hole 2733 and the sixth connecting hole 2731 are disposed in the second layer L2, and the conductive part 2732 is attached to the side of the second layer L2 away from the base circuit board 210; one end of the fifth connecting hole 2733 is connected to the first surface 231, the other end of the fifth connecting hole 2733 is connected to one end of the conductive part 2732, the other end of the conductive part 2732 is connected to one end of the sixth connecting hole 2731, and the other end of the sixth connecting hole 2731 is connected to one end of the second extension 272.

[0069] In this embodiment, the fifth connecting hole 2733, the conductive part 2732, and the sixth connecting hole 2731 can form a bridge structure. First, the cross member 251 is led up to the second layer L2 through the fifth connecting hole 2733, crosses the mounting groove 211, and then is led down to the first side of the base circuit board 210. In other embodiments, the conductive part 273 may also include other structures, such as a connector that directly and horizontally connects the first surface 231 to the first side of the base circuit board 210. The connection structure of this part is not limited and is determined based on the process selection. The first surface 231 is flush with the first side of the base circuit board 210.

[0070] The second vertical member 271 includes a seventh connecting hole 2712 and an eighth connecting hole 2711 connected in sequence. The seventh connecting hole 2712 is disposed in the second layer L2, and the eighth connecting hole 2711 is disposed in the first layer L1. One end of the seventh connecting hole 2712 is connected to the other end of the second extension member 272, and the end of the eighth connecting hole 2711 away from the seventh connecting hole 2712 is exposed on the first side of the molding layer L. In order to prevent leakage of the second connecting member 270, a sufficient thickness needs to be provided on the molding layer L on the first side of the base circuit board 210. However, if the first layer L1 and the second layer L2 are laminated at once, the second vertical member 271 will not be fully electroplated due to the excessive thickness of the single lamination. Therefore, by using the dual setting of the first layer L1 and the second layer L2 and the corresponding double-stacked hole design of the second vertical member 271, the thickness of the molding layer L on the first side of the base circuit board 210 and the conductivity of the second vertical member 271 are ensured at the same time.

[0071] Please refer back to Figure 2. In some embodiments, the chip embedded package 200 further includes a third connector 280; one end of the third connector 280 is connected to the gate on the first side of the chip 220, and the other end of the third connector 280 passes through the molding compound L and is exposed on the first side of the molding compound L.

[0072] In a specific application scenario, the third connector 280 may include a ninth connector hole (not shown in the figure) and a tenth connector hole (not shown in the figure) that are stacked together. One end of the ninth connector hole is connected to the gate on the first side of the chip 220, and the end of the tenth connector hole away from the ninth connector hole is exposed on the first layer L1.

[0073] In a specific application scenario, the third connector 280 may include a metal base, which is inserted into the first layer L1 and the second layer L2 to connect with the gate of the chip 220. The specific structure of the third connector 280 is not limited here.

[0074] The third connector 280 can extend to the edge of the first layer L1 plate after the first layer L1 is exposed, so as to connect to the external structure.

[0075] In some embodiments, the embedded chip package 200 further includes: conductive lines 290; the conductive lines 290 are basic lines on the embedded chip package 200 used to implement electrical functions.

[0076] Conductive lines 290 are arranged on the first side of the base circuit board 210 and / or the side of the second layer L2 away from the base circuit board 210; wherein, the distance between the conductive lines 290 and the connectors is greater than 0.3 mm, so as to standardize the minimum distance between different connection networks in the chip embedded package 200 and ensure the electrical insulation characteristics between the connection networks.

[0077] The specific spacing between different connection networks may include, but is not limited to, 0.3 mm, 0.4 mm, 0.5 mm, 0.8 mm, 1.0 mm, 2.0 mm, or 3.0 mm, etc.

[0078] The thickness of the base circuit board 210, the spacing between each connector and the metal substrate 230, and the spacing between the lateral trace area of ​​the connector connected to the transmission electrode of the chip 220 and the outside world can all be greater than 0.3 mm, so as to further improve the overall electrical insulation effect of the chip embedded package 200.

[0079] In some embodiments, the chip embedded package 200 further includes: a heat dissipation device 267; the heat dissipation device 267 is attached to the second side of the base circuit board 210, the second side of the base circuit board 210 is the opposite side of the first side of the base circuit board 210; the second side of the metal substrate 230 is in the same direction as the second side of the base circuit board 210 and the second side of the chip 220.

[0080] The heat dissipation device 267 includes an insulating plate 260 and a heat sink 264; the insulating plate 260 is fixed and attached to the second side of the base circuit board 210, and the heat sink 264 is fixed and attached to the side of the insulating plate 260 away from the base circuit board 210.

[0081] The heat dissipation device 267 in this embodiment can be obtained by welding an insulating plate 260 onto the heat sink 264. The welding can include tin reflow soldering, silver sintering, etc. The heat sink 264 includes a metal heat sink, an air-cooled heat sink, or a liquid-cooled heat sink.

[0082] In a specific application scenario, the heat sink 264 may include a protruding heat dissipation structure 266 and a main body plate 265. The main body plate 265 is fixed and attached to the side of the insulating plate 260 away from the base circuit board 210. The protruding heat dissipation structure 266 is fixedly disposed on the side of the main body plate 265 away from the insulating plate 260. The shape of the protruding heat dissipation structure 266 may include, but is not limited to, one or more of the following: columnar, corrugated, finned, and slatted. The material of the heat sink 264 may include, but is not limited to, copper, aluminum, and stainless steel. The heat sink 264 may be a metal heat sink, an air-cooled heat sink, or a liquid-cooled heat sink, etc., and the specific type is not limited here.

[0083] By fixing and attaching the insulating plate 260 to the second side of the base circuit board 210, the insulating plate 260 can be used to insulate and protect the second side of the base circuit board 210, preventing leakage of current from the second side of the base circuit board 210 to the heat sink 264 or the outside world.

[0084] In some embodiments, the insulating plate 260 includes a first metal layer 261, an insulating layer 263, and a second metal layer 262 that are stacked and bonded together in sequence. The first metal layer 261 is also bonded to a second side of the metal substrate 230, and the second metal layer 262 is also bonded to the side of the heat sink 264 near the metal substrate 230.

[0085] The first metal layer 261 is used to weld and fix the metal substrate 230 to the insulating layer 263, and the second metal layer 262 is used to weld and fix the insulating layer 263 to the heat sink 264. The insulating plate 260 stacked as described above achieves the positional fixation of the insulating layer 263 and the heat sink 264.

[0086] The first metal layer 261 and the second metal layer 262 can be bonded and fixed by direct bonding or welding.

[0087] The thickness of both the first metal layer 261 and the second metal layer 262 ranges from 0.01 mm to 1.00 mm, specifically 0.05 mm, 0.11 mm, 0.17 mm, 0.25 mm, 0.3 mm, 0.45 mm, 0.52 mm, 0.63 mm, 0.75 mm, 0.8 mm, 0.95 mm, or 1.00 mm. The first metal layer 261 and the second metal layer 262 may have the same or different thicknesses, and the material includes one or more of copper, aluminum, silver, titanium, tin, molybdenum, and tungsten.

[0088] In this embodiment, the insulating board 260 can be pre-prepared and then welded to the base circuit board 210 to independently achieve high-temperature welding between the first metal layer 261 and the second metal layer 262 and the insulating layer 263, and to avoid the high temperature affecting the reliability of the base circuit board 210.

[0089] In some embodiments, the first metal layer 261 is bonded to the second side of the base circuit board 210 and the second side of the metal substrate 230.

[0090] The length of the lateral connection path between the side of the first metal layer 261 and the heat sink 264 is greater than 0.3 mm. Since the first metal layer 261 is connected to the metal substrate 230, it also belongs to the connection network. Therefore, the length of the lateral connection path between the side of the first metal layer 261 and the heat sink 264 is limited to be greater than 0.3 mm. That is, the sum of the distance from the side edge of the first metal layer 261 to the side edge of the insulating layer 263 and the thickness of the insulating layer 263 must be at least greater than 0.3 mm. This distance limitation can be achieved by recessing the first metal layer 261. The recessed area of ​​the first metal layer 261 is filled with the molding compound on the base circuit board 210.

[0091] Please refer to Figure 5, which is a partial structural diagram of the metal substrate and the heat sink.

[0092] The lateral connection path S between the metal substrate 230 and the heat sink 264 is composed of the sum of the distance between the edge of the connection network where the metal substrate 230 is located and the edge of the insulating plate 260, and the thickness X of the insulating plate 260. That is, S = P + X; that is, the minimum path length that may cause current breakdown needs to be greater than 0.3 mm to prevent electrical breakdown and improve the external insulation effect on the metal substrate 230.

[0093] In this embodiment, the side connection path S can be the distance between the edge of the first metal layer 261 and the edge of the insulating plate 260.

[0094] The structure of the above-mentioned embedded chip package 200 can use the first metal layer 261 to fix the metal substrate 230 and the insulating layer 263, and use the second metal layer 262 to fix the insulating layer 263 and the heat sink 264. The arrangement of the metal substrate 230 can also improve the heat dissipation efficiency of the embedded chip package 200.

[0095] In some embodiments, the insulating layer 263 of the insulating plate 260 includes a ceramic layer and / or a resin layer.

[0096] When the insulating layer 263 is a ceramic layer, the thickness of the ceramic layer is greater than 0.05 mm; specifically, it can be 0.05 mm, 0.10 mm, 0.16 mm, 0.25 mm, 0.32 mm, 0.45 mm, 0.52 mm, 0.68 mm, 0.71 mm, 0.8 mm, 0.95 mm, or 1.00 mm, etc. Within this range, the insulating layer 263 can provide insulating protection for the bottom of the base circuit board 210.

[0097] The insulating layer 263 can be one or more of aluminum oxide, silicon nitride, aluminum nitride, beryllium oxide, diamond, etc. The above-mentioned ceramic materials can not only achieve insulation protection, but also ensure the thermal conductivity of the insulating layer 263, which can reach 80W / mK or even 1200W / mK, far exceeding materials such as silicone grease and resin, thus achieving a significant improvement in heat dissipation efficiency.

[0098] In some embodiments, when the insulating layer 263 is a ceramic layer, the first metal layer 261 is bonded to the second side of the metal substrate 230 via a solder layer (not shown); the solder layer may include a solder layer near the first metal layer 261 and a soldering auxiliary metal layer covering the second side surfaces of the metal substrate 230 and the base circuit board 210. The ceramic layer is larger than the metal substrate 230 but not larger than the base circuit board 210.

[0099] When the insulating layer 263 is a resin layer, the thickness of the resin layer is greater than 0.3 mm. Specifically, it may include, but is not limited to, 0.3 mm, 0.5 mm, 0.6 mm, 0.8 mm, 1.0 mm, or 1.5 mm.

[0100] The resin layer includes, but is not limited to, one or more of the following insulating materials: prepreg, epoxy resin, polyester resin (PET), polyimide, polyimide, polycarbonate (PC), bismaleimide triazine (BT), Ajinomoto build film (ABF), FR4 resin, and ceramic-based materials.

[0101] In some implementations, when the insulating layer 263 is a resin layer, the first metal layer 261 may not be necessary, and the insulating layer 263 may be directly bonded to the second side of the metal substrate 230 by resin bonding.

[0102] In some embodiments, the step height difference between the first surface 231 and the second surface 232 is close to the thickness of the chip 220. Specifically, the step height difference can be from -10% to +20% relative to the thickness of the chip 220, so that the first surface 231 and the first side of the chip 220 can be connected to the corresponding connector.

[0103] In some embodiments, the second surface 232 needs to extend to at least one edge of the metal substrate 230 so that the cross member 251 is configured using the extension of the second surface 232, such that the projection of the cross member 251 on the metal substrate 230 is all located on the second surface 232, that is, the entire area below the cross member 251 is the second surface 232, which ensures the insulation between the cross member 251 and the second surface 232, and also allows the cross member 251 to be led to the first side of the base circuit board 210 after the shortest possible lateral distance.

[0104] Please refer to Figure 6, which is a top view of the first side of the metal substrate.

[0105] Please refer to 6(a) in Figure 6, which is an embodiment of the second surface 232 extending to a side.

[0106] Please refer to 6(b) in Figure 6, which is an embodiment of the second surface 232 extending to three sides.

[0107] Please refer to 6(c) in Figure 6, which is another embodiment of the second surface 232 extending to three sides.

[0108] Please refer to 6(d) in Figure 6, which is another embodiment of the second surface 232 extending to three sides.

[0109] Please refer to 6(e) in Figure 6, which is an embodiment of the second surface 232 extending to the four sides.

[0110] The specific settings between the second surface 232 and the first surface 231 are not limited here, and can be set according to actual needs.

[0111] Please refer to Figure 7, which is a structural schematic diagram of another embodiment of the metal substrate.

[0112] In some embodiments, the side of the chip 320 away from the metal substrate 330 is flush with the first surface 331.

[0113] When the chip 320 is relatively thin, since the first side of the chip 320 needs to be flush with the first surface 331, the thickness of the second surface 332 may be reduced to be insufficient to meet the insulation requirements. Therefore, in these embodiments, the step may also include a third surface 333, with the second surface 332 protruding from the third surface 333. The second surface 332 is used to mount the chip, and the third surface 333 is used to increase the insulation spacing.

[0114] Furthermore, the other end of the first connector extends horizontally across the third surface 333 within the molding layer to the first side of the base circuit board. That is, the projection of the first connector on the metal substrate 330 is located on the third surface 333.

[0115] The combined shape of the second surface 332 and the third surface 332 can be similar to that of the second surface in Figure 6 above, and will not be described again.

[0116] Please refer to Figure 8, which is a structural schematic diagram of the third embodiment of the chip embedded package provided in this application.

[0117] In the chip-embedded package 400 of this embodiment, a lamination insulating layer 420 can be added between the base circuit board 410 and the heat dissipation device 465 to form a symmetrical lamination with the first layer and the second layer, thereby mitigating the internal stress of the upper single-area layer and reducing product warpage. The thickness of the lamination insulating layer 420 is preferably the same as or close to the sum of the thickness of the first layer and the second layer. Specifically, one side of the lamination insulating layer 420 is bonded to the second side of the base circuit board 410, and the other side of the lamination insulating layer 420 is bonded to the first metal layer 461.

[0118] Electrical wiring or heat sinks can also be installed within the laminated insulating layer 420, depending on actual needs. Other conductive lines can also be installed on the second side of the base circuit board 410.

[0119] Other features of the chip embedded package 400 in this embodiment are the same as those in the previous embodiments. Please refer to the previous text for further details.

[0120] Please refer to Figure 9, which is a structural schematic diagram of the fourth embodiment of the chip embedded package provided in this application.

[0121] In some embodiments, the projected size of the insulating layer 563 on the base circuit board 510 is smaller than the projected size of the mounting groove 511 on the base circuit board 510, and the projected size of the insulating layer 563 on the base circuit board 510 is larger than the projected size of the metal substrate 530 on the base circuit board 510; that is, the portion of the metal substrate 530 overlapping with the heat sink 560 must be isolated and insulated by the insulating layer 563 to improve the insulation effect of the metal substrate 530.

[0122] The projection size of the first metal layer on the base circuit board 510 is not less than the projection size of the metal substrate 530 on the base circuit board 510.

[0123] The side of insulating layer 563 furthest from chip 520 is flush with the second side of base circuit board 510.

[0124] The structure of the chip embedded package 500 described above places the insulating layer 563 directly in the mounting groove 511, providing another insulating structure on the second side of the metal substrate 530. The above arrangement can also use the first metal layer 561 to fix the metal substrate 530 and the insulating layer 563, and use the second metal layer 562 to fix the insulating layer 563 and the heat sink 560. The arrangement of the metal substrate 530 can also improve the heat dissipation efficiency of the chip embedded package 500.

[0125] Other features of the chip embedded package 500 in this embodiment are the same as those in the previous embodiments. Please refer to the previous text for further details.

[0126] Through the above structure, the embedded chip package of this embodiment forms a step with a first surface and a second surface on the first side of the metal substrate to reduce the thickness of the second surface. Therefore, when the first connector of the chip extends horizontally across the second surface to the first side of the base circuit board within the molding compound, the step increases the distance between the second surface and the first connector, ensuring electrical insulation between them. This guarantees electrical insulation between different lead signals of the chip during lateral routing, improving the safety and reliability of the embedded chip package. Furthermore, after crossing the second surface, the first connector extends along the first side of the base circuit board to the edge. The molding compound can encapsulate this portion of the first connector, reducing leakage or electrical breakdown between the first connector and the outside world. It also provides more wiring space for other conductive lines in the area corresponding to the extended region of the molding compound, increasing the wiring freedom of the embedded chip package. This application specifies the shape of the metal substrate in the module and the layout methods of various lines, ensuring the electrical insulation characteristics of the high-voltage lines and avoiding the risk of electrical aging and insulation failure of the module under high voltage and high switching frequency conditions.

[0127] The above are merely embodiments of this application and do not limit the scope of this patent application. Any equivalent structural or procedural changes made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A chip-embedded package, wherein, The embedded chip package includes: A base circuit board, wherein at least one mounting groove is formed on a first side of the base circuit board; At least one chip unit is fixedly mounted in a corresponding mounting slot. The chip unit includes at least one metal substrate and at least one chip. A step with a first surface and a second surface is formed on a first side of the metal substrate, and the chip is fixedly connected to the second surface. The first surface protrudes from the second surface, and the second surface extends to at least one edge of the metal substrate. A molding layer is attached to a first side of the base circuit board and fills the gap between the base circuit board and at least one of the chip units; Multiple connectors, one end of each connector is connected to a corresponding electrode of the chip, and the other end of each connector extends to the first side of the molding compound for exposure; The connector includes a first connector, one end of which is connected to a first side of the chip, and the other end of which extends horizontally across the second surface within the molding layer to the first side of the base circuit board and extends along the first side of the base circuit board to the edge of the board for exposure; wherein the projection of the first connector on the metal substrate is located on the second surface.

2. The chip-embedded package according to claim 1, wherein, The molding layer includes a filler layer, a first layer, and a second layer. The filler layer is disposed within the mounting groove. The second layer is stacked and bonded to a first side of the base circuit board, and the first layer is stacked and bonded to the side of the second layer away from the base circuit board. The other end of the first connector extends horizontally across the second surface on the side of the second layer away from the base circuit board to the first side of the base circuit board.

3. The chip-embedded package according to claim 2, wherein, The chip has a gate and a transmission electrode on its first side, and another transmission electrode on its second side. The first connector is connected to the transmission electrode on the first side of the chip to guide the signal of the transmission electrode to the edge of the board for docking with external devices. The metal substrate is connected to the other transmission electrode on the second side of the chip.

4. The chip-embedded package according to claim 2, wherein, The first connector includes a transverse member, a first extension member, and a first vertical member connected in sequence; One end of the cross member is connected to the first side of the chip, and the other end of the cross member crosses the second surface on the side of the second layer away from the base circuit board to reach the first side of the base circuit board. One end of the first extension is connected to the other end of the cross member, and the other end of the first extension extends along the first side of the base circuit board to the edge of the board. The first vertical member is disposed within the molding layer and located at the edge of the plate. One end of the first vertical member is connected to the other end of the first extension member, and the other end of the first vertical member penetrates through the second layer and the first layer until it is exposed on the first side of the molding layer.

5. The chip-embedded package according to claim 4, wherein, The cross member includes a first connecting hole, a cross portion, and a second connecting hole connected in sequence; the first connecting hole and the second connecting hole are disposed within the second layer, and the cross portion is fitted onto the side of the second layer away from the base circuit board; one end of the first connecting hole is connected to the first side of the chip, the other end of the first connecting hole is connected to one end of the cross portion, the other end of the cross portion is connected to one end of the second connecting hole, and the other end of the second connecting hole is connected to one end of the first extension member; The first vertical member includes a third connecting hole and a fourth connecting hole connected in sequence. The third connecting hole is disposed in the second layer, and the fourth connecting hole is disposed in the first layer. One end of the third connecting hole is connected to the other end of the first extension member, and the end of the fourth connecting hole away from the third connecting hole is exposed on the first side of the molding layer.

6. The embedded chip package according to claim 3, wherein, The connector further includes a second connector, which includes a conductive member, a second extension member, and a second vertical member connected in sequence. One end of the conductive element is connected to the first surface, and the other end of the conductive element reaches the first side of the base circuit board; One end of the second extension is connected to the other end of the conductor, and the other end of the second extension extends along the first side of the base circuit board to the edge of the board. The second vertical member is disposed on the edge of the plate within the molding layer. One end of the second vertical member is connected to the other end of the second extension member, and the other end of the second vertical member penetrates through the second layer and the first layer until the first side of the molding layer is exposed.

7. The chip-embedded package according to claim 6, wherein, The conductive component includes a fifth connecting hole, a conductive portion, and a sixth connecting hole connected in sequence; the fifth connecting hole and the sixth connecting hole are disposed within the second layer, and the conductive portion is attached to the side of the second layer away from the base circuit board; one end of the fifth connecting hole is connected to the first surface, the other end of the fifth connecting hole is connected to one end of the conductive portion, the other end of the conductive portion is connected to one end of the sixth connecting hole, and the other end of the sixth connecting hole is connected to one end of the second extension component; The second vertical member includes a seventh connecting hole and an eighth connecting hole connected in sequence. The seventh connecting hole is disposed in the second layer, and the eighth connecting hole is disposed in the first layer. One end of the seventh connecting hole is connected to the other end of the second extension member, and the end of the eighth connecting hole away from the seventh connecting hole is exposed on the first side of the molding layer.

8. The embedded chip package according to claim 3, wherein, The embedded chip package further includes a third connector; one end of the third connector is connected to the gate on the first side of the chip, and the other end of the third connector passes through the molding compound and is exposed on the first side of the molding compound.

9. The chip-embedded package according to claim 8, wherein, The third connector includes a ninth connector and a tenth connector that are stacked together. One end of the ninth connector is connected to the gate on the first side of the chip, and the end of the tenth connector away from the ninth connector is exposed on the first layer.

10. The chip-embedded package according to claim 8, wherein, The third connector includes a metal base and is inserted into the first layer and the second layer to connect to the gate of the chip.

11. The chip-embedded package according to any one of claims 2-10, wherein, The embedded chip package also includes: conductive lines; The conductive lines are laid on the first side of the base circuit board and / or the side of the second layer away from the base circuit board; The distance between the conductive line and the connector is greater than 0.3 mm.

12. The chip-embedded package according to claim 1, wherein, The embedded chip package also includes: A heat dissipation device; the heat dissipation device is attached to the second side of the base circuit board, the second side of the base circuit board being the opposite side of the first side of the base circuit board; the heat dissipation device includes an insulating plate and a heat sink; the insulating plate is fixed and attached to the second side of the base circuit board, and the heat sink is fixed and attached to the side of the insulating plate away from the base circuit board.

13. The chip-embedded package according to claim 12, wherein, The heat dissipation device includes an insulating plate and a heat sink; the insulating plate is fixed and attached to the second side of the base circuit board, and the heat sink is fixed and attached to the side of the insulating plate away from the base circuit board.

14. The embedded chip package according to claim 13, wherein, The heat sink includes a protruding heat dissipation structure and a main body plate. The main body plate is fixed and fitted to the side of the insulating plate away from the base circuit board. The protruding heat dissipation structure is fixedly disposed on the side of the main body plate away from the insulating plate.

15. The embedded chip package according to claim 14, wherein, The shape of the protruding heat dissipation structure includes, but is not limited to, one or more of the following: columnar, corrugated, finned, and slatted.

16. The embedded chip package according to claim 12, wherein, The insulating plate includes a first metal layer, an insulating layer, and a second metal layer that are stacked and bonded together in sequence. The first metal layer is also bonded to a second side of the metal substrate, and the second metal layer is also bonded to the side of the heat sink that is close to the metal substrate. The first metal layer is bonded to the second side of the base circuit board and the second side of the metal substrate; Wherein, the length of the side connection path between the side of the first metal layer and the heat sink is greater than 0.3 mm.

17. The chip-embedded package according to claim 1, wherein, The side of the chip furthest from the metal substrate is flush with the first surface; The step further includes a third surface, and the second surface protrudes from the third surface; Furthermore, the other end of the first connector extends horizontally across the third surface within the molding layer to the first side of the base circuit board.

18. The embedded chip package according to claim 1, wherein, The thickness of the lines and connectors on the first side of the base circuit board is greater than or equal to 100 micrometers.

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