Forming method of flash memory unit

By forming an amorphous silicon layer on the tunnel oxide layer of the flash memory unit and performing multiple seed particle formation and surface annealing treatments, the problem of uneven distribution of nanocrystalline silicon particles in the flash memory unit is solved and the number of storage electrons and equipment are improved. performance.

CN104299904AActive Publication Date: 2015-01-21SEMICON MFG INT (SHANGHAI) CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SEMICON MFG INT (SHANGHAI) CORP
Filing Date
2013-07-16
Publication Date
2015-01-21

AI Technical Summary

Technical Problem

Defects are prone to occur in the tunnel oxide layer in existing flash memory cells, resulting in the loss of electrons in the floating gate, poor retention of stored data, and uneven distribution of nanocrystalline silicon particles, resulting in a limited number of stored electrons.

Method used

By forming an amorphous silicon layer on the tunnel oxide layer, multiple seed particle formation processes are performed, and surface annealing treatment is performed between two adjacent seed particle formation processes, and finally an annealing process is performed to form a high-density Nanocrystalline silicon particles improve particle distribution uniformity and density.

Benefits of technology

The density of nanocrystalline silicon particles on the tunnel oxide layer is significantly increased, increasing the number of electrons that the flash memory unit can store and improving device performance.

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Abstract

The invention discloses a forming method of a flash memory unit. The forming method comprises the following steps: providing a semiconductor substrate; forming a tunneling oxide layer on the semiconductor substrate; forming nanocrystalline silicon particles on the tunneling oxide layer; forming an isolation insulating layer on the tunneling oxide layer and the nanocrystalline silicon particles; and forming a control grid on the isolation insulating layer, wherein the step of forming the nanocrystalline silicon particles on the tunneling oxide layer comprises: forming an amorphous silicon layer on the tunneling oxide layer; and performing repeated seed crystal particle forming processes on the amorphous silicon layer, wherein surface annealing treatment is performed between two adjacent seed crystal particle forming processes, and an annealing process is performed after the last seed crystal particle forming process. The flash memory unit can be used for storing a large quantity of electrons, and has high performance.
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